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author | Kumar Gala <galak@kernel.crashing.org> | 2007-02-18 17:34:33 +0300 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2007-02-18 17:34:33 +0300 |
commit | c2944612cf30aece4526f23e96e1d234a1870ed6 (patch) | |
tree | 47bcb990bc98bae6b32180dbff1a384aec05b6a4 /arch | |
parent | 56d7b794026e00a3c4608bb10ed99dd1e5b9fc22 (diff) | |
parent | 6d9065d8af2c86464b1f16e8aad80b3aa91756d2 (diff) | |
download | linux-c2944612cf30aece4526f23e96e1d234a1870ed6.tar.xz |
Merge branch '86xx' into for_paulus
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8641_hpcn.dts | 193 |
1 files changed, 85 insertions, 108 deletions
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 8c75e4e1258f..8a4995a85ba0 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts @@ -66,7 +66,7 @@ compatible = "fsl-i2c"; reg = <3000 100>; interrupts = <2b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -75,7 +75,7 @@ compatible = "fsl-i2c"; reg = <3100 100>; interrupts = <2b 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; dfsrr; }; @@ -85,31 +85,26 @@ device_type = "mdio"; compatible = "gianfar"; reg = <24520 20>; - linux,phandle = <24520>; - ethernet-phy@0 { - linux,phandle = <2452000>; - interrupt-parent = <40000>; + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <0>; device_type = "ethernet-phy"; }; - ethernet-phy@1 { - linux,phandle = <2452001>; - interrupt-parent = <40000>; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <1>; device_type = "ethernet-phy"; }; - ethernet-phy@2 { - linux,phandle = <2452002>; - interrupt-parent = <40000>; + phy2: ethernet-phy@2 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <2>; device_type = "ethernet-phy"; }; - ethernet-phy@3 { - linux,phandle = <2452003>; - interrupt-parent = <40000>; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; interrupts = <4a 1>; reg = <3>; device_type = "ethernet-phy"; @@ -125,8 +120,8 @@ reg = <24000 1000>; mac-address = [ 00 E0 0C 00 73 00 ]; interrupts = <1d 2 1e 2 22 2>; - interrupt-parent = <40000>; - phy-handle = <2452000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; }; ethernet@25000 { @@ -138,8 +133,8 @@ reg = <25000 1000>; mac-address = [ 00 E0 0C 00 73 01 ]; interrupts = <23 2 24 2 28 2>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; }; ethernet@26000 { @@ -151,8 +146,8 @@ reg = <26000 1000>; mac-address = [ 00 E0 0C 00 02 FD ]; interrupts = <1F 2 20 2 21 2>; - interrupt-parent = <40000>; - phy-handle = <2452002>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; }; ethernet@27000 { @@ -164,8 +159,8 @@ reg = <27000 1000>; mac-address = [ 00 E0 0C 00 03 FD ]; interrupts = <25 2 26 2 27 2>; - interrupt-parent = <40000>; - phy-handle = <2452003>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; }; serial@4500 { device_type = "serial"; @@ -173,7 +168,7 @@ reg = <4500 100>; clock-frequency = <0>; interrupts = <2a 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; serial@4600 { @@ -182,7 +177,7 @@ reg = <4600 100>; clock-frequency = <0>; interrupts = <1c 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; pci@8000 { @@ -196,103 +191,102 @@ ranges = <02000000 0 80000000 80000000 0 20000000 01000000 0 00000000 e2000000 0 00100000>; clock-frequency = <1fca055>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; interrupts = <18 2>; interrupt-map-mask = <f800 0 0 7>; interrupt-map = < /* IDSEL 0x11 */ - 8800 0 0 1 4d0 3 2 - 8800 0 0 2 4d0 4 2 - 8800 0 0 3 4d0 5 2 - 8800 0 0 4 4d0 6 2 + 8800 0 0 1 &i8259 3 2 + 8800 0 0 2 &i8259 4 2 + 8800 0 0 3 &i8259 5 2 + 8800 0 0 4 &i8259 6 2 /* IDSEL 0x12 */ - 9000 0 0 1 4d0 4 2 - 9000 0 0 2 4d0 5 2 - 9000 0 0 3 4d0 6 2 - 9000 0 0 4 4d0 3 2 + 9000 0 0 1 &i8259 4 2 + 9000 0 0 2 &i8259 5 2 + 9000 0 0 3 &i8259 6 2 + 9000 0 0 4 &i8259 3 2 /* IDSEL 0x13 */ - 9800 0 0 1 4d0 0 0 - 9800 0 0 2 4d0 0 0 - 9800 0 0 3 4d0 0 0 - 9800 0 0 4 4d0 0 0 + 9800 0 0 1 &i8259 0 0 + 9800 0 0 2 &i8259 0 0 + 9800 0 0 3 &i8259 0 0 + 9800 0 0 4 &i8259 0 0 /* IDSEL 0x14 */ - a000 0 0 1 4d0 0 0 - a000 0 0 2 4d0 0 0 - a000 0 0 3 4d0 0 0 - a000 0 0 4 4d0 0 0 + a000 0 0 1 &i8259 0 0 + a000 0 0 2 &i8259 0 0 + a000 0 0 3 &i8259 0 0 + a000 0 0 4 &i8259 0 0 /* IDSEL 0x15 */ - a800 0 0 1 4d0 0 0 - a800 0 0 2 4d0 0 0 - a800 0 0 3 4d0 0 0 - a800 0 0 4 4d0 0 0 + a800 0 0 1 &i8259 0 0 + a800 0 0 2 &i8259 0 0 + a800 0 0 3 &i8259 0 0 + a800 0 0 4 &i8259 0 0 /* IDSEL 0x16 */ - b000 0 0 1 4d0 0 0 - b000 0 0 2 4d0 0 0 - b000 0 0 3 4d0 0 0 - b000 0 0 4 4d0 0 0 + b000 0 0 1 &i8259 0 0 + b000 0 0 2 &i8259 0 0 + b000 0 0 3 &i8259 0 0 + b000 0 0 4 &i8259 0 0 /* IDSEL 0x17 */ - b800 0 0 1 4d0 0 0 - b800 0 0 2 4d0 0 0 - b800 0 0 3 4d0 0 0 - b800 0 0 4 4d0 0 0 + b800 0 0 1 &i8259 0 0 + b800 0 0 2 &i8259 0 0 + b800 0 0 3 &i8259 0 0 + b800 0 0 4 &i8259 0 0 /* IDSEL 0x18 */ - c000 0 0 1 4d0 0 0 - c000 0 0 2 4d0 0 0 - c000 0 0 3 4d0 0 0 - c000 0 0 4 4d0 0 0 + c000 0 0 1 &i8259 0 0 + c000 0 0 2 &i8259 0 0 + c000 0 0 3 &i8259 0 0 + c000 0 0 4 &i8259 0 0 /* IDSEL 0x19 */ - c800 0 0 1 4d0 0 0 - c800 0 0 2 4d0 0 0 - c800 0 0 3 4d0 0 0 - c800 0 0 4 4d0 0 0 + c800 0 0 1 &i8259 0 0 + c800 0 0 2 &i8259 0 0 + c800 0 0 3 &i8259 0 0 + c800 0 0 4 &i8259 0 0 /* IDSEL 0x1a */ - d000 0 0 1 4d0 6 2 - d000 0 0 2 4d0 3 2 - d000 0 0 3 4d0 4 2 - d000 0 0 4 4d0 5 2 + d000 0 0 1 &i8259 6 2 + d000 0 0 2 &i8259 3 2 + d000 0 0 3 &i8259 4 2 + d000 0 0 4 &i8259 5 2 /* IDSEL 0x1b */ - d800 0 0 1 4d0 5 2 - d800 0 0 2 4d0 0 0 - d800 0 0 3 4d0 0 0 - d800 0 0 4 4d0 0 0 + d800 0 0 1 &i8259 5 2 + d800 0 0 2 &i8259 0 0 + d800 0 0 3 &i8259 0 0 + d800 0 0 4 &i8259 0 0 /* IDSEL 0x1c */ - e000 0 0 1 4d0 9 2 - e000 0 0 2 4d0 a 2 - e000 0 0 3 4d0 c 2 - e000 0 0 4 4d0 7 2 + e000 0 0 1 &i8259 9 2 + e000 0 0 2 &i8259 a 2 + e000 0 0 3 &i8259 c 2 + e000 0 0 4 &i8259 7 2 /* IDSEL 0x1d */ - e800 0 0 1 4d0 9 2 - e800 0 0 2 4d0 a 2 - e800 0 0 3 4d0 b 2 - e800 0 0 4 4d0 0 0 + e800 0 0 1 &i8259 9 2 + e800 0 0 2 &i8259 a 2 + e800 0 0 3 &i8259 b 2 + e800 0 0 4 &i8259 0 0 /* IDSEL 0x1e */ - f000 0 0 1 4d0 c 2 - f000 0 0 2 4d0 0 0 - f000 0 0 3 4d0 0 0 - f000 0 0 4 4d0 0 0 + f000 0 0 1 &i8259 c 2 + f000 0 0 2 &i8259 0 0 + f000 0 0 3 &i8259 0 0 + f000 0 0 4 &i8259 0 0 /* IDSEL 0x1f */ - f800 0 0 1 4d0 6 2 - f800 0 0 2 4d0 0 0 - f800 0 0 3 4d0 0 0 - f800 0 0 4 4d0 0 0 + f800 0 0 1 &i8259 6 2 + f800 0 0 2 &i8259 0 0 + f800 0 0 3 &i8259 0 0 + f800 0 0 4 &i8259 0 0 >; - i8259@4d0 { - linux,phandle = <4d0>; + i8259: i8259@4d0 { clock-frequency = <0>; interrupt-controller; device_type = "interrupt-controller"; @@ -302,12 +296,11 @@ compatible = "chrp,iic"; big-endian; interrupts = <49 2>; - interrupt-parent = <40000>; + interrupt-parent = <&mpic>; }; }; - pic@40000 { - linux,phandle = <40000>; + mpic: pic@40000 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; @@ -316,23 +309,7 @@ built-in; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; - interrupts = < - 10 2 11 2 12 2 13 2 - 14 2 15 2 16 2 17 2 - 18 2 19 2 1a 2 1b 2 - 1c 2 1d 2 1e 2 1f 2 - 20 2 21 2 22 2 23 2 - 24 2 25 2 26 2 27 2 - 28 2 29 2 2a 2 2b 2 - 2c 2 2d 2 2e 2 2f 2 - 30 2 31 2 32 2 33 2 - 34 2 35 2 36 2 37 2 - 38 2 39 2 2a 2 3b 2 - 3c 2 3d 2 3e 2 3f 2 - 48 1 49 2 4a 1 - >; - interrupt-parent = <40000>; + big-endian; }; }; }; |