diff options
| author | Wolfgang Grandegger <wg@grandegger.com> | 2009-03-30 14:02:45 +0400 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-04-06 18:19:18 +0400 |
| commit | 7995c7e94ff4db2ddb865ab42cc5a2e6abbbd71a (patch) | |
| tree | 1e2fa8c4f916359fb9bbf727768e223cbe1bad27 /arch | |
| parent | 21e9d9456f6022caa80fcd9057035af82091f58f (diff) | |
| download | linux-7995c7e94ff4db2ddb865ab42cc5a2e6abbbd71a.tar.xz | |
powerpc/85xx: TQM8548: Update DTS file for multi-chip support
This patch adds multi-chip support for the Micron MT29F8G08FAB NAND
flash memory on the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/boot/dts/tqm8548-bigflash.dts | 7 | ||||
| -rw-r--r-- | arch/powerpc/boot/dts/tqm8548.dts | 7 |
2 files changed, 10 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 15086eb65c50..21061145b586 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -380,10 +380,13 @@ upm@3,0 { #address-cells = <0>; #size-cells = <0>; - compatible = "fsl,upm-nand"; + compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; reg = <3 0x0 0x800>; fsl,upm-addr-offset = <0x10>; fsl,upm-cmd-offset = <0x08>; + /* Micron MT29F8G08FAB multi-chip device */ + fsl,upm-addr-line-cs-offsets = <0x0 0x200>; + fsl,upm-wait-flags = <0x5>; chip-delay = <25>; // in micro-seconds nand@0 { @@ -392,7 +395,7 @@ partition@0 { label = "fs"; - reg = <0x00000000 0x01000000>; + reg = <0x00000000 0x10000000>; }; }; }; diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index b7b65f5e79b6..413c27fe4741 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -380,10 +380,13 @@ upm@3,0 { #address-cells = <0>; #size-cells = <0>; - compatible = "fsl,upm-nand"; + compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; reg = <3 0x0 0x800>; fsl,upm-addr-offset = <0x10>; fsl,upm-cmd-offset = <0x08>; + /* Micron MT29F8G08FAB multi-chip device */ + fsl,upm-addr-line-cs-offsets = <0x0 0x200>; + fsl,upm-wait-flags = <0x5>; chip-delay = <25>; // in micro-seconds nand@0 { @@ -392,7 +395,7 @@ partition@0 { label = "fs"; - reg = <0x00000000 0x01000000>; + reg = <0x00000000 0x10000000>; }; }; }; |