diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-08 07:18:42 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-10-08 07:18:42 +0300 |
| commit | 66f2c6d9525baa7534640f09f406cd2987e0f287 (patch) | |
| tree | c4874177b3dd0e2d0913cb0f898f74412f2801c1 /arch | |
| parent | a771151a8323a5ca81f443a9a439851b8a872c85 (diff) | |
| parent | e40454d3f444ba7f8cc78dd985a1414a5945757c (diff) | |
| download | linux-66f2c6d9525baa7534640f09f406cd2987e0f287.tar.xz | |
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"These are updates for platform specific code on 32-bit ARM machines,
essentially anything that can not (yet) be expressed using DT files.
Noteworthy changes include:
- We get support for running in big-endian mode on two platforms:
sunxi (Allwinner) and s3c24xx (old Samsung).
- The recently added Uniphier platform now uses standard PSCI methods
for SMP booting and we remove support for old bootloader versions
that did not support it yet.
- In sunxi, we gain support for the "Nextthing GR8" SoC, which is a
close relative of the Allwinner A13 and R8 chips.
- PXA completes its move over to the generic dmaengine framework and
removes its old private API
- mach-bcm gains support for BCM47189/BCM53573, their first ARM SoC
with integrated 802.11ac wireless networking"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
ARM: imx legacy: pca100: move peripheral initialization to .init_late
ARM: imx legacy: mx27ads: move peripheral initialization to .init_late
ARM: imx legacy: mx21ads: move peripheral initialization to .init_late
ARM: imx legacy: pcm043: move peripheral initialization to .init_late
ARM: imx legacy: mx35-3ds: move peripheral initialization to .init_late
ARM: imx legacy: mx27-3ds: move peripheral initialization to .init_late
ARM: imx legacy: imx27-visstrim-m10: move peripheral initialization to .init_late
ARM: imx legacy: vpr200: move peripheral initialization to .init_late
ARM: imx legacy: mx31moboard: move peripheral initialization to .init_late
ARM: imx legacy: armadillo5x0: move peripheral initialization to .init_late
ARM: imx legacy: qong: move peripheral initialization to .init_late
ARM: imx legacy: mx31-3ds: move peripheral initialization to .init_late
ARM: imx legacy: pcm037: move peripheral initialization to .init_late
ARM: imx legacy: mx31lilly: move peripheral initialization to .init_late
ARM: imx legacy: mx31ads: move peripheral initialization to .init_late
ARM: imx legacy: mx31lite: move peripheral initialization to .init_late
ARM: imx legacy: kzm: move peripheral initialization to .init_late
MAINTAINERS: update list of Oxnas maintainers
ARM: orion5x: remove extraneous NO_IRQ
ARM: orion: simplify orion_ge00_switch_init
...
Diffstat (limited to 'arch')
83 files changed, 684 insertions, 1285 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index a9693b6987a6..d83f7c369e51 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -186,10 +186,11 @@ choice config DEBUG_BRCMSTB_UART bool "Use BRCMSTB UART for low-level debug" depends on ARCH_BRCMSTB - select DEBUG_UART_8250 help Say Y here if you want the debug print routines to direct - their output to the first serial port on these devices. + their output to the first serial port on these devices. The + UART physical and virtual address is automatically provided + based on the chip identification register value. If you have a Broadcom STB chip and would like early print messages to appear over the UART, select this option. @@ -861,12 +862,12 @@ choice via SCIF2 on Renesas R-Car H1 (R8A7779). config DEBUG_RCAR_GEN2_SCIF0 - bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793" - depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793 + bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7792/R8A7793" + depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7792 || ARCH_R8A7793 help Say Y here if you want kernel low-level debugging support - via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), or - M2-N (R8A7793). + via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), V2H + (R8A7792), or M2-N (R8A7793). config DEBUG_RCAR_GEN2_SCIF2 bool "Kernel low-level debugging messages via SCIF2 on R8A7794" @@ -1430,6 +1431,7 @@ config DEBUG_LL_INCLUDE default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 default "debug/bcm63xx.S" if DEBUG_BCM63XX_UART default "debug/digicolor.S" if DEBUG_DIGICOLOR_UA0 + default "debug/brcmstb.S" if DEBUG_BRCMSTB_UART default "mach/debug-macro.S" # Compatibility options for PL01x @@ -1520,7 +1522,6 @@ config DEBUG_UART_PHYS default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0 default 0xe8008000 if DEBUG_R7S72100_SCIF2 default 0xf0000be0 if ARCH_EBSA110 - default 0xf040ab00 if DEBUG_BRCMSTB_UART default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE default 0xf7fc9000 if DEBUG_BERLIN_UART @@ -1604,7 +1605,6 @@ config DEBUG_UART_VIRT default 0xfb009000 if DEBUG_REALVIEW_STD_PORT default 0xfb00c000 if DEBUG_AT91_SAMA5D4_USART3 default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT - default 0xfc40ab00 if DEBUG_BRCMSTB_UART default 0xfc705000 if DEBUG_ZTE_ZX default 0xfcfe8600 if DEBUG_BCM63XX_UART default 0xfd000000 if DEBUG_SPEAR3XX || DEBUG_SPEAR13XX @@ -1677,8 +1677,7 @@ config DEBUG_UART_8250_WORD DEBUG_ALPINE_UART0 || \ DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \ DEBUG_DAVINCI_DA8XX_UART2 || \ - DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \ - DEBUG_BRCMSTB_UART + DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 config DEBUG_UART_8250_PALMCHIP bool "8250 UART is Palmchip BK-310x" @@ -1697,7 +1696,8 @@ config DEBUG_UNCOMPRESS bool depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG || ARM_SINGLE_ARMV7M default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \ - (!DEBUG_TEGRA_UART || !ZBOOT_ROM) + (!DEBUG_TEGRA_UART || !ZBOOT_ROM) && \ + !DEBUG_BRCMSTB_UART help This option influences the normal decompressor output for multiplatform kernels. Normally, multiplatform kernels disable diff --git a/arch/arm/configs/colibri_pxa270_defconfig b/arch/arm/configs/colibri_pxa270_defconfig index 0b9211b2b73b..3146ad055716 100644 --- a/arch/arm/configs/colibri_pxa270_defconfig +++ b/arch/arm/configs/colibri_pxa270_defconfig @@ -83,7 +83,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=8 -CONFIG_IDE=y CONFIG_NETDEVICES=y CONFIG_PHYLIB=y CONFIG_NET_ETHERNET=y diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig index 1c8c9ee71d31..a9dd1e93b556 100644 --- a/arch/arm/configs/lpd270_defconfig +++ b/arch/arm/configs/lpd270_defconfig @@ -31,7 +31,6 @@ CONFIG_MTD_CFI_GEOMETRY=y # CONFIG_MTD_CFI_I1 is not set CONFIG_MTD_CFI_INTELEXT=y CONFIG_BLK_DEV_NBD=y -CONFIG_IDE=y CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_SMC91X=y diff --git a/arch/arm/configs/pxa255-idp_defconfig b/arch/arm/configs/pxa255-idp_defconfig index 917a070b4bb9..088627ad875f 100644 --- a/arch/arm/configs/pxa255-idp_defconfig +++ b/arch/arm/configs/pxa255-idp_defconfig @@ -28,7 +28,6 @@ CONFIG_MTD_CFI_GEOMETRY=y # CONFIG_MTD_MAP_BANK_WIDTH_2 is not set # CONFIG_MTD_CFI_I1 is not set CONFIG_MTD_CFI_INTELEXT=y -CONFIG_IDE=y CONFIG_NETDEVICES=y CONFIG_NET_ETHERNET=y CONFIG_SMC91X=y diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig index dc5517eaf09f..a016ecc0084b 100644 --- a/arch/arm/configs/pxa_defconfig +++ b/arch/arm/configs/pxa_defconfig @@ -26,8 +26,6 @@ CONFIG_PARTITION_ADVANCED=y CONFIG_LDM_PARTITION=y CONFIG_CMDLINE_PARTITION=y CONFIG_ARCH_PXA=y -CONFIG_MACH_PXA27X_DT=y -CONFIG_MACH_PXA3XX_DT=y CONFIG_ARCH_LUBBOCK=y CONFIG_MACH_MAINSTONE=y CONFIG_MACH_ZYLONITE300=y diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig index 0ada29d568ec..492f7f3eb4ac 100644 --- a/arch/arm/configs/trizeps4_defconfig +++ b/arch/arm/configs/trizeps4_defconfig @@ -94,8 +94,6 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=8 -CONFIG_IDE=y -CONFIG_BLK_DEV_IDECS=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_SG=y diff --git a/arch/arm/include/asm/hardware/cache-uniphier.h b/arch/arm/include/asm/hardware/cache-uniphier.h index 102e3fbe1e10..eaa60da7dac3 100644 --- a/arch/arm/include/asm/hardware/cache-uniphier.h +++ b/arch/arm/include/asm/hardware/cache-uniphier.h @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,28 +20,11 @@ #ifdef CONFIG_CACHE_UNIPHIER int uniphier_cache_init(void); -int uniphier_cache_l2_is_enabled(void); -void uniphier_cache_l2_touch_range(unsigned long start, unsigned long end); -void uniphier_cache_l2_set_locked_ways(u32 way_mask); #else static inline int uniphier_cache_init(void) { return -ENODEV; } - -static inline int uniphier_cache_l2_is_enabled(void) -{ - return 0; -} - -static inline void uniphier_cache_l2_touch_range(unsigned long start, - unsigned long end) -{ -} - -static inline void uniphier_cache_l2_set_locked_ways(u32 way_mask) -{ -} #endif #endif /* __CACHE_UNIPHIER_H */ diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S new file mode 100644 index 000000000000..9113d7b33ae0 --- /dev/null +++ b/arch/arm/include/debug/brcmstb.S @@ -0,0 +1,145 @@ +/* + * Copyright (C) 2016 Broadcom + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/serial_reg.h> + +/* Physical register offset and virtual register offset */ +#define REG_PHYS_BASE 0xf0000000 +#define REG_VIRT_BASE 0xfc000000 +#define REG_PHYS_ADDR(x) ((x) + REG_PHYS_BASE) + +/* Product id can be read from here */ +#define SUN_TOP_CTRL_BASE REG_PHYS_ADDR(0x404000) + +#define UARTA_3390 REG_PHYS_ADDR(0x40a900) +#define UARTA_7250 REG_PHYS_ADDR(0x40b400) +#define UARTA_7268 REG_PHYS_ADDR(0x40c000) +#define UARTA_7271 UARTA_7268 +#define UARTA_7364 REG_PHYS_ADDR(0x40b000) +#define UARTA_7366 UARTA_7364 +#define UARTA_74371 REG_PHYS_ADDR(0x406b00) +#define UARTA_7439 REG_PHYS_ADDR(0x40a900) +#define UARTA_7445 REG_PHYS_ADDR(0x40ab00) + +#define UART_SHIFT 2 + +#define checkuart(rp, rv, family_id, family) \ + /* Load family id */ \ + ldr rp, =family_id ; \ + /* Compare SUN_TOP_CTRL value against it */ \ + cmp rp, rv ; \ + /* Passed test, load address */ \ + ldreq rp, =UARTA_##family ; \ + /* Jump to save UART address */ \ + beq 91f + + .macro addruart, rp, rv, tmp + adr \rp, 99f @ actual addr of 99f + ldr \rv, [\rp] @ linked addr is stored there + sub \rv, \rv, \rp @ offset between the two + ldr \rp, [\rp, #4] @ linked brcmstb_uart_config + sub \tmp, \rp, \rv @ actual brcmstb_uart_config + ldr \rp, [\tmp] @ Load brcmstb_uart_config + cmp \rp, #1 @ needs initialization? + bne 100f @ no; go load the addresses + mov \rv, #0 @ yes; record init is done + str \rv, [\tmp] + + /* Check SUN_TOP_CTRL base */ + ldr \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA + ldr \rv, [\rp, #0] @ get register contents + and \rv, \rv, #0xffffff00 @ strip revision bits [7:0] + + /* Chip specific detection starts here */ +20: checkuart(\rp, \rv, 0x33900000, 3390) +21: checkuart(\rp, \rv, 0x72500000, 7250) +22: checkuart(\rp, \rv, 0x72680000, 7268) +23: checkuart(\rp, \rv, 0x72710000, 7271) +24: checkuart(\rp, \rv, 0x73640000, 7364) +25: checkuart(\rp, \rv, 0x73660000, 7366) +26: checkuart(\rp, \rv, 0x07437100, 74371) +27: checkuart(\rp, \rv, 0x74390000, 7439) +28: checkuart(\rp, \rv, 0x74450000, 7445) + + /* No valid UART found */ +90: mov \rp, #0 + /* fall through */ + + /* Record whichever UART we chose */ +91: str \rp, [\tmp, #4] @ Store in brcmstb_uart_phys + cmp \rp, #0 @ Valid UART address? + bne 92f @ Yes, go process it + str \rp, [\tmp, #8] @ Store 0 in brcmstb_uart_virt + b 100f @ Done +92: and \rv, \rp, #0xffffff @ offset within 16MB section + add \rv, \rv, #REG_VIRT_BASE + str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt + b 100f + + .align +99: .word . + .word brcmstb_uart_config + .ltorg + + /* Load previously selected UART address */ +100: ldr \rp, [\tmp, #4] @ Load brcmstb_uart_phys + ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt + .endm + + .macro store, rd, rx:vararg + str \rd, \rx + .endm + + .macro load, rd, rx:vararg + ldr \rd, \rx + .endm + + .macro senduart,rd,rx + store \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: load \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + .macro waituart,rd,rx + .endm + +/* + * Storage for the state maintained by the macros above. + * + * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c. + * That's because this header is included from multiple files, and we only + * want a single copy of the data. In particular, the UART probing code above + * assumes it's running using physical addresses. This is true when this file + * is included from head.o, but not when included from debug.o. So we need + * to share the probe results between the two copies, rather than having + * to re-run the probing again later. + * + * In the decompressor, we put the symbol/storage right here, since common.c + * isn't included in the decompressor build. This symbol gets put in .text + * even though it's really data, since .data is discarded from the + * decompressor. Luckily, .text is writeable in the decompressor, unless + * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug. + */ +#if defined(ZIMAGE) +brcmstb_uart_config: + /* Debug UART initialization required */ + .word 1 + /* Debug UART physical address */ + .word 0 + /* Debug UART virtual address */ + .word 0 +#endif diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 7bf3ae76f782..a0e66d8200c5 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -158,6 +158,20 @@ config ARCH_BCM2835 This enables support for the Broadcom BCM2835 and BCM2836 SoCs. This SoC is used in the Raspberry Pi and Roku 2 devices. +config ARCH_BCM_53573 + bool "Broadcom BCM53573 SoC series support" + depends on ARCH_MULTI_V7 + select ARCH_BCM_IPROC + select HAVE_ARM_ARCH_TIMER + help + BCM53573 series is set of SoCs using ARM Cortex-A7 CPUs with wireless + embedded in the chipset. + This SoC line is mostly used in home routers and is some cheaper + alternative for Northstar family. + + The base chip is BCM53573 and there are some packaging modifications + like BCM47189 and BCM47452. + config ARCH_BCM_63XX bool "Broadcom BCM63xx DSL SoC" depends on ARCH_MULTI_V7 diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c index 99a67cfb7c0d..07e3a86c6466 100644 --- a/arch/arm/mach-bcm/brcmstb.c +++ b/arch/arm/mach-bcm/brcmstb.c @@ -19,6 +19,22 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> +/* + * Storage for debug-macro.S's state. + * + * This must be in .data not .bss so that it gets initialized each time the + * kernel is loaded. The data is declared here rather than debug-macro.S so + * that multiple inclusions of debug-macro.S point at the same data. + */ +u32 brcmstb_uart_config[3] = { + /* Debug UART initialization required */ + 1, + /* Debug UART physical address */ + 0, + /* Debug UART virtual address */ + 0, +}; + static void __init brcmstb_init_irq(void) { irqchip_init(); diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 0d046accb35b..ed3d0e9f72ac 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -501,6 +501,7 @@ static struct clk_lookup da850_clks[] = { CLK("da8xx_lcdc.0", "fck", &lcdc_clk), CLK("da830-mmc.0", NULL, &mmcsd0_clk), CLK("da830-mmc.1", NULL, &mmcsd1_clk), + CLK("ti-aemif", NULL, &aemif_clk), CLK(NULL, "aemif", &aemif_clk), CLK(NULL, "usb11", &usb11_clk), CLK(NULL, "usb20", &usb20_clk), diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 754f478110b4..35c0d65fe7f1 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -37,6 +37,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,davinci-dm6467-emac", 0x01e20000, "davinci_emac.1", NULL), OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d00000, "davinci-mcasp.0", NULL), + OF_DEV_AUXDATA("ti,da850-aemif", 0x68000000, "ti-aemif", NULL), {} }; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 18f0c856f290..0bb63b8d21e7 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -12,6 +12,7 @@ menuconfig ARCH_EXYNOS depends on ARCH_MULTI_V7 select ARCH_HAS_BANDGAP select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC select COMMON_CLK_SAMSUNG diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index acabf0bffc5d..757fc11de30d 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -30,25 +30,10 @@ static struct map_desc exynos4_iodesc[] __initdata = { { - .virtual = (unsigned long)S5P_VA_CMU, - .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), - .length = SZ_128K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_COREPERI_BASE, .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), .length = SZ_8K, .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC0, - .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC1, - .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), - .length = SZ_64K, - .type = MT_DEVICE, }, }; diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index c48ba4fbdfd2..5fb0040cc6d3 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -18,11 +18,6 @@ #define EXYNOS_PA_CHIPID 0x10000000 -#define EXYNOS4_PA_CMU 0x10030000 - -#define EXYNOS4_PA_DMC0 0x10400000 -#define EXYNOS4_PA_DMC1 0x10410000 - #define EXYNOS4_PA_COREPERI 0x10500000 #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 2636adfcb999..cab128913e72 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o +obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o endif ifdef CONFIG_SND_IMX_SOC diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index bcca48138933..c4436d9c52ff 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -104,7 +104,7 @@ void imx_anatop_init(void); void imx_anatop_pre_suspend(void); void imx_anatop_post_resume(void); int imx6_set_lpm(enum mxc_cpu_pwr_mode mode); -void imx6q_set_int_mem_clk_lpm(bool enable); +void imx6_set_int_mem_clk_lpm(bool enable); void imx6sl_set_wait_clk(bool enter); int imx_mmdc_get_ddr_type(void); diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c index db0f48c4b17e..bfeb25aaf9a2 100644 --- a/arch/arm/mach-imx/cpuidle-imx6q.c +++ b/arch/arm/mach-imx/cpuidle-imx6q.c @@ -85,7 +85,7 @@ EXPORT_SYMBOL_GPL(imx6q_cpuidle_fec_irqs_unused); int __init imx6q_cpuidle_init(void) { /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ - imx6q_set_int_mem_clk_lpm(true); + imx6_set_int_mem_clk_lpm(true); return cpuidle_register(&imx6q_cpuidle_driver, NULL); } diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c index 3c6672b3796b..c5a5c3a70ab1 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -9,6 +9,7 @@ #include <linux/cpuidle.h> #include <linux/cpu_pm.h> #include <linux/module.h> +#include <asm/cacheflush.h> #include <asm/cpuidle.h> #include <asm/suspend.h> @@ -17,6 +18,15 @@ static int imx6sx_idle_finish(unsigned long val) { + /* + * for Cortex-A7 which has an internal L2 + * cache, need to flush it before powering + * down ARM platform, since flushing L1 cache + * here again has very small overhead, compared + * to adding conditional code for L2 cache type, + * just call flush_cache_all() is fine. + */ + flush_cache_all(); cpu_do_idle(); return 0; @@ -90,6 +100,7 @@ static struct cpuidle_driver imx6sx_cpuidle_driver = { int __init imx6sx_cpuidle_init(void) { + imx6_set_int_mem_clk_lpm(true); imx6_enable_rbc(false); /* * set ARM power up/down timing to the fastest, diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index eaee47a2fcc0..17a97ba2cecf 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c @@ -493,24 +493,12 @@ static void __init armadillo5x0_init(void) regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - armadillo5x0_smc911x_resources[1].start = - gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)); - armadillo5x0_smc911x_resources[1].end = - gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)); - platform_add_devices(devices, ARRAY_SIZE(devices)); - imx_add_gpio_keys(&armadillo5x0_button_data); imx31_add_imx_i2c1(NULL); /* Register UART */ imx31_add_imx_uart0(&uart_pdata); imx31_add_imx_uart1(&uart_pdata); - /* SMSC9118 IRQ pin */ - gpio_direction_input(MX31_PIN_GPIO1_0); - - /* Register SDHC */ - imx31_add_mxc_mmc(0, &sdhc_pdata); - /* Register FB */ imx31_add_ipu_core(); imx31_add_mx3_sdc_fb(&mx3fb_pdata); @@ -527,21 +515,39 @@ static void __init armadillo5x0_init(void) /* set NAND page size to 2k if not configured via boot mode pins */ imx_writel(imx_readl(mx3_ccm_base + MXC_CCM_RCSR) | (1 << 30), mx3_ccm_base + MXC_CCM_RCSR); +} + +static void __init armadillo5x0_late(void) +{ + armadillo5x0_smc911x_resources[1].start = + gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)); + armadillo5x0_smc911x_resources[1].end = + gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)); + platform_add_devices(devices, ARRAY_SIZE(devices)); + + imx_add_gpio_keys(&armadillo5x0_button_data); + + /* SMSC9118 IRQ pin */ + gpio_direction_input(MX31_PIN_GPIO1_0); + + /* Register SDHC */ + imx31_add_mxc_mmc(0, &sdhc_pdata); /* RTC */ /* Get RTC IRQ and register the chip */ - if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) { - if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0) - armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO); + if (!gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc")) { + if (!gpio_direction_input(ARMADILLO5X0_RTC_GPIO)) + armadillo5x0_i2c_rtc.irq = + gpio_to_irq(ARMADILLO5X0_RTC_GPIO); else gpio_free(ARMADILLO5X0_RTC_GPIO); } + if (armadillo5x0_i2c_rtc.irq == 0) pr_warn("armadillo5x0_init: failed to get RTC IRQ\n"); i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); /* USB */ - usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); if (usbotg_pdata.otg) @@ -565,5 +571,6 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500") .init_irq = mx31_init_irq, .init_time = armadillo5x0_timer_init, .init_machine = armadillo5x0_init, + .init_late = armadillo5x0_late, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index ede2bdbb5dd5..dd75a4756761 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -540,7 +540,6 @@ static void __init visstrim_m10_revision(void) static void __init visstrim_m10_board_init(void) { int ret; - int mo_version; imx27_soc_init(); visstrim_m10_revision(); @@ -550,11 +549,6 @@ static void __init visstrim_m10_board_init(void) if (ret) pr_err("Failed to setup pins (%d)\n", ret); - ret = gpio_request_array(visstrim_m10_gpios, - ARRAY_SIZE(visstrim_m10_gpios)); - if (ret) - pr_err("Failed to request gpios (%d)\n", ret); - imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata); imx27_add_imx_uart0(&uart_pdata); @@ -566,12 +560,26 @@ static void __init visstrim_m10_board_init(void) imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata); imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata); imx27_add_fec(NULL); - imx_add_gpio_keys(&visstrim_gpio_keys_platform_data); + platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); +} + +static void __init visstrim_m10_late_init(void) +{ + int mo_version, ret; + + ret = gpio_request_array(visstrim_m10_gpios, + ARRAY_SIZE(visstrim_m10_gpios)); + if (ret) + pr_err("Failed to request gpios (%d)\n", ret); + + imx_add_gpio_keys(&visstrim_gpio_keys_platform_data); + imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata, sizeof(snd_mx27vis_pdata)); platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0, &iclink_tvp5150, sizeof(iclink_tvp5150)); + gpio_led_register_device(0, &visstrim_m10_led_data); /* Use mother board version to decide what video devices we shall use */ @@ -591,6 +599,7 @@ static void __init visstrim_m10_board_init(void) visstrim_deinterlace_init(); visstrim_analog_camera_init(); } + visstrim_coda_init(); } @@ -607,5 +616,6 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") .init_irq = mx27_init_irq, .init_time = visstrim_m10_timer_init, .init_machine = visstrim_m10_board_init, + .init_late = visstrim_m10_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c index 6bb7d9cf1e38..58a2b88233e6 100644 --- a/arch/arm/mach-imx/mach-imx6ul.c +++ b/arch/arm/mach-imx/mach-imx6ul.c @@ -16,6 +16,7 @@ #include <asm/mach/map.h> #include "common.h" +#include "cpuidle.h" static void __init imx6ul_enet_clk_init(void) { @@ -80,6 +81,8 @@ static void __init imx6ul_init_irq(void) static void __init imx6ul_init_late(void) { + imx6sx_cpuidle_init(); + if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); } diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index e277d9c230e5..ab847e2c822a 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c @@ -245,13 +245,17 @@ static void __init kzm_board_init(void) mxc_iomux_setup_multiple_pins(kzm_pins, ARRAY_SIZE(kzm_pins), "kzm"); - kzm_init_ext_uart(); - kzm_init_smsc9118(); kzm_init_imx_uart(); pr_info("Clock input source is 26MHz\n"); } +static void __init kzm_late_init(void) +{ + kzm_init_ext_uart(); + kzm_init_smsc9118(); +} + /* * This structure defines static mappings for the kzm-arm11-01 board. */ @@ -291,5 +295,6 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") .init_irq = mx31_init_irq, .init_time = kzm_timer_init, .init_machine = kzm_board_init, + .init_late = kzm_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index 9986f9a697c8..5e366824814f 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c @@ -302,12 +302,16 @@ static void __init mx21ads_board_init(void) imx21_add_imx_uart0(&uart_pdata_rts); imx21_add_imx_uart2(&uart_pdata_norts); imx21_add_imx_uart3(&uart_pdata_rts); - imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata); imx21_add_mxc_nand(&mx21ads_nand_board_info); - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - imx21_add_imx_fb(&mx21ads_fb_data); +} + +static void __init mx21ads_late_init(void) +{ + imx21_add_mxc_mmc(0, &mx21ads_sdhc_pdata); + + platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); mx21ads_cs8900_resources[1].start = gpio_to_irq(MX21ADS_CS8900A_IRQ_GPIO); @@ -328,6 +332,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS") .init_early = imx21_init_early, .init_irq = mx21_init_irq, .init_time = mx21ads_timer_init, - .init_machine = mx21ads_board_init, + .init_machine = mx21ads_board_init, + .init_late = mx21ads_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 9ef4640f3660..7ba651a9b5b8 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -485,17 +485,32 @@ static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = { static void __init mx27pdk_init(void) { - int ret; imx27_soc_init(); mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), "mx27pdk"); - mx27_3ds_sdhc1_enable_level_translator(); imx27_add_imx_uart0(&uart_pdata); imx27_add_fec(NULL); imx27_add_imx_keypad(&mx27_3ds_keymap_data); - imx27_add_mxc_mmc(0, &sdhc1_pdata); imx27_add_imx2_wdt(); + + imx27_add_spi_imx1(&spi2_pdata); + imx27_add_spi_imx0(&spi1_pdata); + + imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); + platform_add_devices(devices, ARRAY_SIZE(devices)); + imx27_add_imx_fb(&mx27_3ds_fb_data); + + imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata); +} + +static void __init mx27pdk_late_init(void) +{ + int ret; + + mx27_3ds_sdhc1_enable_level_translator(); + imx27_add_mxc_mmc(0, &sdhc1_pdata); + otg_phy_init(); if (otg_mode_host) { @@ -509,17 +524,12 @@ static void __init mx27pdk_init(void) if (!otg_mode_host) imx27_add_fsl_usb2_udc(&otg_device_pdata); - imx27_add_spi_imx1(&spi2_pdata); - imx27_add_spi_imx0(&spi1_pdata); mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT); spi_register_board_info(mx27_3ds_spi_devs, - ARRAY_SIZE(mx27_3ds_spi_devs)); + ARRAY_SIZE(mx27_3ds_spi_devs)); if (mxc_expio_init(MX27_CS5_BASE_ADDR, IMX_GPIO_NR(3, 28))) pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); - imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); - platform_add_devices(devices, ARRAY_SIZE(devices)); - imx27_add_imx_fb(&mx27_3ds_fb_data); ret = gpio_request_array(mx27_3ds_camera_gpios, ARRAY_SIZE(mx27_3ds_camera_gpios)); @@ -529,7 +539,6 @@ static void __init mx27pdk_init(void) } imx27_add_mx2_camera(&mx27_3ds_cam_pdata); - imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata); imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); } @@ -547,5 +556,6 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") .init_irq = mx27_init_irq, .init_time = mx27pdk_timer_init, .init_machine = mx27pdk_init, + .init_late = mx27pdk_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index a4c389eae31a..a04bb094ded1 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -352,14 +352,20 @@ static void __init mx27ads_board_init(void) i2c_register_board_info(1, mx27ads_i2c_devices, ARRAY_SIZE(mx27ads_i2c_devices)); imx27_add_imx_i2c(1, &mx27ads_i2c1_data); - mx27ads_regulator_init(); imx27_add_imx_fb(&mx27ads_fb_data); + + imx27_add_fec(NULL); + imx27_add_mxc_w1(); +} + +static void __init mx27ads_late_init(void) +{ + mx27ads_regulator_init(); + imx27_add_mxc_mmc(0, &sdhc1_pdata); imx27_add_mxc_mmc(1, &sdhc2_pdata); - imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - imx27_add_mxc_w1(); } static void __init mx27ads_timer_init(void) @@ -395,5 +401,6 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS") .init_irq = mx27_init_irq, .init_time = mx27ads_timer_init, .init_machine = mx27ads_board_init, + .init_late = mx27ads_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 65a0dc06a97c..12b8a52c9cb4 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c @@ -694,8 +694,6 @@ static struct platform_device *devices[] __initdata = { static void __init mx31_3ds_init(void) { - int ret; - imx31_soc_init(); /* Configure SPI1 IOMUX */ @@ -708,14 +706,31 @@ static void __init mx31_3ds_init(void) imx31_add_mxc_nand(&mx31_3ds_nand_board_info); imx31_add_spi_imx1(&spi1_pdata); + + imx31_add_imx_keypad(&mx31_3ds_keymap_data); + + imx31_add_imx2_wdt(); + imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); + + imx31_add_spi_imx0(&spi0_pdata); + imx31_add_ipu_core(); + imx31_add_mx3_sdc_fb(&mx3fb_pdata); + + imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata); + + imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); +} + +static void __init mx31_3ds_late(void) +{ + int ret; + mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); spi_register_board_info(mx31_3ds_spi_devs, - ARRAY_SIZE(mx31_3ds_spi_devs)); + ARRAY_SIZE(mx31_3ds_spi_devs)); platform_add_devices(devices, ARRAY_SIZE(devices)); - imx31_add_imx_keypad(&mx31_3ds_keymap_data); - mx31_3ds_usbotg_init(); if (otg_mode_host) { otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | @@ -733,14 +748,9 @@ static void __init mx31_3ds_init(void) if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1))) printk(KERN_WARNING "Init of the debug board failed, all " - "devices on the debug board are unusable.\n"); - imx31_add_imx2_wdt(); - imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); - imx31_add_mxc_mmc(0, &sdhc1_pdata); + "devices on the debug board are unusable.\n"); - imx31_add_spi_imx0(&spi0_pdata); - imx31_add_ipu_core(); - imx31_add_mx3_sdc_fb(&mx3fb_pdata); + imx31_add_mxc_mmc(0, &sdhc1_pdata); /* CSI */ /* Camera power: default - off */ @@ -752,10 +762,6 @@ static void __init mx31_3ds_init(void) } mx31_3ds_init_camera(); - - imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata); - - imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); } static void __init mx31_3ds_timer_init(void) @@ -778,6 +784,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") .init_irq = mx31_init_irq, .init_time = mx31_3ds_timer_init, .init_machine = mx31_3ds_init, + .init_late = mx31_3ds_late, .reserve = mx31_3ds_reserve, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index 4f2c56d44ba1..766b8b93fb97 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c @@ -554,20 +554,19 @@ static void __init mx31ads_map_io(void) iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); } -static void __init mx31ads_init_irq(void) -{ - mx31_init_irq(); - mx31ads_init_expio(); -} - static void __init mx31ads_init(void) { imx31_soc_init(); - mxc_init_extuart(); mxc_init_imx_uart(); - mxc_init_i2c(); mxc_init_audio(); +} + +static void __init mx31ads_late(void) +{ + mx31ads_init_expio(); + mxc_init_extuart(); + mxc_init_i2c(); mxc_init_ext_ethernet(); } @@ -581,8 +580,9 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS") .atag_offset = 0x100, .map_io = mx31ads_map_io, .init_early = imx31_init_early, - .init_irq = mx31ads_init_irq, + .init_irq = mx31_init_irq, .init_time = mx31ads_timer_init, .init_machine = mx31ads_init, + .init_late = mx31ads_late, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index e9549a3c0223..6fd463642954 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c @@ -56,6 +56,26 @@ * appropriate baseboard support code. */ +static unsigned int mx31lilly_pins[] __initdata = { + MX31_PIN_CTS1__CTS1, + MX31_PIN_RTS1__RTS1, + MX31_PIN_TXD1__TXD1, + MX31_PIN_RXD1__RXD1, + MX31_PIN_CTS2__CTS2, + MX31_PIN_RTS2__RTS2, + MX31_PIN_TXD2__TXD2, + MX31_PIN_RXD2__RXD2, + MX31_PIN_CSPI3_MOSI__RXD3, + MX31_PIN_CSPI3_MISO__TXD3, + MX31_PIN_CSPI3_SCLK__RTS3, + MX31_PIN_CSPI3_SPI_RDY__CTS3, +}; + +/* UART */ +static const struct imxuart_platform_data uart_pdata __initconst = { + .flags = IMXUART_HAVE_RTSCTS, +}; + /* SMSC ethernet support */ static struct resource smsc91x_resources[] = { @@ -252,16 +272,12 @@ static void __init mx31lilly_board_init(void) { imx31_soc_init(); - switch (mx31lilly_baseboard) { - case MX31LILLY_NOBOARD: - break; - case MX31LILLY_DB: - mx31lilly_db_init(); - break; - default: - printk(KERN_ERR "Illegal mx31lilly_baseboard type %d\n", - mx31lilly_baseboard); - } + mxc_iomux_setup_multiple_pins(mx31lilly_pins, + ARRAY_SIZE(mx31lilly_pins), "mx31lily"); + + imx31_add_imx_uart0(&uart_pdata); + imx31_add_imx_uart1(&uart_pdata); + imx31_add_imx_uart2(&uart_pdata); mxc_iomux_alloc_pin(MX31_PIN_CS4__CS4, "Ethernet CS"); @@ -284,10 +300,17 @@ static void __init mx31lilly_board_init(void) imx31_add_spi_imx0(&spi0_pdata); imx31_add_spi_imx1(&spi1_pdata); - mc13783_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); - spi_register_board_info(&mc13783_dev, 1); regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); +} + +static void __init mx31lilly_late_init(void) +{ + if (mx31lilly_baseboard == MX31LILLY_DB) + mx31lilly_db_init(); + + mc13783_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); + spi_register_board_info(&mc13783_dev, 1); smsc91x_resources[1].start = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0)); @@ -310,6 +333,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131") .init_early = imx31_init_early, .init_irq = mx31_init_irq, .init_time = mx31lilly_timer_init, - .init_machine = mx31lilly_board_init, + .init_machine = mx31lilly_board_init, + .init_late = mx31lilly_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index 4822a1738de4..f033a57d5694 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -52,6 +52,19 @@ */ static unsigned int mx31lite_pins[] = { + /* UART1 */ + MX31_PIN_CTS1__CTS1, + MX31_PIN_RTS1__RTS1, + MX31_PIN_TXD1__TXD1, + MX31_PIN_RXD1__RXD1, + /* SPI 0 */ + MX31_PIN_CSPI1_SCLK__SCLK, + MX31_PIN_CSPI1_MOSI__MOSI, + MX31_PIN_CSPI1_MISO__MISO, + MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, + MX31_PIN_CSPI1_SS0__SS0, + MX31_PIN_CSPI1_SS1__SS1, + MX31_PIN_CSPI1_SS2__SS2, /* LAN9117 IRQ pin */ IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* SPI 1 */ @@ -64,6 +77,23 @@ static unsigned int mx31lite_pins[] = { MX31_PIN_CSPI2_SS2__SS2, }; +/* UART */ +static const struct imxuart_platform_data uart_pdata __initconst = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +/* SPI */ +static int spi0_internal_chipselect[] = { + MXC_SPI_CS(0), + MXC_SPI_CS(1), + MXC_SPI_CS(2), +}; + +static const struct spi_imx_master spi0_pdata __initconst = { + .chipselect = spi0_internal_chipselect, + .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect), +}; + static const struct mxc_nand_platform_data mx31lite_nand_board_info __initconst = { .width = 1, @@ -103,13 +133,13 @@ static struct platform_device smsc911x_device = { * The MC13783 is the only hard-wired SPI device on the module. */ -static int spi_internal_chipselect[] = { +static int spi1_internal_chipselect[] = { MXC_SPI_CS(0), }; static const struct spi_imx_master spi1_pdata __initconst = { - .chipselect = spi_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), + .chipselect = spi1_internal_chipselect, + .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), }; static struct mc13xxx_platform_data mc13783_pdata __initdata = { @@ -200,8 +230,6 @@ static struct platform_device physmap_flash_device = { .num_resources = 1, }; - - /* * This structure defines the MX31 memory map. */ @@ -233,29 +261,30 @@ static struct regulator_consumer_supply dummy_supplies[] = { static void __init mx31lite_init(void) { - int ret; - imx31_soc_init(); - switch (mx31lite_baseboard) { - case MX31LITE_NOBOARD: - break; - case MX31LITE_DB: - mx31lite_db_init(); - break; - default: - printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n", - mx31lite_baseboard); - } - mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), "mx31lite"); + imx31_add_imx_uart0(&uart_pdata); + imx31_add_spi_imx0(&spi0_pdata); + /* NOR and NAND flash */ platform_device_register(&physmap_flash_device); imx31_add_mxc_nand(&mx31lite_nand_board_info); imx31_add_spi_imx1(&spi1_pdata); + + regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); +} + +static void __init mx31lite_late(void) +{ + int ret; + + if (mx31lite_baseboard == MX31LITE_DB) + mx31lite_db_init(); + mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); spi_register_board_info(&mc13783_spi_dev, 1); @@ -265,8 +294,6 @@ static void __init mx31lite_init(void) if (usbh2_pdata.otg) imx31_add_mxc_ehci_hs(2, &usbh2_pdata); - regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - /* SMSC9117 IRQ pin */ ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); if (ret) @@ -294,5 +321,6 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") .init_irq = mx31_init_irq, .init_time = mx31lite_timer_init, .init_machine = mx31lite_init, + .init_late = mx31lite_late, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 4f2d99888afd..cc867682520e 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -526,11 +526,9 @@ static void __init mx31moboard_init(void) "moboard"); platform_add_devices(devices, ARRAY_SIZE(devices)); - gpio_led_register_device(-1, &mx31moboard_led_pdata); imx31_add_imx2_wdt(); - moboard_uart0_init(); imx31_add_imx_uart0(&uart0_pdata); imx31_add_imx_uart4(&uart4_pdata); @@ -540,6 +538,19 @@ static void __init mx31moboard_init(void) imx31_add_spi_imx1(&moboard_spi1_pdata); imx31_add_spi_imx2(&moboard_spi2_pdata); + mx31moboard_init_cam(); + + imx31_add_imx_ssi(0, &moboard_ssi_pdata); + + pm_power_off = mx31moboard_poweroff; +} + +static void __init mx31moboard_late(void) +{ + gpio_led_register_device(-1, &mx31moboard_led_pdata); + + moboard_uart0_init(); + gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); moboard_spi_board_info[0].irq = @@ -549,18 +560,11 @@ static void __init mx31moboard_init(void) imx31_add_mxc_mmc(0, &sdhc1_pdata); - mx31moboard_init_cam(); - usb_xcvr_reset(); - moboard_usbh2_init(); - imx31_add_imx_ssi(0, &moboard_ssi_pdata); - imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); - pm_power_off = mx31moboard_poweroff; - switch (mx31moboard_baseboard) { case MX31NOBOARD: break; @@ -601,5 +605,6 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") .init_irq = mx31_init_irq, .init_time = mx31moboard_timer_init, .init_machine = mx31moboard_init, + .init_late = mx31moboard_late, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index 7e315f00648d..c8c2e0956048 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c @@ -555,8 +555,6 @@ static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = { */ static void __init mx35_3ds_init(void) { - struct platform_device *imx35_fb_pdev; - imx35_soc_init(); mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); @@ -579,9 +577,6 @@ static void __init mx35_3ds_init(void) imx35_add_mxc_nand(&mx35pdk_nand_board_info); imx35_add_sdhci_esdhc_imx(0, NULL); - if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1))) - pr_warn("Init of the debugboard failed, all " - "devices on the debugboard are unusable.\n"); imx35_add_imx_i2c0(&mx35_3ds_i2c0_data); i2c_register_board_info( @@ -590,6 +585,15 @@ static void __init mx35_3ds_init(void) imx35_add_ipu_core(); platform_device_register(&mx35_3ds_ov2640); imx35_3ds_init_camera(); +} + +static void __init mx35_3ds_late_init(void) +{ + struct platform_device *imx35_fb_pdev; + + if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1))) + pr_warn("Init of the debugboard failed, all " + "devices on the debugboard are unusable.\n"); imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata); mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev; @@ -618,6 +622,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK") .init_irq = mx35_init_irq, .init_time = mx35pdk_timer_init, .init_machine = mx35_3ds_init, + .init_late = mx35_3ds_late_init, .reserve = mx35_3ds_reserve, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 2d1c50bd8bdf..ed675863655b 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -362,12 +362,8 @@ static void __init pca100_init(void) if (ret) printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret); - imx27_add_imx_ssi(0, &pca100_ssi_pdata); - imx27_add_imx_uart0(&uart_pdata); - imx27_add_mxc_mmc(1, &sdhc_pdata); - imx27_add_mxc_nand(&pca100_nand_board_info); /* only the i2c master 1 is used on this CPU card */ @@ -382,6 +378,19 @@ static void __init pca100_init(void) ARRAY_SIZE(pca100_spi_board_info)); imx27_add_spi_imx0(&pca100_spi0_data); + imx27_add_imx_fb(&pca100_fb_data); + + imx27_add_fec(NULL); + imx27_add_imx2_wdt(); + imx27_add_mxc_w1(); +} + +static void __init pca100_late_init(void) +{ + imx27_add_imx_ssi(0, &pca100_ssi_pdata); + + imx27_add_mxc_mmc(1, &sdhc_pdata); + gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs"); gpio_direction_output(OTG_PHY_CS_GPIO, 1); gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs"); @@ -403,12 +412,6 @@ static void __init pca100_init(void) if (usbh2_pdata.otg) imx27_add_mxc_ehci_hs(2, &usbh2_pdata); - - imx27_add_imx_fb(&pca100_fb_data); - - imx27_add_fec(NULL); - imx27_add_imx2_wdt(); - imx27_add_mxc_w1(); } static void __init pca100_timer_init(void) @@ -421,7 +424,8 @@ MACHINE_START(PCA100, "phyCARD-i.MX27") .map_io = mx27_map_io, .init_early = imx27_init_early, .init_irq = mx27_init_irq, - .init_machine = pca100_init, + .init_machine = pca100_init, + .init_late = pca100_late_init, .init_time = pca100_timer_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index a159a7739993..9f0f55b0422c 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c @@ -576,8 +576,6 @@ static struct regulator_consumer_supply dummy_supplies[] = { */ static void __init pcm037_init(void) { - int ret; - imx31_soc_init(); regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); @@ -621,20 +619,6 @@ static void __init pcm037_init(void) imx31_add_mxc_w1(); - /* LAN9217 IRQ pin */ - ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); - if (ret) - pr_warn("could not get LAN irq gpio\n"); - else { - gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); - smsc911x_resources[1].start = - gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); - smsc911x_resources[1].end = - gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); - platform_device_register(&pcm037_eth); - } - - /* I2C adapters and devices */ i2c_register_board_info(1, pcm037_i2c_devices, ARRAY_SIZE(pcm037_i2c_devices)); @@ -643,26 +627,9 @@ static void __init pcm037_init(void) imx31_add_imx_i2c2(&pcm037_i2c2_data); imx31_add_mxc_nand(&pcm037_nand_board_info); - imx31_add_mxc_mmc(0, &sdhc_pdata); imx31_add_ipu_core(); imx31_add_mx3_sdc_fb(&mx3fb_pdata); - /* CSI */ - /* Camera power: default - off */ - ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power"); - if (!ret) - gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); - else - iclink_mt9t031.power = NULL; - - pcm037_init_camera(); - - pcm970_sja1000_resources[1].start = - gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105))); - pcm970_sja1000_resources[1].end = - gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105))); - platform_device_register(&pcm970_sja1000); - if (otg_mode_host) { otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); @@ -677,7 +644,6 @@ static void __init pcm037_init(void) if (!otg_mode_host) imx31_add_fsl_usb2_udc(&otg_device_pdata); - } static void __init pcm037_timer_init(void) @@ -694,6 +660,39 @@ static void __init pcm037_reserve(void) static void __init pcm037_init_late(void) { + int ret; + + /* LAN9217 IRQ pin */ + ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); + if (!ret) { + gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); + smsc911x_resources[1].start = + gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); + smsc911x_resources[1].end = + gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); + platform_device_register(&pcm037_eth); + } else { + pr_warn("could not get LAN irq gpio\n"); + } + + imx31_add_mxc_mmc(0, &sdhc_pdata); + + /* CSI */ + /* Camera power: default - off */ + ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power"); + if (!ret) + gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1); + else + iclink_mt9t031.power = NULL; + + pcm037_init_camera(); + + pcm970_sja1000_resources[1].start = + gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105))); + pcm970_sja1000_resources[1].end = + gpio_to_irq(IOMUX_TO_GPIO(IOMUX_PIN(48, 105))); + platform_device_register(&pcm970_sja1000); + pcm037_eet_init_devices(); } diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index e447e59c0604..78e2bf8dcd96 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c @@ -363,7 +363,6 @@ static void __init pcm043_init(void) imx35_add_imx_uart0(&uart_pdata); imx35_add_mxc_nand(&pcm037_nand_board_info); - imx35_add_imx_ssi(0, &pcm043_ssi_pdata); imx35_add_imx_uart1(&uart_pdata); @@ -387,6 +386,12 @@ static void __init pcm043_init(void) imx35_add_fsl_usb2_udc(&otg_device_pdata); imx35_add_flexcan1(); +} + +static void __init pcm043_late_init(void) +{ + imx35_add_imx_ssi(0, &pcm043_ssi_pdata); + imx35_add_sdhci_esdhc_imx(0, &sd1_pdata); } @@ -402,6 +407,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043") .init_early = imx35_init_early, .init_irq = mx35_init_irq, .init_time = pcm043_timer_init, - .init_machine = pcm043_init, + .init_machine = pcm043_init, + .init_late = pcm043_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index 34df64f133ed..8c2cbd693d21 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c @@ -251,7 +251,6 @@ static void __init qong_init(void) mxc_init_imx_uart(); qong_init_nor_mtd(); - qong_init_fpga(); imx31_add_imx2_wdt(); } @@ -268,5 +267,6 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") .init_irq = mx31_init_irq, .init_time = qong_timer_init, .init_machine = qong_init, + .init_late = qong_init_fpga, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index 27a8f7e3ec08..5ff154c9a086 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c @@ -268,6 +268,22 @@ static void __init vpr200_board_init(void) imx35_add_fec(NULL); imx35_add_imx2_wdt(); + + imx35_add_imx_uart0(NULL); + imx35_add_imx_uart2(NULL); + + imx35_add_ipu_core(); + imx35_add_mx3_sdc_fb(&mx3fb_pdata); + + imx35_add_fsl_usb2_udc(&otg_device_pdata); + imx35_add_mxc_ehci_hs(&usb_host_pdata); + + imx35_add_mxc_nand(&vpr200_nand_board_info); + imx35_add_sdhci_esdhc_imx(0, NULL); +} + +static void __init vpr200_late_init(void) +{ imx_add_gpio_keys(&vpr200_gpio_keys_data); platform_add_devices(devices, ARRAY_SIZE(devices)); @@ -282,18 +298,6 @@ static void __init vpr200_board_init(void) else gpio_direction_input(GPIO_PMIC_INT); - imx35_add_imx_uart0(NULL); - imx35_add_imx_uart2(NULL); - - imx35_add_ipu_core(); - imx35_add_mx3_sdc_fb(&mx3fb_pdata); - - imx35_add_fsl_usb2_udc(&otg_device_pdata); - imx35_add_mxc_ehci_hs(&usb_host_pdata); - - imx35_add_mxc_nand(&vpr200_nand_board_info); - imx35_add_sdhci_esdhc_imx(0, NULL); - vpr200_i2c_devices[1].irq = gpio_to_irq(GPIO_PMIC_INT); i2c_register_board_info(0, vpr200_i2c_devices, ARRAY_SIZE(vpr200_i2c_devices)); @@ -313,5 +317,6 @@ MACHINE_START(VPR200, "VPR200") .init_irq = mx35_init_irq, .init_time = vpr200_timer_init, .init_machine = vpr200_board_init, + .init_late = vpr200_late_init, .restart = mxc_restart, MACHINE_END diff --git a/arch/arm/mach-imx/mx31lilly-db.c b/arch/arm/mach-imx/mx31lilly-db.c index 649fe49ce85e..231f900a1de7 100644 --- a/arch/arm/mach-imx/mx31lilly-db.c +++ b/arch/arm/mach-imx/mx31lilly-db.c @@ -43,18 +43,6 @@ */ static unsigned int lilly_db_board_pins[] __initdata = { - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1, - MX31_PIN_CTS2__CTS2, - MX31_PIN_RTS2__RTS2, - MX31_PIN_TXD2__TXD2, - MX31_PIN_RXD2__RXD2, - MX31_PIN_CSPI3_MOSI__RXD3, - MX31_PIN_CSPI3_MISO__TXD3, - MX31_PIN_CSPI3_SCLK__RTS3, - MX31_PIN_CSPI3_SPI_RDY__CTS3, MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, MX31_PIN_SD1_DATA1__SD1_DATA1, @@ -86,11 +74,6 @@ static unsigned int lilly_db_board_pins[] __initdata = { MX31_PIN_CONTRAST__CONTRAST, }; -/* UART */ -static const struct imxuart_platform_data uart_pdata __initconst = { - .flags = IMXUART_HAVE_RTSCTS, -}; - /* MMC support */ static int mxc_mmc1_get_ro(struct device *dev) @@ -203,9 +186,6 @@ void __init mx31lilly_db_init(void) mxc_iomux_setup_multiple_pins(lilly_db_board_pins, ARRAY_SIZE(lilly_db_board_pins), "development board pins"); - imx31_add_imx_uart0(&uart_pdata); - imx31_add_imx_uart1(&uart_pdata); - imx31_add_imx_uart2(&uart_pdata); imx31_add_mxc_mmc(0, &mmc_pdata); mx31lilly_init_fb(); } diff --git a/arch/arm/mach-imx/mx31lite-db.c b/arch/arm/mach-imx/mx31lite-db.c index 5a160b7e4fce..c66a006bf2fd 100644 --- a/arch/arm/mach-imx/mx31lite-db.c +++ b/arch/arm/mach-imx/mx31lite-db.c @@ -45,19 +45,6 @@ */ static unsigned int litekit_db_board_pins[] __initdata = { - /* UART1 */ - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1, - /* SPI 0 */ - MX31_PIN_CSPI1_SCLK__SCLK, - MX31_PIN_CSPI1_MOSI__MOSI, - MX31_PIN_CSPI1_MISO__MISO, - MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, - MX31_PIN_CSPI1_SS0__SS0, - MX31_PIN_CSPI1_SS1__SS1, - MX31_PIN_CSPI1_SS2__SS2, /* SDHC1 */ MX31_PIN_SD1_DATA0__SD1_DATA0, MX31_PIN_SD1_DATA1__SD1_DATA1, @@ -67,11 +54,6 @@ static unsigned int litekit_db_board_pins[] __initdata = { MX31_PIN_SD1_CMD__SD1_CMD, }; -/* UART */ -static const struct imxuart_platform_data uart_pdata __initconst = { - .flags = IMXUART_HAVE_RTSCTS, -}; - /* MMC */ static int gpio_det, gpio_wp; @@ -146,19 +128,6 @@ static const struct imxmmc_platform_data mmc_pdata __initconst = { .exit = mxc_mmc1_exit, }; -/* SPI */ - -static int spi_internal_chipselect[] = { - MXC_SPI_CS(0), - MXC_SPI_CS(1), - MXC_SPI_CS(2), -}; - -static const struct spi_imx_master spi0_pdata __initconst = { - .chipselect = spi_internal_chipselect, - .num_chipselect = ARRAY_SIZE(spi_internal_chipselect), -}; - /* GPIO LEDs */ static const struct gpio_led litekit_leds[] __initconst = { @@ -187,9 +156,7 @@ void __init mx31lite_db_init(void) mxc_iomux_setup_multiple_pins(litekit_db_board_pins, ARRAY_SIZE(litekit_db_board_pins), "development board pins"); - imx31_add_imx_uart0(&uart_pdata); imx31_add_mxc_mmc(0, &mmc_pdata); - imx31_add_spi_imx0(&spi0_pdata); gpio_led_register_device(-1, &litekit_led_platform_data); imx31_add_imx2_wdt(); imx31_add_mxc_rtc(); diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index fe708e26d021..1515e498d348 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -217,7 +217,7 @@ struct imx6_cpu_pm_info { u32 mmdc_io_val[MX6_MAX_MMDC_IO_NUM][2]; /* To save offset and value */ } __aligned(8); -void imx6q_set_int_mem_clk_lpm(bool enable) +void imx6_set_int_mem_clk_lpm(bool enable) { u32 val = readl_relaxed(ccm_base + CGPR); @@ -367,7 +367,7 @@ static int imx6q_pm_enter(suspend_state_t state) switch (state) { case PM_SUSPEND_STANDBY: imx6_set_lpm(STOP_POWER_ON); - imx6q_set_int_mem_clk_lpm(true); + imx6_set_int_mem_clk_lpm(true); imx_gpc_pre_suspend(false); if (cpu_is_imx6sl()) imx6sl_set_wait_clk(true); @@ -380,7 +380,7 @@ static int imx6q_pm_enter(suspend_state_t state) break; case PM_SUSPEND_MEM: imx6_set_lpm(STOP_POWER_OFF); - imx6q_set_int_mem_clk_lpm(false); + imx6_set_int_mem_clk_lpm(false); imx6q_enable_wb(true); /* * For suspend into ocram, asm code already take care of @@ -398,7 +398,7 @@ static int imx6q_pm_enter(suspend_state_t state) imx_gpc_post_resume(); imx6_enable_rbc(false); imx6q_enable_wb(false); - imx6q_set_int_mem_clk_lpm(true); + imx6_set_int_mem_clk_lpm(true); imx6_set_lpm(WAIT_CLOCKED); break; default: diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index 6af5430d0d97..f72e1e9f5fc5 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -219,7 +219,6 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) { orion_ge01_init(eth_data, GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM, - NO_IRQ, MV643XX_TX_CSUM_DEFAULT_LIMIT); } @@ -242,9 +241,7 @@ void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) eth_data->duplex = DUPLEX_FULL; } - orion_ge10_init(eth_data, - GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM, - NO_IRQ); + orion_ge10_init(eth_data, GE10_PHYS_BASE, IRQ_MV78XX0_GE10_SUM); } @@ -266,9 +263,7 @@ void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) eth_data->duplex = DUPLEX_FULL; } - orion_ge11_init(eth_data, - GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM, - NO_IRQ); + orion_ge11_init(eth_data, GE11_PHYS_BASE, IRQ_MV78XX0_GE11_SUM); } /***************************************************************************** diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 058994e99570..04910764c385 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -105,9 +105,9 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) /***************************************************************************** * Ethernet switch ****************************************************************************/ -void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq) +void __init orion5x_eth_switch_init(struct dsa_platform_data *d) { - orion_ge00_switch_init(d, irq); + orion_ge00_switch_init(d); } diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index cd0389c6e822..8a4115bd441d 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -41,7 +41,7 @@ void orion5x_setup_wins(void); void orion5x_ehci0_init(void); void orion5x_ehci1_init(void); void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data); -void orion5x_eth_switch_init(struct dsa_platform_data *d, int irq); +void orion5x_eth_switch_init(struct dsa_platform_data *d); void orion5x_i2c_init(void); void orion5x_sata_init(struct mv_sata_platform_data *sata_data); void orion5x_spi_init(void); diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c index c742e7b40b0d..dccadf68ea2b 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c @@ -101,7 +101,7 @@ static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = { .port_names[7] = "lan3", }; -static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = { +static struct dsa_platform_data __initdata rd88f5181l_fxo_switch_plat_data = { .nr_chips = 1, .chip = &rd88f5181l_fxo_switch_chip_data, }; @@ -120,7 +120,7 @@ static void __init rd88f5181l_fxo_init(void) */ orion5x_ehci0_init(); orion5x_eth_init(&rd88f5181l_fxo_eth_data); - orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ); + orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data); orion5x_uart0_init(); mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c index 7e977b794b0c..affe5ec825de 100644 --- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c @@ -102,7 +102,7 @@ static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = { .port_names[7] = "lan3", }; -static struct dsa_platform_data rd88f5181l_ge_switch_plat_data = { +static struct dsa_platform_data __initdata rd88f5181l_ge_switch_plat_data = { .nr_chips = 1, .chip = &rd88f5181l_ge_switch_chip_data, }; @@ -125,8 +125,7 @@ static void __init rd88f5181l_ge_init(void) */ orion5x_ehci0_init(); orion5x_eth_init(&rd88f5181l_ge_eth_data); - orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data, - gpio_to_irq(8)); + orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data); orion5x_i2c_init(); orion5x_uart0_init(); diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c index 4bf80dd5478c..67ee8571b03c 100644 --- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c +++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c @@ -40,7 +40,7 @@ static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = { .port_names[5] = "cpu", }; -static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = { +static struct dsa_platform_data __initdata rd88f6183ap_ge_switch_plat_data = { .nr_chips = 1, .chip = &rd88f6183ap_ge_switch_chip_data, }; @@ -71,7 +71,6 @@ static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = { { .modalias = "m25p80", .platform_data = &rd88f6183ap_ge_spi_slave_data, - .irq = NO_IRQ, .max_speed_hz = 20000000, .bus_num = 0, .chip_select = 0, @@ -90,8 +89,7 @@ static void __init rd88f6183ap_ge_init(void) */ orion5x_ehci0_init(); orion5x_eth_init(&rd88f6183ap_ge_eth_data); - orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data, - gpio_to_irq(3)); + orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data); spi_register_board_info(rd88f6183ap_ge_spi_slave_info, ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info)); orion5x_spi_init(); diff --git a/arch/arm/mach-orion5x/wnr854t-setup.c b/arch/arm/mach-orion5x/wnr854t-setup.c index 4e1e5c8f6111..4dbcdbe1de7c 100644 --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c @@ -106,7 +106,7 @@ static struct dsa_chip_data wnr854t_switch_chip_data = { .port_names[7] = "lan2", }; -static struct dsa_platform_data wnr854t_switch_plat_data = { +static struct dsa_platform_data __initdata wnr854t_switch_plat_data = { .nr_chips = 1, .chip = &wnr854t_switch_chip_data, }; @@ -124,7 +124,7 @@ static void __init wnr854t_init(void) * Configure peripherals. */ orion5x_eth_init(&wnr854t_eth_data); - orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ); + orion5x_eth_switch_init(&wnr854t_switch_plat_data); orion5x_uart0_init(); mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c index 61e9027ef224..a6a8c4648d74 100644 --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -191,7 +191,7 @@ static struct dsa_chip_data wrt350n_v2_switch_chip_data = { .port_names[7] = "lan4", }; -static struct dsa_platform_data wrt350n_v2_switch_plat_data = { +static struct dsa_platform_data __initdata wrt350n_v2_switch_plat_data = { .nr_chips = 1, .chip = &wrt350n_v2_switch_chip_data, }; @@ -210,7 +210,7 @@ static void __init wrt350n_v2_init(void) */ orion5x_ehci0_init(); orion5x_eth_init(&wrt350n_v2_eth_data); - orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ); + orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data); orion5x_uart0_init(); mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index cd894d69e766..76fbc115ec33 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -4,6 +4,17 @@ menu "Intel PXA2xx/PXA3xx Implementations" comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" +config MACH_PXA25X_DT + bool "Support PXA25x platforms from device tree" + select PINCTRL + select POWER_SUPPLY + select PXA25x + select USE_OF + help + Include support for Marvell PXA25x based platforms using + the device tree. Needn't select any other machine while + MACH_PXA25x_DT is enabled. + config MACH_PXA27X_DT bool "Support PXA27x platforms from device tree" select PINCTRL diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 2ceed407eda9..ef25dc597f30 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -19,8 +19,9 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o # NOTE: keep the order of boards in accordance to their order in Kconfig # Device Tree support -obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o +obj-$(CONFIG_MACH_PXA25X_DT) += pxa-dt.o obj-$(CONFIG_MACH_PXA27X_DT) += pxa-dt.o +obj-$(CONFIG_MACH_PXA3XX_DT) += pxa-dt.o # Intel/Marvell Dev Platforms obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index d9206811be9b..c71c483f410e 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -131,16 +131,11 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm) return is_resume; } -static unsigned long corgi_charger_wakeup(void) +static bool corgi_charger_wakeup(void) { - unsigned long ret; - - ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN)) - | (!gpio_get_value(CORGI_GPIO_KEY_INT) - << GPIO_bit(CORGI_GPIO_KEY_INT)) - | (!gpio_get_value(CORGI_GPIO_WAKEUP) - << GPIO_bit(CORGI_GPIO_WAKEUP)); - return ret; + return !gpio_get_value(CORGI_GPIO_AC_IN) || + !gpio_get_value(CORGI_GPIO_KEY_INT) || + !gpio_get_value(CORGI_GPIO_WAKEUP); } unsigned long corgipm_read_devdata(int type) diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 4a13c32fb705..04580c407276 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h @@ -54,3 +54,4 @@ extern struct platform_device pxa3xx_device_gpio; extern struct platform_device pxa93x_device_gpio; void __init pxa_register_device(struct platform_device *dev, void *data); +void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors); diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 0b1dbb54871a..75e3f611e5d8 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -33,14 +33,12 @@ extern void __init pxa26x_init_irq(void); #define pxa27x_handle_irq ichp_handle_irq extern int __init pxa27x_clocks_init(void); -extern void __init pxa27x_dt_init_irq(void); extern unsigned pxa27x_get_clk_frequency_khz(int); extern void __init pxa27x_init_irq(void); extern void __init pxa27x_map_io(void); #define pxa3xx_handle_irq ichp_handle_irq extern int __init pxa3xx_clocks_init(void); -extern void __init pxa3xx_dt_init_irq(void); extern void __init pxa3xx_init_irq(void); extern void __init pxa3xx_map_io(void); diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h index 5bd55894a48d..20026bdc6b24 100644 --- a/arch/arm/mach-pxa/include/mach/dma.h +++ b/arch/arm/mach-pxa/include/mach/dma.h @@ -17,5 +17,4 @@ /* DMA Controller Registers Definitions */ #define DMAC_REGS_VIRT io_p2v(0x40000000) -#include <plat/dma.h> #endif /* _ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 265f48be32c1..b413e36506af 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -121,10 +121,6 @@ static unsigned long magician_pin_config[] __initdata = { GPIO107_GPIO, /* DS1WM_IRQ */ GPIO108_GPIO, /* GSM_READY */ GPIO115_GPIO, /* nPEN_IRQ */ - - /* I2C */ - GPIO117_I2C_SCL, - GPIO118_I2C_SDA, }; /* diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index 388463b99090..e7450fb49d24 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c @@ -104,8 +104,9 @@ static int __init pxa_pm_init(void) return -EINVAL; } - sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long), - GFP_KERNEL); + sleep_save = kmalloc_array(pxa_cpu_pm_fns->save_count, + sizeof(*sleep_save), + GFP_KERNEL); if (!sleep_save) { printk(KERN_ERR "failed to alloc memory for pm save\n"); return -ENOMEM; diff --git a/arch/arm/mach-pxa/pxa-dt.c b/arch/arm/mach-pxa/pxa-dt.c index f128133a8f30..aa9b255f5570 100644 --- a/arch/arm/mach-pxa/pxa-dt.c +++ b/arch/arm/mach-pxa/pxa-dt.c @@ -18,20 +18,16 @@ #include "generic.h" -#ifdef CONFIG_PXA3xx -static const char *const pxa3xx_dt_board_compat[] __initconst = { - "marvell,pxa300", - "marvell,pxa310", - "marvell,pxa320", +#ifdef CONFIG_PXA25x +static const char * const pxa25x_dt_board_compat[] __initconst = { + "marvell,pxa250", NULL, }; -DT_MACHINE_START(PXA_DT, "Marvell PXA3xx (Device Tree Support)") - .map_io = pxa3xx_map_io, - .init_irq = pxa3xx_dt_init_irq, - .handle_irq = pxa3xx_handle_irq, +DT_MACHINE_START(PXA25X_DT, "Marvell PXA25x (Device Tree Support)") + .map_io = pxa25x_map_io, .restart = pxa_restart, - .dt_compat = pxa3xx_dt_board_compat, + .dt_compat = pxa25x_dt_board_compat, MACHINE_END #endif @@ -41,11 +37,24 @@ static const char * const pxa27x_dt_board_compat[] __initconst = { NULL, }; -DT_MACHINE_START(PXA27X_DT, "Marvell PXA2xx (Device Tree Support)") +DT_MACHINE_START(PXA27X_DT, "Marvell PXA27x (Device Tree Support)") .map_io = pxa27x_map_io, - .init_irq = pxa27x_dt_init_irq, - .handle_irq = pxa27x_handle_irq, .restart = pxa_restart, .dt_compat = pxa27x_dt_board_compat, MACHINE_END #endif + +#ifdef CONFIG_PXA3xx +static const char *const pxa3xx_dt_board_compat[] __initconst = { + "marvell,pxa300", + "marvell,pxa310", + "marvell,pxa320", + NULL, +}; + +DT_MACHINE_START(PXA_DT, "Marvell PXA3xx (Device Tree Support)") + .map_io = pxa3xx_map_io, + .restart = pxa_restart, + .dt_compat = pxa3xx_dt_board_compat, +MACHINE_END +#endif diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 823504f48f80..12b94357fbc1 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -25,6 +25,7 @@ #include <linux/suspend.h> #include <linux/syscore_ops.h> #include <linux/irq.h> +#include <linux/irqchip.h> #include <asm/mach/map.h> #include <asm/suspend.h> @@ -151,6 +152,16 @@ void __init pxa26x_init_irq(void) } #endif +static int __init __init +pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent) +{ + pxa_dt_irq_init(pxa25x_set_wake); + set_handle_irq(ichp_handle_irq); + + return 0; +} +IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq); + static struct map_desc pxa25x_io_desc[] __initdata = { { /* Mem Ctl */ .virtual = (unsigned long)SMEMC_VIRT, @@ -198,20 +209,17 @@ static int __init pxa25x_init(void) reset_status = RCSR; - if ((ret = pxa_init_dma(IRQ_DMA, 16))) - return ret; - pxa25x_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); register_syscore_ops(&pxa2xx_mfp_syscore_ops); - pxa2xx_set_dmac_info(16, 40); - pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info); - ret = platform_add_devices(pxa25x_devices, - ARRAY_SIZE(pxa25x_devices)); - if (ret) - return ret; + if (!of_have_populated_dt()) { + pxa2xx_set_dmac_info(16, 40); + pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info); + ret = platform_add_devices(pxa25x_devices, + ARRAY_SIZE(pxa25x_devices)); + } } return ret; diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 2eaa341dd3f8..c0185c5c5a08 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -16,6 +16,7 @@ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h> +#include <linux/irqchip.h> #include <linux/suspend.h> #include <linux/platform_device.h> #include <linux/syscore_ops.h> @@ -233,11 +234,15 @@ void __init pxa27x_init_irq(void) pxa_init_irq(34, pxa27x_set_wake); } -void __init pxa27x_dt_init_irq(void) +static int __init +pxa27x_dt_init_irq(struct device_node *node, struct device_node *parent) { - if (IS_ENABLED(CONFIG_OF)) - pxa_dt_irq_init(pxa27x_set_wake); + pxa_dt_irq_init(pxa27x_set_wake); + set_handle_irq(ichp_handle_irq); + + return 0; } +IRQCHIP_DECLARE(pxa27x_intc, "marvell,pxa-intc", pxa27x_dt_init_irq); static struct map_desc pxa27x_io_desc[] __initdata = { { /* Mem Ctl */ @@ -300,9 +305,6 @@ static int __init pxa27x_init(void) reset_status = RCSR; - if ((ret = pxa_init_dma(IRQ_DMA, 32))) - return ret; - pxa27x_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 3c9184d1d6b9..87acc96388c7 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -19,6 +19,7 @@ #include <linux/pm.h> #include <linux/platform_device.h> #include <linux/irq.h> +#include <linux/irqchip.h> #include <linux/io.h> #include <linux/of.h> #include <linux/syscore_ops.h> @@ -356,11 +357,16 @@ void __init pxa3xx_init_irq(void) } #ifdef CONFIG_OF -void __init pxa3xx_dt_init_irq(void) +static int __init __init +pxa3xx_dt_init_irq(struct device_node *node, struct device_node *parent) { __pxa3xx_init_irq(); pxa_dt_irq_init(pxa3xx_set_wake); + set_handle_irq(ichp_handle_irq); + + return 0; } +IRQCHIP_DECLARE(pxa3xx_intc, "marvell,pxa-intc", pxa3xx_dt_init_irq); #endif /* CONFIG_OF */ static struct map_desc pxa3xx_io_desc[] __initdata = { @@ -438,9 +444,6 @@ static int __init pxa3xx_init(void) */ NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL; - if ((ret = pxa_init_dma(IRQ_DMA, 32))) - return ret; - pxa3xx_init_pm(); register_syscore_ops(&pxa_irq_syscore_ops); diff --git a/arch/arm/mach-pxa/pxa_cplds_irqs.c b/arch/arm/mach-pxa/pxa_cplds_irqs.c index 2385052b0ce1..e362f865fcd2 100644 --- a/arch/arm/mach-pxa/pxa_cplds_irqs.c +++ b/arch/arm/mach-pxa/pxa_cplds_irqs.c @@ -41,30 +41,35 @@ static irqreturn_t cplds_irq_handler(int in_irq, void *d) unsigned long pending; unsigned int bit; - pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; - for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) - generic_handle_irq(irq_find_mapping(fpga->irqdomain, bit)); + do { + pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; + for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) { + generic_handle_irq(irq_find_mapping(fpga->irqdomain, + bit)); + } + } while (pending); return IRQ_HANDLED; } -static void cplds_irq_mask_ack(struct irq_data *d) +static void cplds_irq_mask(struct irq_data *d) { struct cplds *fpga = irq_data_get_irq_chip_data(d); unsigned int cplds_irq = irqd_to_hwirq(d); - unsigned int set, bit = BIT(cplds_irq); + unsigned int bit = BIT(cplds_irq); fpga->irq_mask &= ~bit; writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); - set = readl(fpga->base + FPGA_IRQ_SET_CLR); - writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); } static void cplds_irq_unmask(struct irq_data *d) { struct cplds *fpga = irq_data_get_irq_chip_data(d); unsigned int cplds_irq = irqd_to_hwirq(d); - unsigned int bit = BIT(cplds_irq); + unsigned int set, bit = BIT(cplds_irq); + + set = readl(fpga->base + FPGA_IRQ_SET_CLR); + writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); fpga->irq_mask |= bit; writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); @@ -72,7 +77,8 @@ static void cplds_irq_unmask(struct irq_data *d) static struct irq_chip cplds_irq_chip = { .name = "pxa_cplds", - .irq_mask_ack = cplds_irq_mask_ack, + .irq_ack = cplds_irq_mask, + .irq_mask = cplds_irq_mask, .irq_unmask = cplds_irq_unmask, .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE, }; diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c index b80eab9993c5..249b7bd5fbc4 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.c +++ b/arch/arm/mach-pxa/sharpsl_pm.c @@ -744,7 +744,7 @@ static int sharpsl_off_charge_battery(void) time = RCNR; while (1) { /* Check if any wakeup event had occurred */ - if (sharpsl_pm.machinfo->charger_wakeup() != 0) + if (sharpsl_pm.machinfo->charger_wakeup()) return 0; /* Check for timeout */ if ((RCNR - time) > SHARPSL_WAIT_CO_TIME) diff --git a/arch/arm/mach-pxa/sharpsl_pm.h b/arch/arm/mach-pxa/sharpsl_pm.h index 905be6755f04..fa75b6df8134 100644 --- a/arch/arm/mach-pxa/sharpsl_pm.h +++ b/arch/arm/mach-pxa/sharpsl_pm.h @@ -34,7 +34,7 @@ struct sharpsl_charger_machinfo { #define SHARPSL_STATUS_LOCK 5 #define SHARPSL_STATUS_CHRGFULL 6 #define SHARPSL_STATUS_FATAL 7 - unsigned long (*charger_wakeup)(void); + bool (*charger_wakeup)(void); int (*should_wakeup)(unsigned int resume_on_alarm); void (*backlight_limit)(int); int (*backlight_get_status) (void); diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index ea9f9034cb54..4e64a140252e 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -165,13 +165,10 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm) return is_resume; } -static unsigned long spitz_charger_wakeup(void) +static bool spitz_charger_wakeup(void) { - unsigned long ret; - ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT) - << GPIO_bit(SPITZ_GPIO_KEY_INT)) - | gpio_get_value(SPITZ_GPIO_SYNC)); - return ret; + return !gpio_get_value(SPITZ_GPIO_KEY_INT) || + gpio_get_value(SPITZ_GPIO_SYNC); } unsigned long spitzpm_read_devdata(int type) diff --git a/arch/arm/mach-qcom/Makefile b/arch/arm/mach-qcom/Makefile index e324375fa919..12878e9a2c0c 100644 --- a/arch/arm/mach-qcom/Makefile +++ b/arch/arm/mach-qcom/Makefile @@ -1,2 +1 @@ -obj-y := board.o obj-$(CONFIG_SMP) += platsmp.o diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c deleted file mode 100644 index d8060dfd1a21..000000000000 --- a/arch/arm/mach-qcom/board.c +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright (c) 2010-2014 The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/init.h> - -#include <asm/mach/arch.h> - -static const char * const qcom_dt_match[] __initconst = { - "qcom,apq8064", - "qcom,apq8074-dragonboard", - "qcom,apq8084", - "qcom,ipq8062", - "qcom,ipq8064", - "qcom,msm8660-surf", - "qcom,msm8960-cdp", - "qcom,mdm9615", - NULL -}; - -DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)") - .dt_compat = qcom_dt_match, -MACHINE_END diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index ba0ceebdd73d..f6c3f151d0d4 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -21,7 +21,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ - +#include <linux/dma-mapping.h> #include <linux/init.h> #include <linux/module.h> #include <linux/interrupt.h> @@ -305,6 +305,8 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { }, }; +#define s3c24xx_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) })) + #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) static struct resource s3c2410_dma_resource[] = { @@ -355,7 +357,9 @@ struct platform_device s3c2410_device_dma = { .num_resources = ARRAY_SIZE(s3c2410_dma_resource), .resource = s3c2410_dma_resource, .dev = { - .platform_data = &s3c2410_dma_platdata, + .dma_mask = &s3c24xx_device_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s3c2410_dma_platdata, }, }; #endif @@ -396,7 +400,9 @@ struct platform_device s3c2412_device_dma = { .num_resources = ARRAY_SIZE(s3c2410_dma_resource), .resource = s3c2410_dma_resource, .dev = { - .platform_data = &s3c2412_dma_platdata, + .dma_mask = &s3c24xx_device_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s3c2412_dma_platdata, }, }; #endif @@ -486,7 +492,9 @@ struct platform_device s3c2440_device_dma = { .num_resources = ARRAY_SIZE(s3c2410_dma_resource), .resource = s3c2410_dma_resource, .dev = { - .platform_data = &s3c2440_dma_platdata, + .dma_mask = &s3c24xx_device_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s3c2440_dma_platdata, }, }; #endif @@ -538,7 +546,9 @@ struct platform_device s3c2443_device_dma = { .num_resources = ARRAY_SIZE(s3c2443_dma_resource), .resource = s3c2443_dma_resource, .dev = { - .platform_data = &s3c2443_dma_platdata, + .dma_mask = &s3c24xx_device_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s3c2443_dma_platdata, }, }; #endif diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c index 13999c1c46cf..ec60bd4a1646 100644 --- a/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/arch/arm/mach-s3c24xx/mach-mini2440.c @@ -535,6 +535,7 @@ static struct platform_device *mini2440_devices[] __initdata = { &mini2440_button_device, &s3c_device_nand, &s3c_device_sdi, + &s3c2440_device_dma, &s3c_device_iis, &uda1340_codec, &mini2440_audio, diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c64xx/mach-crag6410-module.c index 571f95cc5a53..ccc3ab8d58e7 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c @@ -393,8 +393,7 @@ static const struct i2c_device_id wlf_gf_module_id[] = { static struct i2c_driver wlf_gf_module_driver = { .driver = { - .name = "wlf-gf-module", - .owner = THIS_MODULE, + .name = "wlf-gf-module" }, .probe = wlf_gf_module_probe, .id_table = wlf_gf_module_id, diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 3506327e0bed..78d3e859bd64 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -28,7 +28,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") - .smp_init = shmobile_smp_init_fallback_ops, + .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops), .smp = smp_ops(r8a7790_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c index 110e8b588e56..26e2d181a190 100644 --- a/arch/arm/mach-shmobile/setup-r8a7791.c +++ b/arch/arm/mach-shmobile/setup-r8a7791.c @@ -29,7 +29,7 @@ static const char *const r8a7791_boards_compat_dt[] __initconst = { }; DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)") - .smp_init = shmobile_smp_init_fallback_ops, + .smp_init = smp_init_ops(shmobile_smp_init_fallback_ops), .smp = smp_ops(r8a7791_smp_ops), .init_early = shmobile_init_delay, .init_time = rcar_gen2_timer_init, diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 096ed216c6d5..b9863f9a35fa 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -32,6 +32,7 @@ config MACH_SUN7I default ARCH_SUNXI select ARM_GIC select ARM_PSCI + select ARCH_SUPPORTS_BIG_ENDIAN select HAVE_ARM_ARCH_TIMER select SUN5I_HSTIMER diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c index 95dca8c2c9ed..2e2bde271205 100644 --- a/arch/arm/mach-sunxi/sunxi.c +++ b/arch/arm/mach-sunxi/sunxi.c @@ -22,6 +22,7 @@ static const char * const sunxi_board_dt_compat[] = { "allwinner,sun5i-a10s", "allwinner,sun5i-a13", "allwinner,sun5i-r8", + "nextthing,gr8", NULL, }; diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 396afe109e67..6bea3d3a2dd7 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -1 +1 @@ -obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj- += dummy.o diff --git a/arch/arm/mach-uniphier/headsmp.S b/arch/arm/mach-uniphier/headsmp.S deleted file mode 100644 index c819dff84546..000000000000 --- a/arch/arm/mach-uniphier/headsmp.S +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/linkage.h> -#include <asm/assembler.h> -#include <asm/cp15.h> - -ENTRY(uniphier_smp_trampoline) -ARM_BE8(setend be) @ ensure we are in BE8 mode - mrc p15, 0, r0, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Reg) - and r2, r0, #0x3 @ CPU ID - ldr r1, uniphier_smp_trampoline_jump - ldr r3, uniphier_smp_trampoline_poll_addr - mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) - orr r0, r0, #CR_I @ Enable ICache - bic r0, r0, #(CR_C | CR_M) @ Disable MMU and Dcache - mcr p15, 0, r0, c1, c0, 0 - b 1f @ cache the following 5 instructions -0: wfe -1: ldr r0, [r3] - cmp r0, r2 - bxeq r1 @ branch to secondary_startup - b 0b - .globl uniphier_smp_trampoline_jump -uniphier_smp_trampoline_jump: - .word 0 @ set virt_to_phys(secondary_startup) - .globl uniphier_smp_trampoline_poll_addr -uniphier_smp_trampoline_poll_addr: - .word 0 @ set CPU ID to be kicked to this reg - .globl uniphier_smp_trampoline_end -uniphier_smp_trampoline_end: -ENDPROC(uniphier_smp_trampoline) diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c deleted file mode 100644 index 9978c41128f6..000000000000 --- a/arch/arm/mach-uniphier/platsmp.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#define pr_fmt(fmt) "uniphier: " fmt - -#include <linux/init.h> -#include <linux/io.h> -#include <linux/ioport.h> -#include <linux/of.h> -#include <linux/of_address.h> -#include <linux/sizes.h> -#include <asm/cacheflush.h> -#include <asm/hardware/cache-uniphier.h> -#include <asm/pgtable.h> -#include <asm/smp.h> -#include <asm/smp_scu.h> - -/* - * The secondary CPUs check this register from the boot ROM for the jump - * destination. After that, it can be reused as a scratch register. - */ -#define UNIPHIER_SMPCTRL_ROM_RSV2 0x208 - -static void __iomem *uniphier_smp_rom_boot_rsv2; -static unsigned int uniphier_smp_max_cpus; - -extern char uniphier_smp_trampoline; -extern char uniphier_smp_trampoline_jump; -extern char uniphier_smp_trampoline_poll_addr; -extern char uniphier_smp_trampoline_end; - -/* - * Copy trampoline code to the tail of the 1st section of the page table used - * in the boot ROM. This area is directly accessible by the secondary CPUs - * for all the UniPhier SoCs. - */ -static const phys_addr_t uniphier_smp_trampoline_dest_end = SECTION_SIZE; -static phys_addr_t uniphier_smp_trampoline_dest; - -static int __init uniphier_smp_copy_trampoline(phys_addr_t poll_addr) -{ - size_t trmp_size; - static void __iomem *trmp_base; - - if (!uniphier_cache_l2_is_enabled()) { - pr_warn("outer cache is needed for SMP, but not enabled\n"); - return -ENODEV; - } - - uniphier_cache_l2_set_locked_ways(1); - - outer_flush_all(); - - trmp_size = &uniphier_smp_trampoline_end - &uniphier_smp_trampoline; - uniphier_smp_trampoline_dest = uniphier_smp_trampoline_dest_end - - trmp_size; - - uniphier_cache_l2_touch_range(uniphier_smp_trampoline_dest, - uniphier_smp_trampoline_dest_end); - - trmp_base = ioremap_cache(uniphier_smp_trampoline_dest, trmp_size); - if (!trmp_base) { - pr_err("failed to map trampoline destination area\n"); - return -ENOMEM; - } - - memcpy(trmp_base, &uniphier_smp_trampoline, trmp_size); - - writel(virt_to_phys(secondary_startup), - trmp_base + (&uniphier_smp_trampoline_jump - - &uniphier_smp_trampoline)); - - writel(poll_addr, trmp_base + (&uniphier_smp_trampoline_poll_addr - - &uniphier_smp_trampoline)); - - flush_cache_all(); /* flush out trampoline code to outer cache */ - - iounmap(trmp_base); - - return 0; -} - -static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus) -{ - struct device_node *np; - struct resource res; - phys_addr_t rom_rsv2_phys; - int ret; - - np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl"); - ret = of_address_to_resource(np, 0, &res); - of_node_put(np); - if (ret) { - pr_err("failed to get resource of SMP control\n"); - return ret; - } - - rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_RSV2; - - ret = uniphier_smp_copy_trampoline(rom_rsv2_phys); - if (ret) - return ret; - - uniphier_smp_rom_boot_rsv2 = ioremap(rom_rsv2_phys, SZ_4); - if (!uniphier_smp_rom_boot_rsv2) { - pr_err("failed to map ROM_BOOT_RSV2 register\n"); - return -ENOMEM; - } - - writel(uniphier_smp_trampoline_dest, uniphier_smp_rom_boot_rsv2); - asm("sev"); /* Bring up all secondary CPUs to the trampoline code */ - - uniphier_smp_max_cpus = max_cpus; /* save for later use */ - - return 0; -} - -static void __init uniphier_smp_unprepare_trampoline(void) -{ - iounmap(uniphier_smp_rom_boot_rsv2); - - if (uniphier_smp_trampoline_dest) - outer_inv_range(uniphier_smp_trampoline_dest, - uniphier_smp_trampoline_dest_end); - - uniphier_cache_l2_set_locked_ways(0); -} - -static int __init uniphier_smp_enable_scu(void) -{ - unsigned long scu_base_phys = 0; - void __iomem *scu_base; - - if (scu_a9_has_base()) - scu_base_phys = scu_a9_get_base(); - - if (!scu_base_phys) { - pr_err("failed to get scu base\n"); - return -ENODEV; - } - - scu_base = ioremap(scu_base_phys, SZ_128); - if (!scu_base) { - pr_err("failed to map scu base\n"); - return -ENOMEM; - } - - scu_enable(scu_base); - iounmap(scu_base); - - return 0; -} - -static void __init uniphier_smp_prepare_cpus(unsigned int max_cpus) -{ - static cpumask_t only_cpu_0 = { CPU_BITS_CPU0 }; - int ret; - - ret = uniphier_smp_prepare_trampoline(max_cpus); - if (ret) - goto err; - - ret = uniphier_smp_enable_scu(); - if (ret) - goto err; - - return; -err: - pr_warn("disabling SMP\n"); - init_cpu_present(&only_cpu_0); - uniphier_smp_unprepare_trampoline(); -} - -static int __init uniphier_smp_boot_secondary(unsigned int cpu, - struct task_struct *idle) -{ - if (WARN_ON_ONCE(!uniphier_smp_rom_boot_rsv2)) - return -EFAULT; - - writel(cpu, uniphier_smp_rom_boot_rsv2); - readl(uniphier_smp_rom_boot_rsv2); /* relax */ - - asm("sev"); /* wake up secondary CPUs sleeping in the trampoline */ - - if (cpu == uniphier_smp_max_cpus - 1) { - /* clean up resources if this is the last CPU */ - uniphier_smp_unprepare_trampoline(); - } - - return 0; -} - -static const struct smp_operations uniphier_smp_ops __initconst = { - .smp_prepare_cpus = uniphier_smp_prepare_cpus, - .smp_boot_secondary = uniphier_smp_boot_secondary, -}; -CPU_METHOD_OF_DECLARE(uniphier_smp, "socionext,uniphier-smp", - &uniphier_smp_ops); diff --git a/arch/arm/mm/cache-uniphier.c b/arch/arm/mm/cache-uniphier.c index c8e2f4947223..dfe97b409916 100644 --- a/arch/arm/mm/cache-uniphier.c +++ b/arch/arm/mm/cache-uniphier.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2015-2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -43,27 +44,15 @@ #define UNIPHIER_SSCOPE_CM_SYNC 0x8 /* sync (drain bufs) */ #define UNIPHIER_SSCOPE_CM_FLUSH_PREFETCH 0x9 /* flush p-fetch buf */ #define UNIPHIER_SSCOQM 0x248 /* Cache Operation Queue Mode */ -#define UNIPHIER_SSCOQM_TID_MASK (0x3 << 21) -#define UNIPHIER_SSCOQM_TID_LRU_DATA (0x0 << 21) -#define UNIPHIER_SSCOQM_TID_LRU_INST (0x1 << 21) -#define UNIPHIER_SSCOQM_TID_WAY (0x2 << 21) #define UNIPHIER_SSCOQM_S_MASK (0x3 << 17) #define UNIPHIER_SSCOQM_S_RANGE (0x0 << 17) #define UNIPHIER_SSCOQM_S_ALL (0x1 << 17) -#define UNIPHIER_SSCOQM_S_WAY (0x2 << 17) #define UNIPHIER_SSCOQM_CE BIT(15) /* notify completion */ #define UNIPHIER_SSCOQM_CM_INV 0x0 /* invalidate */ #define UNIPHIER_SSCOQM_CM_CLEAN 0x1 /* clean */ #define UNIPHIER_SSCOQM_CM_FLUSH 0x2 /* flush */ -#define UNIPHIER_SSCOQM_CM_PREFETCH 0x3 /* prefetch to cache */ -#define UNIPHIER_SSCOQM_CM_PREFETCH_BUF 0x4 /* prefetch to pf-buf */ -#define UNIPHIER_SSCOQM_CM_TOUCH 0x5 /* touch */ -#define UNIPHIER_SSCOQM_CM_TOUCH_ZERO 0x6 /* touch to zero */ -#define UNIPHIER_SSCOQM_CM_TOUCH_DIRTY 0x7 /* touch with dirty */ #define UNIPHIER_SSCOQAD 0x24c /* Cache Operation Queue Address */ #define UNIPHIER_SSCOQSZ 0x250 /* Cache Operation Queue Size */ -#define UNIPHIER_SSCOQMASK 0x254 /* Cache Operation Queue Address Mask */ -#define UNIPHIER_SSCOQWN 0x258 /* Cache Operation Queue Way Number */ #define UNIPHIER_SSCOPPQSEF 0x25c /* Cache Operation Queue Set Complete*/ #define UNIPHIER_SSCOPPQSEF_FE BIT(1) #define UNIPHIER_SSCOPPQSEF_OE BIT(0) @@ -72,9 +61,6 @@ #define UNIPHIER_SSCOLPQS_EST BIT(1) #define UNIPHIER_SSCOLPQS_QST BIT(0) -/* Is the touch/pre-fetch destination specified by ways? */ -#define UNIPHIER_SSCOQM_TID_IS_WAY(op) \ - ((op & UNIPHIER_SSCOQM_TID_MASK) == UNIPHIER_SSCOQM_TID_WAY) /* Is the operation region specified by address range? */ #define UNIPHIER_SSCOQM_S_IS_RANGE(op) \ ((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE) @@ -178,11 +164,6 @@ static void __uniphier_cache_maint_common(struct uniphier_cache_data *data, writel_relaxed(start, data->op_base + UNIPHIER_SSCOQAD); writel_relaxed(size, data->op_base + UNIPHIER_SSCOQSZ); } - - /* set target ways if needed */ - if (unlikely(UNIPHIER_SSCOQM_TID_IS_WAY(operation))) - writel_relaxed(data->way_locked_mask, - data->op_base + UNIPHIER_SSCOQWN); } while (unlikely(readl_relaxed(data->op_base + UNIPHIER_SSCOPPQSEF) & (UNIPHIER_SSCOPPQSEF_FE | UNIPHIER_SSCOPPQSEF_OE))); @@ -338,46 +319,8 @@ static void uniphier_cache_sync(void) __uniphier_cache_sync(data); } -int __init uniphier_cache_l2_is_enabled(void) -{ - struct uniphier_cache_data *data; - - data = list_first_entry_or_null(&uniphier_cache_list, - struct uniphier_cache_data, list); - if (!data) - return 0; - - return !!(readl_relaxed(data->ctrl_base + UNIPHIER_SSCC) & - UNIPHIER_SSCC_ON); -} - -void __init uniphier_cache_l2_touch_range(unsigned long start, - unsigned long end) -{ - struct uniphier_cache_data *data; - - data = list_first_entry_or_null(&uniphier_cache_list, - struct uniphier_cache_data, list); - if (data) - __uniphier_cache_maint_range(data, start, end, - UNIPHIER_SSCOQM_TID_WAY | - UNIPHIER_SSCOQM_CM_TOUCH); -} - -void __init uniphier_cache_l2_set_locked_ways(u32 way_mask) -{ - struct uniphier_cache_data *data; - - data = list_first_entry_or_null(&uniphier_cache_list, - struct uniphier_cache_data, list); - if (data) - __uniphier_cache_set_locked_ways(data, way_mask); -} - static const struct of_device_id uniphier_cache_match[] __initconst = { - { - .compatible = "socionext,uniphier-system-cache", - }, + { .compatible = "socionext,uniphier-system-cache" }, { /* sentinel */ } }; diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 78c8bf4043c0..272f49b2c68f 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c @@ -52,21 +52,27 @@ void __init orion_clkdev_init(struct clk *tclk) static void fill_resources(struct platform_device *device, struct resource *resources, resource_size_t mapbase, - resource_size_t size, - unsigned int irq) + resource_size_t size) { device->resource = resources; device->num_resources = 1; resources[0].flags = IORESOURCE_MEM; resources[0].start = mapbase; resources[0].end = mapbase + size; +} - if (irq != NO_IRQ) { - device->num_resources++; - resources[1].flags = IORESOURCE_IRQ; - resources[1].start = irq; - resources[1].end = irq; - } +static void fill_resources_irq(struct platform_device *device, + struct resource *resources, + resource_size_t mapbase, + resource_size_t size, + unsigned int irq) +{ + fill_resources(device, resources, mapbase, size); + + device->num_resources++; + resources[1].flags = IORESOURCE_IRQ; + resources[1].start = irq; + resources[1].end = irq; } /***************************************************************************** @@ -93,7 +99,7 @@ static void __init uart_complete( data->uartclk = uart_get_clk_rate(clk); orion_uart->dev.platform_data = data; - fill_resources(orion_uart, resources, mapbase, 0xff, irq); + fill_resources_irq(orion_uart, resources, mapbase, 0xff, irq); platform_device_register(orion_uart); } @@ -305,8 +311,8 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, unsigned int tx_csum_limit) { fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, - mapbase + 0x2000, SZ_16K - 1, NO_IRQ); - fill_resources(&orion_ge_mvmdio, orion_ge_mvmdio_resources, + mapbase + 0x2000, SZ_16K - 1); + fill_resources_irq(&orion_ge_mvmdio, orion_ge_mvmdio_resources, mapbase + 0x2004, 0x84 - 1, irq_err); orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; ge_complete(&orion_ge00_shared_data, @@ -354,11 +360,10 @@ static struct platform_device orion_ge01 = { void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, - unsigned long irq_err, unsigned int tx_csum_limit) { fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, - mapbase + 0x2000, SZ_16K - 1, NO_IRQ); + mapbase + 0x2000, SZ_16K - 1); orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; ge_complete(&orion_ge01_shared_data, orion_ge01_resources, irq, &orion_ge01_shared, @@ -404,11 +409,10 @@ static struct platform_device orion_ge10 = { void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, - unsigned long irq, - unsigned long irq_err) + unsigned long irq) { fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, - mapbase + 0x2000, SZ_16K - 1, NO_IRQ); + mapbase + 0x2000, SZ_16K - 1); ge_complete(&orion_ge10_shared_data, orion_ge10_resources, irq, &orion_ge10_shared, NULL, @@ -453,11 +457,10 @@ static struct platform_device orion_ge11 = { void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, - unsigned long irq, - unsigned long irq_err) + unsigned long irq) { fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, - mapbase + 0x2000, SZ_16K - 1, NO_IRQ); + mapbase + 0x2000, SZ_16K - 1); ge_complete(&orion_ge11_shared_data, orion_ge11_resources, irq, &orion_ge11_shared, NULL, @@ -467,37 +470,15 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, /***************************************************************************** * Ethernet switch ****************************************************************************/ -static struct resource orion_switch_resources[] = { - { - .start = 0, - .end = 0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device orion_switch_device = { - .name = "dsa", - .id = 0, - .num_resources = 0, - .resource = orion_switch_resources, -}; - -void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) +void __init orion_ge00_switch_init(struct dsa_platform_data *d) { int i; - if (irq != NO_IRQ) { - orion_switch_resources[0].start = irq; - orion_switch_resources[0].end = irq; - orion_switch_device.num_resources = 1; - } - d->netdev = &orion_ge00.dev; for (i = 0; i < d->nr_chips; i++) d->chip[i].host_dev = &orion_ge_mvmdio.dev; - orion_switch_device.dev.platform_data = d; - platform_device_register(&orion_switch_device); + platform_device_register_data(NULL, "dsa", 0, d, sizeof(d)); } /***************************************************************************** @@ -538,7 +519,7 @@ void __init orion_i2c_init(unsigned long mapbase, unsigned long freq_m) { orion_i2c_pdata.freq_m = freq_m; - fill_resources(&orion_i2c, orion_i2c_resources, mapbase, + fill_resources_irq(&orion_i2c, orion_i2c_resources, mapbase, SZ_32 - 1, irq); platform_device_register(&orion_i2c); } @@ -548,7 +529,7 @@ void __init orion_i2c_1_init(unsigned long mapbase, unsigned long freq_m) { orion_i2c_1_pdata.freq_m = freq_m; - fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, + fill_resources_irq(&orion_i2c_1, orion_i2c_1_resources, mapbase, SZ_32 - 1, irq); platform_device_register(&orion_i2c_1); } @@ -576,14 +557,14 @@ static struct platform_device orion_spi_1 = { void __init orion_spi_init(unsigned long mapbase) { fill_resources(&orion_spi, &orion_spi_resources, - mapbase, SZ_512 - 1, NO_IRQ); + mapbase, SZ_512 - 1); platform_device_register(&orion_spi); } void __init orion_spi_1_init(unsigned long mapbase) { fill_resources(&orion_spi_1, &orion_spi_1_resources, - mapbase, SZ_512 - 1, NO_IRQ); + mapbase, SZ_512 - 1); platform_device_register(&orion_spi_1); } @@ -741,7 +722,7 @@ void __init orion_ehci_init(unsigned long mapbase, enum orion_ehci_phy_ver phy_version) { orion_ehci_data.phy_version = phy_version; - fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, + fill_resources_irq(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, irq); platform_device_register(&orion_ehci); @@ -765,7 +746,7 @@ static struct platform_device orion_ehci_1 = { void __init orion_ehci_1_init(unsigned long mapbase, unsigned long irq) { - fill_resources(&orion_ehci_1, orion_ehci_1_resources, + fill_resources_irq(&orion_ehci_1, orion_ehci_1_resources, mapbase, SZ_4K - 1, irq); platform_device_register(&orion_ehci_1); @@ -789,7 +770,7 @@ static struct platform_device orion_ehci_2 = { void __init orion_ehci_2_init(unsigned long mapbase, unsigned long irq) { - fill_resources(&orion_ehci_2, orion_ehci_2_resources, + fill_resources_irq(&orion_ehci_2, orion_ehci_2_resources, mapbase, SZ_4K - 1, irq); platform_device_register(&orion_ehci_2); @@ -819,7 +800,7 @@ void __init orion_sata_init(struct mv_sata_platform_data *sata_data, unsigned long irq) { orion_sata.dev.platform_data = sata_data; - fill_resources(&orion_sata, orion_sata_resources, + fill_resources_irq(&orion_sata, orion_sata_resources, mapbase, 0x5000 - 1, irq); platform_device_register(&orion_sata); @@ -849,7 +830,7 @@ void __init orion_crypto_init(unsigned long mapbase, unsigned long sram_size, unsigned long irq) { - fill_resources(&orion_crypto, orion_crypto_resources, + fill_resources_irq(&orion_crypto, orion_crypto_resources, mapbase, 0xffff, irq); orion_crypto.num_resources = 3; orion_crypto_resources[2].start = srambase; diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h index 9e6d76ad48a9..9347f3c58a6d 100644 --- a/arch/arm/plat-orion/include/plat/common.h +++ b/arch/arm/plat-orion/include/plat/common.h @@ -47,21 +47,17 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, - unsigned long irq_err, unsigned int tx_csum_limit); void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, - unsigned long irq, - unsigned long irq_err); + unsigned long irq); void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, - unsigned long irq, - unsigned long irq_err); + unsigned long irq); -void __init orion_ge00_switch_init(struct dsa_platform_data *d, - int irq); +void __init orion_ge00_switch_init(struct dsa_platform_data *d); void __init orion_i2c_init(unsigned long mapbase, unsigned long irq, diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile index 557b134db772..2f06a2e8b1dd 100644 --- a/arch/arm/plat-pxa/Makefile +++ b/arch/arm/plat-pxa/Makefile @@ -3,8 +3,6 @@ # ccflags-$(CONFIG_ARCH_MMP) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_PXA) := dma.o - obj-$(CONFIG_PXA3xx) += mfp.o obj-$(CONFIG_ARCH_MMP) += mfp.o diff --git a/arch/arm/plat-pxa/dma.c b/arch/arm/plat-pxa/dma.c deleted file mode 100644 index de2b061889ec..000000000000 --- a/arch/arm/plat-pxa/dma.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * linux/arch/arm/plat-pxa/dma.c - * - * PXA DMA registration and IRQ dispatching - * - * Author: Nicolas Pitre - * Created: Nov 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/errno.h> -#include <linux/dma-mapping.h> - -#include <asm/irq.h> -#include <asm/memory.h> -#include <mach/hardware.h> -#include <mach/dma.h> - -#define DMA_DEBUG_NAME "pxa_dma" -#define DMA_MAX_REQUESTERS 64 - -struct dma_channel { - char *name; - pxa_dma_prio prio; - void (*irq_handler)(int, void *); - void *data; - spinlock_t lock; -}; - -static struct dma_channel *dma_channels; -static int num_dma_channels; - -/* - * Debug fs - */ -#ifdef CONFIG_DEBUG_FS -#include <linux/debugfs.h> -#include <linux/uaccess.h> -#include <linux/seq_file.h> - -static struct dentry *dbgfs_root, *dbgfs_state, **dbgfs_chan; - -static int dbg_show_requester_chan(struct seq_file *s, void *p) -{ - int chan = (int)s->private; - int i; - u32 drcmr; - - seq_printf(s, "DMA channel %d requesters list :\n", chan); - for (i = 0; i < DMA_MAX_REQUESTERS; i++) { - drcmr = DRCMR(i); - if ((drcmr & DRCMR_CHLNUM) == chan) - seq_printf(s, "\tRequester %d (MAPVLD=%d)\n", - i, !!(drcmr & DRCMR_MAPVLD)); - } - - return 0; -} - -static inline int dbg_burst_from_dcmd(u32 dcmd) -{ - int burst = (dcmd >> 16) & 0x3; - - return burst ? 4 << burst : 0; -} - -static int is_phys_valid(unsigned long addr) -{ - return pfn_valid(__phys_to_pfn(addr)); -} - -#define DCSR_STR(flag) (dcsr & DCSR_##flag ? #flag" " : "") -#define DCMD_STR(flag) (dcmd & DCMD_##flag ? #flag" " : "") - -static int dbg_show_descriptors(struct seq_file *s, void *p) -{ - int chan = (int)s->private; - int i, max_show = 20, burst, width; - u32 dcmd; - unsigned long phys_desc; - struct pxa_dma_desc *desc; - unsigned long flags; - - spin_lock_irqsave(&dma_channels[chan].lock, flags); - phys_desc = DDADR(chan); - - seq_printf(s, "DMA channel %d descriptors :\n", chan); - seq_printf(s, "[%03d] First descriptor unknown\n", 0); - for (i = 1; i < max_show && is_phys_valid(phys_desc); i++) { - desc = phys_to_virt(phys_desc); - dcmd = desc->dcmd; - burst = dbg_burst_from_dcmd(dcmd); - width = (1 << ((dcmd >> 14) & 0x3)) >> 1; - - seq_printf(s, "[%03d] Desc at %08lx(virt %p)\n", - i, phys_desc, desc); - seq_printf(s, "\tDDADR = %08x\n", desc->ddadr); - seq_printf(s, "\tDSADR = %08x\n", desc->dsadr); - seq_printf(s, "\tDTADR = %08x\n", desc->dtadr); - seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n", - dcmd, - DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR), - DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG), - DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN), - DCMD_STR(ENDIAN), burst, width, - dcmd & DCMD_LENGTH); - phys_desc = desc->ddadr; - } - if (i == max_show) - seq_printf(s, "[%03d] Desc at %08lx ... max display reached\n", - i, phys_desc); - else - seq_printf(s, "[%03d] Desc at %08lx is %s\n", - i, phys_desc, phys_desc == DDADR_STOP ? - "DDADR_STOP" : "invalid"); - - spin_unlock_irqrestore(&dma_channels[chan].lock, flags); - - return 0; -} - -static int dbg_show_chan_state(struct seq_file *s, void *p) -{ - int chan = (int)s->private; - u32 dcsr, dcmd; - int burst, width; - static char *str_prio[] = { "high", "normal", "low" }; - - dcsr = DCSR(chan); - dcmd = DCMD(chan); - burst = dbg_burst_from_dcmd(dcmd); - width = (1 << ((dcmd >> 14) & 0x3)) >> 1; - - seq_printf(s, "DMA channel %d\n", chan); - seq_printf(s, "\tPriority : %s\n", str_prio[dma_channels[chan].prio]); - seq_printf(s, "\tUnaligned transfer bit: %s\n", - DALGN & (1 << chan) ? "yes" : "no"); - seq_printf(s, "\tDCSR = %08x (%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n", - dcsr, DCSR_STR(RUN), DCSR_STR(NODESC), - DCSR_STR(STOPIRQEN), DCSR_STR(EORIRQEN), - DCSR_STR(EORJMPEN), DCSR_STR(EORSTOPEN), - DCSR_STR(SETCMPST), DCSR_STR(CLRCMPST), - DCSR_STR(CMPST), DCSR_STR(EORINTR), DCSR_STR(REQPEND), - DCSR_STR(STOPSTATE), DCSR_STR(ENDINTR), - DCSR_STR(STARTINTR), DCSR_STR(BUSERR)); - - seq_printf(s, "\tDCMD = %08x (%s%s%s%s%s%s%sburst=%d width=%d len=%d)\n", - dcmd, - DCMD_STR(INCSRCADDR), DCMD_STR(INCTRGADDR), - DCMD_STR(FLOWSRC), DCMD_STR(FLOWTRG), - DCMD_STR(STARTIRQEN), DCMD_STR(ENDIRQEN), - DCMD_STR(ENDIAN), burst, width, dcmd & DCMD_LENGTH); - seq_printf(s, "\tDSADR = %08x\n", DSADR(chan)); - seq_printf(s, "\tDTADR = %08x\n", DTADR(chan)); - seq_printf(s, "\tDDADR = %08x\n", DDADR(chan)); - - return 0; -} - -static int dbg_show_state(struct seq_file *s, void *p) -{ - /* basic device status */ - seq_puts(s, "DMA engine status\n"); - seq_printf(s, "\tChannel number: %d\n", num_dma_channels); - - return 0; -} - -#define DBGFS_FUNC_DECL(name) \ -static int dbg_open_##name(struct inode *inode, struct file *file) \ -{ \ - return single_open(file, dbg_show_##name, inode->i_private); \ -} \ -static const struct file_operations dbg_fops_##name = { \ - .owner = THIS_MODULE, \ - .open = dbg_open_##name, \ - .llseek = seq_lseek, \ - .read = seq_read, \ - .release = single_release, \ -} - -DBGFS_FUNC_DECL(state); -DBGFS_FUNC_DECL(chan_state); -DBGFS_FUNC_DECL(descriptors); -DBGFS_FUNC_DECL(requester_chan); - -static struct dentry *pxa_dma_dbg_alloc_chan(int ch, struct dentry *chandir) -{ - char chan_name[11]; - struct dentry *chan, *chan_state = NULL, *chan_descr = NULL; - struct dentry *chan_reqs = NULL; - void *dt; - - scnprintf(chan_name, sizeof(chan_name), "%d", ch); - chan = debugfs_create_dir(chan_name, chandir); - dt = (void *)ch; - - if (chan) - chan_state = debugfs_create_file("state", 0400, chan, dt, - &dbg_fops_chan_state); - if (chan_state) - chan_descr = debugfs_create_file("descriptors", 0400, chan, dt, - &dbg_fops_descriptors); - if (chan_descr) - chan_reqs = debugfs_create_file("requesters", 0400, chan, dt, - &dbg_fops_requester_chan); - if (!chan_reqs) - goto err_state; - - return chan; - -err_state: - debugfs_remove_recursive(chan); - return NULL; -} - -static void pxa_dma_init_debugfs(void) -{ - int i; - struct dentry *chandir; - - dbgfs_root = debugfs_create_dir(DMA_DEBUG_NAME, NULL); - if (IS_ERR(dbgfs_root) || !dbgfs_root) - goto err_root; - - dbgfs_state = debugfs_create_file("state", 0400, dbgfs_root, NULL, - &dbg_fops_state); - if (!dbgfs_state) - goto err_state; - - dbgfs_chan = kmalloc(sizeof(*dbgfs_state) * num_dma_channels, - GFP_KERNEL); - if (!dbgfs_chan) - goto err_alloc; - - chandir = debugfs_create_dir("channels", dbgfs_root); - if (!chandir) - goto err_chandir; - - for (i = 0; i < num_dma_channels; i++) { - dbgfs_chan[i] = pxa_dma_dbg_alloc_chan(i, chandir); - if (!dbgfs_chan[i]) - goto err_chans; - } - - return; -err_chans: -err_chandir: - kfree(dbgfs_chan); -err_alloc: -err_state: - debugfs_remove_recursive(dbgfs_root); -err_root: - pr_err("pxa_dma: debugfs is not available\n"); -} - -static void __exit pxa_dma_cleanup_debugfs(void) -{ - debugfs_remove_recursive(dbgfs_root); -} -#else -static inline void pxa_dma_init_debugfs(void) {} -static inline void pxa_dma_cleanup_debugfs(void) {} -#endif - -int pxa_request_dma (char *name, pxa_dma_prio prio, - void (*irq_handler)(int, void *), - void *data) -{ - unsigned long flags; - int i, found = 0; - - /* basic sanity checks */ - if (!name || !irq_handler) - return -EINVAL; - - local_irq_save(flags); - - do { - /* try grabbing a DMA channel with the requested priority */ - for (i = 0; i < num_dma_channels; i++) { - if ((dma_channels[i].prio == prio) && - !dma_channels[i].name && - !pxad_toggle_reserved_channel(i)) { - found = 1; - break; - } - } - /* if requested prio group is full, try a hier priority */ - } while (!found && prio--); - - if (found) { - DCSR(i) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; - dma_channels[i].name = name; - dma_channels[i].irq_handler = irq_handler; - dma_channels[i].data = data; - } else { - printk (KERN_WARNING "No more available DMA channels for %s\n", name); - i = -ENODEV; - } - - local_irq_restore(flags); - return i; -} -EXPORT_SYMBOL(pxa_request_dma); - -void pxa_free_dma (int dma_ch) -{ - unsigned long flags; - - if (!dma_channels[dma_ch].name) { - printk (KERN_CRIT - "%s: trying to free channel %d which is already freed\n", - __func__, dma_ch); - return; - } - - local_irq_save(flags); - DCSR(dma_ch) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR; - dma_channels[dma_ch].name = NULL; - pxad_toggle_reserved_channel(dma_ch); - local_irq_restore(flags); -} -EXPORT_SYMBOL(pxa_free_dma); - -static irqreturn_t dma_irq_handler(int irq, void *dev_id) -{ - int i, dint = DINT, done = 0; - struct dma_channel *channel; - - while (dint) { - i = __ffs(dint); - dint &= (dint - 1); - channel = &dma_channels[i]; - if (channel->name && channel->irq_handler) { - channel->irq_handler(i, channel->data); - done++; - } - } - if (done) - return IRQ_HANDLED; - else - return IRQ_NONE; -} - -int __init pxa_init_dma(int irq, int num_ch) -{ - int i, ret; - - dma_channels = kzalloc(sizeof(struct dma_channel) * num_ch, GFP_KERNEL); - if (dma_channels == NULL) - return -ENOMEM; - - /* dma channel priorities on pxa2xx processors: - * ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH - * ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM - * ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW - */ - for (i = 0; i < num_ch; i++) { - DCSR(i) = 0; - dma_channels[i].prio = min((i & 0xf) >> 2, DMA_PRIO_LOW); - spin_lock_init(&dma_channels[i].lock); - } - - ret = request_irq(irq, dma_irq_handler, IRQF_SHARED, "DMA", - dma_channels); - if (ret) { - printk (KERN_CRIT "Wow! Can't register IRQ for DMA\n"); - kfree(dma_channels); - return ret; - } - num_dma_channels = num_ch; - - pxa_dma_init_debugfs(); - - return 0; -} diff --git a/arch/arm/plat-pxa/include/plat/dma.h b/arch/arm/plat-pxa/include/plat/dma.h deleted file mode 100644 index ceba3e4184fc..000000000000 --- a/arch/arm/plat-pxa/include/plat/dma.h +++ /dev/null @@ -1,100 +0,0 @@ -#ifndef __PLAT_DMA_H -#define __PLAT_DMA_H - -#define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x)))) - -#define DCSR(n) DMAC_REG((n) << 2) -#define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */ -#define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */ -#define DDADR(n) DMAC_REG(0x0200 + ((n) << 4)) -#define DSADR(n) DMAC_REG(0x0204 + ((n) << 4)) -#define DTADR(n) DMAC_REG(0x0208 + ((n) << 4)) -#define DCMD(n) DMAC_REG(0x020c + ((n) << 4)) -#define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \ - (((n) & 0x3f) << 2)) - -#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ -#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ -#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ -#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ -#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ -#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ -#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ -#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ - -#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ -#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ -#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ -#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ -#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ -#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ -#define DCSR_EORINTR (1 << 9) /* The end of Receive */ - -#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ -#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ - -#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ -#define DDADR_STOP (1 << 0) /* Stop (read / write) */ - -#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ -#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ -#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ -#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ -#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ -#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ -#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ -#define DCMD_BURST8 (1 << 16) /* 8 byte burst */ -#define DCMD_BURST16 (2 << 16) /* 16 byte burst */ -#define DCMD_BURST32 (3 << 16) /* 32 byte burst */ -#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ -#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ -#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ -#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ - -/* - * Descriptor structure for PXA's DMA engine - * Note: this structure must always be aligned to a 16-byte boundary. - */ - -typedef struct pxa_dma_desc { - volatile u32 ddadr; /* Points to the next descriptor + flags */ - volatile u32 dsadr; /* DSADR value for the current transfer */ - volatile u32 dtadr; /* DTADR value for the current transfer */ - volatile u32 dcmd; /* DCMD value for the current transfer */ -} pxa_dma_desc; - -typedef enum { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -} pxa_dma_prio; - -/* - * DMA registration - */ - -int __init pxa_init_dma(int irq, int num_ch); - -int pxa_request_dma (char *name, - pxa_dma_prio prio, - void (*irq_handler)(int, void *), - void *data); - -void pxa_free_dma (int dma_ch); - -/* - * Cooperation with pxa_dma + dmaengine while there remains at least one pxa - * driver not converted to dmaengine. - */ -#if defined(CONFIG_PXA_DMA) -extern int pxad_toggle_reserved_channel(int legacy_channel); -#else -static inline int pxad_toggle_reserved_channel(int legacy_channel) -{ - return 0; -} -#endif - -extern void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors); - -#endif /* __PLAT_DMA_H */ diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h index b63aeebb93f3..0fe2828f9354 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h @@ -14,10 +14,6 @@ #define __ASM_PLAT_MAP_S5P_H __FILE__ #define S5P_VA_CHIPID S3C_ADDR(0x02000000) -#define S5P_VA_CMU S3C_ADDR(0x02100000) - -#define S5P_VA_DMC0 S3C_ADDR(0x02440000) -#define S5P_VA_DMC1 S3C_ADDR(0x02480000) #define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000) #define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x)) |