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authorRandy Vinson <rvinson@mvista.com>2006-10-13 00:36:23 +0400
committerPaul Mackerras <paulus@samba.org>2006-10-16 09:53:30 +0400
commit60b2a46cd60c54bd6551ddfa01f0aab08ca58a5d (patch)
tree7eeea9f0b7419b19e1292a563dd6415fddf5122c /arch
parent8ba738c2bb8fb83c0c99f680444d3ffd4c178ca2 (diff)
downloadlinux-60b2a46cd60c54bd6551ddfa01f0aab08ca58a5d.tar.xz
[POWERPC] Fix IO Window Updates on P2P bridges.
When update_bridge_base() updates the IO window on a PCI-to-PCI bridge, it fails to zero the upper 16 bits of the base and limit registers if the window size is less than 64K. This fixes it. Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/pci_32.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 9b49f8691d29..0d9ff72e2852 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -441,14 +441,14 @@ update_bridge_base(struct pci_bus *bus, int i)
end = res->end - off;
io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
- if (end > 0xffff) {
- pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
- start >> 16);
- pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
- end >> 16);
+ if (end > 0xffff)
io_base_lo |= PCI_IO_RANGE_TYPE_32;
- } else
+ else
io_base_lo |= PCI_IO_RANGE_TYPE_16;
+ pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
+ start >> 16);
+ pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
+ end >> 16);
pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);