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author | Olof Johansson <olof@lixom.net> | 2014-05-22 09:16:30 +0400 |
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committer | Olof Johansson <olof@lixom.net> | 2014-05-22 09:16:30 +0400 |
commit | 3bc4a87c03e75c88471450380cb194bf30ea4a87 (patch) | |
tree | 8e757ceeeeddf927ce5feda60154962f745547ee /arch | |
parent | 4b660a7f5c8099d88d1a43d8ae138965112592c7 (diff) | |
parent | 702b691e4a711e699cf3cccba879c1d945665c0d (diff) | |
download | linux-3bc4a87c03e75c88471450380cb194bf30ea4a87.tar.xz |
Merge tag 'samsung-fixes' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Samsung fixes for 3.15 from Kukjin Kim:
- Remove g2d_pd and mau_pd nodes on exynos5420.
Since the power domains are linked to the CMU blocks,
kernel panic happens during access clocks when the
power domains are disabled. Now this is a best solution.
- Enable HS-I2C on exynos5 by default
MMC partition cannot be mounted for RFS without the
enabling HS-I2C because regulators for MMC power are
connected to HS-I2C bus.
- Disable MDMA1 node on exynos5420
When MDMA1 runs in secure mode it makes kernel fault,
so need to disalbe it on exynos5420 by default instead
of each board.
- Fix the secondary CPU boot for exynos4212
* tag 'samsung-fixes' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Remove g2d_pd node for exynos5420
ARM: dts: Remove mau_pd node for exynos5420
ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount
ARM: dts: disable MDMA1 node for exynos5420
ARM: EXYNOS: fix the secondary CPU boot of exynos4212
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/exynos5420-arndale-octa.dts | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 18 | ||||
-rw-r--r-- | arch/arm/configs/exynos_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/firmware.c | 15 |
4 files changed, 22 insertions, 24 deletions
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 80a3bf4c5986..896a2a6619e0 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -364,16 +364,4 @@ gpio-key,wakeup; }; }; - - amba { - mdma1: mdma@11C10000 { - /* - * MDMA1 can support both secure and non-secure - * AXI transactions. When this is enabled in the kernel - * for boards that run in secure mode, we are getting - * imprecise external aborts causing the kernel to oops. - */ - status = "disabled"; - }; - }; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index c3a9a66c5767..418f2506aaf0 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -219,16 +219,6 @@ reg = <0x100440C0 0x20>; }; - mau_pd: power-domain@100440E0 { - compatible = "samsung,exynos4210-pd"; - reg = <0x100440E0 0x20>; - }; - - g2d_pd: power-domain@10044100 { - compatible = "samsung,exynos4210-pd"; - reg = <0x10044100 0x20>; - }; - msc_pd: power-domain@10044120 { compatible = "samsung,exynos4210-pd"; reg = <0x10044120 0x20>; @@ -336,6 +326,13 @@ #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <1>; + /* + * MDMA1 can support both secure and non-secure + * AXI transactions. When this is enabled in the kernel + * for boards that run in secure mode, we are getting + * imprecise external aborts causing the kernel to oops. + */ + status = "disabled"; }; }; @@ -730,6 +727,5 @@ interrupts = <0 112 0>; clocks = <&clock 471>; clock-names = "secss"; - samsung,power-domain = <&g2d_pd>; }; }; diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 4ce7b70ea901..e07a227ec0db 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y CONFIG_I2C=y CONFIG_I2C_MUX=y CONFIG_I2C_ARB_GPIO_CHALLENGE=y +CONFIG_I2C_EXYNOS5=y CONFIG_I2C_S3C2410=y CONFIG_DEBUG_GPIO=y # CONFIG_HWMON is not set diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index 932129ef26c6..aa01c4222b40 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -18,6 +18,8 @@ #include <mach/map.h> +#include <plat/cpu.h> + #include "smc.h" static int exynos_do_idle(void) @@ -28,13 +30,24 @@ static int exynos_do_idle(void) static int exynos_cpu_boot(int cpu) { + /* + * The second parameter of SMC_CMD_CPU1BOOT command means CPU id. + * But, Exynos4212 has only one secondary CPU so second parameter + * isn't used for informing secure firmware about CPU id. + */ + if (soc_is_exynos4212()) + cpu = 0; + exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); return 0; } static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) { - void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu; + void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c; + + if (!soc_is_exynos4212()) + boot_reg += 4*cpu; __raw_writel(boot_addr, boot_reg); return 0; |