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authorDavid Lechner <david@lechnology.com>2017-01-05 21:54:19 +0300
committerSekhar Nori <nsekhar@ti.com>2017-01-13 16:42:27 +0300
commit3b6e9da8abc0f178a2d1f8d49909f29374a48dd8 (patch)
treee61a7ac29a6025fcce238e46f782e9dc9a014d83 /arch
parent5280bc3ed7b0160d5f771cb903e4ab2e7fb9a208 (diff)
downloadlinux-3b6e9da8abc0f178a2d1f8d49909f29374a48dd8.tar.xz
ARM: dts: da850: Add ti,da830-uart compatible for serial ports
TI DA8xx/OMAPL13x/AM17xx/AM18xx SoCs have extra UART registers beyond the standard 8250 registers, so we need a new compatible string to indicate this. Also, at least one of these registers uses the full 32 bits, so we need to specify reg-io-width in addition to reg-shift. "ns16550a" is left in the compatible specification since it does work as long as the bootloader configures the SoC UART power management registers. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/da850.dtsi9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ab5adb12612f..6dfd3bf3a6d8 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -277,22 +277,25 @@
interrupt-names = "edm3_tcerrint";
};
serial0: serial@42000 {
- compatible = "ns16550a";
+ compatible = "ti,da830-uart", "ns16550a";
reg = <0x42000 0x100>;
+ reg-io-width = <4>;
reg-shift = <2>;
interrupts = <25>;
status = "disabled";
};
serial1: serial@10c000 {
- compatible = "ns16550a";
+ compatible = "ti,da830-uart", "ns16550a";
reg = <0x10c000 0x100>;
+ reg-io-width = <4>;
reg-shift = <2>;
interrupts = <53>;
status = "disabled";
};
serial2: serial@10d000 {
- compatible = "ns16550a";
+ compatible = "ti,da830-uart", "ns16550a";
reg = <0x10d000 0x100>;
+ reg-io-width = <4>;
reg-shift = <2>;
interrupts = <61>;
status = "disabled";