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| author | Olof Johansson <olof@lixom.net> | 2018-11-30 22:49:48 +0300 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2018-11-30 22:49:48 +0300 |
| commit | a8505b4e02b49368878ccb14fb295b25c1859665 (patch) | |
| tree | 77c0894e47e62f62c1a451213c1745067bf1766c /arch | |
| parent | 9f60337147f02793f4ce009a99bbd4387b7de794 (diff) | |
| parent | 672e60b72bbe7aace88721db55b380b6a51fb8f9 (diff) | |
| download | linux-a8505b4e02b49368878ccb14fb295b25c1859665.tar.xz | |
Merge tag 'v4.20-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes
Moving the veyron memory node from memory@0 back to memory, as the
firmware on these devices as issues identifying the formally correct
node.
* tag 'v4.20-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Remove @0 from the veyron memory node
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/rk3288-veyron.dtsi | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 2075120cfc4d..d8bf939a3aff 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -10,7 +10,11 @@ #include "rk3288.dtsi" / { - memory@0 { + /* + * The default coreboot on veyron devices ignores memory@0 nodes + * and would instead create another memory node. + */ + memory { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; |