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| author | Andy Hu <andy.hu@starfivetech.com> | 2024-01-11 14:30:05 +0300 |
|---|---|---|
| committer | Andy Hu <andy.hu@starfivetech.com> | 2024-01-11 14:30:05 +0300 |
| commit | 3f773693fa5924edc1b4014e33784f000c807fdc (patch) | |
| tree | f03d007d5c98d67db8d0a4873c305ef12cab2297 /arch | |
| parent | 0327819b586a701ae4d9d865cc9dcf30ee369b34 (diff) | |
| parent | 9b2efce7988d0e202f00c1efd9c305ca63ccf85c (diff) | |
| download | linux-3f773693fa5924edc1b4014e33784f000c807fdc.tar.xz | |
Merge tag 'JH7110_SDK_6.1_v5.10.5' into vf2-6.1.y-devel
Diffstat (limited to 'arch')
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 19928efe3b1a..845d34aa373c 100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -281,7 +281,7 @@ cachectrl: cache-controller@2010000 { compatible = "sifive,fu740-c000-ccache", "cache"; - reg = <0x0 0x2010000 0x0 0x4000 0x0 0x8000000 0x0 0x2000000>; + reg = <0x0 0x2010000 0x0 0x4000 0x0 0x8000000 0x0 0x2000000 0x0 0xa000000 0x0 0x2000000>; reg-names = "control", "sideband"; interrupts = <1 3 4 2>; cache-block-size = <64>; |