diff options
| author | shanlong.li <shanlong.li@starfivetech.com> | 2023-07-05 12:23:35 +0300 |
|---|---|---|
| committer | shanlong.li <shanlong.li@starfivetech.com> | 2023-07-14 05:36:23 +0300 |
| commit | 9fe728aced660624b9a5314b4151c060f8425a7b (patch) | |
| tree | 2a52b6759cc4a41cf2660a7365b55817d65bdc11 /arch | |
| parent | d82fb1664ad1d41950e593941fc5f07c8cf146e6 (diff) | |
| download | linux-9fe728aced660624b9a5314b4151c060f8425a7b.tar.xz | |
dts:e24: update e24 dts config
update e24 dts config
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 9 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 |
2 files changed, 8 insertions, 8 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi index 4f987985ee85..37b526fbc4d1 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -55,16 +55,16 @@ linux,cma-default; }; + e24_mem: e24@c0000000 { + reg = <0x0 0x6ce00000 0x0 0x1600000>; + }; + xrp_reserved: xrpbuffer@f0000000 { reg = <0x0 0xf0000000 0x0 0x01ffffff 0x0 0xf2000000 0x0 0x00001000 0x0 0xf2001000 0x0 0x00fff000 0x0 0xf3000000 0x0 0x00001000>; }; - - e24_mem: e24@c0000000 { - reg = <0x0 0xc0000000 0x0 0x1600000>; - }; }; thermal-zones { @@ -117,6 +117,7 @@ }; &co_process { + memory-region = <&e24_mem>; status = "okay"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 9fd656d96ea1..8688e7c5edfb 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1646,9 +1646,8 @@ co_process: e24 { compatible = "starfive,e24"; dma-coherent; - reg = <0x0 0xc1410000 0x0 0x00001000>, - <0x0 0xc1411000 0x0 0x0003f000>; - memory-region = <&e24_mem>; + reg = <0x0 0x6e210000 0x0 0x00001000>, + <0x0 0x6e211000 0x0 0x0003f000>; reg-names = "ecmd", "espace"; clocks = <&clkgen JH7110_E2_RTC_CLK>, <&clkgen JH7110_E2_CLK_CORE>, @@ -1665,7 +1664,7 @@ <&mailbox_contrl0 2 0>; #address-cells = <1>; #size-cells = <1>; - ranges = <0xc0000000 0x0 0xc0000000 0x1600000>; + ranges = <0x6ce00000 0x0 0x6ce00000 0x1600000>; status = "disabled"; dsp@0 {}; }; |