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author | David Miller <davem@davemloft.net> | 2012-10-09 03:34:26 +0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-09 11:23:06 +0400 |
commit | f5c8ad47284ca01dafc37da5a72bb9644174d387 (patch) | |
tree | 9d05ff565ad5e3b90933cacad012ad9724a8a83e /arch/xtensa/platforms/iss/Makefile | |
parent | b113da65785d5f3f9ff1451ec0fe43d6d76da25b (diff) | |
download | linux-f5c8ad47284ca01dafc37da5a72bb9644174d387.tar.xz |
mm: thp: Use more portable PMD clearing sequenece in zap_huge_pmd().
Invalidation sequences are handled in various ways on various
architectures.
One way, which sparc64 uses, is to let the set_*_at() functions accumulate
pending flushes into a per-cpu array. Then the flush_tlb_range() et al.
calls process the pending TLB flushes.
In this regime, the __tlb_remove_*tlb_entry() implementations are
essentially NOPs.
The canonical PTE zap in mm/memory.c is:
ptent = ptep_get_and_clear_full(mm, addr, pte,
tlb->fullmm);
tlb_remove_tlb_entry(tlb, pte, addr);
With a subsequent tlb_flush_mmu() if needed.
Mirror this in the THP PMD zapping using:
orig_pmd = pmdp_get_and_clear(tlb->mm, addr, pmd);
page = pmd_page(orig_pmd);
tlb_remove_pmd_tlb_entry(tlb, pmd, addr);
And we properly accomodate TLB flush mechanims like the one described
above.
Signed-off-by: David S. Miller <davem@davemloft.net>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/xtensa/platforms/iss/Makefile')
0 files changed, 0 insertions, 0 deletions