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authorMax Filippov <jcmvbkbc@gmail.com>2018-12-05 23:48:19 +0300
committerMax Filippov <jcmvbkbc@gmail.com>2018-12-05 23:53:07 +0300
commit037602705109ec2ab96340bea93ad87daa3ac046 (patch)
tree616c10e2e60b8a6bfbe388366ea1c1c3f170dafb /arch/xtensa/include/asm/uaccess.h
parentf37598be4e3896359e87c824be57ddddc280cc3f (diff)
downloadlinux-037602705109ec2ab96340bea93ad87daa3ac046.tar.xz
xtensa: don't use l32r opcode directly
xtensa assembler is capable of representing register loads with either movi + addmi, l32r or const16, depending on the core configuration. Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let the assembler relax them. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/include/asm/uaccess.h')
-rw-r--r--arch/xtensa/include/asm/uaccess.h10
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/xtensa/include/asm/uaccess.h b/arch/xtensa/include/asm/uaccess.h
index f1158b4c629c..d11ef2939652 100644
--- a/arch/xtensa/include/asm/uaccess.h
+++ b/arch/xtensa/include/asm/uaccess.h
@@ -159,10 +159,9 @@ __asm__ __volatile__( \
"2: \n" \
" .section .fixup,\"ax\" \n" \
" .align 4 \n" \
- "4: \n" \
- " .long 2b \n" \
+ " .literal_position \n" \
"5: \n" \
- " l32r %1, 4b \n" \
+ " movi %1, 2b \n" \
" movi %0, %4 \n" \
" jx %1 \n" \
" .previous \n" \
@@ -217,10 +216,9 @@ __asm__ __volatile__( \
"2: \n" \
" .section .fixup,\"ax\" \n" \
" .align 4 \n" \
- "4: \n" \
- " .long 2b \n" \
+ " .literal_position \n" \
"5: \n" \
- " l32r %1, 4b \n" \
+ " movi %1, 2b \n" \
" movi %2, 0 \n" \
" movi %0, %4 \n" \
" jx %1 \n" \