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author | Thomas Gleixner <tglx@linutronix.de> | 2017-06-20 02:37:54 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-06-22 19:21:26 +0300 |
commit | 3ca57222c36ba31b80aa25de313f3c8ab26a8102 (patch) | |
tree | 606308da3d1a4e492153f0612363d7cfc9e9ea16 /arch/x86 | |
parent | 8f31a9845db348f5781df47ce04c79e4cfe90016 (diff) | |
download | linux-3ca57222c36ba31b80aa25de313f3c8ab26a8102.tar.xz |
x86/apic: Mark single target interrupts
If the interrupt destination mode of the APIC is physical then the
effective affinity is restricted to a single CPU.
Mark the interrupt accordingly in the domain allocation code, so the core
code can avoid pointless affinity setting attempts.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Keith Busch <keith.busch@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Christoph Hellwig <hch@lst.de>
Link: http://lkml.kernel.org/r/20170619235447.508846202@linutronix.de
Diffstat (limited to 'arch/x86')
-rw-r--r-- | arch/x86/kernel/apic/vector.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c index b270a76ee640..2567dc012200 100644 --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -371,6 +371,13 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq, irq_data); if (err) goto error; + /* + * If the apic destination mode is physical, then the + * effective affinity is restricted to a single target + * CPU. Mark the interrupt accordingly. + */ + if (!apic->irq_dest_mode) + irqd_set_single_target(irq_data); } return 0; |