diff options
| author | Andy Lutomirski <luto@kernel.org> | 2021-02-10 05:33:34 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2021-02-10 15:38:12 +0300 |
| commit | d24df8ecf9b6f81029f520ae7158a8670a28d70b (patch) | |
| tree | d549abad0786bd19079ac1685770c65f7e0e4c7f /arch/x86/mm/fault.c | |
| parent | 35f1c89b0cce247bf0213df243ed902989b1dcda (diff) | |
| download | linux-d24df8ecf9b6f81029f520ae7158a8670a28d70b.tar.xz | |
x86/fault: Skip the AMD erratum #91 workaround on unaffected CPUs
According to the Revision Guide for AMD Athlon™ 64 and AMD Opteron™
Processors, only early revisions of family 0xF are affected. This will
avoid unnecessarily fetching instruction bytes before sending SIGSEGV to
user programs.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/477173b7784bc28afb3e53d76ae5ef143917e8dd.1612924255.git.luto@kernel.org
Diffstat (limited to 'arch/x86/mm/fault.c')
| -rw-r--r-- | arch/x86/mm/fault.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 441c3e9b8971..818902b08c52 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -106,6 +106,15 @@ check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, } } +static bool is_amd_k8_pre_npt(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + + return unlikely(IS_ENABLED(CONFIG_CPU_SUP_AMD) && + c->x86_vendor == X86_VENDOR_AMD && + c->x86 == 0xf && c->x86_model < 0x40); +} + static int is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) { @@ -113,6 +122,10 @@ is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) unsigned char *instr; int prefetch = 0; + /* Erratum #91 affects AMD K8, pre-NPT CPUs */ + if (!is_amd_k8_pre_npt()) + return 0; + /* * If it was a exec (instruction fetch) fault on NX page, then * do not ignore the fault: |