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| author | Thomas Gleixner <tglx@linutronix.de> | 2016-11-18 12:38:09 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-11-18 12:58:31 +0300 |
| commit | 984fecebda3b9c8e3d75f8492593da71c58972b3 (patch) | |
| tree | fb6823abc0e85a861d104c34faac40c3ffbe942d /arch/x86/kernel/tsc.c | |
| parent | f3a02ecebed7df7d5d68898628dea7a3bfcf03e3 (diff) | |
| download | linux-984fecebda3b9c8e3d75f8492593da71c58972b3.tar.xz | |
x86/tsc: Finalize the split of the TSC_RELIABLE flag
All places which used the TSC_RELIABLE to skip the delayed calibration
have been converted to use the TSC_KNOWN_FREQ flag.
Make the immeditate clocksource registration, which skips the long term
calibration, solely depend on TSC_KNOWN_FREQ.
The TSC_RELIABLE now merily removes the requirement for a watchdog
clocksource.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Bin Gao <bin.gao@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Diffstat (limited to 'arch/x86/kernel/tsc.c')
| -rw-r--r-- | arch/x86/kernel/tsc.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index f4dfdaa6633c..0ff1ec61d1e4 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1299,13 +1299,8 @@ static int __init init_tsc_clocksource(void) /* * When TSC frequency is known (retrieved via MSR or CPUID), we skip * the refined calibration and directly register it as a clocksource. - * - * We still keep the TSC_RELIABLE flag here to avoid regressions - - * it will be removed after all the conversion for other code paths - * connected to this flag is done. */ - if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || - boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) { + if (boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) { clocksource_register_khz(&clocksource_tsc, tsc_khz); return 0; } |