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authorBin Gao <bin.gao@linux.intel.com>2016-11-15 23:27:23 +0300
committerThomas Gleixner <tglx@linutronix.de>2016-11-18 12:58:30 +0300
commit4635fdc696a8e89eead3ea1712ae6ada38538d40 (patch)
tree689e13ff294ee7206d6b02e05e2ee8e7e7f919c5 /arch/x86/kernel/tsc.c
parent4ca4df0b7eb06df264b2919759957f6d6ea1822e (diff)
downloadlinux-4635fdc696a8e89eead3ea1712ae6ada38538d40.tar.xz
x86/tsc: Mark Intel ATOM_GOLDMONT TSC reliable
On Intel GOLDMONT Atom SoC TSC is the only available clocksource, so there is no way to do software calibration or have a watchdog clocksource for it. Software calibration is already disabled via the TSC_KNOWN_FREQ flag, but the watchdog requirement still persists, so such systems cannot switch to high resolution/nohz mode. Mark it reliable, so it becomes usable. Hardware teams confirmed that this is safe on that SoC. Signed-off-by: Bin Gao <bin.gao@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/1479241644-234277-4-git-send-email-bin.gao@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/tsc.c')
-rw-r--r--arch/x86/kernel/tsc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index e58c31959666..f4dfdaa6633c 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -709,6 +709,13 @@ unsigned long native_calibrate_tsc(void)
*/
setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
+ /*
+ * For Atom SoCs TSC is the only reliable clocksource.
+ * Mark TSC reliable so no watchdog on it.
+ */
+ if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)
+ setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
+
return crystal_khz * ebx_numerator / eax_denominator;
}