diff options
| author | Jan Kiszka <jan.kiszka@siemens.com> | 2017-11-27 11:11:53 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-01-14 23:11:57 +0300 |
| commit | cf878e169d37b596de41322291523951540984c1 (patch) | |
| tree | 7186ab7f8a2d38101ccad769e6e0850e4db2a807 /arch/x86/kernel/jailhouse.c | |
| parent | fd498076821739db38babe72602f7c227587cbb5 (diff) | |
| download | linux-cf878e169d37b596de41322291523951540984c1.tar.xz | |
x86/jailhouse: Wire up IOAPIC for legacy UART ports
The typical I/O interrupts in non-root cells are MSI-based. However, the
platform UARTs do not support MSI. In order to run a non-root cell that
shall use one of them, the standard IOAPIC must be registered and 1:1
routing for IRQ 3 and 4 set up.
If an IOAPIC is not available, the boot loader clears standard_ioapic in
the setup data, so registration is skipped. If the guest is not allowed to
to use one of those pins, Jailhouse will simply ignore the access.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: jailhouse-dev@googlegroups.com
Link: https://lkml.kernel.org/r/90d942dda9d48a8046e00bb3c1bb6757c83227be.1511770314.git.jan.kiszka@siemens.com
Diffstat (limited to 'arch/x86/kernel/jailhouse.c')
| -rw-r--r-- | arch/x86/kernel/jailhouse.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index 2b55672ca05f..01d5b06a42bc 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -15,6 +15,7 @@ #include <asm/cpu.h> #include <asm/hypervisor.h> #include <asm/i8259.h> +#include <asm/irqdomain.h> #include <asm/reboot.h> #include <asm/setup.h> @@ -52,6 +53,15 @@ static unsigned long jailhouse_get_tsc(void) static void __init jailhouse_get_smp_config(unsigned int early) { + struct ioapic_domain_cfg ioapic_cfg = { + .type = IOAPIC_DOMAIN_STRICT, + .ops = &mp_ioapic_irqdomain_ops, + }; + struct mpc_intsrc mp_irq = { + .type = MP_INTSRC, + .irqtype = mp_INT, + .irqflag = MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE, + }; unsigned int cpu; if (x2apic_enabled()) { @@ -77,6 +87,17 @@ static void __init jailhouse_get_smp_config(unsigned int early) } smp_found_config = 1; + + if (setup_data.standard_ioapic) { + mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg); + + /* Register 1:1 mapping for legacy UART IRQs 3 and 4 */ + mp_irq.srcbusirq = mp_irq.dstirq = 3; + mp_save_irq(&mp_irq); + + mp_irq.srcbusirq = mp_irq.dstirq = 4; + mp_save_irq(&mp_irq); + } } static void jailhouse_no_restart(void) |