diff options
author | Dou Liyang <douly.fnst@cn.fujitsu.com> | 2018-03-01 08:59:29 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2018-03-01 12:12:20 +0300 |
commit | 3ea9e7ae1a2038b9fdff729861c9b4af0087024f (patch) | |
tree | d4b124281b765ebe4be3a0d9dadd05069e9ae6ff /arch/x86/kernel/apic | |
parent | 9b217f33017715903d0956dfc58f82d2a2d00e63 (diff) | |
download | linux-3ea9e7ae1a2038b9fdff729861c9b4af0087024f.tar.xz |
x86/apic: Modernize the pending interrupt code
The pending interrupt check code is old, update the following:
- Use for_each_set_bit() instead of open coding it
- Replace printk() with pr_err()
- Get rid of printk line breaks
- Make curly braces balanced
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: bhe@redhat.com
Cc: ebiederm@xmission.com
Link: https://lkml.kernel.org/r/20180301055930.2396-3-douly.fnst@cn.fujitsu.com
Diffstat (limited to 'arch/x86/kernel/apic')
-rw-r--r-- | arch/x86/kernel/apic/apic.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 69d2936e3154..7a347d7450b6 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1412,7 +1412,8 @@ static void apic_pending_intr_clear(void) { long long max_loops = cpu_khz ? cpu_khz : 1000000; unsigned long long tsc = 0, ntsc; - unsigned int value, queued; + unsigned int queued; + unsigned long value; int i, j, acked = 0; if (boot_cpu_has(X86_FEATURE_TSC)) @@ -1435,24 +1436,22 @@ static void apic_pending_intr_clear(void) for (i = APIC_ISR_NR - 1; i >= 0; i--) { value = apic_read(APIC_ISR + i*0x10); - for (j = 31; j >= 0; j--) { - if (value & (1<<j)) { - ack_APIC_irq(); - acked++; - } + for_each_set_bit(j, &value, 32) { + ack_APIC_irq(); + acked++; } } if (acked > 256) { - printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n", - acked); + pr_err("LAPIC pending interrupts after %d EOI\n", acked); break; } if (queued) { if (boot_cpu_has(X86_FEATURE_TSC) && cpu_khz) { ntsc = rdtsc(); max_loops = (cpu_khz << 10) - (ntsc - tsc); - } else + } else { max_loops--; + } } } while (queued && max_loops > 0); WARN_ON(max_loops <= 0); |