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| author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-04-26 05:04:25 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-03 14:55:49 +0300 |
| commit | da39556f66f5cfe8f9c989206974f1cb16ca5d7c (patch) | |
| tree | b4f43a8816bd1cf8248c0a2abc60e4d5fe1a1b56 /arch/x86/include | |
| parent | 764f3c21588a059cd783c6ba0734d4db2d72822d (diff) | |
| download | linux-da39556f66f5cfe8f9c989206974f1cb16ca5d7c.tar.xz | |
x86/KVM/VMX: Expose SPEC_CTRL Bit(2) to the guest
Expose the CPUID.7.EDX[31] bit to the guest, and also guard against various
combinations of SPEC_CTRL MSR values.
The handling of the MSR (to take into account the host value of SPEC_CTRL
Bit(2)) is taken care of in patch:
KVM/SVM/VMX/x86/spectre_v2: Support the combination of guest and host IBRS
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include')
0 files changed, 0 insertions, 0 deletions