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| author | Ingo Molnar <mingo@elte.hu> | 2009-01-28 07:01:41 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-01-29 01:20:17 +0300 |
| commit | f6f52baf2613dd319e9ba3f3319bf1f1c442e4b3 (patch) | |
| tree | 1eb8f814939501c10f3f18af86f9c5a5d25c7310 /arch/x86/include/asm/mach-generic | |
| parent | fe402e1f2b67a63f1e53ab2a316fc20f7ca4ec91 (diff) | |
| download | linux-f6f52baf2613dd319e9ba3f3319bf1f1c442e4b3.tar.xz | |
x86: clean up esr_disable() methods
Impact: cleanup
Most subarchitectures want to disable the APIC ESR (Error Status Register),
because they generally have hardware hacks that wrap standard CPUs into
a bigger system and hence the APIC bus is quite non-standard and weirdnesses
(lockups) have been seen with ESR reporting.
Remove the esr_disable macros and put the desired flag into each
subarchitecture's genapic template directly.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/mach-generic')
| -rw-r--r-- | arch/x86/include/asm/mach-generic/mach_apic.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h index da2d7780cb52..63fe985219f9 100644 --- a/arch/x86/include/asm/mach-generic/mach_apic.h +++ b/arch/x86/include/asm/mach-generic/mach_apic.h @@ -3,7 +3,6 @@ #include <asm/genapic.h> -#define esr_disable (apic->ESR_DISABLE) #define NO_BALANCE_IRQ (apic->no_balance_irq) #undef APIC_DEST_LOGICAL #define APIC_DEST_LOGICAL (apic->apic_destination_logical) |