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authorThomas Gleixner <tglx@linutronix.de>2019-07-22 21:47:22 +0300
committerThomas Gleixner <tglx@linutronix.de>2019-07-25 17:12:00 +0300
commit6a1cb5f5c6413222b8532722562dd1edb5fdfd38 (patch)
tree140ed1ae3359c26ebc75ace8ff334a231a982bf4 /arch/x86/include/asm/apic.h
parentbdda3b93e66085abf0b2c16bcdf471176e3c816a (diff)
downloadlinux-6a1cb5f5c6413222b8532722562dd1edb5fdfd38.tar.xz
x86/apic: Add static key to Control IPI shorthands
The IPI shorthand functionality delivers IPI/NMI broadcasts to all CPUs in the system. This can have similar side effects as the MCE broadcasting when CPUs are waiting in the BIOS or are offlined. The kernel tracks already the state of offlined CPUs whether they have been brought up at least once so that the CR4 MCE bit is set to make sure that MCE broadcasts can't brick the machine. Utilize that information and compare it to the cpu_present_mask. If all present CPUs have been brought up at least once then the broadcast side effect is mitigated by disabling regular interrupt/IPI delivery in the APIC itself and by the cpu offline check at the begin of the NMI handler. Use a static key to switch between broadcasting via shorthands or sending the IPI/NMI one by one. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20190722105220.386410643@linutronix.de
Diffstat (limited to 'arch/x86/include/asm/apic.h')
-rw-r--r--arch/x86/include/asm/apic.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index cae7e0d02476..4a0d349ab44d 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -505,8 +505,10 @@ extern int default_check_phys_apicid_present(int phys_apicid);
#ifdef CONFIG_SMP
bool apic_id_is_primary_thread(unsigned int id);
+void apic_smt_update(void);
#else
static inline bool apic_id_is_primary_thread(unsigned int id) { return false; }
+static inline void apic_smt_update(void) { }
#endif
extern void irq_enter(void);