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author | Andrea Parri <parri.andrea@gmail.com> | 2019-10-03 18:52:00 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2019-11-12 13:44:21 +0300 |
commit | dce7cd62754b5d4a6e401b8b0769ec94cf971041 (patch) | |
tree | d3ffbd44694b1f6cd044ae85e07c45d70caedca0 /arch/x86/hyperv | |
parent | b264f57fde0c686c5c1dfdd0c21992c49196bb87 (diff) | |
download | linux-dce7cd62754b5d4a6e401b8b0769ec94cf971041.tar.xz |
x86/hyperv: Allow guests to enable InvariantTSC
If the hardware supports TSC scaling, Hyper-V will set bit 15 of the
HV_PARTITION_PRIVILEGE_MASK in guest VMs with a compatible Hyper-V
configuration version. Bit 15 corresponds to the
AccessTscInvariantControls privilege. If this privilege bit is set,
guests can access the HvSyntheticInvariantTscControl MSR: guests can
set bit 0 of this synthetic MSR to enable the InvariantTSC feature.
After setting the synthetic MSR, CPUID will enumerate support for
InvariantTSC.
Signed-off-by: Andrea Parri <parri.andrea@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Link: https://lkml.kernel.org/r/20191003155200.22022-1-parri.andrea@gmail.com
Diffstat (limited to 'arch/x86/hyperv')
0 files changed, 0 insertions, 0 deletions