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| author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 05:57:33 +0400 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 18:26:23 +0400 |
| commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
| tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /arch/unicore32 | |
| parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) | |
| download | linux-25985edcedea6396277003854657b5f3cb31a628.tar.xz | |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'arch/unicore32')
| -rw-r--r-- | arch/unicore32/include/mach/regs-umal.h | 4 | ||||
| -rw-r--r-- | arch/unicore32/kernel/head.S | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/unicore32/include/mach/regs-umal.h b/arch/unicore32/include/mach/regs-umal.h index 885bb62fee71..aa22df74e11d 100644 --- a/arch/unicore32/include/mach/regs-umal.h +++ b/arch/unicore32/include/mach/regs-umal.h @@ -52,7 +52,7 @@ */ #define UMAL_MIISTATUS (PKUNITY_UMAL_BASE + 0x0030) /* - * MII Managment Indicator UMAL_MIIIDCT + * MII Management Indicator UMAL_MIIIDCT */ #define UMAL_MIIIDCT (PKUNITY_UMAL_BASE + 0x0034) /* @@ -91,7 +91,7 @@ #define UMAL_FIFORAM6 (PKUNITY_UMAL_BASE + 0x0078) #define UMAL_FIFORAM7 (PKUNITY_UMAL_BASE + 0x007c) -/* MAHBE MODUEL OF UMAL */ +/* MAHBE MODULE OF UMAL */ /* UMAL's MAHBE module interfaces to the host system through 32-bit AHB Master * and Slave ports.Registers within the M-AHBE provide Control and Status * information concerning these transfers. diff --git a/arch/unicore32/kernel/head.S b/arch/unicore32/kernel/head.S index 92255f3ab6a7..8caf322e110d 100644 --- a/arch/unicore32/kernel/head.S +++ b/arch/unicore32/kernel/head.S @@ -164,7 +164,7 @@ ENTRY(stext) ENDPROC(stext) /* - * Enable the MMU. This completely changes the stucture of the visible + * Enable the MMU. This completely changes the structure of the visible * memory space. You will not be able to trace execution through this. * * r0 = cp#0 control register |