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| author | David S. Miller <davem@davemloft.net> | 2011-09-11 21:42:20 +0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-09-17 01:21:33 +0400 |
| commit | 08cefa9fa7e5b3ddaefb8b7bfa408d148429c08d (patch) | |
| tree | 07a33d960d2ce5d72733dd21cf8d179fd06d145a /arch/sparc/kernel/cpumap.c | |
| parent | 1a8e0da5937a6c87807083baa318cf8f98dac9aa (diff) | |
| download | linux-08cefa9fa7e5b3ddaefb8b7bfa408d148429c08d.tar.xz | |
sparc64: Future proof Niagara cpu detection.
Recognize T4 and T5 chips. Treating them both as "T2 plus other
stuff" should be extremely safe and make sure distributions will work
when those chips actually ship to customers.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/cpumap.c')
| -rw-r--r-- | arch/sparc/kernel/cpumap.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/sparc/kernel/cpumap.c b/arch/sparc/kernel/cpumap.c index 4197e8d62d4c..9323eafccb93 100644 --- a/arch/sparc/kernel/cpumap.c +++ b/arch/sparc/kernel/cpumap.c @@ -325,6 +325,8 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index) case SUN4V_CHIP_NIAGARA1: case SUN4V_CHIP_NIAGARA2: case SUN4V_CHIP_NIAGARA3: + case SUN4V_CHIP_NIAGARA4: + case SUN4V_CHIP_NIAGARA5: rover_inc_table = niagara_iterate_method; break; default: |