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| author | Paul Mundt <lethal@linux-sh.org> | 2012-05-14 10:16:11 +0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2012-05-14 10:16:11 +0400 |
| commit | e45af0e083dfc5d49dbad6965b9eeb3ac0072d82 (patch) | |
| tree | e0770908dea536c2d0ee2fe4e57dc2a219532ad2 /arch/sh/include/asm | |
| parent | 20e7c297efeca0861adcca073a0d283da659834b (diff) | |
| download | linux-e45af0e083dfc5d49dbad6965b9eeb3ac0072d82.tar.xz | |
sh64: Kill off unused fixed I/O mapping window.
This was reworked some time ago to go through fixmaps instead, leaving
the range itself unused. As such, kill off the remaining references and
hand over the remaining space for fixmaps directly. This also makes it
possible to simplify the vmalloc fault case as we no longer have to care
about the special section.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/asm')
| -rw-r--r-- | arch/sh/include/asm/fixmap.h | 2 | ||||
| -rw-r--r-- | arch/sh/include/asm/pgtable_64.h | 3 |
2 files changed, 1 insertions, 4 deletions
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h index 5f1ca55bcec8..41cda1264bb0 100644 --- a/arch/sh/include/asm/fixmap.h +++ b/arch/sh/include/asm/fixmap.h @@ -96,7 +96,7 @@ extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags); #ifdef CONFIG_SUPERH32 #define FIXADDR_TOP (P3_ADDR_MAX - PAGE_SIZE) #else -#define FIXADDR_TOP (0xff000000 - PAGE_SIZE) +#define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) #endif #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h index 42cb9dd52161..dda8c82601b9 100644 --- a/arch/sh/include/asm/pgtable_64.h +++ b/arch/sh/include/asm/pgtable_64.h @@ -87,9 +87,6 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) #define pte_unmap(pte) do { } while (0) #ifndef __ASSEMBLY__ -#define IOBASE_VADDR 0xff000000 -#define IOBASE_END 0xffffffff - /* * PTEL coherent flags. * See Chapter 17 ST50 CPU Core Volume 1, Architecture. |