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authorPaul Mundt <lethal@linux-sh.org>2010-02-01 14:01:50 +0300
committerPaul Mundt <lethal@linux-sh.org>2010-02-01 14:01:50 +0300
commitb6c58b1d987a5795086c5c2babd8c7367d2fdb8c (patch)
tree3ec992af50f44dd09ff125165ea1c4ef41b2aecc /arch/sh/drivers/pci/pci-sh5.c
parentef407beefbd9928792ccc93857e408e0057bc17b (diff)
downloadlinux-b6c58b1d987a5795086c5c2babd8c7367d2fdb8c.tar.xz
sh: Improved multi-resource handling for SH7780 PCI.
The SH7780 PCI controller supports 3 different ranges of PCI memory in addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory windows are supported, while in 32-bit mode all 3 are visible. This attempts to make the resource handling completely dynamic and to permit platforms to map in as many apertures as they can handle. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/pci-sh5.c')
-rw-r--r--arch/sh/drivers/pci/pci-sh5.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
index bce73faabc88..0bf296c78795 100644
--- a/arch/sh/drivers/pci/pci-sh5.c
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -89,14 +89,13 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
return IRQ_NONE;
}
-static struct resource sh5_io_resource = { /* place holder */ };
-static struct resource sh5_mem_resource = { /* place holder */ };
+static struct resource sh5_pci_resources[2];
static struct pci_channel sh5pci_controller = {
.pci_ops = &sh5_pci_ops,
- .mem_resource = &sh5_mem_resource,
+ .resources = sh5_pci_resources,
+ .nr_resources = ARRAY_SIZE(sh5_pci_resources),
.mem_offset = 0x00000000,
- .io_resource = &sh5_io_resource,
.io_offset = 0x00000000,
};
@@ -210,11 +209,11 @@ static int __init sh5pci_init(void)
SH5PCI_WRITE(AINTM, ~0);
SH5PCI_WRITE(PINTM, ~0);
- sh5_io_resource.start = PCI_IO_AREA;
- sh5_io_resource.end = PCI_IO_AREA + 0x10000;
+ sh5_pci_resources[0].start = PCI_IO_AREA;
+ sh5_pci_resources[0].end = PCI_IO_AREA + 0x10000;
- sh5_mem_resource.start = memStart;
- sh5_mem_resource.end = memStart + memSize;
+ sh5_pci_resources[1].start = memStart;
+ sh5_pci_resources[1].end = memStart + memSize;
return register_pci_controller(&sh5pci_controller);
}