diff options
| author | Tong Tiangen <tongtiangen@huawei.com> | 2022-10-24 12:47:24 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-12-02 22:25:49 +0300 |
| commit | d33deda095d3637d218e7eed441633b2a01e1413 (patch) | |
| tree | 28491d2d24d33666d395360fd78426d176513906 /arch/riscv/mm | |
| parent | 6925ba3d9b8ccf1989b4cf13d6f0d7e341899481 (diff) | |
| download | linux-d33deda095d3637d218e7eed441633b2a01e1413.tar.xz | |
riscv/mm: hugepage's PG_dcache_clean flag is only set in head page
HugeTLB pages are always fully mapped, so only setting head page's
PG_dcache_clean flag is enough.
Signed-off-by: Tong Tiangen <tongtiangen@huawei.com>
Link: https://lore.kernel.org/lkml/20220331065640.5777-2-songmuchun@bytedance.com/
Link: https://lore.kernel.org/r/20221024094725.3054311-2-tongtiangen@huawei.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/mm')
| -rw-r--r-- | arch/riscv/mm/cacheflush.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c index 6cb7d96ad9c7..062559c04fc3 100644 --- a/arch/riscv/mm/cacheflush.c +++ b/arch/riscv/mm/cacheflush.c @@ -82,6 +82,13 @@ void flush_icache_pte(pte_t pte) { struct page *page = pte_page(pte); + /* + * HugeTLB pages are always fully mapped, so only setting head page's + * PG_dcache_clean flag is enough. + */ + if (PageHuge(page)) + page = compound_head(page); + if (!test_and_set_bit(PG_dcache_clean, &page->flags)) flush_icache_all(); } |