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author | Ley Foon Tan <leyfoon.tan@starfivetech.com> | 2023-06-15 17:45:45 +0300 |
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committer | Genevieve Chan <genevieve.chan@starfivetech.com> | 2023-06-22 06:28:02 +0300 |
commit | da348a2762ec72a2882ee911f281c6b3b083a9b8 (patch) | |
tree | 1f03d37f4589c3b165302957bac75107cf04e48e /arch/riscv/mm/extable.c | |
parent | 66cf40406d3bb8349b91dda03f3a657bafe572f5 (diff) | |
download | linux-da348a2762ec72a2882ee911f281c6b3b083a9b8.tar.xz |
riscv: invalidate cache when DMA_BIDIRECTIONAL case in arch_sync_dma_for_cpu()
DMA_BIDIRECTIONAL cases also use invalidate.
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Diffstat (limited to 'arch/riscv/mm/extable.c')
0 files changed, 0 insertions, 0 deletions