diff options
| author | Atish Patra <atishp@rivosinc.com> | 2022-04-20 04:32:57 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2022-04-20 11:12:49 +0300 |
| commit | 3ab75a793e4939519d288ef1994db73b8e2d1d86 (patch) | |
| tree | 3b9503f34d8dfd2a2ac3850d66e56469082103e0 /arch/riscv/kvm | |
| parent | b2d229d4ddb17db541098b83524d901257e93845 (diff) | |
| download | linux-3ab75a793e4939519d288ef1994db73b8e2d1d86.tar.xz | |
RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
enabled. But it should not appear in the ISA extension in the device tree.
Remove those from the allowed ISA extension for kvm.
Fixes: a33c72faf2d7 ("RISC-V: KVM: Implement VCPU create, init and
destroy functions")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/kvm')
| -rw-r--r-- | arch/riscv/kvm/vcpu.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index 6785aef4cbd4..2e25a7b83a1b 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = { riscv_isa_extension_mask(d) | \ riscv_isa_extension_mask(f) | \ riscv_isa_extension_mask(i) | \ - riscv_isa_extension_mask(m) | \ - riscv_isa_extension_mask(s) | \ - riscv_isa_extension_mask(u)) + riscv_isa_extension_mask(m)) static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) { |