diff options
| author | Atish Patra <atishp@rivosinc.com> | 2023-02-07 12:55:26 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2023-02-07 18:06:01 +0300 |
| commit | a9ac6c37521ff3f81eba7fada8773c362652d75f (patch) | |
| tree | 1f086938288606f2eadbfbda47053861193ab053 /arch/riscv/kvm/vcpu_insn.c | |
| parent | f04bafb52f580552dc22bfb5b7af9a5dbcc2254f (diff) | |
| download | linux-a9ac6c37521ff3f81eba7fada8773c362652d75f.tar.xz | |
RISC-V: KVM: Implement trap & emulate for hpmcounters
As the KVM guests only see the virtual PMU counters, all hpmcounter
access should trap and KVM emulates the read access on behalf of guests.
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/kvm/vcpu_insn.c')
| -rw-r--r-- | arch/riscv/kvm/vcpu_insn.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/riscv/kvm/vcpu_insn.c b/arch/riscv/kvm/vcpu_insn.c index 0bb52761a3f7..f689337b78ff 100644 --- a/arch/riscv/kvm/vcpu_insn.c +++ b/arch/riscv/kvm/vcpu_insn.c @@ -213,7 +213,9 @@ struct csr_func { unsigned long wr_mask); }; -static const struct csr_func csr_funcs[] = { }; +static const struct csr_func csr_funcs[] = { + KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS +}; /** * kvm_riscv_vcpu_csr_return -- Handle CSR read/write after user space |