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| author | Thomas Gleixner <tglx@linutronix.de> | 2019-02-07 23:12:40 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-02-07 23:12:40 +0300 |
| commit | 8087f407364d50d5c3ac8e39365548351e2859f2 (patch) | |
| tree | 49826fed88a84e0b36cd517d1953b7292e4b896a /arch/riscv/kernel/asm-offsets.c | |
| parent | 37b144df8099465bf8d08296d8b424c77fd9b0ac (diff) | |
| parent | 56841070ccc87b463ac037d2d1f2beb8e5e35f0c (diff) | |
| download | linux-8087f407364d50d5c3ac8e39365548351e2859f2.tar.xz | |
Merge tag 'irqchip-5.0-3' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates from Marc Zyngier:
- Another GICv3 ITS fix for devices sharing the same DevID
- Don't return invalid data on exhaustion of the GICv3 LPI pool
- Fix a GICv3 field decoding bug leading to memory over-allocation
- Init GICv4 at boot time instead of lazy init
- Fix interrupt masking on PJ4
Diffstat (limited to 'arch/riscv/kernel/asm-offsets.c')
0 files changed, 0 insertions, 0 deletions