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| author | Andy Hu <andy.hu@starfivetech.com> | 2023-06-10 05:54:29 +0300 |
|---|---|---|
| committer | Andy Hu <andy.hu@starfivetech.com> | 2023-06-10 05:54:29 +0300 |
| commit | bd72ab7a058aaa5cefc1a14453eab2aa8aac14e3 (patch) | |
| tree | 0767f533c51dbb4fb0cf0b6369ae9e45d75aa6e7 /arch/riscv/boot | |
| parent | d9eee31aaec51ade1641391836c1f07dd2151a4a (diff) | |
| parent | bfe3cdc40dfd06288944c8b7a85b7e070d980bc1 (diff) | |
| download | linux-bd72ab7a058aaa5cefc1a14453eab2aa8aac14e3.tar.xz | |
Merge tag 'JH7110_515_SDK_v5.0.5' into vf2-515-devel-v3.0.x
Diffstat (limited to 'arch/riscv/boot')
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/jh7110.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index f324836d95b1..b5bce82a2207 100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -39,6 +39,25 @@ opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1040000>; }; + + /* CPU opp table for 1.25GHz */ + opp-312500000 { + opp-hz = /bits/ 64 <312500000>; + opp-microvolt = <800000>; + }; + opp-417000000 { + opp-hz = /bits/ 64 <417000000>; + opp-microvolt = <800000>; + }; + opp-625000000 { + opp-hz = /bits/ 64 <625000000>; + opp-microvolt = <800000>; + opp-suspend; + }; + opp-1250000000 { + opp-hz = /bits/ 64 <1250000000>; + opp-microvolt = <1000000>; + }; }; cpus { |