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| author | William Qiu <william.qiu@starfivetech.com> | 2022-09-06 11:47:35 +0300 |
|---|---|---|
| committer | William Qiu <william.qiu@starfivetech.com> | 2022-09-06 13:39:49 +0300 |
| commit | 1fd741b16eb8f58e8536f945911533d61727ad6a (patch) | |
| tree | c7622366c9a6802bfc7d2eaf6091ae48c961783e /arch/riscv/boot/dts/starfive | |
| parent | 01172a6881e939e663e561127cf88a6580254514 (diff) | |
| download | linux-1fd741b16eb8f58e8536f945911533d61727ad6a.tar.xz | |
dts:starfive:Set can1 to canfd
Set can0 to can and set can1 to canfd
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Diffstat (limited to 'arch/riscv/boot/dts/starfive')
| -rw-r--r-- | arch/riscv/boot/dts/starfive/Makefile | 1 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts | 2 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-evb-canfd.dts | 45 | ||||
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 |
4 files changed, 2 insertions, 48 deletions
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 5598347618a9..fc946b38a3f2 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -4,7 +4,6 @@ dtb-$(CONFIG_SOC_STARFIVE_JH7110) += jh7110-visionfive-v2.dtb \ jh7110-evb.dtb \ jh7110-fpga.dtb \ jh7110-evb-can-pdm-pwmdac.dtb \ - jh7110-evb-canfd.dtb \ jh7110-evb-dvp-rgb2hdmi.dtb \ jh7110-evb-pcie-i2s-sd.dtb \ jh7110-evb-i2s-ac108.dtb \ diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts index e947156006b1..2c543cc6b41d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts @@ -37,12 +37,10 @@ }; &can0 { - syscon,can_or_canfd = <0>; status = "okay"; }; &can1 { - syscon,can_or_canfd = <0>; status = "okay"; }; diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-canfd.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-canfd.dts deleted file mode 100644 index 81cd20bdb9b8..000000000000 --- a/arch/riscv/boot/dts/starfive/jh7110-evb-canfd.dts +++ /dev/null @@ -1,45 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -/* - * Copyright (C) 2022 StarFive Technology Co., Ltd. - * Copyright (C) 2022 William Qiu <william.qiu@starfivetech.com> - */ - -/dts-v1/; -#include "jh7110-evb.dtsi" - -/ { - model = "StarFive JH7110 EVB"; - compatible = "starfive,jh7110-evb", "starfive,jh7110"; -}; - -/* default sd card */ -&sdio0 { - clock-frequency = <102400000>; - max-frequency = <200000000>; - card-detect-delay = <300>; - bus-width = <4>; - broken-cd; - cap-sd-highspeed; - post-power-on-delay-ms = <200>; - pinctrl-names = "default"; - pinctrl-0 = <&sdcard0_pins>; - status = "okay"; -}; - -&usbdrd30 { - status = "okay"; -}; - -&pcie1 { - status = "okay"; -}; - -&can0 { - syscon,can_or_canfd = <1>; - status = "okay"; -}; - -&can1 { - syscon,can_or_canfd = <1>; - status = "okay"; -};
\ No newline at end of file diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 6ed66a1c3a9b..47e343631240 100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1131,6 +1131,7 @@ <&rstgen RSTN_U0_CAN_CTRL_TIMER>; reset-names = "rst_apb", "rst_core", "rst_timer"; starfive,sys-syscon = <&sys_syscon 0x10 0x3 0x8>; + syscon,can_or_canfd = <0>; status = "disabled"; }; @@ -1147,6 +1148,7 @@ <&rstgen RSTN_U1_CAN_CTRL_TIMER>; reset-names = "rst_apb", "rst_core", "rst_timer"; starfive,sys-syscon = <&sys_syscon 0x88 0x12 0x40000>; + syscon,can_or_canfd = <1>; status = "disabled"; }; |