diff options
author | Emil Renner Berthing <kernel@esmil.dk> | 2021-06-13 02:48:31 +0300 |
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committer | Emil Renner Berthing <kernel@esmil.dk> | 2022-07-13 00:26:03 +0300 |
commit | a384c63142355cabe1f42154a70639b9ede4ba69 (patch) | |
tree | 638c038a5e71aff3c499eb879e6a488f21c2f547 /arch/riscv/Kconfig | |
parent | 2e2c3e3fe51a91c8650961b8e9d14cfc91058932 (diff) | |
download | linux-a384c63142355cabe1f42154a70639b9ede4ba69.tar.xz |
RISC-V: Add non-coherent DMA support
This implements the cache management operations to support non-coherent
DMAs on RISC-V.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Diffstat (limited to 'arch/riscv/Kconfig')
-rw-r--r-- | arch/riscv/Kconfig | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 00fd9c548f26..2bdae7848a40 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -209,6 +209,16 @@ config PGTABLE_LEVELS config LOCKDEP_SUPPORT def_bool y +config RISCV_DMA_NONCOHERENT + bool "Support non-coherent DMA" + default SOC_STARFIVE + select ARCH_HAS_DMA_PREP_COHERENT + select ARCH_HAS_DMA_SET_UNCACHED + select ARCH_HAS_DMA_CLEAR_UNCACHED + select ARCH_HAS_SYNC_DMA_FOR_DEVICE + select ARCH_HAS_SYNC_DMA_FOR_CPU + select ARCH_HAS_SETUP_DMA_OPS + source "arch/riscv/Kconfig.socs" source "arch/riscv/Kconfig.erratas" |