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| author | FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> | 2010-06-29 11:29:04 +0400 |
|---|---|---|
| committer | Kyle McMartin <kyle@mcmartin.ca> | 2010-10-22 05:20:09 +0400 |
| commit | b97680c419b75b0c2cf6837a9f268e2ecbaf50f6 (patch) | |
| tree | 6841d13169d7087f1b7fd90cce079a832922c805 /arch/parisc/include | |
| parent | 2da83b90bbbac586fca2735f7da21966a31ec33f (diff) | |
| download | linux-b97680c419b75b0c2cf6837a9f268e2ecbaf50f6.tar.xz | |
parisc: remove homegrown L1_CACHE_ALIGN macro
Let's use the standard L1_CACHE_ALIGN macro instead.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Kyle McMartin <kyle@redhat.com>
Diffstat (limited to 'arch/parisc/include')
| -rw-r--r-- | arch/parisc/include/asm/cache.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h index 039880e7d2c9..47f11c707b65 100644 --- a/arch/parisc/include/asm/cache.h +++ b/arch/parisc/include/asm/cache.h @@ -24,8 +24,6 @@ #ifndef __ASSEMBLY__ -#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) - #define SMP_CACHE_BYTES L1_CACHE_BYTES #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |