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| author | Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> | 2014-05-12 15:08:26 +0400 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2017-02-24 22:12:38 +0300 |
| commit | 0e9f9fd20ce931cc2cf0519c56ae33fc74d656ad (patch) | |
| tree | 502f8f067c7cc7ffcdd9042d404dc92e62b78f3c /arch/openrisc/include/asm/bitops.h | |
| parent | 63104c06a9eddf53f88f6d16196bb036c62967b2 (diff) | |
| download | linux-0e9f9fd20ce931cc2cf0519c56ae33fc74d656ad.tar.xz | |
openrisc: add atomic bitops
This utilize the load-link/store-conditional l.lwa and l.swa
instructions to implement the atomic bitops.
When those instructions are not available emulation is provided.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by
Alan Cox https://lkml.org/lkml/2014/7/23/666, implement
test_and_change_bit]
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'arch/openrisc/include/asm/bitops.h')
| -rw-r--r-- | arch/openrisc/include/asm/bitops.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/openrisc/include/asm/bitops.h b/arch/openrisc/include/asm/bitops.h index 3003cdad561b..689f56819d53 100644 --- a/arch/openrisc/include/asm/bitops.h +++ b/arch/openrisc/include/asm/bitops.h @@ -45,7 +45,7 @@ #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/atomic.h> +#include <asm/bitops/atomic.h> #include <asm-generic/bitops/non-atomic.h> #include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> |