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authorGreentime Hu <greentime@andestech.com>2017-10-25 11:49:38 +0300
committerGreentime Hu <greentime@andestech.com>2018-02-22 05:44:32 +0300
commit484367b6a9225ec6830ae3fb4a3adbdd724cb93a (patch)
treec90dfc602450c33c2cc1f739a1b1ef067e626972 /arch/nds32/include/asm/barrier.h
parentf13c34b9066745910bd96f94bd35895af2d4f2b8 (diff)
downloadlinux-484367b6a9225ec6830ae3fb4a3adbdd724cb93a.tar.xz
nds32: Atomic operations
This patch includes the atomic and futex operations. Many atomic operations use the load-lock word(llw) and store-condition word(scw) operations. Signed-off-by: Vincent Chen <vincentc@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/nds32/include/asm/barrier.h')
-rw-r--r--arch/nds32/include/asm/barrier.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/nds32/include/asm/barrier.h b/arch/nds32/include/asm/barrier.h
new file mode 100644
index 000000000000..faafc373ea6c
--- /dev/null
+++ b/arch/nds32/include/asm/barrier.h
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2005-2017 Andes Technology Corporation
+
+#ifndef __NDS32_ASM_BARRIER_H
+#define __NDS32_ASM_BARRIER_H
+
+#ifndef __ASSEMBLY__
+#define mb() asm volatile("msync all":::"memory")
+#define rmb() asm volatile("msync all":::"memory")
+#define wmb() asm volatile("msync store":::"memory")
+#include <asm-generic/barrier.h>
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __NDS32_ASM_BARRIER_H */