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authorNiklas Cassel <niklas.cassel@axis.com>2015-01-15 18:41:13 +0300
committerRalf Baechle <ralf@linux-mips.org>2015-04-10 16:41:52 +0300
commit90db024f140d0d6ad960cc5f090e3c8ed890ca55 (patch)
treec85f4abbbf04ae4fba735874addcbbf35be0f296 /arch/mips
parentf8483988cadd7dd22de928db29ed3bcbe02faf78 (diff)
downloadlinux-90db024f140d0d6ad960cc5f090e3c8ed890ca55.tar.xz
MIPS: smp-cps: cpu_set FPU mask if FPU present
If we have an FPU, enroll ourselves in the FPU-full mask. Matching the MT_SMP and CMP implementations of smp_setup. Signed-off-by: Niklas Cassel <niklass@axis.com> Cc: paul.burton@imgtec.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8948/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/smp-cps.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index bed7590e475f..d5589bedd0a4 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -88,6 +88,12 @@ static void __init cps_smp_setup(void)
/* Make core 0 coherent with everything */
write_gcr_cl_coherence(0xff);
+
+#ifdef CONFIG_MIPS_MT_FPAFF
+ /* If we have an FPU, enroll ourselves in the FPU-full mask */
+ if (cpu_has_fpu)
+ cpu_set(0, mt_fpu_cpumask);
+#endif /* CONFIG_MIPS_MT_FPAFF */
}
static void __init cps_prepare_cpus(unsigned int max_cpus)