diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-09-01 17:22:37 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 19:18:47 +0400 |
| commit | 21e77df215e58523a755b5dd006cb17610616f20 (patch) | |
| tree | 94895b0fdc98e5f6ac44ba667feb96a9433a7065 /arch/mips | |
| parent | f6d9831bb11eb465f95fb1736b866d405d9c7cbf (diff) | |
| download | linux-21e77df215e58523a755b5dd006cb17610616f20.tar.xz | |
MIPS: TXx9: Microoptimize interrupt handlers
The IOC interrupt status register on RBTX49XX only have 8 bits. Use
8-bit version of __fls() to optimize interrupt handlers.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/txx9/rbtx4927/irq.c | 6 | ||||
| -rw-r--r-- | arch/mips/txx9/rbtx4938/irq.c | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index 22076e3f03a8..9c14ebb26cb4 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -133,9 +133,9 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) u8 level3; level3 = readb(rbtx4927_imstat_addr) & 0x1f; - if (level3) - sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; - return sw_irq; + if (unlikely(!level3)) + return -1; + return RBTX4927_IRQ_IOC + __fls8(level3); } static void __init toshiba_rbtx4927_irq_ioc_init(void) diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index ca2f8306ce93..7d21befb8932 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c @@ -85,10 +85,10 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) u8 level3; level3 = readb(rbtx4938_imstat_addr); - if (level3) - /* must use fls so onboard ATA has priority */ - sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1; - return sw_irq; + if (unlikely(!level3)) + return -1; + /* must use fls so onboard ATA has priority */ + return RBTX4938_IRQ_IOC + __fls8(level3); } static void __init |