diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-26 21:45:33 +0300 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-26 21:45:33 +0300 |
commit | 89261c57021352045c4af24522c6854c9ee90139 (patch) | |
tree | ad7e2fd28eb7cc6700807b4c6cdc546959563bc8 /arch/mips | |
parent | c2f1f3e0e17d94ab0c66d83e669492cb9e9a3698 (diff) | |
parent | adcc81f148d733b7e8e641300c5590a2cdc13bf3 (diff) | |
download | linux-89261c57021352045c4af24522c6854c9ee90139.tar.xz |
Merge tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
"Here's the main MIPS pull for Linux 4.21. Core architecture changes
include:
- Syscall tables & definitions for unistd.h are now generated by
scripts, providing greater consistency with other architectures &
making it easier to add new syscalls.
- Support for building kernels with no floating point support, upon
which any userland attempting to use floating point instructions
will receive a SIGILL. Mostly useful to shrink the kernel & as
preparation for nanoMIPS support which does not yet include FP.
- MIPS SIMD Architecture (MSA) vector register context is now exposed
by ptrace via a new NT_MIPS_MSA regset.
- ASIDs are now stored as 64b values even for MIPS32 kernels,
expanding the ASID version field sufficiently that we don't need to
worry about overflow & avoiding rare issues with reused ASIDs that
have been observed in the wild.
- The branch delay slot "emulation" page is now mapped without write
permission for the user, preventing its use as a nice location for
attacks to execute malicious code from.
- Support for ioremap_prot(), primarily to allow gdb or other ptrace
users the ability to view their tracee's memory using the same
cache coherency attribute.
- Optimizations to more cpu_has_* macros, allowing more to be
compile-time constant where possible.
- Enable building the whole kernel with UBSAN instrumentation.
- Enable building the kernel with link-time dead code & data
elimination.
Platform specific changes include:
- The Boston board gains a workaround for DMA prefetching issues with
the EG20T Platform Controller Hub that it uses.
- Cleanups to Cavium Octeon code removing about 20k lines of
redundant code, mostly unused or duplicate register definitions in
headers.
- defconfig updates for the DECstation machines, including new
defconfigs for r4k & 64b machines.
- Further work on Loongson 3 support.
- DMA fixes for SiByte machines"
* tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (95 commits)
MIPS: math-emu: Write-protect delay slot emulation pages
MIPS: Remove struct mm_context_t fp_mode_switching field
mips: generate uapi header and system call table files
mips: add system call table generation support
mips: remove syscall table entries
mips: add +1 to __NR_syscalls in uapi header
mips: rename scall64-64.S to scall64-n64.S
mips: remove unused macros
mips: add __NR_syscalls along with __NR_Linux_syscalls
MIPS: Expand MIPS32 ASIDs to 64 bits
MIPS: OCTEON: delete redundant register definitions
MIPS: OCTEON: cvmx_gmxx_inf_mode: use oldest forward compatible definition
MIPS: OCTEON: cvmx_mio_fus_dat3: use oldest forward compatible definition
MIPS: OCTEON: cvmx_pko_mem_debug8: use oldest forward compatible definition
MIPS: OCTEON: octeon-usb: use common gpio_bit definition
MIPS: OCTEON: enable all OCTEON drivers in defconfig
mips: annotate implicit fall throughs
MIPS: Hardcode cpu_has_mips* where target ISA allows
MIPS: MT: Remove norps command line parameter
MIPS: Only include mmzone.h when CONFIG_NEED_MULTIPLE_NODES=y
...
Diffstat (limited to 'arch/mips')
217 files changed, 4294 insertions, 25470 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8272ea4c7264..e49b5a0c8585 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2,11 +2,12 @@ config MIPS bool default y - select ARCH_BINFMT_ELF_STATE + select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT select ARCH_CLOCKSOURCE_DATA select ARCH_DISCARD_MEMBLOCK select ARCH_HAS_ELF_RANDOMIZE select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST + select ARCH_HAS_UBSAN_SANITIZE_ALL select ARCH_SUPPORTS_UPROBES select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_CMPXCHG_LOCKREF if 64BIT @@ -15,6 +16,7 @@ config MIPS select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_EXTABLE_SORT select CLONE_BACKWARDS + select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) select CPU_PM if CPU_IDLE select DMA_DIRECT_OPS select GENERIC_ATOMIC64 if !64BIT @@ -56,10 +58,12 @@ config MIPS select HAVE_FUNCTION_TRACER select HAVE_GENERIC_DMA_COHERENT select HAVE_IDE + select HAVE_IOREMAP_PROT select HAVE_IRQ_EXIT_ON_IRQ_STACK select HAVE_IRQ_TIME_ACCOUNTING select HAVE_KPROBES select HAVE_KRETPROBES + select HAVE_LD_DEAD_CODE_DATA_ELIMINATION select HAVE_MEMBLOCK_NODE_MAP select HAVE_MOD_ARCH_SPECIFIC select HAVE_NMI @@ -494,22 +498,23 @@ config MIPS_MALTA select BOOT_RAW select BUILTIN_DTB select CEVT_R4K - select CSRC_R4K select CLKSRC_MIPS_GIC select COMMON_CLK + select CSRC_R4K select DMA_MAYBE_COHERENT select GENERIC_ISA_DMA select HAVE_PCSPKR_PLATFORM - select IRQ_MIPS_CPU - select MIPS_GIC select HW_HAS_PCI select I8253 select I8259 + select IRQ_MIPS_CPU + select LIBFDT select MIPS_BONITO64 select MIPS_CPU_SCACHE + select MIPS_GIC select MIPS_L1_CACHE_SHIFT_6 - select PCI_GT64XXX_PCI0 select MIPS_MSC + select PCI_GT64XXX_PCI0 select SMP_UP if SMP select SWAP_IO_SPACE select SYS_HAS_CPU_MIPS32_R1 @@ -528,19 +533,16 @@ config MIPS_MALTA select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_MICROMIPS + select SYS_SUPPORTS_MIPS16 select SYS_SUPPORTS_MIPS_CMP select SYS_SUPPORTS_MIPS_CPS - select SYS_SUPPORTS_MIPS16 select SYS_SUPPORTS_MULTITHREADING + select SYS_SUPPORTS_RELOCATABLE select SYS_SUPPORTS_SMARTMIPS select SYS_SUPPORTS_VPE_LOADER select SYS_SUPPORTS_ZBOOT - select SYS_SUPPORTS_RELOCATABLE select USE_OF - select LIBFDT select ZONE_DMA32 if 64BIT - select BUILTIN_DTB - select LIBFDT help This enables support for the MIPS Technologies Malta evaluation board. @@ -794,6 +796,7 @@ config SIBYTE_SWARM select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select ZONE_DMA32 if 64BIT + select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI config SIBYTE_LITTLESUR bool "Sibyte BCM91250C2-LittleSur" @@ -805,6 +808,7 @@ config SIBYTE_LITTLESUR select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN + select ZONE_DMA32 if 64BIT config SIBYTE_SENTOSA bool "Sibyte BCM91250E-Sentosa" @@ -814,6 +818,7 @@ config SIBYTE_SENTOSA select SYS_HAS_CPU_SB1 select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN + select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI config SIBYTE_BIGSUR bool "Sibyte BCM91480B-BigSur" @@ -826,6 +831,7 @@ config SIBYTE_BIGSUR select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select ZONE_DMA32 if 64BIT + select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI config SNI_RM bool "SNI RM200/300/400" @@ -2032,7 +2038,7 @@ config CPU_MIPS64 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 # -# These two indicate the revision of the architecture, either Release 1 or Release 2 +# These indicate the revision of the architecture # config CPU_MIPSR1 bool @@ -2053,6 +2059,16 @@ config CPU_MIPSR6 select MIPS_CRC_SUPPORT select MIPS_SPRAM +config TARGET_ISA_REV + int + default 1 if CPU_MIPSR1 + default 2 if CPU_MIPSR2 + default 6 if CPU_MIPSR6 + default 0 + help + Reflects the ISA revision being targeted by the kernel build. This + is effectively the Kconfig equivalent of MIPS_ISA_REV. + config EVA bool @@ -2254,9 +2270,30 @@ config CPU_GENERIC_DUMP_TLB bool default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) +config MIPS_FP_SUPPORT + bool "Floating Point support" if EXPERT + default y + help + Select y to include support for floating point in the kernel + including initialization of FPU hardware, FP context save & restore + and emulation of an FPU where necessary. Without this support any + userland program attempting to use floating point instructions will + receive a SIGILL. + + If you know that your userland will not attempt to use floating point + instructions then you can say n here to shrink the kernel a little. + + If unsure, say y. + +config CPU_R2300_FPU + bool + depends on MIPS_FP_SUPPORT + default y if CPU_R3000 || CPU_TX39XX + config CPU_R4K_FPU bool - default y if !(CPU_R3000 || CPU_TX39XX) + depends on MIPS_FP_SUPPORT + default y if !CPU_R2300_FPU config CPU_R4K_CACHE_TLB bool @@ -2308,6 +2345,7 @@ config MIPS_MT_FPAFF config MIPSR2_TO_R6_EMULATOR bool "MIPS R2-to-R6 emulator" depends on CPU_MIPSR6 + depends on MIPS_FP_SUPPORT default y help Choose this option if you want to run non-R6 MIPS userland code. @@ -2455,6 +2493,7 @@ endchoice config CPU_HAS_MSA bool "Support for the MIPS SIMD Architecture" depends on CPU_SUPPORTS_MSA + depends on MIPS_FP_SUPPORT depends on 64BIT || MIPS_O32_FP64_SUPPORT help MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers @@ -2902,7 +2941,7 @@ config SECCOMP If unsure, say Y. Only embedded should say N here. config MIPS_O32_FP64_SUPPORT - bool "Support for O32 binaries using 64-bit FP" + bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 depends on 32BIT || MIPS32_O32 help When this is enabled, the kernel will support use of 64-bit floating diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 68410490e12f..5b174c3d0de3 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -319,7 +319,7 @@ OBJCOPYFLAGS += --remove-section=.reginfo head-y := arch/mips/kernel/head.o libs-y += arch/mips/lib/ -libs-y += arch/mips/math-emu/ +libs-$(CONFIG_MIPS_FP_SUPPORT) += arch/mips/math-emu/ # See arch/mips/Kbuild for content of core part of the kernel core-y += arch/mips/ @@ -430,6 +430,9 @@ archclean: $(Q)$(MAKE) $(clean)=arch/mips/boot/tools $(Q)$(MAKE) $(clean)=arch/mips/lasat +archheaders: + $(Q)$(MAKE) $(build)=arch/mips/kernel/syscalls all + define archhelp echo ' install - install kernel into $(INSTALL_PATH)' echo ' vmlinux.ecoff - ECOFF boot image' diff --git a/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c b/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c index 37fe58c19a90..542c3ede9722 100644 --- a/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c +++ b/arch/mips/boot/compressed/calc_vmlinuz_load_addr.c @@ -13,6 +13,7 @@ #include <stdint.h> #include <stdio.h> #include <stdlib.h> +#include "../../../../include/linux/sizes.h" int main(int argc, char *argv[]) { @@ -45,11 +46,11 @@ int main(int argc, char *argv[]) vmlinuz_load_addr = vmlinux_load_addr + vmlinux_size; /* - * Align with 16 bytes: "greater than that used for any standard data - * types by a MIPS compiler." -- See MIPS Run Linux (Second Edition). + * Align with 64KB: KEXEC needs load sections to be aligned to PAGE_SIZE, + * which may be as large as 64KB depending on the kernel configuration. */ - vmlinuz_load_addr += (16 - vmlinux_size % 16); + vmlinuz_load_addr += (SZ_64K - vmlinux_size % SZ_64K); printf("0x%llx\n", vmlinuz_load_addr); diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts index 65af3f6ba81c..84328afa3a55 100644 --- a/arch/mips/boot/dts/img/boston.dts +++ b/arch/mips/boot/dts/img/boston.dts @@ -141,6 +141,12 @@ #size-cells = <2>; #interrupt-cells = <1>; + eg20t_phub@2,0,0 { + compatible = "pci8086,8801"; + reg = <0x00020000 0 0 0 0>; + intel,eg20t-prefetch = <0>; + }; + eg20t_mac@2,0,1 { compatible = "pci8086,8802"; reg = <0x00020100 0 0 0 0>; diff --git a/arch/mips/boot/dts/mti/malta.dts b/arch/mips/boot/dts/mti/malta.dts index 9944e716eac8..f03279b1cde7 100644 --- a/arch/mips/boot/dts/mti/malta.dts +++ b/arch/mips/boot/dts/mti/malta.dts @@ -87,6 +87,11 @@ reg = <0x1f000000 0x1000>; native-endian; + lcd@410 { + compatible = "mti,malta-lcd"; + offset = <0x410>; + }; + reboot { compatible = "syscon-reboot"; regmap = <&fpga_regs>; diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c index 39f153fe0022..124817609ce0 100644 --- a/arch/mips/cavium-octeon/csrc-octeon.c +++ b/arch/mips/cavium-octeon/csrc-octeon.c @@ -7,6 +7,7 @@ * Copyright (C) 2009, 2012 Cavium, Inc. */ #include <linux/clocksource.h> +#include <linux/sched/clock.h> #include <linux/export.h> #include <linux/init.h> #include <linux/smp.h> diff --git a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c index 94d97ebfa036..ba8f82a29a81 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-bootmem.c +++ b/arch/mips/cavium-octeon/executive/cvmx-bootmem.c @@ -122,8 +122,21 @@ static uint64_t cvmx_bootmem_phy_get_next(uint64_t addr) return cvmx_read64_uint64((addr + NEXT_OFFSET) | (1ull << 63)); } -void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, - uint64_t min_addr, uint64_t max_addr) +/** + * Allocate a block of memory from the free list that was + * passed to the application by the bootloader within a specified + * address range. This is an allocate-only algorithm, so + * freeing memory is not possible. Allocation will fail if + * memory cannot be allocated in the requested range. + * + * @size: Size in bytes of block to allocate + * @min_addr: defines the minimum address of the range + * @max_addr: defines the maximum address of the range + * @alignment: Alignment required - must be power of 2 + * Returns pointer to block of memory, NULL on error + */ +static void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, + uint64_t min_addr, uint64_t max_addr) { int64_t address; address = @@ -142,47 +155,6 @@ void *cvmx_bootmem_alloc_address(uint64_t size, uint64_t address, address + size); } -void *cvmx_bootmem_alloc(uint64_t size, uint64_t alignment) -{ - return cvmx_bootmem_alloc_range(size, alignment, 0, 0); -} - -void *cvmx_bootmem_alloc_named_range_once(uint64_t size, uint64_t min_addr, - uint64_t max_addr, uint64_t align, - char *name, - void (*init) (void *)) -{ - int64_t addr; - void *ptr; - uint64_t named_block_desc_addr; - - named_block_desc_addr = (uint64_t) - cvmx_bootmem_phy_named_block_find(name, - (uint32_t)CVMX_BOOTMEM_FLAG_NO_LOCKING); - - if (named_block_desc_addr) { - addr = CVMX_BOOTMEM_NAMED_GET_FIELD(named_block_desc_addr, - base_addr); - return cvmx_phys_to_ptr(addr); - } - - addr = cvmx_bootmem_phy_named_block_alloc(size, min_addr, max_addr, - align, name, - (uint32_t)CVMX_BOOTMEM_FLAG_NO_LOCKING); - - if (addr < 0) - return NULL; - ptr = cvmx_phys_to_ptr(addr); - - if (init) - init(ptr); - else - memset(ptr, 0, size); - - return ptr; -} -EXPORT_SYMBOL(cvmx_bootmem_alloc_named_range_once); - void *cvmx_bootmem_alloc_named_range(uint64_t size, uint64_t min_addr, uint64_t max_addr, uint64_t align, char *name) @@ -197,30 +169,12 @@ void *cvmx_bootmem_alloc_named_range(uint64_t size, uint64_t min_addr, return NULL; } -void *cvmx_bootmem_alloc_named_address(uint64_t size, uint64_t address, - char *name) -{ - return cvmx_bootmem_alloc_named_range(size, address, address + size, - 0, name); -} - void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment, char *name) { return cvmx_bootmem_alloc_named_range(size, 0, 0, alignment, name); } EXPORT_SYMBOL(cvmx_bootmem_alloc_named); -int cvmx_bootmem_free_named(char *name) -{ - return cvmx_bootmem_phy_named_block_free(name, 0); -} - -struct cvmx_bootmem_named_block_desc *cvmx_bootmem_find_named_block(char *name) -{ - return cvmx_bootmem_phy_named_block_find(name, 0); -} -EXPORT_SYMBOL(cvmx_bootmem_find_named_block); - void cvmx_bootmem_lock(void) { cvmx_spinlock_lock((cvmx_spinlock_t *) &(cvmx_bootmem_desc->lock)); @@ -603,7 +557,20 @@ bootmem_free_done: } -struct cvmx_bootmem_named_block_desc * +/** + * Finds a named memory block by name. + * Also used for finding an unused entry in the named block table. + * + * @name: Name of memory block to find. If NULL pointer given, then + * finds unused descriptor, if available. + * + * @flags: Flags to control options for the allocation. + * + * Returns Pointer to memory block descriptor, NULL if not found. + * If NULL returned when name parameter is NULL, then no memory + * block descriptors are available. + */ +static struct cvmx_bootmem_named_block_desc * cvmx_bootmem_phy_named_block_find(char *name, uint32_t flags) { unsigned int i; @@ -655,7 +622,58 @@ struct cvmx_bootmem_named_block_desc * return NULL; } -int cvmx_bootmem_phy_named_block_free(char *name, uint32_t flags) +void *cvmx_bootmem_alloc_named_range_once(uint64_t size, uint64_t min_addr, + uint64_t max_addr, uint64_t align, + char *name, + void (*init) (void *)) +{ + int64_t addr; + void *ptr; + uint64_t named_block_desc_addr; + + named_block_desc_addr = (uint64_t) + cvmx_bootmem_phy_named_block_find(name, + (uint32_t)CVMX_BOOTMEM_FLAG_NO_LOCKING); + + if (named_block_desc_addr) { + addr = CVMX_BOOTMEM_NAMED_GET_FIELD(named_block_desc_addr, + base_addr); + return cvmx_phys_to_ptr(addr); + } + + addr = cvmx_bootmem_phy_named_block_alloc(size, min_addr, max_addr, + align, name, + (uint32_t)CVMX_BOOTMEM_FLAG_NO_LOCKING); + + if (addr < 0) + return NULL; + ptr = cvmx_phys_to_ptr(addr); + + if (init) + init(ptr); + else + memset(ptr, 0, size); + + return ptr; +} +EXPORT_SYMBOL(cvmx_bootmem_alloc_named_range_once); + +struct cvmx_bootmem_named_block_desc *cvmx_bootmem_find_named_block(char *name) +{ + return cvmx_bootmem_phy_named_block_find(name, 0); +} +EXPORT_SYMBOL(cvmx_bootmem_find_named_block); + +/** + * Frees a named block. + * + * @name: name of block to free + * @flags: flags for passing options + * + * Returns 0 on failure + * 1 on success + */ +static int cvmx_bootmem_phy_named_block_free(char *name, uint32_t flags) { struct cvmx_bootmem_named_block_desc *named_block_ptr; @@ -699,6 +717,11 @@ int cvmx_bootmem_phy_named_block_free(char *name, uint32_t flags) return named_block_ptr != NULL; /* 0 on failure, 1 on success */ } +int cvmx_bootmem_free_named(char *name) +{ + return cvmx_bootmem_phy_named_block_free(name, 0); +} + int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr, uint64_t max_addr, uint64_t alignment, diff --git a/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c b/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c index 8241fc6aa17d..3839feba68f2 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c +++ b/arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c @@ -266,7 +266,7 @@ int cvmx_cmd_queue_length(cvmx_cmd_queue_id_t queue_id) } else { union cvmx_pko_mem_debug8 debug8; debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8); - return debug8.cn58xx.doorbell; + return debug8.cn50xx.doorbell; } case CVMX_CMD_QUEUE_ZIP: case CVMX_CMD_QUEUE_DFA: diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c b/arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c index b8898e2b8a6f..e812ed9a03bb 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c @@ -449,71 +449,3 @@ int __cvmx_helper_rgmii_link_set(int ipd_port, return result; } - -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -int __cvmx_helper_rgmii_configure_loopback(int ipd_port, int enable_internal, - int enable_external) -{ - int interface = cvmx_helper_get_interface_num(ipd_port); - int index = cvmx_helper_get_interface_index_num(ipd_port); - int original_enable; - union cvmx_gmxx_prtx_cfg gmx_cfg; - union cvmx_asxx_prt_loop asxx_prt_loop; - - /* Read the current enable state and save it */ - gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); - original_enable = gmx_cfg.s.en; - /* Force port to be disabled */ - gmx_cfg.s.en = 0; - if (enable_internal) { - /* Force speed if we're doing internal loopback */ - gmx_cfg.s.duplex = 1; - gmx_cfg.s.slottime = 1; - gmx_cfg.s.speed = 1; - cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1); - cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200); - cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000); - } - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); - - /* Set the loopback bits */ - asxx_prt_loop.u64 = cvmx_read_csr(CVMX_ASXX_PRT_LOOP(interface)); - if (enable_internal) - asxx_prt_loop.s.int_loop |= 1 << index; - else - asxx_prt_loop.s.int_loop &= ~(1 << index); - if (enable_external) - asxx_prt_loop.s.ext_loop |= 1 << index; - else - asxx_prt_loop.s.ext_loop &= ~(1 << index); - cvmx_write_csr(CVMX_ASXX_PRT_LOOP(interface), asxx_prt_loop.u64); - - /* Force enables in internal loopback */ - if (enable_internal) { - uint64_t tmp; - tmp = cvmx_read_csr(CVMX_ASXX_TX_PRT_EN(interface)); - cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface), - (1 << index) | tmp); - tmp = cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface)); - cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface), - (1 << index) | tmp); - original_enable = 1; - } - - /* Restore the enable state */ - gmx_cfg.s.en = original_enable; - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); - return 0; -} diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c b/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c index a176358c5a21..f6ebf63dc84c 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c @@ -513,41 +513,3 @@ int __cvmx_helper_sgmii_link_set(int ipd_port, return __cvmx_helper_sgmii_hardware_init_link_speed(interface, index, link_info); } - -/** - * Configure a port for internal and/or external loopback. Internal - * loopback causes packets sent by the port to be received by - * Octeon. External loopback causes packets received from the wire to - * sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -int __cvmx_helper_sgmii_configure_loopback(int ipd_port, int enable_internal, - int enable_external) -{ - int interface = cvmx_helper_get_interface_num(ipd_port); - int index = cvmx_helper_get_interface_index_num(ipd_port); - union cvmx_pcsx_mrx_control_reg pcsx_mrx_control_reg; - union cvmx_pcsx_miscx_ctl_reg pcsx_miscx_ctl_reg; - - pcsx_mrx_control_reg.u64 = - cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface)); - pcsx_mrx_control_reg.s.loopbck1 = enable_internal; - cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface), - pcsx_mrx_control_reg.u64); - - pcsx_miscx_ctl_reg.u64 = - cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface)); - pcsx_miscx_ctl_reg.s.loopbck2 = enable_external; - cvmx_write_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface), - pcsx_miscx_ctl_reg.u64); - - __cvmx_helper_sgmii_hardware_init_link(interface, index); - return 0; -} diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c index b45b2975746d..53b912745dbd 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-util.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-util.c @@ -81,93 +81,6 @@ const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t } /** - * Debug routine to dump the packet structure to the console - * - * @work: Work queue entry containing the packet to dump - * Returns - */ -int cvmx_helper_dump_packet(cvmx_wqe_t *work) -{ - uint64_t count; - uint64_t remaining_bytes; - union cvmx_buf_ptr buffer_ptr; - uint64_t start_of_buffer; - uint8_t *data_address; - uint8_t *end_of_data; - - cvmx_dprintf("Packet Length: %u\n", work->word1.len); - cvmx_dprintf(" Input Port: %u\n", cvmx_wqe_get_port(work)); - cvmx_dprintf(" QoS: %u\n", cvmx_wqe_get_qos(work)); - cvmx_dprintf(" Buffers: %u\n", work->word2.s.bufs); - - if (work->word2.s.bufs == 0) { - union cvmx_ipd_wqe_fpa_queue wqe_pool; - wqe_pool.u64 = cvmx_read_csr(CVMX_IPD_WQE_FPA_QUEUE); - buffer_ptr.u64 = 0; - buffer_ptr.s.pool = wqe_pool.s.wqe_pool; - buffer_ptr.s.size = 128; - buffer_ptr.s.addr = cvmx_ptr_to_phys(work->packet_data); - if (likely(!work->word2.s.not_IP)) { - union cvmx_pip_ip_offset pip_ip_offset; - pip_ip_offset.u64 = cvmx_read_csr(CVMX_PIP_IP_OFFSET); - buffer_ptr.s.addr += - (pip_ip_offset.s.offset << 3) - - work->word2.s.ip_offset; - buffer_ptr.s.addr += (work->word2.s.is_v6 ^ 1) << 2; - } else { - /* - * WARNING: This code assumes that the packet - * is not RAW. If it was, we would use - * PIP_GBL_CFG[RAW_SHF] instead of - * PIP_GBL_CFG[NIP_SHF]. - */ - union cvmx_pip_gbl_cfg pip_gbl_cfg; - pip_gbl_cfg.u64 = cvmx_read_csr(CVMX_PIP_GBL_CFG); - buffer_ptr.s.addr += pip_gbl_cfg.s.nip_shf; - } - } else - buffer_ptr = work->packet_ptr; - remaining_bytes = work->word1.len; - - while (remaining_bytes) { - start_of_buffer = - ((buffer_ptr.s.addr >> 7) - buffer_ptr.s.back) << 7; - cvmx_dprintf(" Buffer Start:%llx\n", - (unsigned long long)start_of_buffer); - cvmx_dprintf(" Buffer I : %u\n", buffer_ptr.s.i); - cvmx_dprintf(" Buffer Back: %u\n", buffer_ptr.s.back); - cvmx_dprintf(" Buffer Pool: %u\n", buffer_ptr.s.pool); - cvmx_dprintf(" Buffer Data: %llx\n", - (unsigned long long)buffer_ptr.s.addr); - cvmx_dprintf(" Buffer Size: %u\n", buffer_ptr.s.size); - - cvmx_dprintf("\t\t"); - data_address = (uint8_t *) cvmx_phys_to_ptr(buffer_ptr.s.addr); - end_of_data = data_address + buffer_ptr.s.size; - count = 0; - while (data_address < end_of_data) { - if (remaining_bytes == 0) - break; - else - remaining_bytes--; - cvmx_dprintf("%02x", (unsigned int)*data_address); - data_address++; - if (remaining_bytes && (count == 7)) { - cvmx_dprintf("\n\t\t"); - count = 0; - } else - count++; - } - cvmx_dprintf("\n"); - - if (remaining_bytes) - buffer_ptr = *(union cvmx_buf_ptr *) - cvmx_phys_to_ptr(buffer_ptr.s.addr - 8); - } - return 0; -} - -/** * Setup Random Early Drop on a specific input queue * * @queue: Input queue to setup RED on (0-7) @@ -179,7 +92,8 @@ int cvmx_helper_dump_packet(cvmx_wqe_t *work) * than this many free packet buffers in FPA 0. * Returns Zero on success. Negative on failure */ -int cvmx_helper_setup_red_queue(int queue, int pass_thresh, int drop_thresh) +static int cvmx_helper_setup_red_queue(int queue, int pass_thresh, + int drop_thresh) { union cvmx_ipd_qosx_red_marks red_marks; union cvmx_ipd_red_quex_param red_param; diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c index 2bb6912a580d..93a498d05184 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c @@ -319,42 +319,3 @@ int __cvmx_helper_xaui_link_set(int ipd_port, cvmx_helper_link_info_t link_info) /* Bring the link up */ return __cvmx_helper_xaui_enable(interface); } - -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_xaui_configure_loopback(int ipd_port, - int enable_internal, - int enable_external) -{ - int interface = cvmx_helper_get_interface_num(ipd_port); - union cvmx_pcsxx_control1_reg pcsxx_control1_reg; - union cvmx_gmxx_xaui_ext_loopback gmxx_xaui_ext_loopback; - - /* Set the internal loop */ - pcsxx_control1_reg.u64 = - cvmx_read_csr(CVMX_PCSXX_CONTROL1_REG(interface)); - pcsxx_control1_reg.s.loopbck1 = enable_internal; - cvmx_write_csr(CVMX_PCSXX_CONTROL1_REG(interface), - pcsxx_control1_reg.u64); - - /* Set the external loop */ - gmxx_xaui_ext_loopback.u64 = - cvmx_read_csr(CVMX_GMXX_XAUI_EXT_LOOPBACK(interface)); - gmxx_xaui_ext_loopback.s.en = enable_external; - cvmx_write_csr(CVMX_GMXX_XAUI_EXT_LOOPBACK(interface), - gmxx_xaui_ext_loopback.u64); - - /* Take the link through a reset */ - return __cvmx_helper_xaui_enable(interface); -} diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c index 6c79e8a16a26..a76bbcc30f95 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c @@ -46,26 +46,6 @@ #include <asm/octeon/cvmx-smix-defs.h> #include <asm/octeon/cvmx-asxx-defs.h> -/** - * cvmx_override_pko_queue_priority(int ipd_port, uint64_t - * priorities[16]) is a function pointer. It is meant to allow - * customization of the PKO queue priorities based on the port - * number. Users should set this pointer to a function before - * calling any cvmx-helper operations. - */ -void (*cvmx_override_pko_queue_priority) (int pko_port, - uint64_t priorities[16]); - -/** - * cvmx_override_ipd_port_setup(int ipd_port) is a function - * pointer. It is meant to allow customization of the IPD port - * setup before packet input/output comes online. It is called - * after cvmx-helper does the default IPD configuration, but - * before IPD is enabled. Users should set this pointer to a - * function before calling any cvmx-helper operations. - */ -void (*cvmx_override_ipd_port_setup) (int ipd_port); - /* Port count per interface */ static int interface_port_count[9]; @@ -238,7 +218,7 @@ static cvmx_helper_interface_mode_t __cvmx_get_mode_octeon2(int interface) mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface)); if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { - switch (mode.cn63xx.mode) { + switch (mode.cn61xx.mode) { case 0: return CVMX_HELPER_INTERFACE_MODE_SGMII; case 1: @@ -362,7 +342,7 @@ cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int interface) mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface)); if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) { - switch (mode.cn56xx.mode) { + switch (mode.cn52xx.mode) { case 0: return CVMX_HELPER_INTERFACE_MODE_DISABLED; case 1: @@ -436,10 +416,6 @@ static int __cvmx_helper_port_setup_ipd(int ipd_port) cvmx_pip_config_port(ipd_port, port_config, tag_config); - /* Give the user a chance to override our setting for each port */ - if (cvmx_override_ipd_port_setup) - cvmx_override_ipd_port_setup(ipd_port); - return 0; } @@ -663,13 +639,6 @@ static int __cvmx_helper_interface_setup_pko(int interface) int ipd_port = cvmx_helper_get_ipd_port(interface, 0); int num_ports = interface_port_count[interface]; while (num_ports--) { - /* - * Give the user a chance to override the per queue - * priorities. - */ - if (cvmx_override_pko_queue_priority) - cvmx_override_pko_queue_priority(ipd_port, priorities); - cvmx_pko_config_port(ipd_port, cvmx_pko_get_base_queue_per_core(ipd_port, 0), @@ -818,7 +787,7 @@ static int __cvmx_helper_packet_hardware_enable(int interface) * Returns 0 on success * !0 on failure */ -int __cvmx_helper_errata_fix_ipd_ptr_alignment(void) +static int __cvmx_helper_errata_fix_ipd_ptr_alignment(void) { #define FIX_IPD_FIRST_BUFF_PAYLOAD_BYTES \ (CVMX_FPA_PACKET_POOL_SIZE-8-CVMX_HELPER_FIRST_MBUFF_SKIP) @@ -1239,57 +1208,3 @@ int cvmx_helper_link_set(int ipd_port, cvmx_helper_link_info_t link_info) return result; } EXPORT_SYMBOL_GPL(cvmx_helper_link_set); - -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -int cvmx_helper_configure_loopback(int ipd_port, int enable_internal, - int enable_external) -{ - int result = -1; - int interface = cvmx_helper_get_interface_num(ipd_port); - int index = cvmx_helper_get_interface_index_num(ipd_port); - - if (index >= cvmx_helper_ports_on_interface(interface)) - return -1; - - switch (cvmx_helper_interface_get_mode(interface)) { - case CVMX_HELPER_INTERFACE_MODE_DISABLED: - case CVMX_HELPER_INTERFACE_MODE_PCIE: - case CVMX_HELPER_INTERFACE_MODE_SPI: - case CVMX_HELPER_INTERFACE_MODE_NPI: - case CVMX_HELPER_INTERFACE_MODE_LOOP: - break; - case CVMX_HELPER_INTERFACE_MODE_XAUI: - result = - __cvmx_helper_xaui_configure_loopback(ipd_port, - enable_internal, - enable_external); - break; - case CVMX_HELPER_INTERFACE_MODE_RGMII: - case CVMX_HELPER_INTERFACE_MODE_GMII: - result = - __cvmx_helper_rgmii_configure_loopback(ipd_port, - enable_internal, - enable_external); - break; - case CVMX_HELPER_INTERFACE_MODE_SGMII: - case CVMX_HELPER_INTERFACE_MODE_PICMG: - result = - __cvmx_helper_sgmii_configure_loopback(ipd_port, - enable_internal, - enable_external); - break; - } - return result; -} diff --git a/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c b/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c index fa327ec891cd..d23f46736dd6 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c +++ b/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c @@ -84,7 +84,7 @@ void __cvmx_interrupt_gmxx_enable(int interface) if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) { if (mode.s.en) { - switch (mode.cn56xx.mode) { + switch (mode.cn52xx.mode) { case 1: /* XAUI */ num_ports = 1; break; diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c index f091c9b70603..83df0a963a8b 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c +++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c @@ -44,7 +44,7 @@ * if multiple applications or operating systems are running, then it * is up to the user program to coordinate between them. */ -cvmx_spinlock_t cvmx_l2c_spinlock; +static cvmx_spinlock_t cvmx_l2c_spinlock; int cvmx_l2c_get_core_way_partition(uint32_t core) { diff --git a/arch/mips/cavium-octeon/executive/octeon-model.c b/arch/mips/cavium-octeon/executive/octeon-model.c index 341052387b49..657dbad9644e 100644 --- a/arch/mips/cavium-octeon/executive/octeon-model.c +++ b/arch/mips/cavium-octeon/executive/octeon-model.c @@ -305,7 +305,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, if (fus_dat3.s.nozip) suffix = "SCP"; - if (fus_dat3.cn56xx.bar2_en) + if (fus_dat3.cn38xx.bar2_en) suffix = "NSPB2"; } if (l2d_fus3) @@ -344,7 +344,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, suffix = "CP"; else if (fus_dat2.cn63xx.dorm_crypto) suffix = "DAP"; - else if (fus_dat3.cn63xx.nozip) + else if (fus_dat3.cn61xx.nozip) suffix = "SCP"; else suffix = "AAP"; @@ -359,18 +359,18 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, suffix = "CP"; else if (fus_dat2.cn66xx.dorm_crypto) suffix = "DAP"; - else if (fus_dat3.cn66xx.nozip) + else if (fus_dat3.cn61xx.nozip) suffix = "SCP"; else suffix = "AAP"; break; case 0x91: /* CN68XX */ family = "68"; - if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn68xx.nozip) + if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn61xx.nozip) suffix = "CP"; else if (fus_dat2.cn68xx.dorm_crypto) suffix = "DAP"; - else if (fus_dat3.cn68xx.nozip) + else if (fus_dat3.cn61xx.nozip) suffix = "SCP"; else if (fus_dat2.cn68xx.nocrypto) suffix = "SP"; @@ -379,7 +379,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, break; case 0x94: /* CNF71XX */ family = "F71"; - if (fus_dat3.cnf71xx.nozip) + if (fus_dat3.cn61xx.nozip) suffix = "SCP"; else suffix = "AAP"; diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index cc1d8525e651..f97be32bf699 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -2483,8 +2483,8 @@ void octeon_irq_ciu3_mask_ack(struct irq_data *data) } #ifdef CONFIG_SMP -int octeon_irq_ciu3_set_affinity(struct irq_data *data, - const struct cpumask *dest, bool force) +static int octeon_irq_ciu3_set_affinity(struct irq_data *data, + const struct cpumask *dest, bool force) { union cvmx_ciu3_iscx_ctl isc_ctl; union cvmx_ciu3_iscx_w1c isc_w1c; diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index 807cadaf554e..1f9ba60f7375 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c @@ -440,7 +440,7 @@ out: } device_initcall(octeon_rng_device_init); -const struct of_device_id octeon_ids[] __initconst = { +static const struct of_device_id octeon_ids[] __initconst = { { .compatible = "simple-bus", }, { .compatible = "cavium,octeon-6335-uctl", }, { .compatible = "cavium,octeon-5750-usbn", }, @@ -501,7 +501,7 @@ static void __init octeon_fdt_set_phy(int eth, int phy_addr) if (phy_addr >= 256 && alt_phy > 0) { const struct fdt_property *phy_prop; struct fdt_property *alt_prop; - u32 phy_handle_name; + fdt32_t phy_handle_name; /* Use the alt phy node instead.*/ phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL); diff --git a/arch/mips/cavium-octeon/octeon-usb.c b/arch/mips/cavium-octeon/octeon-usb.c index bfdfaf32d2c4..1f730ded5224 100644 --- a/arch/mips/cavium-octeon/octeon-usb.c +++ b/arch/mips/cavium-octeon/octeon-usb.c @@ -253,17 +253,17 @@ static int dwc3_octeon_config_power(struct device *dev, u64 base) && gpio <= 31) { gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(gpio)); gpio_bit.s.tx_oe = 1; - gpio_bit.cn73xx.output_sel = (index == 0 ? 0x14 : 0x15); + gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x15); cvmx_write_csr(CVMX_GPIO_BIT_CFGX(gpio), gpio_bit.u64); } else if (gpio <= 15) { gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(gpio)); gpio_bit.s.tx_oe = 1; - gpio_bit.cn70xx.output_sel = (index == 0 ? 0x14 : 0x19); + gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x19); cvmx_write_csr(CVMX_GPIO_BIT_CFGX(gpio), gpio_bit.u64); } else { gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_XBIT_CFGX(gpio)); gpio_bit.s.tx_oe = 1; - gpio_bit.cn70xx.output_sel = (index == 0 ? 0x14 : 0x19); + gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x19); cvmx_write_csr(CVMX_GPIO_XBIT_CFGX(gpio), gpio_bit.u64); } diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index dfb95cffef3e..2c79ab52977a 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -36,7 +36,9 @@ #include <asm/mipsregs.h> #include <asm/bootinfo.h> #include <asm/sections.h> +#include <asm/fw/fw.h> #include <asm/setup.h> +#include <asm/prom.h> #include <asm/time.h> #include <asm/octeon/octeon.h> @@ -72,7 +74,7 @@ static unsigned long long reserve_low_mem; DEFINE_SEMAPHORE(octeon_bootbus_sem); EXPORT_SYMBOL(octeon_bootbus_sem); -struct octeon_boot_descriptor *octeon_boot_desc_ptr; +static struct octeon_boot_descriptor *octeon_boot_desc_ptr; struct cvmx_bootinfo *octeon_bootinfo; EXPORT_SYMBOL(octeon_bootinfo); @@ -351,7 +353,7 @@ EXPORT_SYMBOL(octeon_get_io_clock_rate); * * @s: String to write */ -void octeon_write_lcd(const char *s) +static void octeon_write_lcd(const char *s) { if (octeon_bootinfo->led_display_base_addr) { void __iomem *lcd_address = @@ -373,7 +375,7 @@ void octeon_write_lcd(const char *s) * * Returns uart (0 or 1) */ -int octeon_get_boot_uart(void) +static int octeon_get_boot_uart(void) { return (octeon_boot_desc_ptr->flags & OCTEON_BL_FLAG_CONSOLE_UART1) ? 1 : 0; diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c index 39f2a2ec1286..076db9a06b5e 100644 --- a/arch/mips/cavium-octeon/smp.c +++ b/arch/mips/cavium-octeon/smp.c @@ -284,7 +284,7 @@ static void octeon_smp_finish(void) #ifdef CONFIG_HOTPLUG_CPU /* State of each CPU. */ -DEFINE_PER_CPU(int, cpu_state); +static DEFINE_PER_CPU(int, cpu_state); static int octeon_cpu_disable(void) { @@ -413,7 +413,7 @@ late_initcall(register_cavium_notifier); #endif /* CONFIG_HOTPLUG_CPU */ -const struct plat_smp_ops octeon_smp_ops = { +static const struct plat_smp_ops octeon_smp_ops = { .send_ipi_single = octeon_send_ipi_single, .send_ipi_mask = octeon_send_ipi_mask, .init_secondary = octeon_init_secondary, diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig index 5651f4d8f45c..9fbfb6e5c7d2 100644 --- a/arch/mips/configs/ar7_defconfig +++ b/arch/mips/configs/ar7_defconfig @@ -1,29 +1,27 @@ -CONFIG_AR7=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_100=y -CONFIG_KEXEC=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_KERNEL_LZMA=y CONFIG_SYSVIPC=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_BSD_PROCESS_ACCT=y -CONFIG_TINY_RCU=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_LZMA=y CONFIG_EXPERT=y -# CONFIG_KALLSYMS is not set # CONFIG_ELF_CORE is not set -# CONFIG_PCSPKR_PLATFORM is not set +# CONFIG_KALLSYMS is not set # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_AR7=y +CONFIG_HZ_100=y +CONFIG_KEXEC=y +# CONFIG_SECCOMP is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_BSD_DISKLABEL=y # CONFIG_IOSCHED_CFQ is not set CONFIG_NET=y CONFIG_PACKET=y @@ -35,7 +33,6 @@ CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_MROUTE=y -CONFIG_ARPD=y CONFIG_SYN_COOKIES=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set @@ -59,13 +56,9 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_RAW=m CONFIG_ATM=m @@ -79,8 +72,6 @@ CONFIG_NET_ACT_POLICE=y CONFIG_HAMRADIO=y CONFIG_CFG80211=m CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_MTD=y CONFIG_MTD_BLOCK=y @@ -91,25 +82,22 @@ CONFIG_MTD_CFI_STAA=y CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y CONFIG_NETDEVICES=y -CONFIG_FIXED_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y CONFIG_CPMAC=y +CONFIG_FIXED_PHY=y CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPPOE=m +CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m # CONFIG_INPUT is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 -# CONFIG_LEGACY_PTYS is not set CONFIG_HW_RANDOM=y CONFIG_GPIO_SYSFS=y # CONFIG_HWMON is not set @@ -131,13 +119,9 @@ CONFIG_JFFS2_FS=y CONFIG_JFFS2_SUMMARY=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_SQUASHFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_BSD_DISKLABEL=y +# CONFIG_CRYPTO_HW is not set # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_STRIP_ASM_SYMS=y CONFIG_DEBUG_FS=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set diff --git a/arch/mips/configs/ath25_defconfig b/arch/mips/configs/ath25_defconfig index b8d48038e74f..5dd6b1939e9c 100644 --- a/arch/mips/configs/ath25_defconfig +++ b/arch/mips/configs/ath25_defconfig @@ -1,11 +1,6 @@ -CONFIG_ATH25=y -# CONFIG_COMPACTION is not set -CONFIG_HZ_100=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y # CONFIG_CROSS_MEMORY_ATTACH is not set -# CONFIG_FHANDLE is not set CONFIG_HIGH_RES_TIMERS=y CONFIG_BLK_DEV_INITRD=y # CONFIG_RD_GZIP is not set @@ -14,16 +9,21 @@ CONFIG_BLK_DEV_INITRD=y # CONFIG_RD_LZO is not set # CONFIG_RD_LZ4 is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y +# CONFIG_FHANDLE is not set # CONFIG_AIO is not set CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set +CONFIG_ATH25=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_CFQ is not set -# CONFIG_SUSPEND is not set +# CONFIG_COMPACTION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -75,7 +75,6 @@ CONFIG_INPUT=m # CONFIG_SERIO is not set # CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_SERIAL_8250_PCI is not set @@ -104,15 +103,15 @@ CONFIG_SQUASHFS_FILE_DIRECT=y CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y # CONFIG_SQUASHFS_ZLIB is not set CONFIG_SQUASHFS_XZ=y -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_FTRACE is not set # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set # CONFIG_XZ_DEC_IA64 is not set # CONFIG_XZ_DEC_ARM is not set # CONFIG_XZ_DEC_ARMTHUMB is not set # CONFIG_XZ_DEC_SPARC is not set +CONFIG_PRINTK_TIME=y +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_STRIP_ASM_SYMS=y +CONFIG_DEBUG_FS=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/ath79_defconfig b/arch/mips/configs/ath79_defconfig index 951c4231bdb8..4e4ec779f182 100644 --- a/arch/mips/configs/ath79_defconfig +++ b/arch/mips/configs/ath79_defconfig @@ -1,30 +1,29 @@ -CONFIG_ATH79=y -CONFIG_ATH79_MACH_AP121=y -CONFIG_ATH79_MACH_AP136=y -CONFIG_ATH79_MACH_AP81=y -CONFIG_ATH79_MACH_DB120=y -CONFIG_ATH79_MACH_PB44=y -CONFIG_ATH79_MACH_UBNT_XM=y -CONFIG_HZ_100=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_HIGH_RES_TIMERS=y CONFIG_BLK_DEV_INITRD=y # CONFIG_RD_GZIP is not set -CONFIG_RD_LZMA=y -# CONFIG_KALLSYMS is not set # CONFIG_AIO is not set +# CONFIG_KALLSYMS is not set CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set +CONFIG_ATH79=y +CONFIG_ATH79_MACH_AP121=y +CONFIG_ATH79_MACH_AP136=y +CONFIG_ATH79_MACH_AP81=y +CONFIG_ATH79_MACH_DB120=y +CONFIG_ATH79_MACH_PB44=y +CONFIG_ATH79_MACH_UBNT_XM=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_CFQ is not set -CONFIG_PCI=y -# CONFIG_SUSPEND is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -52,12 +51,9 @@ CONFIG_MTD_PHYSMAP=y CONFIG_MTD_M25P80=y CONFIG_MTD_SPI_NOR=y CONFIG_NETDEVICES=y -# CONFIG_NET_PACKET_ENGINE is not set -CONFIG_ATH_COMMON=m CONFIG_ATH9K=m CONFIG_ATH9K_AHB=y CONFIG_INPUT=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO_POLLED=m # CONFIG_INPUT_MOUSE is not set @@ -65,7 +61,6 @@ CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set # CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_SERIAL_8250_PCI is not set @@ -98,11 +93,9 @@ CONFIG_LEDS_GPIO=y # CONFIG_IOMMU_SUPPORT is not set # CONFIG_DNOTIFY is not set # CONFIG_PROC_PAGE_MONITOR is not set +CONFIG_CRC_ITU_T=m # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_STRIP_ASM_SYMS=y CONFIG_DEBUG_FS=y # CONFIG_SCHED_DEBUG is not set # CONFIG_FTRACE is not set -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_ITU_T=m diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig index ba800a892384..249f5285e343 100644 --- a/arch/mips/configs/bcm47xx_defconfig +++ b/arch/mips/configs/bcm47xx_defconfig @@ -1,16 +1,15 @@ -CONFIG_BCM47XX=y CONFIG_SYSVIPC=y CONFIG_HIGH_RES_TIMERS=y -CONFIG_UIDGID_STRICT_TYPE_CHECKS=y CONFIG_BLK_DEV_INITRD=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EMBEDDED=y CONFIG_SLAB=y +CONFIG_BCM47XX=y +CONFIG_PCI=y +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_PARTITION_ADVANCED=y -CONFIG_PCI=y -# CONFIG_SUSPEND is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -47,8 +46,6 @@ CONFIG_MTD_NAND_BCM47XXNFLASH=y CONFIG_NETDEVICES=y CONFIG_B44=y CONFIG_TIGON3=y -CONFIG_BGMAC=y -CONFIG_ATH_CARDS=y CONFIG_ATH5K=y CONFIG_B43=y CONFIG_B43LEGACY=y @@ -73,6 +70,7 @@ CONFIG_USB_HCD_BCMA=y CONFIG_USB_HCD_SSB=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_CRC32_SARWATE=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO_REDUCED=y @@ -81,4 +79,3 @@ CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="console=ttyS0,115200" -CONFIG_CRC32_SARWATE=y diff --git a/arch/mips/configs/bcm63xx_defconfig b/arch/mips/configs/bcm63xx_defconfig index 131b350f014f..d22fe62adad3 100644 --- a/arch/mips/configs/bcm63xx_defconfig +++ b/arch/mips/configs/bcm63xx_defconfig @@ -1,16 +1,7 @@ -CONFIG_BCM63XX=y -CONFIG_BCM63XX_CPU_6338=y -CONFIG_BCM63XX_CPU_6345=y -CONFIG_BCM63XX_CPU_6348=y -CONFIG_BCM63XX_CPU_6358=y -CONFIG_NO_HZ=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set # CONFIG_SWAP is not set -CONFIG_TINY_RCU=y -CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_NO_HZ=y CONFIG_EXPERT=y -# CONFIG_PCSPKR_PLATFORM is not set # CONFIG_FUTEX is not set # CONFIG_EPOLL is not set # CONFIG_SIGNALFD is not set @@ -20,12 +11,18 @@ CONFIG_EXPERT=y # CONFIG_AIO is not set # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set +CONFIG_BCM63XX=y +CONFIG_BCM63XX_CPU_6338=y +CONFIG_BCM63XX_CPU_6345=y +CONFIG_BCM63XX_CPU_6348=y +CONFIG_BCM63XX_CPU_6358=y +# CONFIG_SECCOMP is not set CONFIG_PCI=y CONFIG_PCCARD=y CONFIG_PCMCIA_BCM63XX=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set CONFIG_NET=y CONFIG_UNIX=y CONFIG_INET=y @@ -37,7 +34,6 @@ CONFIG_INET=y CONFIG_CFG80211=y CONFIG_NL80211_TESTMODE=y CONFIG_MAC80211=y -CONFIG_MAC80211_LEDS=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_STANDALONE is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set @@ -49,18 +45,16 @@ CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_PHYSMAP=y # CONFIG_BLK_DEV is not set CONFIG_NETDEVICES=y -CONFIG_BCM63XX_PHY=y -CONFIG_NET_ETHERNET=y CONFIG_BCM63XX_ENET=y +CONFIG_BCM63XX_PHY=y CONFIG_B43=y # CONFIG_B43_PHY_LP is not set # CONFIG_INPUT is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set +# CONFIG_UNIX98_PTYS is not set CONFIG_SERIAL_BCM63XX=y CONFIG_SERIAL_BCM63XX_CONSOLE=y -# CONFIG_UNIX98_PTYS is not set # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set # CONFIG_VGA_ARB is not set @@ -68,16 +62,11 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_TT_NEWSCHED is not set CONFIG_USB_OHCI_HCD=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_GPIO=y -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # CONFIG_FILE_LOCKING is not set # CONFIG_DNOTIFY is not set CONFIG_PROC_KCORE=y # CONFIG_NETWORK_FILESYSTEMS is not set +# CONFIG_CRYPTO_HW is not set CONFIG_MAGIC_SYSRQ=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="console=ttyS0,115200" -# CONFIG_CRYPTO_HW is not set diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig index 5e73fe755be6..597bc0aa2653 100644 --- a/arch/mips/configs/bigsur_defconfig +++ b/arch/mips/configs/bigsur_defconfig @@ -1,45 +1,37 @@ -CONFIG_SIBYTE_BIGSUR=y -CONFIG_64BIT=y -CONFIG_SMP=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_1000=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_AUDIT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 -CONFIG_RELAY=y CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y CONFIG_USER_NS=y -CONFIG_PID_NS=y -CONFIG_NET_NS=y +CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_PCSPKR_PLATFORM is not set CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set +CONFIG_SIBYTE_BIGSUR=y +CONFIG_64BIT=y +CONFIG_SMP=y +CONFIG_HZ_1000=y CONFIG_PCI=y CONFIG_PCI_DEBUG=y -CONFIG_MIPS32_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y CONFIG_PM=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_BLK_DEV_BSG is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -94,7 +86,6 @@ CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m CONFIG_IP_VS_FTP=m CONFIG_IP_DCCP=m -CONFIG_SCTP_HMAC_SHA1=y CONFIG_BRIDGE=m CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y @@ -134,20 +125,18 @@ CONFIG_PATA_SIL680=y CONFIG_ATA_GENERIC=y CONFIG_PATA_LEGACY=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y CONFIG_SB1250_MAC=y CONFIG_CHELSIO_T3=m CONFIG_NETXEN_NIC=m CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m CONFIG_SLIP=m CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y @@ -168,13 +157,10 @@ CONFIG_EXT2_FS=m CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT2_FS_XIP=y CONFIG_EXT3_FS=m CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_PRINT_QUOTA_WARNING is not set @@ -192,10 +178,7 @@ CONFIG_NTFS_RW=y CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_RPCSEC_GSS_SPKM3=m CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_737=m CONFIG_NLS_CODEPAGE_775=m @@ -234,13 +217,6 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m -CONFIG_DLM=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_DEBUG_LIST=y CONFIG_KEYS=y CONFIG_SECURITY=y CONFIG_SECURITY_NETWORK=y @@ -265,7 +241,6 @@ CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -283,3 +258,7 @@ CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_LZO=m CONFIG_CRC_T10DIF=m CONFIG_CRC7=m +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DEBUG_LIST=y diff --git a/arch/mips/configs/bmips_be_defconfig b/arch/mips/configs/bmips_be_defconfig index a7072a14d396..8a91f0101134 100644 --- a/arch/mips/configs/bmips_be_defconfig +++ b/arch/mips/configs/bmips_be_defconfig @@ -1,17 +1,16 @@ -CONFIG_BMIPS_GENERIC=y -CONFIG_HIGHMEM=y -CONFIG_SMP=y -CONFIG_NR_CPUS=4 -# CONFIG_SECCOMP is not set -CONFIG_MIPS_O32_FP64_SUPPORT=y # CONFIG_LOCALVERSION_AUTO is not set # CONFIG_SWAP is not set CONFIG_NO_HZ=y CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_GZIP=y CONFIG_EXPERT=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set +CONFIG_BMIPS_GENERIC=y +CONFIG_HIGHMEM=y +CONFIG_SMP=y +CONFIG_NR_CPUS=4 +# CONFIG_SECCOMP is not set +CONFIG_MIPS_O32_FP64_SUPPORT=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set @@ -32,8 +31,6 @@ CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_STANDALONE is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set -CONFIG_PRINTK_TIME=y -CONFIG_BRCMSTB_GISB_ARB=y CONFIG_MTD=y CONFIG_MTD_BCM63XX_PARTS=y CONFIG_MTD_CFI=y @@ -50,14 +47,12 @@ CONFIG_USB_USBNET=y # CONFIG_INPUT is not set # CONFIG_SERIO is not set # CONFIG_VT is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_BCM63XX=y CONFIG_SERIAL_BCM63XX_CONSOLE=y # CONFIG_HW_RANDOM is not set -CONFIG_POWER_SUPPLY=y CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y # CONFIG_HWMON is not set CONFIG_USB=y CONFIG_USB_EHCI_HCD=y @@ -79,8 +74,9 @@ CONFIG_CIFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y +# CONFIG_CRYPTO_HW is not set +CONFIG_PRINTK_TIME=y CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="earlycon" -# CONFIG_CRYPTO_HW is not set diff --git a/arch/mips/configs/bmips_stb_defconfig b/arch/mips/configs/bmips_stb_defconfig index 47aecb8750e6..39adcca46bb0 100644 --- a/arch/mips/configs/bmips_stb_defconfig +++ b/arch/mips/configs/bmips_stb_defconfig @@ -1,10 +1,3 @@ -CONFIG_BMIPS_GENERIC=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_HIGHMEM=y -CONFIG_SMP=y -CONFIG_NR_CPUS=4 -# CONFIG_SECCOMP is not set -CONFIG_MIPS_O32_FP64_SUPPORT=y # CONFIG_LOCALVERSION_AUTO is not set # CONFIG_SWAP is not set CONFIG_NO_HZ=y @@ -12,9 +5,13 @@ CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set +CONFIG_BMIPS_GENERIC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_HIGHMEM=y +CONFIG_SMP=y +CONFIG_NR_CPUS=4 +# CONFIG_SECCOMP is not set +CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y @@ -23,6 +20,9 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_BMIPS_CPUFREQ=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=y @@ -61,7 +61,6 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y # CONFIG_HW_RANDOM is not set CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_BRCMSTB=y CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_SUPPLY=y # CONFIG_HWMON is not set @@ -86,9 +85,9 @@ CONFIG_CIFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y +# CONFIG_CRYPTO_HW is not set CONFIG_PRINTK_TIME=y CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="earlycon" -# CONFIG_CRYPTO_HW is not set diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig index bd80b5c852dd..7bf8971af53b 100644 --- a/arch/mips/configs/capcella_defconfig +++ b/arch/mips/configs/capcella_defconfig @@ -1,10 +1,9 @@ -CONFIG_MACH_VR41XX=y -CONFIG_ZAO_CAPCELLA=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y +CONFIG_ZAO_CAPCELLA=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -34,18 +33,15 @@ CONFIG_BLK_DEV_SD=y CONFIG_ATA=y CONFIG_PATA_LEGACY=y CONFIG_NETDEVICES=y +CONFIG_8139TOO=y CONFIG_PHYLIB=m -CONFIG_MARVELL_PHY=m +CONFIG_CICADA_PHY=m CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_SMSC_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y -CONFIG_8139TOO=y -# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_VITESSE_PHY=m # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set @@ -67,9 +63,6 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_NFS_FS=y CONFIG_ROOT_NFS=y -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="mem=32M console=ttyVR0,38400" -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CBC=m CONFIG_CRYPTO_ECB=m CONFIG_CRYPTO_LRW=m @@ -77,7 +70,6 @@ CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -95,3 +87,5 @@ CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_DEFLATE=m # CONFIG_CRYPTO_HW is not set +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="mem=32M console=ttyVR0,38400" diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig index c52d0efacd14..d7abb648b8a0 100644 --- a/arch/mips/configs/cavium_octeon_defconfig +++ b/arch/mips/configs/cavium_octeon_defconfig @@ -1,13 +1,6 @@ -CONFIG_CAVIUM_OCTEON_SOC=y -CONFIG_CAVIUM_CN63XXP1=y -CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_SMP=y -CONFIG_NR_CPUS=32 -CONFIG_HZ_100=y -CONFIG_PREEMPT=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_PREEMPT=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_IKCONFIG=y @@ -17,14 +10,21 @@ CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set +CONFIG_CAVIUM_OCTEON_SOC=y +CONFIG_CAVIUM_CN63XXP1=y +CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 +CONFIG_OCTEON_ILM=m +CONFIG_SMP=y +CONFIG_NR_CPUS=32 +CONFIG_HZ_100=y CONFIG_PCI=y CONFIG_PCI_MSI=y -CONFIG_MIPS32_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -42,7 +42,6 @@ CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y CONFIG_SYN_COOKIES=y -CONFIG_IPV6=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y # CONFIG_FW_LOADER is not set @@ -52,7 +51,6 @@ CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_SLRAM=y -CONFIG_PROC_DEVICETREE=y CONFIG_BLK_DEV_LOOP=y CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y @@ -74,7 +72,6 @@ CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set @@ -84,10 +81,9 @@ CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -99,9 +95,9 @@ CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_TOSHIBA is not set # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set -CONFIG_MARVELL_PHY=y -CONFIG_BROADCOM_PHY=y CONFIG_BCM87XX_PHY=y +CONFIG_BROADCOM_PHY=y +CONFIG_MARVELL_PHY=y # CONFIG_WLAN is not set # CONFIG_INPUT is not set # CONFIG_SERIO is not set @@ -111,7 +107,6 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 CONFIG_SERIAL_8250_DW=y -# CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_OCTEON=y CONFIG_SPI=y @@ -159,10 +154,6 @@ CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y CONFIG_NLS_UTF8=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_DEBUG_INFO=y CONFIG_SECURITY=y CONFIG_SECURITY_NETWORK=y CONFIG_CRYPTO_CBC=y @@ -172,4 +163,7 @@ CONFIG_CRYPTO_SHA1_OCTEON=m CONFIG_CRYPTO_SHA256_OCTEON=m CONFIG_CRYPTO_SHA512_OCTEON=m CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index 030ff9c205fb..412800d5d7e0 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -1,18 +1,10 @@ -CONFIG_MACH_INGENIC=y -CONFIG_JZ4780_CI20=y -CONFIG_HIGHMEM=y -# CONFIG_COMPACTION is not set -CONFIG_CMA=y -CONFIG_HZ_100=y -CONFIG_PREEMPT=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_KERNEL_XZ=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y -CONFIG_FHANDLE=y CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -20,7 +12,6 @@ CONFIG_CGROUPS=y CONFIG_MEMCG=y CONFIG_CGROUP_SCHED=y CONFIG_CGROUP_FREEZER=y -CONFIG_CPUSETS=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_NAMESPACES=y @@ -32,8 +23,15 @@ CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_MACH_INGENIC=y +CONFIG_JZ4780_CI20=y +CONFIG_HIGHMEM=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set # CONFIG_SUSPEND is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPACTION is not set +CONFIG_CMA=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -59,7 +57,6 @@ CONFIG_MTD_UBI=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set CONFIG_DM9000=y CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y @@ -76,13 +73,11 @@ CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_LEGACY_PTY_COUNT=2 -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=5 @@ -95,7 +90,6 @@ CONFIG_I2C_JZ4780=y CONFIG_SPI=y CONFIG_SPI_GPIO=y CONFIG_GPIO_SYSFS=y -CONFIG_GPIO_INGENIC=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_JZ4740_WDT=y @@ -166,9 +160,6 @@ CONFIG_DEBUG_INFO=y CONFIG_STRIP_ASM_SYMS=y CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y -CONFIG_LOCKUP_DETECTOR=y -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y CONFIG_PANIC_ON_OOPS=y CONFIG_PANIC_TIMEOUT=10 # CONFIG_SCHED_DEBUG is not set diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index a9066f300665..20c62841827f 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig @@ -1,9 +1,8 @@ -CONFIG_MIPS_COBALT=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y +CONFIG_MIPS_COBALT=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set @@ -17,7 +16,6 @@ CONFIG_INET=y # CONFIG_IPV6 is not set CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_MTD=y -CONFIG_MTD_BLKDEVS=y CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_PHYSMAP=y @@ -28,11 +26,9 @@ CONFIG_BLK_DEV_SD=y CONFIG_ATA=y CONFIG_PATA_VIA=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y CONFIG_NET_TULIP=y CONFIG_DE2104X=y CONFIG_TULIP=y -# CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set @@ -72,10 +68,8 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_CONFIGFS_FS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFSD=y CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y -CONFIG_CRC16=y CONFIG_LIBCRC32C=y diff --git a/arch/mips/configs/db1xxx_defconfig b/arch/mips/configs/db1xxx_defconfig index 0108bb9f1e37..34633b7611cb 100644 --- a/arch/mips/configs/db1xxx_defconfig +++ b/arch/mips/configs/db1xxx_defconfig @@ -1,41 +1,36 @@ -CONFIG_MIPS_ALCHEMY=y -CONFIG_MIPS_DB1XXX=y -CONFIG_CMA=y -CONFIG_CMA_DEBUG=y -CONFIG_HZ_100=y CONFIG_LOCALVERSION="-db1xxx" CONFIG_KERNEL_XZ=y CONFIG_DEFAULT_HOSTNAME="db1xxx" CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y -CONFIG_FHANDLE=y CONFIG_AUDIT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_CGROUPS=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_DEVICE=y -CONFIG_CPUSETS=y -CONFIG_CGROUP_CPUACCT=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y -CONFIG_MEMCG_KMEM=y +CONFIG_BLK_CGROUP=y CONFIG_CGROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y -CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y CONFIG_KALLSYMS_ALL=y CONFIG_EMBEDDED=y CONFIG_SLAB=y -CONFIG_BLK_DEV_BSGLIB=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_DEFAULT_NOOP=y +CONFIG_MIPS_ALCHEMY=y +CONFIG_HZ_100=y CONFIG_PCI=y -CONFIG_PCI_REALLOC_ENABLE_AUTO=y CONFIG_PCCARD=y CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y -CONFIG_PM=y +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_DEFAULT_NOOP=y +CONFIG_CMA=y +CONFIG_CMA_DEBUG=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_PACKET_DIAG=y @@ -78,13 +73,6 @@ CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y CONFIG_IPV6_PIMSM_V2=y CONFIG_BRIDGE=y CONFIG_NETLINK_DIAG=y -CONFIG_IRDA=y -CONFIG_IRLAN=y -CONFIG_IRCOMM=y -CONFIG_IRDA_ULTRA=y -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_AU1000_FIR=y CONFIG_BT=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y @@ -116,7 +104,6 @@ CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_SG=y -CONFIG_SCSI_MULTI_LUN=y CONFIG_ATA=y CONFIG_PATA_HPT37X=y CONFIG_PATA_HPT3X2N=y @@ -155,9 +142,9 @@ CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_SOUND=y CONFIG_SND=y -CONFIG_SND_SEQUENCER=y CONFIG_SND_HRTIMER=y CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SEQUENCER=y CONFIG_SND_AC97_POWER_SAVE=y CONFIG_SND_AC97_POWER_SAVE_DEFAULT=1 CONFIG_SND_SOC=y @@ -180,7 +167,6 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y CONFIG_MMC=y -CONFIG_MMC_CLKGATE=y CONFIG_SDIO_UART=y CONFIG_MMC_AU1X=y CONFIG_NEW_LEDS=y @@ -188,12 +174,13 @@ CONFIG_LEDS_CLASS=y CONFIG_LEDS_TRIGGERS=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_AU1XXX=y -CONFIG_FIRMWARE_MEMMAP=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y CONFIG_XFS_FS=y CONFIG_XFS_POSIX_ACL=y +CONFIG_F2FS_FS=y +CONFIG_F2FS_FS_SECURITY=y CONFIG_FANOTIFY=y CONFIG_FUSE_FS=y CONFIG_CUSE=y @@ -211,8 +198,6 @@ CONFIG_SQUASHFS_FILE_DIRECT=y CONFIG_SQUASHFS_XATTR=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y -CONFIG_F2FS_FS=y -CONFIG_F2FS_FS_SECURITY=y CONFIG_NFS_FS=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y @@ -232,7 +217,6 @@ CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_2=y CONFIG_NLS_ISO8859_15=y CONFIG_NLS_UTF8=y -CONFIG_MAGIC_SYSRQ=y CONFIG_SECURITYFS=y CONFIG_CRYPTO_USER=y CONFIG_CRYPTO_CRYPTD=y @@ -241,3 +225,4 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRC32_SLICEBY4=y CONFIG_FONTS=y CONFIG_FONT_8x8=y +CONFIG_MAGIC_SYSRQ=y diff --git a/arch/mips/configs/decstation_64_defconfig b/arch/mips/configs/decstation_64_defconfig new file mode 100644 index 000000000000..85f1955b4b00 --- /dev/null +++ b/arch/mips/configs/decstation_64_defconfig @@ -0,0 +1,227 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_LOG_BUF_SHIFT=15 +CONFIG_EXPERT=y +# CONFIG_SGETMASK_SYSCALL is not set +# CONFIG_SYSFS_SYSCALL is not set +CONFIG_BPF_SYSCALL=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +CONFIG_MACH_DECSTATION=y +CONFIG_64BIT=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_TC=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +# CONFIG_SUSPEND is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_OSF_PARTITION=y +# CONFIG_EFI_PARTITION is not set +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_NET_KEY=m +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETWORK_SECMARK=y +CONFIG_IP_SCTP=m +CONFIG_VLAN_8021Q=m +CONFIG_DECNET=m +CONFIG_DECNET_ROUTER=y +# CONFIG_WIRELESS is not set +# CONFIG_UEVENT_HELPER is not set +# CONFIG_FW_LOADER is not set +# CONFIG_ALLOW_DEV_COREDUMP is not set +CONFIG_MTD=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_MTD_MS02NV=m +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_RAM=m +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=m +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_ISCSI_TCP=m +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set +CONFIG_DECLANCE=y +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_FDDI=y +CONFIG_DEFZA=y +CONFIG_DEFXX=y +# CONFIG_WLAN is not set +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_LKKBD=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_VSXXXAA=y +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +CONFIG_FB=y +CONFIG_FB_TGA=y +CONFIG_FB_PMAG_AA=y +CONFIG_FB_PMAG_BA=y +CONFIG_FB_PMAGB_B=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE_COLUMNS=160 +CONFIG_DUMMY_CONSOLE_ROWS=64 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +# CONFIG_HID is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_CMOS=y +# CONFIG_MIPS_PLATFORM_DEVICES is not set +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_MANDATORY_FILE_LOCKING is not set +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_CHILDREN=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_HUGETLBFS=y +CONFIG_CONFIGFS_FS=y +CONFIG_UFS_FS=y +CONFIG_UFS_FS_WRITE=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_SWAP=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=m +CONFIG_CRYPTO_RSA=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_OFB=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_KEYWRAP=m +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +# CONFIG_CRYPTO_HW is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index e149f78901f8..0c86ed86266a 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig @@ -1,17 +1,26 @@ -CONFIG_MACH_DECSTATION=y -CONFIG_CPU_R3000=y CONFIG_SYSVIPC=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_POSIX_MQUEUE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_LOG_BUF_SHIFT=15 CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_HOTPLUG is not set +# CONFIG_SGETMASK_SYSCALL is not set +# CONFIG_SYSFS_SYSCALL is not set +CONFIG_BPF_SYSCALL=y +# CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MACH_DECSTATION=y +CONFIG_CPU_R3000=y +CONFIG_TC=y +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_TC=y -CONFIG_PM=y +# CONFIG_LBDAF is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_OSF_PARTITION=y +# CONFIG_EFI_PARTITION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -39,37 +48,92 @@ CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_MULTIPLE_TABLES=y CONFIG_IPV6_SUBTREES=y CONFIG_NETWORK_SECMARK=y +CONFIG_IP_SCTP=m CONFIG_VLAN_8021Q=m -CONFIG_CONNECTOR=m +CONFIG_DECNET=m +CONFIG_DECNET_ROUTER=y +# CONFIG_WIRELESS is not set +# CONFIG_UEVENT_HELPER is not set +# CONFIG_FW_LOADER is not set +# CONFIG_ALLOW_DEV_COREDUMP is not set +CONFIG_MTD=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_MTD_MS02NV=m CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_RAM=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_ST=m CONFIG_BLK_DEV_SR=m CONFIG_CHR_DEV_SG=m CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SPI_ATTRS=m -CONFIG_SCSI_SAS_ATTRS=m CONFIG_ISCSI_TCP=m CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set CONFIG_DECLANCE=y +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set CONFIG_FDDI=y -CONFIG_DEFXX=m -# CONFIG_INPUT is not set -# CONFIG_SERIO is not set -# CONFIG_VT is not set -# CONFIG_SERIAL_DZ is not set +CONFIG_DEFZA=y +CONFIG_DEFXX=y +# CONFIG_WLAN is not set +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_LKKBD=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_VSXXXAA=y # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set CONFIG_FB=y +CONFIG_FB_TGA=y +CONFIG_FB_PMAG_AA=y CONFIG_FB_PMAG_BA=y CONFIG_FB_PMAGB_B=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE_COLUMNS=160 +CONFIG_DUMMY_CONSOLE_ROWS=64 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set +# CONFIG_HID is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_CMOS=y +# CONFIG_MIPS_PLATFORM_DEVICES is not set +# CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y @@ -77,30 +141,60 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_FUSE_FS=m +# CONFIG_MANDATORY_FILE_LOCKING is not set +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y CONFIG_PROC_KCORE=y +CONFIG_PROC_CHILDREN=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_CONFIGFS_FS=y CONFIG_UFS_FS=y CONFIG_UFS_FS_WRITE=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y +CONFIG_NFS_SWAP=y CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_OSF_PARTITION=y -CONFIG_DLM=m -CONFIG_MAGIC_SYSRQ=y -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_ECB=m +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=m +CONFIG_CRYPTO_RSA=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_OFB=m CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_KEYWRAP=m +CONFIG_CRYPTO_CMAC=m CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -112,6 +206,19 @@ CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_FCRYPT=m CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +# CONFIG_CRYPTO_HW is not set +CONFIG_FRAME_WARN=2048 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/decstation_r4k_defconfig b/arch/mips/configs/decstation_r4k_defconfig new file mode 100644 index 000000000000..0e54ab2680ce --- /dev/null +++ b/arch/mips/configs/decstation_r4k_defconfig @@ -0,0 +1,224 @@ +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_LOG_BUF_SHIFT=15 +CONFIG_EXPERT=y +# CONFIG_SGETMASK_SYSCALL is not set +# CONFIG_SYSFS_SYSCALL is not set +CONFIG_BPF_SYSCALL=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +CONFIG_MACH_DECSTATION=y +CONFIG_TC=y +# CONFIG_SUSPEND is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_SRCVERSION_ALL=y +# CONFIG_LBDAF is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_OSF_PARTITION=y +# CONFIG_EFI_PARTITION is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_NET_KEY=m +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETWORK_SECMARK=y +CONFIG_IP_SCTP=m +CONFIG_VLAN_8021Q=m +CONFIG_DECNET=m +CONFIG_DECNET_ROUTER=y +# CONFIG_WIRELESS is not set +# CONFIG_UEVENT_HELPER is not set +# CONFIG_FW_LOADER is not set +# CONFIG_ALLOW_DEV_COREDUMP is not set +CONFIG_MTD=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_MTD_MS02NV=m +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_RAM=m +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=m +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_ISCSI_TCP=m +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set +CONFIG_DECLANCE=y +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_AURORA is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_FDDI=y +CONFIG_DEFZA=y +CONFIG_DEFXX=y +# CONFIG_WLAN is not set +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_LKKBD=y +# CONFIG_MOUSE_PS2 is not set +CONFIG_MOUSE_VSXXXAA=y +# CONFIG_SERIAL_DZ is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_HWMON is not set +CONFIG_FB=y +CONFIG_FB_TGA=y +CONFIG_FB_PMAG_AA=y +CONFIG_FB_PMAG_BA=y +CONFIG_FB_PMAGB_B=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE_COLUMNS=160 +CONFIG_DUMMY_CONSOLE_ROWS=64 +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +# CONFIG_HID is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_INTF_DEV_UIE_EMUL=y +CONFIG_RTC_DRV_CMOS=y +# CONFIG_MIPS_PLATFORM_DEVICES is not set +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_MANDATORY_FILE_LOCKING is not set +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_CHILDREN=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_CONFIGFS_FS=y +CONFIG_UFS_FS=y +CONFIG_UFS_FS_WRITE=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_SWAP=y +CONFIG_ROOT_NFS=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_UTF8=m +CONFIG_CRYPTO_RSA=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_OFB=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_KEYWRAP=m +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_CRC32=m +CONFIG_CRYPTO_CRCT10DIF=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +# CONFIG_CRYPTO_HW is not set +CONFIG_FRAME_WARN=2048 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig index c3ac0209457c..fd82b858a8f0 100644 --- a/arch/mips/configs/e55_defconfig +++ b/arch/mips/configs/e55_defconfig @@ -1,11 +1,9 @@ -CONFIG_MACH_VR41XX=y -CONFIG_CASIO_E55=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_HOTPLUG is not set CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y +CONFIG_CASIO_E55=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -16,7 +14,6 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_SD=y CONFIG_ATA=y CONFIG_PATA_LEGACY=y -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set @@ -38,4 +35,3 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x1f0,0x3f6,40 mem=8M" -# CONFIG_CRC32 is not set diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig index 499f51498ecb..8bcb61a6ec15 100644 --- a/arch/mips/configs/fuloong2e_defconfig +++ b/arch/mips/configs/fuloong2e_defconfig @@ -1,39 +1,33 @@ -CONFIG_MACH_LOONGSON64=y -CONFIG_64BIT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT_VOLUNTARY=y CONFIG_LOCALVERSION="-fuloong2e" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_NAMESPACES=y CONFIG_USER_NS=y -CONFIG_PID_NS=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_PCSPKR_PLATFORM is not set # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y CONFIG_PROFILING=y -CONFIG_OPROFILE=m -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MACH_LOONGSON64=y CONFIG_PCI=y -CONFIG_BINFMT_MISC=y -CONFIG_MIPS32_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y -CONFIG_PM=y # CONFIG_SUSPEND is not set CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="/dev/sda3" +CONFIG_OPROFILE=m +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_BINFMT_MISC=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -42,14 +36,11 @@ CONFIG_IP_MULTICAST=y CONFIG_IP_PNP=y CONFIG_IP_PNP_BOOTP=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -CONFIG_NET_IPGRE_BROADCAST=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_DIAG is not set # CONFIG_IPV6 is not set CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_MARK=m @@ -78,13 +69,11 @@ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m CONFIG_NETFILTER_XT_MATCH_TIME=m CONFIG_NETFILTER_XT_MATCH_U32=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m @@ -120,32 +109,30 @@ CONFIG_PATA_VIA=y CONFIG_ATA_GENERIC=y CONFIG_PATA_LEGACY=y CONFIG_NETDEVICES=y +CONFIG_NET_FC=y CONFIG_MACVLAN=m CONFIG_VETH=m +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set CONFIG_PHYLIB=m -CONFIG_MARVELL_PHY=m +CONFIG_CICADA_PHY=m CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y -CONFIG_8139TOO=y -# CONFIG_8139TOO_PIO is not set +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m CONFIG_SLIP=m CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y CONFIG_SLIP_MODE_SLIP6=y -CONFIG_NET_FC=y CONFIG_INPUT_FF_MEMLESS=y CONFIG_MOUSE_SERIAL=y CONFIG_SERIAL_8250=y @@ -153,7 +140,6 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 CONFIG_HW_RANDOM=y -CONFIG_RTC=y CONFIG_I2C=m CONFIG_I2C_CHARDEV=m CONFIG_I2C_VIAPRO=m @@ -167,9 +153,6 @@ CONFIG_SOUND=y CONFIG_SND=m CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_SEQUENCER_OSS=y CONFIG_SND_VIA82XX=m CONFIG_HIDRAW=y # CONFIG_USB_HID is not set @@ -183,7 +166,6 @@ CONFIG_USB_WUSB_CBAF=m CONFIG_USB_C67X00_HCD=m CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_ISP1760=m CONFIG_USB_OHCI_HCD=y CONFIG_USB_UHCI_HCD=m CONFIG_USB_R8A66597_HCD=m @@ -194,16 +176,13 @@ CONFIG_USB_TMC=m CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE_ONETOUCH=y CONFIG_USB_STORAGE_CYPRESS_ATACB=y +CONFIG_USB_ISP1760=m CONFIG_USB_SEVSEG=m CONFIG_USB_ISIGHTFW=m CONFIG_UIO=m CONFIG_UIO_CIF=m CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XIP=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_EXT4_FS=m CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y CONFIG_REISERFS_FS=m @@ -223,33 +202,22 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_OMFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y +CONFIG_NFS_V4=m CONFIG_NFSD=m CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y -CONFIG_SMB_FS=m -CONFIG_SMB_NLS_DEFAULT=y -CONFIG_SMB_NLS_REMOTE="cp936" CONFIG_CIFS=m -CONFIG_CIFS_STATS=y CONFIG_CIFS_STATS2=y CONFIG_CIFS_WEAK_PW_HASH=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_CIFS_DEBUG2=y -CONFIG_CIFS_EXPERIMENTAL=y -CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_936=y CONFIG_NLS_ISO8859_1=y CONFIG_NLS_UTF8=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_DEBUG_FS=y -CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_CCM=m CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_PCBC=m @@ -266,3 +234,4 @@ CONFIG_CRYPTO_LZO=m # CONFIG_CRYPTO_HW is not set CONFIG_CRC_CCITT=y CONFIG_CRC7=m +# CONFIG_ENABLE_MUST_CHECK is not set diff --git a/arch/mips/configs/gcw0_defconfig b/arch/mips/configs/gcw0_defconfig index 99ac1fa3b35f..a3e3eb3c5a8b 100644 --- a/arch/mips/configs/gcw0_defconfig +++ b/arch/mips/configs/gcw0_defconfig @@ -1,14 +1,14 @@ +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_EMBEDDED=y CONFIG_MACH_INGENIC=y CONFIG_JZ4770_GCW0=y CONFIG_HIGHMEM=y -# CONFIG_BOUNCE is not set -CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_SECCOMP is not set -CONFIG_NO_HZ_IDLE=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_EMBEDDED=y -# CONFIG_BLK_DEV_BSG is not set # CONFIG_SUSPEND is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BOUNCE is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y diff --git a/arch/mips/configs/generic_defconfig b/arch/mips/configs/generic_defconfig index 684c9dcba126..7c138dab87df 100644 --- a/arch/mips/configs/generic_defconfig +++ b/arch/mips/configs/generic_defconfig @@ -1,10 +1,3 @@ -CONFIG_MIPS_GENERIC=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_MIPS_CPS=y -CONFIG_CPU_HAS_MSA=y -CONFIG_HIGHMEM=y -CONFIG_NR_CPUS=16 -CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_SYSVIPC=y CONFIG_NO_HZ_IDLE=y CONFIG_IKCONFIG=y @@ -28,7 +21,11 @@ CONFIG_USERFAULTFD=y CONFIG_EMBEDDED=y # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set -CONFIG_CC_STACKPROTECTOR_REGULAR=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_MIPS_CPS=y +CONFIG_HIGHMEM=y +CONFIG_NR_CPUS=16 +CONFIG_MIPS_O32_FP64_SUPPORT=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_TRIM_UNUSED_KSYMS=y @@ -43,7 +40,6 @@ CONFIG_NETFILTER=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_SCSI=y -# CONFIG_SERIO is not set CONFIG_HW_RANDOM=y # CONFIG_HWMON is not set CONFIG_MFD_SYSCON=y @@ -79,6 +75,12 @@ CONFIG_NFS_V4=y CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y CONFIG_ROOT_NFS=y +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_IA64 is not set +# CONFIG_XZ_DEC_ARM is not set +# CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_SPARC is not set CONFIG_PRINTK_TIME=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_INFO_REDUCED=y @@ -87,9 +89,3 @@ CONFIG_DEBUG_FS=y # CONFIG_FTRACE is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="earlycon" -# CONFIG_XZ_DEC_X86 is not set -# CONFIG_XZ_DEC_POWERPC is not set -# CONFIG_XZ_DEC_IA64 is not set -# CONFIG_XZ_DEC_ARM is not set -# CONFIG_XZ_DEC_ARMTHUMB is not set -# CONFIG_XZ_DEC_SPARC is not set diff --git a/arch/mips/configs/gpr_defconfig b/arch/mips/configs/gpr_defconfig index 55438fc9991e..9d9af5f923c3 100644 --- a/arch/mips/configs/gpr_defconfig +++ b/arch/mips/configs/gpr_defconfig @@ -1,22 +1,21 @@ -CONFIG_MIPS_ALCHEMY=y -CONFIG_MIPS_GPR=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y CONFIG_PROFILING=y +CONFIG_MIPS_ALCHEMY=y +CONFIG_MIPS_GPR=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y +CONFIG_PARTITION_ADVANCED=y CONFIG_BINFMT_MISC=m CONFIG_NET=y CONFIG_PACKET=y @@ -36,7 +35,6 @@ CONFIG_SYN_COOKIES=y # CONFIG_IPV6 is not set CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_DSCP=m @@ -59,13 +57,11 @@ CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m @@ -93,7 +89,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_IP_DCCP=m CONFIG_IP_SCTP=m CONFIG_TIPC=m @@ -106,14 +101,12 @@ CONFIG_BRIDGE=m CONFIG_VLAN_8021Q=m CONFIG_DECNET=m CONFIG_LLC2=m -CONFIG_IPX=m CONFIG_ATALK=m CONFIG_DEV_APPLETALK=m CONFIG_IPDDP=m CONFIG_IPDDP_ENCAP=y CONFIG_X25=m CONFIG_LAPB=m -CONFIG_WAN_ROUTER=m CONFIG_NET_SCHED=y CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m @@ -173,26 +166,50 @@ CONFIG_TIFM_CORE=m CONFIG_SCSI=m CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_FC_ATTRS=m CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_MARVELL_PHY=m +CONFIG_NET_FC=y +CONFIG_NETCONSOLE=m +CONFIG_ATM_TCP=m +CONFIG_ATM_LANAI=m +CONFIG_ATM_ENI=m +CONFIG_ATM_FIRESTREAM=m +CONFIG_ATM_ZATM=m +CONFIG_ATM_NICSTAR=m +CONFIG_ATM_IDT77252=m +CONFIG_ATM_AMBASSADOR=m +CONFIG_ATM_HORIZON=m +CONFIG_ATM_IA=m +CONFIG_ATM_FORE200E=m +CONFIG_ATM_HE=m +CONFIG_ATM_HE_USE_SUNI=y +CONFIG_MIPS_AU1X00_ENET=y +CONFIG_CICADA_PHY=m CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_SMSC_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MIPS_AU1X00_ENET=y -CONFIG_ATH_COMMON=y +CONFIG_VITESSE_PHY=m +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +CONFIG_SLIP_MODE_SLIP6=y CONFIG_ATH_DEBUG=y CONFIG_ATH5K=y CONFIG_ATH5K_DEBUG=y @@ -212,41 +229,8 @@ CONFIG_DSCC4=m CONFIG_DSCC4_PCISYNC=y CONFIG_DSCC4_PCI_RST=y CONFIG_DLCI=m -CONFIG_WAN_ROUTER_DRIVERS=m -CONFIG_CYCLADES_SYNC=m -CONFIG_CYCLOMX_X25=y CONFIG_LAPBETHER=m CONFIG_X25_ASY=m -CONFIG_ATM_TCP=m -CONFIG_ATM_LANAI=m -CONFIG_ATM_ENI=m -CONFIG_ATM_FIRESTREAM=m -CONFIG_ATM_ZATM=m -CONFIG_ATM_NICSTAR=m -CONFIG_ATM_IDT77252=m -CONFIG_ATM_AMBASSADOR=m -CONFIG_ATM_HORIZON=m -CONFIG_ATM_IA=m -CONFIG_ATM_FORE200E=m -CONFIG_ATM_HE=m -CONFIG_ATM_HE_USE_SUNI=y -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPPOATM=m -CONFIG_SLIP=m -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLIP_SMART=y -CONFIG_SLIP_MODE_SLIP6=y -CONFIG_NET_FC=y -CONFIG_NETCONSOLE=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set @@ -258,7 +242,6 @@ CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_GPIO=y -CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y CONFIG_SENSORS_LM83=y CONFIG_WATCHDOG=y @@ -283,7 +266,6 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=m CONFIG_USB_SERIAL=y -CONFIG_USB_EZUSB=y CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_SIERRAWIRELESS=y CONFIG_LEDS_GPIO=y @@ -304,26 +286,16 @@ CONFIG_JFFS2_FS=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_RUBIN=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_850=y CONFIG_NLS_ISO8859_1=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw ip=auto" -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -336,3 +308,7 @@ CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_DEFLATE=m +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw ip=auto" diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 7ddfb4ef9479..ff40fbc2f439 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -1,35 +1,28 @@ -CONFIG_SGI_IP22=y -CONFIG_ARC_CONSOLE=y -CONFIG_CPU_R5000=y +CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_1000=y CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_SYSVIPC=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_RELAY=y CONFIG_NAMESPACES=y -CONFIG_UTS_NS=y -CONFIG_IPC_NS=y CONFIG_USER_NS=y -CONFIG_PID_NS=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_RELAY=y CONFIG_EXPERT=y -# CONFIG_HOTPLUG is not set -# CONFIG_PCSPKR_PLATFORM is not set # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_SGI_IP22=y +CONFIG_ARC_CONSOLE=y +CONFIG_CPU_R5000=y +CONFIG_HZ_1000=y +# CONFIG_SUSPEND is not set +CONFIG_PM=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y CONFIG_BINFMT_MISC=m -CONFIG_PM=y -# CONFIG_SUSPEND is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -62,12 +55,9 @@ CONFIG_IPV6_MROUTE=y CONFIG_IPV6_PIMSM_V2=y CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -77,7 +67,6 @@ CONFIG_NF_CONNTRACK_SANE=m CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_TPROXY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m @@ -136,21 +125,12 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_IP_VS_FTP=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m @@ -159,8 +139,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -222,23 +200,22 @@ CONFIG_SCSI_SPI_ATTRS=m CONFIG_ISCSI_TCP=m CONFIG_SGIWD93_SCSI=y CONFIG_NETDEVICES=y -CONFIG_DUMMY=m CONFIG_BONDING=m -CONFIG_MACVLAN=m +CONFIG_DUMMY=m CONFIG_EQUALIZER=m +CONFIG_MACVLAN=m CONFIG_TUN=m CONFIG_VETH=m +CONFIG_SGISEEQ=y +CONFIG_SMC91X=m +CONFIG_MDIO_BITBANG=m CONFIG_PHYLIB=m -CONFIG_MARVELL_PHY=m +CONFIG_CICADA_PHY=m CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m -CONFIG_MDIO_BITBANG=m -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=m -CONFIG_SGISEEQ=y CONFIG_HOSTAP=m CONFIG_INPUT_MOUSEDEV=m CONFIG_MOUSE_PS2=m @@ -261,7 +238,6 @@ CONFIG_LOGO=y # CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set CONFIG_HIDRAW=y -CONFIG_HID_PID=y CONFIG_RTC_CLASS=y CONFIG_RTC_INTF_DEV_UIE_EMUL=y CONFIG_RTC_DRV_DS1286=y @@ -269,9 +245,6 @@ CONFIG_EXT2_FS=m CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=m -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_XFS_FS=m CONFIG_XFS_QUOTA=y CONFIG_QUOTA=y @@ -294,18 +267,13 @@ CONFIG_MINIX_FS=m CONFIG_OMFS_FS=m CONFIG_UFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFSD=m CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_SMB_FS=m -CONFIG_SMB_NLS_DEFAULT=y CONFIG_CIFS=m CONFIG_CIFS_UPCALL=y CONFIG_CODA_FS=m -CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_737=m CONFIG_NLS_CODEPAGE_775=m @@ -344,13 +312,8 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m -CONFIG_DLM=m -CONFIG_DEBUG_MEMORY_INIT=y CONFIG_KEYS=y -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_CCM=m CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_LRW=m @@ -358,13 +321,10 @@ CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XTS=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -382,4 +342,4 @@ CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_LZO=m # CONFIG_CRYPTO_HW is not set CONFIG_CRC_T10DIF=m -CONFIG_CRC32=m +CONFIG_DEBUG_MEMORY_INIT=y diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 91a9c13e2c82..81c47e18131b 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -1,32 +1,28 @@ -CONFIG_SGI_IP27=y -CONFIG_NUMA=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 -CONFIG_SMP=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_1000=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=15 CONFIG_CGROUPS=y CONFIG_CPUSETS=y CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_PCSPKR_PLATFORM is not set CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set +CONFIG_SGI_IP27=y +CONFIG_NUMA=y +CONFIG_SMP=y +CONFIG_HZ_1000=y CONFIG_PCI=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_MIPS32_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y CONFIG_PM=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -41,7 +37,6 @@ CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_INET_XFRM_MODE_BEET=m CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y @@ -95,12 +90,10 @@ CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SKBEDIT=m CONFIG_CFG80211=m CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y CONFIG_RFKILL=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_OSD=m CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_SCSI=y @@ -115,7 +108,6 @@ CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SPI_ATTRS=y CONFIG_SCSI_FC_ATTRS=y -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set CONFIG_SCSI_CXGB3_ISCSI=m CONFIG_SCSI_BNX2_ISCSI=m CONFIG_BE2ISCSI=m @@ -160,69 +152,56 @@ CONFIG_DM_UEVENT=y CONFIG_IFB=m CONFIG_MACVLAN=m CONFIG_VETH=m -CONFIG_PHYLIB=y -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_ICPLUS_PHY=m -CONFIG_REALTEK_PHY=m -CONFIG_NATIONAL_PHY=m -CONFIG_STE10XP=m -CONFIG_LSI_ET1011C_PHY=m -CONFIG_MDIO_BITBANG=m -CONFIG_NET_ETHERNET=y -CONFIG_AX88796=m -CONFIG_AX88796_93CX6=y -CONFIG_SGI_IOC3_ETH=y -CONFIG_SMC91X=m -CONFIG_ETHOC=m -CONFIG_SMSC911X=m -CONFIG_DNET=m -CONFIG_B44=m -CONFIG_KS8851_MLL=m CONFIG_ATL2=m -CONFIG_E1000E=m -CONFIG_IP1000=m -CONFIG_IGB=m -CONFIG_IGBVF=m -CONFIG_VIA_VELOCITY=m -CONFIG_QLA3XXX=m CONFIG_ATL1E=m CONFIG_ATL1C=m -CONFIG_JME=m +CONFIG_B44=m +CONFIG_BNX2X=m CONFIG_ENIC=m +CONFIG_DNET=m +CONFIG_BE2NET=m +CONFIG_E1000E=m +CONFIG_IGB=m +CONFIG_IGBVF=m CONFIG_IXGBE=m +CONFIG_JME=m +CONFIG_MLX4_EN=m +# CONFIG_MLX4_DEBUG is not set +CONFIG_KS8851_MLL=m CONFIG_VXGE=m +CONFIG_AX88796=m +CONFIG_AX88796_93CX6=y +CONFIG_ETHOC=m +CONFIG_QLA3XXX=m CONFIG_NETXEN_NIC=m +CONFIG_SFC=m +CONFIG_SGI_IOC3_ETH=y +CONFIG_SMC91X=m +CONFIG_SMSC911X=m CONFIG_NIU=m -CONFIG_MLX4_EN=m -# CONFIG_MLX4_DEBUG is not set CONFIG_TEHUTI=m -CONFIG_BNX2X=m -CONFIG_SFC=m -CONFIG_BE2NET=m -CONFIG_LIBERTAS_THINFIRM=m -CONFIG_ATMEL=m -CONFIG_PCI_ATMEL=m -CONFIG_PRISM54=m -CONFIG_RTL8180=m +CONFIG_VIA_VELOCITY=m +CONFIG_PHYLIB=y +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_ICPLUS_PHY=m +CONFIG_LSI_ET1011C_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_NATIONAL_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_REALTEK_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_STE10XP=m +CONFIG_VITESSE_PHY=m CONFIG_ADM8211=m -CONFIG_MWL8K=m -CONFIG_ATH_COMMON=m CONFIG_ATH5K=m CONFIG_ATH9K=m +CONFIG_ATMEL=m +CONFIG_PCI_ATMEL=m CONFIG_B43=m CONFIG_B43LEGACY=m # CONFIG_B43LEGACY_DEBUG is not set -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_HOSTAP_PLX=m -CONFIG_HOSTAP_PCI=m CONFIG_IPW2100=m CONFIG_IPW2100_MONITOR=y CONFIG_IPW2100_DEBUG=y @@ -231,12 +210,14 @@ CONFIG_IPW2200_MONITOR=y CONFIG_IPW2200_PROMISCUOUS=y CONFIG_IPW2200_QOS=y CONFIG_IPW2200_DEBUG=y -CONFIG_IWLWIFI=m -CONFIG_IWLAGN=m -CONFIG_IWL4965=y -CONFIG_IWL5000=y +CONFIG_IWL4965=m CONFIG_IWL3945=m -CONFIG_LIBERTAS=m +CONFIG_IWLWIFI=m +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOSTAP_PLX=m +CONFIG_HOSTAP_PCI=m CONFIG_HERMES=m # CONFIG_HERMES_CACHE_FW_ON_INIT is not set CONFIG_PLX_HERMES=m @@ -244,13 +225,18 @@ CONFIG_TMD_HERMES=m CONFIG_NORTEL_HERMES=m CONFIG_P54_COMMON=m CONFIG_P54_PCI=m +CONFIG_PRISM54=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_MWL8K=m CONFIG_RT2X00=m CONFIG_RT2400PCI=m CONFIG_RT2500PCI=m CONFIG_RT61PCI=m CONFIG_RT2800PCI=m -CONFIG_WL12XX=m +CONFIG_RTL8180=m CONFIG_WL1251=m +CONFIG_WL12XX=m # CONFIG_INPUT is not set CONFIG_SERIO_LIBPS2=m CONFIG_SERIO_RAW=m @@ -262,7 +248,6 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_DEVPTS_MULTIPLE_INSTANCES=y CONFIG_HW_RANDOM_TIMERIOMEM=m CONFIG_I2C_CHARDEV=m CONFIG_I2C_ALI1535=m @@ -285,7 +270,6 @@ CONFIG_I2C_SIMTEC=m CONFIG_I2C_PARPORT_LIGHT=m CONFIG_I2C_TAOS_EVM=m CONFIG_I2C_STUB=m -CONFIG_PPS=m # CONFIG_HWMON is not set CONFIG_THERMAL=m CONFIG_MFD_PCF50633=m @@ -310,12 +294,8 @@ CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_XFS_FS=m CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -334,17 +314,8 @@ CONFIG_SQUASHFS=m CONFIG_OMFS_FS=m CONFIG_EXOFS_FS=m CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_RPCSEC_GSS_KRB5=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_DLM=m -CONFIG_KEYS=y CONFIG_SECURITYFS=y -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m @@ -357,7 +328,6 @@ CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -374,5 +344,4 @@ CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_LZO=m -CONFIG_CRYPTO_DEV_HIFN_795X=m CONFIG_CRC_T10DIF=m diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig index d0a4c2cfacf8..0921ef38e9fb 100644 --- a/arch/mips/configs/ip28_defconfig +++ b/arch/mips/configs/ip28_defconfig @@ -1,26 +1,24 @@ -CONFIG_SGI_IP28=y -CONFIG_ARC_CONSOLE=y -CONFIG_PREEMPT_VOLUNTARY=y CONFIG_SYSVIPC=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_HOTPLUG is not set CONFIG_SLAB=y +CONFIG_SGI_IP28=y +CONFIG_ARC_CONSOLE=y +CONFIG_EISA=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +# CONFIG_SUSPEND is not set +CONFIG_PM=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_EISA=y -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_O32=y -CONFIG_MIPS32_N32=y -CONFIG_PM=y -# CONFIG_SUSPEND is not set +CONFIG_PARTITION_ADVANCED=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -43,7 +41,6 @@ CONFIG_SCSI_CONSTANTS=y CONFIG_SGIWD93_SCSI=y CONFIG_NETDEVICES=y CONFIG_DUMMY=m -CONFIG_NET_ETHERNET=y CONFIG_SGISEEQ=y # CONFIG_MOUSE_PS2_ALPS is not set # CONFIG_MOUSE_PS2_SYNAPTICS is not set @@ -65,11 +62,8 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_ROOT_NFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_MAGIC_SYSRQ=y CONFIG_CRYPTO_MANAGER=y # CONFIG_CRYPTO_HW is not set -# CONFIG_CRC32 is not set +CONFIG_MAGIC_SYSRQ=y diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index ebff297328ae..8f6d8af2e3c0 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -1,26 +1,25 @@ -CONFIG_SGI_IP32=y -# CONFIG_SECCOMP is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y -CONFIG_BSD_PROCESS_ACCT=y CONFIG_AUDIT=y +CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_RELAY=y CONFIG_EXPERT=y CONFIG_SLAB=y CONFIG_PROFILING=y +CONFIG_SGI_IP32=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y CONFIG_OPROFILE=m CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_SGI_PARTITION=y CONFIG_BINFMT_MISC=y -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_O32=y -CONFIG_MIPS32_N32=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -33,7 +32,6 @@ CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m CONFIG_INET_AH=m CONFIG_INET_ESP=m CONFIG_INET_IPCOMP=m @@ -56,24 +54,20 @@ CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SAS_LIBSAS=y -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set CONFIG_SCSI_AIC7XXX=y CONFIG_AIC7XXX_RESET_DELAY_MS=15000 CONFIG_NETDEVICES=y -CONFIG_DUMMY=m CONFIG_BONDING=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_SGI_O2MACE_ETH=y +CONFIG_DUMMY=m CONFIG_NET_TULIP=y CONFIG_DE2104X=m CONFIG_TULIP=m CONFIG_TULIP_MMIO=y +CONFIG_SGI_O2MACE_ETH=y CONFIG_INPUT_EVDEV=m CONFIG_SERIO_MACEPS2=y CONFIG_SERIO_RAW=y @@ -87,9 +81,6 @@ CONFIG_FIRMWARE_EDID=y CONFIG_FB_GBE=y # CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set @@ -100,7 +91,6 @@ CONFIG_RTC_CLASS=y # CONFIG_RTC_INTF_SYSFS is not set # CONFIG_RTC_INTF_PROC is not set CONFIG_RTC_DRV_DS1685_FAMILY=y -CONFIG_RTC_DRV_DS1685=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y @@ -124,13 +114,10 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_CONFIGFS_FS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NFSD=m CONFIG_NFSD_V3=y CONFIG_CIFS=m -CONFIG_PARTITION_ADVANCED=y -CONFIG_SGI_PARTITION=y CONFIG_NLS=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_737=m @@ -170,7 +157,6 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m -CONFIG_MAGIC_SYSRQ=y CONFIG_KEYS=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_CBC=y @@ -186,7 +172,6 @@ CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_TGR192=y CONFIG_CRYPTO_WP512=y -CONFIG_CRYPTO_AES=y CONFIG_CRYPTO_ANUBIS=y CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_BLOWFISH=y @@ -200,7 +185,9 @@ CONFIG_CRYPTO_SERPENT=y CONFIG_CRYPTO_TEA=y CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_LIBCRC32C=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_MAGIC_SYSRQ=y diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig index 9ad1c94376c8..328d4dfeb4cb 100644 --- a/arch/mips/configs/jazz_defconfig +++ b/arch/mips/configs/jazz_defconfig @@ -1,22 +1,20 @@ -CONFIG_MACH_JAZZ=y -CONFIG_OLIVETTI_M700=y -CONFIG_PREEMPT_VOLUNTARY=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set CONFIG_SLAB=y +CONFIG_MACH_JAZZ=y +CONFIG_OLIVETTI_M700=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y CONFIG_BINFMT_MISC=m -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=m CONFIG_UNIX=y @@ -25,8 +23,6 @@ CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y @@ -41,7 +37,6 @@ CONFIG_INET6_IPCOMP=m CONFIG_IPV6_TUNNEL=m CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y @@ -83,20 +78,12 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m @@ -105,7 +92,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m @@ -140,7 +126,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_BRIDGE=m CONFIG_DECNET=m CONFIG_NET_SCHED=y @@ -230,24 +215,20 @@ CONFIG_DM_MIRROR=m CONFIG_DM_ZERO=m CONFIG_DM_MULTIPATH=m CONFIG_NETDEVICES=y -CONFIG_DUMMY=m CONFIG_BONDING=m +CONFIG_DUMMY=m CONFIG_EQUALIZER=m CONFIG_TUN=m +CONFIG_MIPS_JAZZ_SONIC=y +CONFIG_NE2000=m CONFIG_PHYLIB=m -CONFIG_MARVELL_PHY=m +CONFIG_CICADA_PHY=m CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_SMSC_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_MIPS_JAZZ_SONIC=y -CONFIG_NET_ISA=y -CONFIG_NE2000=m -CONFIG_NET_PCI=y +CONFIG_VITESSE_PHY=m CONFIG_PLIP=m CONFIG_INPUT_FF_MEMLESS=m CONFIG_SERIO_PARKBD=m @@ -297,25 +278,11 @@ CONFIG_ROMFS_FS=m CONFIG_SYSV_FS=m CONFIG_UFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFSD=m CONFIG_NFSD_V3=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_RPCSEC_GSS_SPKM3=m -CONFIG_SMB_FS=m CONFIG_CIFS=m -CONFIG_NCP_FS=m -CONFIG_NCPFS_PACKET_SIGNING=y -CONFIG_NCPFS_IOCTL_LOCKING=y -CONFIG_NCPFS_STRONG=y -CONFIG_NCPFS_NFS_NS=y -CONFIG_NCPFS_OS2_NS=y -CONFIG_NCPFS_SMALLDOS=y -CONFIG_NCPFS_NLS=y -CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m CONFIG_AFS_FS=m -CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_737=m CONFIG_NLS_CODEPAGE_775=m @@ -354,21 +321,14 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m -CONFIG_DLM=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_ECB=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAST6=m diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index af12281a5c33..24b96faf9b4e 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig @@ -1,13 +1,10 @@ -CONFIG_MACH_TX39XX=y -CONFIG_TOSHIBA_JMR3927=y -# CONFIG_SECCOMP is not set CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_EXPERT=y -# CONFIG_HOTPLUG is not set -# CONFIG_PCSPKR_PLATFORM is not set CONFIG_SLAB=y +CONFIG_MACH_TX39XX=y +CONFIG_TOSHIBA_JMR3927=y +# CONFIG_SECCOMP is not set CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y @@ -27,16 +24,14 @@ CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_PHYSMAP=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y CONFIG_TC35815=y # CONFIG_INPUT is not set # CONFIG_SERIO is not set # CONFIG_VT is not set +# CONFIG_UNIX98_PTYS is not set CONFIG_SERIAL_NONSTANDARD=y CONFIG_SERIAL_TXX9_CONSOLE=y CONFIG_SERIAL_TXX9_STDSERIAL=y -# CONFIG_UNIX98_PTYS is not set # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set CONFIG_WATCHDOG=y diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig index 947a35c7c46c..c66ca3785655 100644 --- a/arch/mips/configs/lasat_defconfig +++ b/arch/mips/configs/lasat_defconfig @@ -1,25 +1,23 @@ -CONFIG_LASAT=y -CONFIG_PICVUE=y -CONFIG_PICVUE_PROC=y -CONFIG_DS1603=y -CONFIG_LASAT_SYSCTL=y -CONFIG_HZ_1000=y -# CONFIG_SECCOMP is not set CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_KALLSYMS is not set -# CONFIG_HOTPLUG is not set # CONFIG_EPOLL is not set # CONFIG_SIGNALFD is not set # CONFIG_TIMERFD is not set # CONFIG_EVENTFD is not set +# CONFIG_KALLSYMS is not set CONFIG_SLAB=y +CONFIG_LASAT=y +CONFIG_PICVUE=y +CONFIG_PICVUE_PROC=y +CONFIG_DS1603=y +CONFIG_LASAT_SYSCTL=y +CONFIG_HZ_1000=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -39,10 +37,7 @@ CONFIG_PATA_CMD64X=y CONFIG_ATA_GENERIC=y CONFIG_PATA_LEGACY=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y CONFIG_PCNET32=y -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_SERIO_RAW=y @@ -55,7 +50,6 @@ CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_USB_SUPPORT is not set CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set # CONFIG_DNOTIFY is not set CONFIG_PROC_KCORE=y CONFIG_TMPFS=y diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig index 02be95c1b712..300127b0f5b7 100644 --- a/arch/mips/configs/lemote2f_defconfig +++ b/arch/mips/configs/lemote2f_defconfig @@ -1,48 +1,33 @@ -CONFIG_MACH_LOONGSON64=y -CONFIG_LEMOTE_MACH2F=y -CONFIG_CS5536_MFGPT=y -CONFIG_64BIT=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_AUDIT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_PREEMPT=y -CONFIG_KEXEC=y -# CONFIG_SECCOMP is not set -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_AUDIT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=15 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_PROFILING=y +CONFIG_MACH_LOONGSON64=y +CONFIG_LEMOTE_MACH2F=y +CONFIG_KEXEC=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="/dev/hda3" CONFIG_OPROFILE=m CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_BLK_DEV_INTEGRITY=y CONFIG_IOSCHED_DEADLINE=m -CONFIG_PCI=y CONFIG_BINFMT_MISC=m -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_O32=y -CONFIG_MIPS32_N32=y -CONFIG_PM=y -CONFIG_HIBERNATION=y -CONFIG_PM_STD_PARTITION="/dev/hda3" -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=m -CONFIG_CPU_FREQ_GOV_USERSPACE=m -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m -CONFIG_LOONGSON2_CPUFREQ=m CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -55,11 +40,9 @@ CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y -CONFIG_ARPD=y CONFIG_SYN_COOKIES=y CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TUNNEL=m @@ -76,7 +59,6 @@ CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y CONFIG_BRIDGE=m CONFIG_VLAN_8021Q=m -CONFIG_IPX=m CONFIG_NET_SCHED=y CONFIG_NET_EMATCH=y CONFIG_NET_CLS_ACT=y @@ -91,8 +73,6 @@ CONFIG_BT_HCIBTUSB=m CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIVHCI=m CONFIG_CFG80211=m -CONFIG_LIB80211=m -CONFIG_LIB80211_DEBUG=y CONFIG_MAC80211=m CONFIG_MAC80211_LEDS=y CONFIG_RFKILL=m @@ -130,18 +110,14 @@ CONFIG_DM_DELAY=m CONFIG_DM_UEVENT=y CONFIG_NETDEVICES=y CONFIG_DUMMY=m +CONFIG_NETCONSOLE=m CONFIG_TUN=m CONFIG_VETH=m -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set CONFIG_R8169=y -CONFIG_R8169_VLAN=y CONFIG_USB_USBNET=m CONFIG_USB_NET_CDC_EEM=m -CONFIG_NETCONSOLE=m -CONFIG_NETCONSOLE_DYNAMIC=y CONFIG_INPUT_POLLDEV=m CONFIG_INPUT_EVDEV=y # CONFIG_MOUSE_PS2_ALPS is not set @@ -149,6 +125,7 @@ CONFIG_INPUT_EVDEV=y # CONFIG_MOUSE_PS2_TRACKPOINT is not set CONFIG_MOUSE_APPLETOUCH=m # CONFIG_SERIO_SERPORT is not set +CONFIG_LEGACY_PTY_COUNT=16 CONFIG_SERIAL_NONSTANDARD=y CONFIG_SERIAL_8250=m # CONFIG_SERIAL_8250_PCI is not set @@ -156,50 +133,10 @@ CONFIG_SERIAL_8250_NR_UARTS=16 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_FOURPORT=y -CONFIG_LEGACY_PTY_COUNT=16 CONFIG_HW_RANDOM=y -CONFIG_RTC=y CONFIG_GPIO_LOONGSON=y CONFIG_THERMAL=y CONFIG_MEDIA_SUPPORT=m -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_HELPER_CHIPS_AUTO=y -CONFIG_VIDEO_VIVI=m -CONFIG_USB_VIDEO_CLASS=m -CONFIG_USB_M5602=m -CONFIG_USB_STV06XX=m -CONFIG_USB_GSPCA_CONEX=m -CONFIG_USB_GSPCA_ETOMS=m -CONFIG_USB_GSPCA_FINEPIX=m -CONFIG_USB_GSPCA_MARS=m -CONFIG_USB_GSPCA_MR97310A=m -CONFIG_USB_GSPCA_OV519=m -CONFIG_USB_GSPCA_OV534=m -CONFIG_USB_GSPCA_PAC207=m -CONFIG_USB_GSPCA_PAC7311=m -CONFIG_USB_GSPCA_SN9C20X=m -CONFIG_USB_GSPCA_SONIXB=m -CONFIG_USB_GSPCA_SONIXJ=m -CONFIG_USB_GSPCA_SPCA500=m -CONFIG_USB_GSPCA_SPCA501=m -CONFIG_USB_GSPCA_SPCA505=m -CONFIG_USB_GSPCA_SPCA506=m -CONFIG_USB_GSPCA_SPCA508=m -CONFIG_USB_GSPCA_SPCA561=m -CONFIG_USB_GSPCA_SQ905=m -CONFIG_USB_GSPCA_SQ905C=m -CONFIG_USB_GSPCA_STK014=m -CONFIG_USB_GSPCA_SUNPLUS=m -CONFIG_USB_GSPCA_T613=m -CONFIG_USB_GSPCA_TV8532=m -CONFIG_USB_GSPCA_VC032X=m -CONFIG_USB_GSPCA_ZC3XX=m -CONFIG_USB_ET61X251=m -CONFIG_USB_SN9C102=m -CONFIG_USB_ZR364XX=m -CONFIG_USB_STKWEBCAM=m -CONFIG_USB_S2255=m -# CONFIG_RADIO_ADAPTERS is not set CONFIG_FB=y CONFIG_FIRMWARE_EDID=y CONFIG_FB_MODE_HELPERS=y @@ -214,27 +151,14 @@ CONFIG_BACKLIGHT_GENERIC=m # CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_6x11=y -CONFIG_FONT_7x14=y -CONFIG_FONT_PEARL_8x8=y -CONFIG_FONT_ACORN_8x8=y -CONFIG_FONT_MINI_4x6=y -CONFIG_FONT_SUN8x16=y -CONFIG_FONT_SUN12x22=y -CONFIG_FONT_10x18=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_SOUND=m CONFIG_SND=m +CONFIG_SND_HRTIMER=m CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_SEQUENCER_OSS=y -CONFIG_SND_HRTIMER=m CONFIG_SND_DUMMY=m CONFIG_SND_VIRMIDI=m CONFIG_SND_SERIAL_U16550=m @@ -247,7 +171,6 @@ CONFIG_SND_USB_AUDIO=m CONFIG_SND_USB_CAIAQ=m CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_HIDRAW=y -CONFIG_USB_HIDDEV=y CONFIG_HID_A4TECH=m CONFIG_HID_APPLE=m CONFIG_HID_BELKIN=m @@ -283,6 +206,7 @@ CONFIG_THRUSTMASTER_FF=y CONFIG_HID_WACOM=m CONFIG_HID_ZEROPLUS=m CONFIG_ZEROPLUS_FF=y +CONFIG_USB_HIDDEV=y CONFIG_USB=y CONFIG_USB_DYNAMIC_MINORS=y CONFIG_USB_OTG_WHITELIST=y @@ -292,8 +216,6 @@ CONFIG_USB_EHCI_ROOT_HUB_TT=y # CONFIG_USB_EHCI_TT_NEWSCHED is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_UHCI_HCD=m -CONFIG_USB_WHCI_HCD=m -CONFIG_USB_HWA_HCD=m CONFIG_USB_ACM=m CONFIG_USB_PRINTER=m CONFIG_USB_WDM=m @@ -309,18 +231,13 @@ CONFIG_USB_STORAGE_ALAUDA=m CONFIG_USB_SERIAL=m CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_M66592=y CONFIG_MMC=m CONFIG_LEDS_CLASS=y CONFIG_STAGING=y -# CONFIG_STAGING_EXCLUDE_BUILD is not set -CONFIG_FB_SM7XX=y CONFIG_EXT2_FS=m CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y CONFIG_REISERFS_FS=m CONFIG_REISERFS_PROC_INFO=y CONFIG_REISERFS_FS_XATTR=y @@ -349,7 +266,6 @@ CONFIG_SQUASHFS=m CONFIG_SQUASHFS_EMBEDDED=y CONFIG_ROMFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFSD=m CONFIG_NFSD_V4=y @@ -393,32 +309,19 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=y -CONFIG_PRINTK_TIME=y -CONFIG_FRAME_WARN=1024 -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_FS=y -CONFIG_KEYS=y -CONFIG_CRYPTO_FIPS=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_XTS=m -CONFIG_CRYPTO_HMAC=m CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m CONFIG_CRYPTO_SHA1=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -435,4 +338,16 @@ CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_DEFLATE=m CONFIG_CRYPTO_LZO=m -CONFIG_CRC_T10DIF=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_6x11=y +CONFIG_FONT_7x14=y +CONFIG_FONT_PEARL_8x8=y +CONFIG_FONT_ACORN_8x8=y +CONFIG_FONT_MINI_4x6=y +CONFIG_FONT_10x18=y +CONFIG_FONT_SUN8x16=y +CONFIG_FONT_SUN12x22=y +CONFIG_PRINTK_TIME=y +CONFIG_FRAME_WARN=1024 +CONFIG_STRIP_ASM_SYMS=y diff --git a/arch/mips/configs/loongson1b_defconfig b/arch/mips/configs/loongson1b_defconfig index 914c867887bd..b064d68a5424 100644 --- a/arch/mips/configs/loongson1b_defconfig +++ b/arch/mips/configs/loongson1b_defconfig @@ -1,10 +1,8 @@ -CONFIG_MACH_LOONGSON32=y -CONFIG_PREEMPT=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_KERNEL_XZ=y CONFIG_SYSVIPC=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_IKCONFIG=y @@ -15,13 +13,15 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EXPERT=y CONFIG_PERF_EVENTS=y # CONFIG_COMPAT_BRK is not set +CONFIG_MACH_LOONGSON32=y +# CONFIG_SECCOMP is not set +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_SUSPEND is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -43,7 +43,6 @@ CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_LOONGSON1=y CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_SCSI=m @@ -67,7 +66,6 @@ CONFIG_INPUT_EVDEV=y # CONFIG_SERIO is not set CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_HW_RANDOM is not set @@ -116,8 +114,9 @@ CONFIG_NFS_FS=y CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m +# CONFIG_CRYPTO_ECHAINIV is not set +# CONFIG_CRYPTO_HW is not set CONFIG_DYNAMIC_DEBUG=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y @@ -125,5 +124,3 @@ CONFIG_MAGIC_SYSRQ=y # CONFIG_DEBUG_PREEMPT is not set # CONFIG_FTRACE is not set # CONFIG_EARLY_PRINTK is not set -# CONFIG_CRYPTO_ECHAINIV is not set -# CONFIG_CRYPTO_HW is not set diff --git a/arch/mips/configs/loongson1c_defconfig b/arch/mips/configs/loongson1c_defconfig index 68e42eff908e..5d76559b56cd 100644 --- a/arch/mips/configs/loongson1c_defconfig +++ b/arch/mips/configs/loongson1c_defconfig @@ -1,11 +1,8 @@ -CONFIG_MACH_LOONGSON32=y -CONFIG_LOONGSON1_LS1C=y -CONFIG_PREEMPT=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_KERNEL_XZ=y CONFIG_SYSVIPC=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_IKCONFIG=y @@ -16,13 +13,16 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EXPERT=y CONFIG_PERF_EVENTS=y # CONFIG_COMPAT_BRK is not set +CONFIG_MACH_LOONGSON32=y +CONFIG_LOONGSON1_LS1C=y +# CONFIG_SECCOMP is not set +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_SUSPEND is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -44,7 +44,6 @@ CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_LOONGSON1=y CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_SCSI=m @@ -68,7 +67,6 @@ CONFIG_INPUT_EVDEV=y # CONFIG_SERIO is not set CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_LEGACY_PTY_COUNT=8 -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_HW_RANDOM is not set @@ -117,8 +115,9 @@ CONFIG_NFS_FS=y CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m +# CONFIG_CRYPTO_ECHAINIV is not set +# CONFIG_CRYPTO_HW is not set CONFIG_DYNAMIC_DEBUG=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y @@ -126,5 +125,3 @@ CONFIG_MAGIC_SYSRQ=y # CONFIG_DEBUG_PREEMPT is not set # CONFIG_FTRACE is not set # CONFIG_EARLY_PRINTK is not set -# CONFIG_CRYPTO_ECHAINIV is not set -# CONFIG_CRYPTO_HW is not set diff --git a/arch/mips/configs/loongson3_defconfig b/arch/mips/configs/loongson3_defconfig index 324dfee23dfb..1322adb705c8 100644 --- a/arch/mips/configs/loongson3_defconfig +++ b/arch/mips/configs/loongson3_defconfig @@ -1,15 +1,3 @@ -CONFIG_MACH_LOONGSON64=y -CONFIG_SWIOTLB=y -CONFIG_LOONGSON_MACH3X=y -CONFIG_CPU_LOONGSON3=y -CONFIG_64BIT=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_KSM=y -CONFIG_SMP=y -CONFIG_NR_CPUS=4 -CONFIG_HZ_256=y -CONFIG_PREEMPT=y -CONFIG_KEXEC=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_KERNEL_LZMA=y CONFIG_SYSVIPC=y @@ -17,6 +5,7 @@ CONFIG_POSIX_MQUEUE=y CONFIG_AUDIT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -24,40 +13,38 @@ CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_CPUSETS=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y CONFIG_BLK_CGROUP=y +CONFIG_CPUSETS=y CONFIG_SCHED_AUTOGROUP=y CONFIG_SYSFS_DEPRECATED=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y +CONFIG_MACH_LOONGSON64=y +CONFIG_LOONGSON_MACH3X=y +CONFIG_SMP=y +CONFIG_HZ_256=y +CONFIG_KEXEC=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEASPM_PERFORMANCE=y +CONFIG_HOTPLUG_PCI=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y -CONFIG_BLK_DEV_INTEGRITY=y CONFIG_PARTITION_ADVANCED=y CONFIG_IOSCHED_DEADLINE=m CONFIG_CFQ_GROUP_IOSCHED=y -CONFIG_PCI=y -CONFIG_HT_PCI=y -CONFIG_PCIEPORTBUS=y -CONFIG_HOTPLUG_PCI_PCIE=y -# CONFIG_PCIEAER is not set -CONFIG_PCIEASPM_PERFORMANCE=y -CONFIG_HOTPLUG_PCI=y -CONFIG_HOTPLUG_PCI_SHPC=m CONFIG_BINFMT_MISC=m -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_O32=y -CONFIG_MIPS32_N32=y -CONFIG_PM=y +CONFIG_KSM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -123,7 +110,6 @@ CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=y CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SPI_ATTRS=m @@ -164,7 +150,6 @@ CONFIG_TUN=m # CONFIG_NET_VENDOR_AMD is not set # CONFIG_NET_VENDOR_ARC is not set # CONFIG_NET_VENDOR_ATHEROS is not set -# CONFIG_NET_CADENCE is not set # CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROCADE is not set # CONFIG_NET_VENDOR_CHELSIO is not set @@ -173,14 +158,13 @@ CONFIG_TUN=m # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set +# CONFIG_NET_VENDOR_I825XX is not set CONFIG_E1000=y CONFIG_E1000E=y CONFIG_IGB=y CONFIG_IXGB=y CONFIG_IXGBE=y -# CONFIG_NET_VENDOR_I825XX is not set # CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MELLANOX is not set # CONFIG_NET_VENDOR_MICREL is not set @@ -188,12 +172,11 @@ CONFIG_IXGBE=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set +# CONFIG_NET_VENDOR_RDC is not set CONFIG_8139CP=m CONFIG_8139TOO=m CONFIG_R8169=y -# CONFIG_NET_VENDOR_RDC is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -215,7 +198,6 @@ CONFIG_PPPOE=m CONFIG_PPPOL2TP=m CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m -CONFIG_ATH_CARDS=m CONFIG_ATH9K=m CONFIG_HOSTAP=m CONFIG_INPUT_POLLDEV=m @@ -296,9 +278,6 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_QUOTA=y # CONFIG_PRINT_QUOTA_WARNING is not set CONFIG_AUTOFS4_FS=y @@ -327,13 +306,6 @@ CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_936=y CONFIG_NLS_ASCII=y CONFIG_NLS_UTF8=y -CONFIG_PRINTK_TIME=y -CONFIG_FRAME_WARN=1024 -CONFIG_STRIP_ASM_SYMS=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -# CONFIG_FTRACE is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y @@ -345,7 +317,6 @@ CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_CRYPTO_AUTHENC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -357,3 +328,10 @@ CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_DEFLATE=m +CONFIG_PRINTK_TIME=y +CONFIG_FRAME_WARN=1024 +CONFIG_STRIP_ASM_SYMS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 81058295d35f..0ee5e677662e 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -1,9 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_NR_CPUS=8 -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -13,11 +7,17 @@ CONFIG_RELAY=y CONFIG_EXPERT=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_NR_CPUS=8 +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -58,8 +58,6 @@ CONFIG_NETFILTER=y CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -124,7 +122,6 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m @@ -139,7 +136,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -291,26 +287,26 @@ CONFIG_CHELSIO_T3=m CONFIG_AX88796=m CONFIG_NETXEN_NIC=m CONFIG_TC35815=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m CONFIG_BROADCOM_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m CONFIG_ATMEL=m CONFIG_PCI_ATMEL=m -CONFIG_PRISM54=m +CONFIG_IPW2100=m +CONFIG_IPW2100_MONITOR=y CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m -CONFIG_IPW2100=m -CONFIG_IPW2100_MONITOR=y +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_MOUSE_PS2_ELANTECH=y @@ -331,7 +327,6 @@ CONFIG_UIO=m CONFIG_UIO_CIF=m CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -CONFIG_EXT4_FS=y CONFIG_REISERFS_FS=m CONFIG_REISERFS_PROC_INFO=y CONFIG_REISERFS_FS_XATTR=y @@ -411,14 +406,12 @@ CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -432,4 +425,3 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/mips/configs/malta_kvm_defconfig b/arch/mips/configs/malta_kvm_defconfig index 5c10cddc39d3..041bffac043b 100644 --- a/arch/mips/configs/malta_kvm_defconfig +++ b/arch/mips/configs/malta_kvm_defconfig @@ -1,9 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_NR_CPUS=8 -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -14,11 +8,21 @@ CONFIG_EXPERT=y CONFIG_PERF_EVENTS=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_NR_CPUS=8 +CONFIG_HZ_100=y +CONFIG_PCI=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=m +CONFIG_KVM_MIPS_DEBUG_COP0_COUNTERS=y +CONFIG_VHOST_NET=m CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -59,8 +63,6 @@ CONFIG_NETFILTER=y CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -125,7 +127,6 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m @@ -140,7 +141,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -174,7 +174,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_BRIDGE_EBT_NFLOG=m CONFIG_IP_SCTP=m CONFIG_BRIDGE=m @@ -219,8 +218,6 @@ CONFIG_NET_ACT_SKBEDIT=m CONFIG_NET_CLS_IND=y CONFIG_CFG80211=m CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_MAC80211_MESH=y CONFIG_RFKILL=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" @@ -254,7 +251,6 @@ CONFIG_CHR_DEV_OSST=m CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y @@ -297,32 +293,31 @@ CONFIG_IFB=m CONFIG_MACVLAN=m CONFIG_TUN=m CONFIG_VETH=m -CONFIG_VHOST_NET=m CONFIG_PCNET32=y CONFIG_CHELSIO_T3=m CONFIG_AX88796=m CONFIG_NETXEN_NIC=m CONFIG_TC35815=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m CONFIG_BROADCOM_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m CONFIG_ATMEL=m CONFIG_PCI_ATMEL=m -CONFIG_PRISM54=m +CONFIG_IPW2100=m +CONFIG_IPW2100_MONITOR=y CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m -CONFIG_IPW2100=m -CONFIG_IPW2100_MONITOR=y +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y @@ -422,16 +417,12 @@ CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m -CONFIG_RCU_CPU_STALL_TIMEOUT=60 -CONFIG_ENABLE_DEFAULT_TRACERS=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -445,9 +436,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC16=m -CONFIG_VIRTUALIZATION=y -CONFIG_KVM=m -CONFIG_KVM_MIPS_DYN_TRANS=y -CONFIG_KVM_MIPS_DEBUG_COP0_COUNTERS=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_ENABLE_DEFAULT_TRACERS=y diff --git a/arch/mips/configs/malta_kvm_guest_defconfig b/arch/mips/configs/malta_kvm_guest_defconfig index bb694f5065f1..511065e62182 100644 --- a/arch/mips/configs/malta_kvm_guest_defconfig +++ b/arch/mips/configs/malta_kvm_guest_defconfig @@ -1,10 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_KVM_GUEST=y -CONFIG_PAGE_SIZE_16KB=y -# CONFIG_MIPS_MT_SMP is not set -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -15,11 +8,18 @@ CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_KVM_GUEST=y +CONFIG_PAGE_SIZE_16KB=y +# CONFIG_MIPS_MT_SMP is not set +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -60,8 +60,6 @@ CONFIG_NETFILTER=y CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -126,7 +124,6 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m @@ -141,7 +138,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -175,7 +171,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_BRIDGE_EBT_NFLOG=m CONFIG_IP_SCTP=m CONFIG_BRIDGE=m @@ -220,8 +215,6 @@ CONFIG_NET_ACT_SKBEDIT=m CONFIG_NET_CLS_IND=y CONFIG_CFG80211=m CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_MAC80211_MESH=y CONFIG_RFKILL=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" @@ -256,7 +249,6 @@ CONFIG_CHR_DEV_OSST=m CONFIG_BLK_DEV_SR=y CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y @@ -305,26 +297,26 @@ CONFIG_CHELSIO_T3=m CONFIG_AX88796=m CONFIG_NETXEN_NIC=m CONFIG_TC35815=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m CONFIG_BROADCOM_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m CONFIG_ATMEL=m CONFIG_PCI_ATMEL=m -CONFIG_PRISM54=m +CONFIG_IPW2100=m +CONFIG_IPW2100_MONITOR=y CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m -CONFIG_IPW2100=m -CONFIG_IPW2100_MONITOR=y +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_SERIAL_8250=y @@ -426,14 +418,12 @@ CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -447,5 +437,3 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC16=m diff --git a/arch/mips/configs/malta_qemu_32r6_defconfig b/arch/mips/configs/malta_qemu_32r6_defconfig index 5b5306b80576..299088043164 100644 --- a/arch/mips/configs/malta_qemu_32r6_defconfig +++ b/arch/mips/configs/malta_qemu_32r6_defconfig @@ -1,8 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R6=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_AUDIT=y @@ -13,12 +8,17 @@ CONFIG_LOG_BUF_SHIFT=15 CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R6=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_NET=y CONFIG_PACKET=y @@ -100,7 +100,6 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set @@ -110,10 +109,9 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -157,7 +155,6 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_CMOS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_XFS_FS=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -175,12 +172,9 @@ CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -191,5 +185,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/maltaaprp_defconfig b/arch/mips/configs/maltaaprp_defconfig index 85543599448f..2b4b3a24f637 100644 --- a/arch/mips/configs/maltaaprp_defconfig +++ b/arch/mips/configs/maltaaprp_defconfig @@ -1,9 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_MIPS_VPE_LOADER=y -CONFIG_MIPS_VPE_APSP_API=y -CONFIG_HZ_100=y CONFIG_LOCALVERSION="aprp" CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y @@ -14,12 +8,19 @@ CONFIG_LOG_BUF_SHIFT=15 CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_MIPS_VPE_LOADER=y +CONFIG_MIPS_VPE_APSP_API=y +CONFIG_NR_CPUS=2 +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_NET=y CONFIG_PACKET=y @@ -101,7 +102,6 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set @@ -111,10 +111,9 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -157,7 +156,6 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_CMOS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_XFS_FS=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -175,12 +173,9 @@ CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -191,5 +186,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/maltasmvp_defconfig b/arch/mips/configs/maltasmvp_defconfig index 067bb84ac916..425ddfd7cd78 100644 --- a/arch/mips/configs/maltasmvp_defconfig +++ b/arch/mips/configs/maltasmvp_defconfig @@ -1,11 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_SCHED_SMT=y -CONFIG_MIPS_CPS=y -CONFIG_NR_CPUS=8 -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_AUDIT=y @@ -16,12 +8,20 @@ CONFIG_LOG_BUF_SHIFT=15 CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_SCHED_SMT=y +CONFIG_MIPS_CPS=y +CONFIG_NR_CPUS=8 +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_NET=y CONFIG_PACKET=y @@ -101,7 +101,6 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set @@ -111,10 +110,9 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -159,9 +157,6 @@ CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_XFS_FS=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -179,12 +174,9 @@ CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -195,5 +187,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/maltasmvp_eva_defconfig b/arch/mips/configs/maltasmvp_eva_defconfig index dfc78c3172a3..8beaa7ba1e52 100644 --- a/arch/mips/configs/maltasmvp_eva_defconfig +++ b/arch/mips/configs/maltasmvp_eva_defconfig @@ -1,12 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPS32_3_5_FEATURES=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_SCHED_SMT=y -CONFIG_MIPS_CPS=y -CONFIG_NR_CPUS=8 -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_AUDIT=y @@ -17,12 +8,21 @@ CONFIG_LOG_BUF_SHIFT=15 CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPS32_3_5_FEATURES=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_SCHED_SMT=y +CONFIG_MIPS_CPS=y +CONFIG_NR_CPUS=8 +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_NET=y CONFIG_PACKET=y @@ -104,7 +104,6 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set @@ -114,10 +113,9 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -161,7 +159,6 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_CMOS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_XFS_FS=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -179,12 +176,9 @@ CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -195,5 +189,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/maltaup_defconfig b/arch/mips/configs/maltaup_defconfig index 50a2288c69f8..6e8b95ceb54a 100644 --- a/arch/mips/configs/maltaup_defconfig +++ b/arch/mips/configs/maltaup_defconfig @@ -1,7 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_HZ_100=y CONFIG_LOCALVERSION="up" CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y @@ -13,12 +9,17 @@ CONFIG_LOG_BUF_SHIFT=15 CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_NR_CPUS=2 +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_NET=y CONFIG_PACKET=y @@ -100,7 +101,6 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set # CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_MARVELL is not set @@ -110,10 +110,9 @@ CONFIG_PCNET32=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -156,7 +155,6 @@ CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_CMOS=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_XFS_FS=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -174,12 +172,9 @@ CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ISO8859_1=m -# CONFIG_FTRACE is not set -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -190,5 +185,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set +# CONFIG_FTRACE is not set diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig index 99a19cf5f9ba..6c026db96ff9 100644 --- a/arch/mips/configs/maltaup_xpa_defconfig +++ b/arch/mips/configs/maltaup_xpa_defconfig @@ -1,10 +1,3 @@ -CONFIG_MIPS_MALTA=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPS32_R5_FEATURES=y -CONFIG_CPU_MIPS32_R5_XPA=y -CONFIG_PAGE_SIZE_16KB=y -CONFIG_HZ_100=y CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -16,11 +9,19 @@ CONFIG_RELAY=y CONFIG_EXPERT=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MIPS_MALTA=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPS32_R5_FEATURES=y +CONFIG_CPU_MIPS32_R5_XPA=y +CONFIG_PAGE_SIZE_16KB=y +CONFIG_NR_CPUS=2 +CONFIG_HZ_100=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -61,8 +62,6 @@ CONFIG_NETFILTER=y CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -125,7 +124,6 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m @@ -140,7 +138,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -300,26 +297,26 @@ CONFIG_CHELSIO_T3=m CONFIG_AX88796=m CONFIG_NETXEN_NIC=m CONFIG_TC35815=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m CONFIG_BROADCOM_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m CONFIG_REALTEK_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m CONFIG_ATMEL=m CONFIG_PCI_ATMEL=m -CONFIG_PRISM54=m +CONFIG_IPW2100=m +CONFIG_IPW2100_MONITOR=y CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m -CONFIG_IPW2100=m -CONFIG_IPW2100_MONITOR=y +CONFIG_PRISM54=m CONFIG_LIBERTAS=m CONFIG_INPUT_MOUSEDEV=y CONFIG_MOUSE_PS2_ELANTECH=y @@ -425,7 +422,6 @@ CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m @@ -439,5 +435,3 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC16=m diff --git a/arch/mips/configs/markeins_defconfig b/arch/mips/configs/markeins_defconfig index 43ce6576ab1c..ae93a94f8c71 100644 --- a/arch/mips/configs/markeins_defconfig +++ b/arch/mips/configs/markeins_defconfig @@ -1,21 +1,19 @@ -CONFIG_NEC_MARKEINS=y -CONFIG_HZ_1000=y -CONFIG_PREEMPT=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_PREEMPT=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y +CONFIG_NEC_MARKEINS=y +CONFIG_HZ_1000=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y -CONFIG_PCI=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -82,20 +80,12 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m @@ -104,7 +94,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m @@ -134,23 +123,18 @@ CONFIG_SCSI=m CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_SG=m CONFIG_SCSI_SCAN_ASYNC=y -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set CONFIG_SCSI_AIC94XX=m # CONFIG_AIC94XX_DEBUG is not set CONFIG_NETDEVICES=y CONFIG_TUN=m -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_NET_PCI=y +CONFIG_CHELSIO_T3=m CONFIG_NATSEMI=y CONFIG_QLA3XXX=m -CONFIG_CHELSIO_T3=m CONFIG_NETXEN_NIC=m CONFIG_PPP=m +CONFIG_PPP_DEFLATE=m CONFIG_PPP_ASYNC=m CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -# CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=m # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set @@ -182,20 +166,15 @@ CONFIG_JFFS2_FS=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_CRAMFS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y CONFIG_NFSD=m CONFIG_NFSD_V3=y -CONFIG_SMB_FS=m CONFIG_NLS_DEFAULT="" CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ASCII=m CONFIG_NLS_ISO8859_1=m CONFIG_NLS_UTF8=m -CONFIG_DLM=m -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0,115200 mem=192m ip=bootp root=/dev/nfs rw" CONFIG_CRYPTO_ECB=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m @@ -203,3 +182,5 @@ CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_FCRYPT=m +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttyS0,115200 mem=192m ip=bootp root=/dev/nfs rw" diff --git a/arch/mips/configs/mips_paravirt_defconfig b/arch/mips/configs/mips_paravirt_defconfig index accf0db1dc6f..8dc5d96a08de 100644 --- a/arch/mips/configs/mips_paravirt_defconfig +++ b/arch/mips/configs/mips_paravirt_defconfig @@ -1,11 +1,5 @@ -CONFIG_MIPS_PARAVIRT=y -CONFIG_CPU_MIPS64_R2=y -CONFIG_64BIT=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_SMP=y -CONFIG_HZ_1000=y -CONFIG_PREEMPT=y CONFIG_SYSVIPC=y +CONFIG_PREEMPT=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_IKCONFIG=y @@ -15,13 +9,18 @@ CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y CONFIG_SLAB=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set +CONFIG_MIPS_PARAVIRT=y +CONFIG_CPU_MIPS64_R2=y +CONFIG_64BIT=y +CONFIG_SMP=y +CONFIG_HZ_1000=y CONFIG_PCI=y -CONFIG_MIPS32_COMPAT=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -39,7 +38,6 @@ CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y CONFIG_SYN_COOKIES=y -CONFIG_IPV6=y # CONFIG_WIRELESS is not set CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set @@ -58,9 +56,9 @@ CONFIG_VIRTIO_NET=y # CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_WIZNET is not set CONFIG_PHYLIB=y -CONFIG_MARVELL_PHY=y -CONFIG_BROADCOM_PHY=y CONFIG_BCM87XX_PHY=y +CONFIG_BROADCOM_PHY=y +CONFIG_MARVELL_PHY=y # CONFIG_WLAN is not set # CONFIG_INPUT is not set # CONFIG_SERIO is not set @@ -90,13 +88,12 @@ CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y CONFIG_NLS_UTF8=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_DES=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_FS=y CONFIG_MAGIC_SYSRQ=y # CONFIG_SCHED_DEBUG is not set # CONFIG_FTRACE is not set -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig index 3486b034f726..d4e038802510 100644 --- a/arch/mips/configs/mpc30x_defconfig +++ b/arch/mips/configs/mpc30x_defconfig @@ -1,11 +1,10 @@ -CONFIG_MACH_VR41XX=y -CONFIG_VICTOR_MPC30X=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y +CONFIG_VICTOR_MPC30X=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y @@ -31,7 +30,6 @@ CONFIG_ATA=y CONFIG_PATA_LEGACY=y CONFIG_NETDEVICES=y CONFIG_USB_PEGASUS=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set @@ -53,4 +51,3 @@ CONFIG_CONFIGFS_FS=m CONFIG_NFS_FS=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="mem=32M console=ttyVR0,19200 ide0=0x170,0x376,73" -# CONFIG_CRC32 is not set diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig index 3c8c16b10732..0fdc03fda12e 100644 --- a/arch/mips/configs/msp71xx_defconfig +++ b/arch/mips/configs/msp71xx_defconfig @@ -1,21 +1,21 @@ -CONFIG_PMC_MSP=y -CONFIG_PMC_MSP7120_GW=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_PREEMPT=y CONFIG_LOCALVERSION="-pmc" # CONFIG_SWAP is not set CONFIG_SYSVIPC=y +CONFIG_PREEMPT=y CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y # CONFIG_SHMEM is not set CONFIG_SLAB=y +CONFIG_PMC_MSP=y +CONFIG_PMC_MSP7120_GW=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_NR_CPUS=2 +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set -CONFIG_PCI=y CONFIG_NET=y CONFIG_UNIX=y CONFIG_XFRM_USER=y @@ -47,18 +47,15 @@ CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_NETDEVICES=y CONFIG_DUMMY=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y CONFIG_PPP=y -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set # CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set # CONFIG_SERIAL_8250_PCI is not set CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y @@ -80,6 +77,3 @@ CONFIG_SQUASHFS_EMBEDDED=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_AES=y diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig index c3d0d0a6e044..16bef819fe98 100644 --- a/arch/mips/configs/mtx1_defconfig +++ b/arch/mips/configs/mtx1_defconfig @@ -1,31 +1,45 @@ -CONFIG_MIPS_ALCHEMY=y -CONFIG_MIPS_MTX1=y -CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_AUDIT=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y CONFIG_PROFILING=y -CONFIG_OPROFILE=m -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set +CONFIG_MIPS_ALCHEMY=y +CONFIG_MIPS_MTX1=y CONFIG_PCI=y CONFIG_PCCARD=m CONFIG_YENTA=m CONFIG_PD6729=m CONFIG_I82092=m +CONFIG_OPROFILE=m +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_ACORN_PARTITION=y +CONFIG_ACORN_PARTITION_ICS=y +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ATARI_PARTITION=y +CONFIG_MAC_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_SGI_PARTITION=y +CONFIG_ULTRIX_PARTITION=y +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y CONFIG_BINFMT_MISC=m -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=m CONFIG_UNIX=y @@ -38,8 +52,6 @@ CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y @@ -57,7 +69,6 @@ CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_TUNNEL=m CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NETFILTER_NETLINK_LOG=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_DSCP=m @@ -81,13 +92,11 @@ CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_ECN=m CONFIG_IP_NF_TARGET_TTL=m @@ -128,7 +137,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_IP_DCCP=m CONFIG_IP_SCTP=m CONFIG_TIPC=m @@ -141,14 +149,12 @@ CONFIG_BRIDGE=m CONFIG_VLAN_8021Q=m CONFIG_DECNET=m CONFIG_LLC2=m -CONFIG_IPX=m CONFIG_ATALK=m CONFIG_DEV_APPLETALK=m CONFIG_IPDDP=m CONFIG_IPDDP_ENCAP=y CONFIG_X25=m CONFIG_LAPB=m -CONFIG_WAN_ROUTER=m CONFIG_NET_SCHED=y CONFIG_NET_SCH_CBQ=m CONFIG_NET_SCH_HTB=m @@ -191,30 +197,6 @@ CONFIG_BPQETHER=m CONFIG_BAYCOM_SER_FDX=m CONFIG_BAYCOM_SER_HDX=m CONFIG_YAM=m -CONFIG_IRDA=m -CONFIG_IRLAN=m -CONFIG_IRNET=m -CONFIG_IRCOMM=m -CONFIG_IRDA_ULTRA=y -CONFIG_IRDA_CACHE_LAST_LSAP=y -CONFIG_IRDA_FAST_RR=y -CONFIG_IRDA_DEBUG=y -CONFIG_IRTTY_SIR=m -CONFIG_DONGLE=y -CONFIG_ESI_DONGLE=m -CONFIG_ACTISYS_DONGLE=m -CONFIG_TEKRAM_DONGLE=m -CONFIG_LITELINK_DONGLE=m -CONFIG_MA600_DONGLE=m -CONFIG_GIRBIL_DONGLE=m -CONFIG_MCP2120_DONGLE=m -CONFIG_OLD_BELKIN_DONGLE=m -CONFIG_ACT200L_DONGLE=m -CONFIG_USB_IRDA=m -CONFIG_SIGMATEL_FIR=m -CONFIG_TOSHIBA_FIR=m -CONFIG_VLSI_FIR=m -CONFIG_MCS_FIR=m CONFIG_BT=m CONFIG_BT_RFCOMM=m CONFIG_BT_RFCOMM_TTY=y @@ -231,7 +213,6 @@ CONFIG_BT_HCIBFUSB=m CONFIG_BT_HCIDTL1=m CONFIG_BT_HCIBT3C=m CONFIG_BT_HCIBLUECARD=m -CONFIG_BT_HCIBTUART=m CONFIG_BT_HCIVHCI=m CONFIG_CONNECTOR=m CONFIG_MTD=y @@ -248,18 +229,18 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_SCSI=m CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_FC_ATTRS=m CONFIG_SCSI_ISCSI_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_DUMMY=m CONFIG_BONDING=m +CONFIG_DUMMY=m CONFIG_EQUALIZER=m +CONFIG_NET_FC=y +CONFIG_NETCONSOLE=m CONFIG_TUN=m CONFIG_ARCNET=m CONFIG_ARCNET_1201=m @@ -271,20 +252,33 @@ CONFIG_ARCNET_COM90xxIO=m CONFIG_ARCNET_RIM_I=m CONFIG_ARCNET_COM20020=m CONFIG_ARCNET_COM20020_PCI=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_HAPPYMEAL=m -CONFIG_SUNGEM=m -CONFIG_CASSINI=m -CONFIG_NET_VENDOR_3COM=y +CONFIG_ARCNET_COM20020_CS=m +CONFIG_ATM_TCP=m +CONFIG_ATM_LANAI=m +CONFIG_ATM_ENI=m +CONFIG_ATM_FIRESTREAM=m +CONFIG_ATM_ZATM=m +CONFIG_ATM_NICSTAR=m +CONFIG_ATM_IDT77252=m +CONFIG_ATM_AMBASSADOR=m +CONFIG_ATM_HORIZON=m +CONFIG_ATM_IA=m +CONFIG_ATM_FORE200E=m +CONFIG_ATM_HE=m +CONFIG_ATM_HE_USE_SUNI=y +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_3C589=m CONFIG_VORTEX=m CONFIG_TYPHOON=m +CONFIG_ADAPTEC_STARFIRE=m +CONFIG_ACENIC=m +CONFIG_AMD8111_ETH=m +CONFIG_PCNET32=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_B44=m +CONFIG_BNX2=m +CONFIG_TIGON3=m +CONFIG_CHELSIO_T1=m CONFIG_NET_TULIP=y CONFIG_DE2104X=m CONFIG_TULIP=m @@ -293,49 +287,69 @@ CONFIG_WINBOND_840=m CONFIG_DM9102=m CONFIG_ULI526X=m CONFIG_PCMCIA_XIRCOM=m +CONFIG_DL2K=m +CONFIG_SUNDANCE=m +CONFIG_PCMCIA_FMVJ18X=m CONFIG_HP100=m -CONFIG_NET_PCI=y -CONFIG_PCNET32=m -CONFIG_AMD8111_ETH=m -CONFIG_ADAPTEC_STARFIRE=m -CONFIG_B44=m -CONFIG_FORCEDETH=m CONFIG_E100=m +CONFIG_E1000=m +CONFIG_IXGB=m +CONFIG_SKGE=m +CONFIG_SKY2=m +CONFIG_MYRI10GE=m CONFIG_FEALNX=m CONFIG_NATSEMI=m +CONFIG_NS83820=m +CONFIG_S2IO=m +CONFIG_PCMCIA_AXNET=m CONFIG_NE2K_PCI=m +CONFIG_PCMCIA_PCNET=m +CONFIG_FORCEDETH=m +CONFIG_HAMACHI=m +CONFIG_YELLOWFIN=m +CONFIG_QLA3XXX=m CONFIG_8139CP=m CONFIG_8139TOO=m # CONFIG_8139TOO_PIO is not set CONFIG_8139TOO_8129=y +CONFIG_R8169=m CONFIG_SIS900=m +CONFIG_SIS190=m +CONFIG_PCMCIA_SMC91C92=m CONFIG_EPIC100=m -CONFIG_SUNDANCE=m +CONFIG_HAPPYMEAL=m +CONFIG_SUNGEM=m +CONFIG_CASSINI=m CONFIG_TLAN=m CONFIG_VIA_RHINE=m -CONFIG_ACENIC=m -CONFIG_DL2K=m -CONFIG_E1000=m -CONFIG_NS83820=m -CONFIG_HAMACHI=m -CONFIG_YELLOWFIN=m -CONFIG_R8169=m -CONFIG_R8169_VLAN=y -CONFIG_SIS190=m -CONFIG_SKGE=m -CONFIG_SKY2=m CONFIG_VIA_VELOCITY=m -CONFIG_TIGON3=m -CONFIG_BNX2=m -CONFIG_QLA3XXX=m -CONFIG_CHELSIO_T1=m -CONFIG_IXGB=m -CONFIG_S2IO=m -CONFIG_MYRI10GE=m -CONFIG_IBMOL=m -CONFIG_IBMLS=m -CONFIG_TMSPCI=m -CONFIG_ABYSS=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_FDDI=y +CONFIG_DEFXX=m +CONFIG_SKFP=m +CONFIG_HIPPI=y +CONFIG_ROADRUNNER=m +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +CONFIG_SLIP_MODE_SLIP6=y CONFIG_USB_CATC=m CONFIG_USB_KAWETH=m CONFIG_USB_PEGASUS=m @@ -349,16 +363,6 @@ CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y CONFIG_USB_EPSON2888=y CONFIG_USB_SIERRA_NET=m -CONFIG_NET_PCMCIA=y -CONFIG_PCMCIA_3C589=m -CONFIG_PCMCIA_3C574=m -CONFIG_PCMCIA_FMVJ18X=m -CONFIG_PCMCIA_PCNET=m -CONFIG_PCMCIA_NMCLAN=m -CONFIG_PCMCIA_SMC91C92=m -CONFIG_PCMCIA_XIRC2PS=m -CONFIG_PCMCIA_AXNET=m -CONFIG_ARCNET_COM20020_CS=m CONFIG_WAN=y CONFIG_LANMEDIA=m CONFIG_HDLC=m @@ -375,46 +379,8 @@ CONFIG_DSCC4=m CONFIG_DSCC4_PCISYNC=y CONFIG_DSCC4_PCI_RST=y CONFIG_DLCI=m -CONFIG_WAN_ROUTER_DRIVERS=m -CONFIG_CYCLADES_SYNC=m -CONFIG_CYCLOMX_X25=y CONFIG_LAPBETHER=m CONFIG_X25_ASY=m -CONFIG_ATM_TCP=m -CONFIG_ATM_LANAI=m -CONFIG_ATM_ENI=m -CONFIG_ATM_FIRESTREAM=m -CONFIG_ATM_ZATM=m -CONFIG_ATM_NICSTAR=m -CONFIG_ATM_IDT77252=m -CONFIG_ATM_AMBASSADOR=m -CONFIG_ATM_HORIZON=m -CONFIG_ATM_IA=m -CONFIG_ATM_FORE200E=m -CONFIG_ATM_HE=m -CONFIG_ATM_HE_USE_SUNI=y -CONFIG_FDDI=y -CONFIG_DEFXX=m -CONFIG_SKFP=m -CONFIG_HIPPI=y -CONFIG_ROADRUNNER=m -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_MPPE=m -CONFIG_PPPOE=m -CONFIG_PPPOATM=m -CONFIG_SLIP=m -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLIP_SMART=y -CONFIG_SLIP_MODE_SLIP6=y -CONFIG_NET_FC=y -CONFIG_NETCONSOLE=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_MOUSE is not set @@ -440,7 +406,6 @@ CONFIG_HW_RANDOM=y CONFIG_I2C=m CONFIG_I2C_CHARDEV=m CONFIG_I2C_GPIO=m -CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y CONFIG_SENSORS_ADM1021=m CONFIG_SENSORS_ADM1025=m @@ -453,6 +418,7 @@ CONFIG_SENSORS_F71805F=m CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_MAX1619=m CONFIG_SENSORS_LM63=m CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM77=m @@ -463,7 +429,6 @@ CONFIG_SENSORS_LM85=m CONFIG_SENSORS_LM87=m CONFIG_SENSORS_LM90=m CONFIG_SENSORS_LM92=m -CONFIG_SENSORS_MAX1619=m CONFIG_SENSORS_PC87360=m CONFIG_SENSORS_PCF8591=m CONFIG_SENSORS_SIS5595=m @@ -491,23 +456,17 @@ CONFIG_SOUND=m CONFIG_SND=m CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_SEQUENCER_OSS=y CONFIG_SND_DUMMY=m CONFIG_SND_VIRMIDI=m CONFIG_SND_MTPAV=m CONFIG_SND_SERIAL_U16550=m CONFIG_SND_MPU401=m CONFIG_SND_AD1889=m -CONFIG_SND_ALS300=m -CONFIG_SND_ALI5451=m CONFIG_SND_ATIIXP=m CONFIG_SND_ATIIXP_MODEM=m CONFIG_SND_AU8810=m CONFIG_SND_AU8820=m CONFIG_SND_AU8830=m -CONFIG_SND_AZT3328=m CONFIG_SND_BT87X=m CONFIG_SND_CA0106=m CONFIG_SND_CMIPCI=m @@ -525,22 +484,15 @@ CONFIG_SND_ECHO3G=m CONFIG_SND_INDIGO=m CONFIG_SND_INDIGOIO=m CONFIG_SND_INDIGODJ=m -CONFIG_SND_EMU10K1=m -CONFIG_SND_EMU10K1X=m CONFIG_SND_ENS1370=m CONFIG_SND_ENS1371=m -CONFIG_SND_ES1938=m -CONFIG_SND_ES1968=m CONFIG_SND_FM801=m -CONFIG_SND_HDA_INTEL=m CONFIG_SND_HDSP=m CONFIG_SND_HDSPM=m -CONFIG_SND_ICE1712=m CONFIG_SND_ICE1724=m CONFIG_SND_INTEL8X0=m CONFIG_SND_INTEL8X0M=m CONFIG_SND_KORG1212=m -CONFIG_SND_MAESTRO3=m CONFIG_SND_MIXART=m CONFIG_SND_NM256=m CONFIG_SND_PCXHR=m @@ -548,16 +500,14 @@ CONFIG_SND_RIPTIDE=m CONFIG_SND_RME32=m CONFIG_SND_RME96=m CONFIG_SND_RME9652=m -CONFIG_SND_SONICVIBES=m -CONFIG_SND_TRIDENT=m CONFIG_SND_VIA82XX=m CONFIG_SND_VIA82XX_MODEM=m CONFIG_SND_VX222=m CONFIG_SND_YMFPCI=m +CONFIG_SND_HDA_INTEL=m CONFIG_SND_USB_AUDIO=m CONFIG_SND_VXPOCKET=m CONFIG_SND_PDAUDIOCF=m -CONFIG_SOUND_PRIME=m CONFIG_USB_HIDDEV=y CONFIG_USB_KBD=m CONFIG_USB_MOUSE=m @@ -566,7 +516,7 @@ CONFIG_USB_MON=m CONFIG_USB_EHCI_HCD=m CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_OHCI_HCD=m -CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD_PLATFORM=m CONFIG_USB_UHCI_HCD=m CONFIG_USB_U132_HCD=m CONFIG_USB_SL811_HCD=m @@ -595,7 +545,6 @@ CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m CONFIG_USB_SERIAL_CYPRESS_M8=m CONFIG_USB_SERIAL_EMPEG=m CONFIG_USB_SERIAL_FTDI_SIO=m -CONFIG_USB_SERIAL_FUNSOFT=m CONFIG_USB_SERIAL_VISOR=m CONFIG_USB_SERIAL_IPAQ=m CONFIG_USB_SERIAL_IR=m @@ -612,7 +561,6 @@ CONFIG_USB_SERIAL_MOS7720=m CONFIG_USB_SERIAL_MOS7840=m CONFIG_USB_SERIAL_NAVMAN=m CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_HP4X=m CONFIG_USB_SERIAL_SAFE=m CONFIG_USB_SERIAL_SIERRAWIRELESS=m CONFIG_USB_SERIAL_TI=m @@ -641,7 +589,6 @@ CONFIG_USB_CXACRU=m CONFIG_USB_UEAGLEATM=m CONFIG_USB_XUSBATM=m CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_NET2280=y CONFIG_USB_ZERO=m CONFIG_USB_ETH=m CONFIG_USB_GADGETFS=m @@ -677,7 +624,6 @@ CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=m -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y CONFIG_QUOTA=y @@ -692,48 +638,18 @@ CONFIG_VFAT_FS=m CONFIG_NTFS_FS=m CONFIG_PROC_KCORE=y CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=m CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_XATTR=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_CRAMFS=y CONFIG_SQUASHFS=y CONFIG_NFS_FS=m -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y +CONFIG_NFS_V4=m CONFIG_NFSD=m CONFIG_NFSD_V4=y -CONFIG_RPCSEC_GSS_SPKM3=m -CONFIG_SMB_FS=m CONFIG_CIFS=m -CONFIG_NCP_FS=m -CONFIG_NCPFS_PACKET_SIGNING=y -CONFIG_NCPFS_IOCTL_LOCKING=y -CONFIG_NCPFS_STRONG=y -CONFIG_NCPFS_NFS_NS=y -CONFIG_NCPFS_OS2_NS=y -CONFIG_NCPFS_NLS=y -CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m CONFIG_AFS_FS=m -CONFIG_PARTITION_ADVANCED=y -CONFIG_ACORN_PARTITION=y -CONFIG_ACORN_PARTITION_ICS=y -CONFIG_ACORN_PARTITION_RISCIX=y -CONFIG_OSF_PARTITION=y -CONFIG_AMIGA_PARTITION=y -CONFIG_ATARI_PARTITION=y -CONFIG_MAC_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_LDM_PARTITION=y -CONFIG_SGI_PARTITION=y -CONFIG_ULTRIX_PARTITION=y -CONFIG_SUN_PARTITION=y -CONFIG_KARMA_PARTITION=y -CONFIG_EFI_PARTITION=y CONFIG_NLS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=m @@ -774,18 +690,11 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_TEST=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -795,3 +704,5 @@ CONFIG_CRYPTO_KHAZAD=m CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_MAGIC_SYSRQ=y diff --git a/arch/mips/configs/nlm_xlp_defconfig b/arch/mips/configs/nlm_xlp_defconfig index e8e1dd8e0e99..72a211d2d556 100644 --- a/arch/mips/configs/nlm_xlp_defconfig +++ b/arch/mips/configs/nlm_xlp_defconfig @@ -1,32 +1,35 @@ -CONFIG_NLM_XLP_BOARD=y -CONFIG_64BIT=y -CONFIG_PAGE_SIZE_16KB=y -# CONFIG_HW_PERF_EVENTS is not set -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 -CONFIG_SMP=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_AUDIT=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y CONFIG_CGROUPS=y CONFIG_NAMESPACES=y CONFIG_BLK_DEV_INITRD=y -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y CONFIG_KALLSYMS_ALL=y CONFIG_EMBEDDED=y # CONFIG_COMPAT_BRK is not set CONFIG_PROFILING=y +CONFIG_NLM_XLP_BOARD=y +CONFIG_64BIT=y +CONFIG_PAGE_SIZE_16KB=y +# CONFIG_HW_PERF_EVENTS is not set +CONFIG_SMP=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y +CONFIG_PCI_DEBUG=y +CONFIG_PCI_STUB=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y @@ -49,19 +52,11 @@ CONFIG_SGI_PARTITION=y CONFIG_ULTRIX_PARTITION=y CONFIG_SUN_PARTITION=y CONFIG_KARMA_PARTITION=y -CONFIG_EFI_PARTITION=y CONFIG_SYSV68_PARTITION=y -CONFIG_PCI=y -CONFIG_PCI_DEBUG=y -CONFIG_PCI_REALLOC_ENABLE_AUTO=y -CONFIG_PCI_STUB=y # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set CONFIG_BINFMT_MISC=y -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_O32=y -CONFIG_MIPS32_N32=y -CONFIG_PM=y -CONFIG_PM_DEBUG=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -93,7 +88,6 @@ CONFIG_TCP_CONG_VENO=m CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=y CONFIG_INET6_AH=m CONFIG_INET6_ESP=m CONFIG_INET6_IPCOMP=m @@ -104,12 +98,10 @@ CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_SIT=m CONFIG_IPV6_TUNNEL=m CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_NETLABEL=y CONFIG_NETFILTER=y CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -120,7 +112,6 @@ CONFIG_NF_CONNTRACK_SANE=m CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_TPROXY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m @@ -180,18 +171,12 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_IP_VS_FTP=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m @@ -201,8 +186,6 @@ CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -238,7 +221,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_BRIDGE_EBT_NFLOG=m CONFIG_IP_DCCP=m CONFIG_RDS=m @@ -254,14 +236,12 @@ CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_DECNET=m CONFIG_LLC2=m -CONFIG_IPX=m CONFIG_ATALK=m CONFIG_DEV_APPLETALK=m CONFIG_IPDDP=m CONFIG_IPDDP_ENCAP=y CONFIG_X25=m CONFIG_LAPB=m -CONFIG_WAN_ROUTER=m CONFIG_PHONET=m CONFIG_IEEE802154=m CONFIG_NET_SCHED=y @@ -324,7 +304,6 @@ CONFIG_MTD_PHYSMAP_OF=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_OSD=m CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_CDROM_PKTCDVD=y @@ -335,7 +314,6 @@ CONFIG_CHR_DEV_OSST=m CONFIG_BLK_DEV_SR=y CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y @@ -343,7 +321,6 @@ CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m CONFIG_SCSI_SRP_ATTRS=m CONFIG_ISCSI_TCP=m -CONFIG_LIBFCOE=m CONFIG_SCSI_DEBUG=m CONFIG_SCSI_DH=y CONFIG_SCSI_DH_RDAC=m @@ -368,10 +345,9 @@ CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_DEC is not set # CONFIG_NET_VENDOR_DLINK is not set # CONFIG_NET_VENDOR_EMULEX is not set -# CONFIG_NET_VENDOR_EXAR is not set # CONFIG_NET_VENDOR_HP is not set -CONFIG_E1000E=y # CONFIG_NET_VENDOR_I825XX is not set +CONFIG_E1000E=y CONFIG_SKY2=y # CONFIG_NET_VENDOR_MELLANOX is not set # CONFIG_NET_VENDOR_MICREL is not set @@ -379,10 +355,9 @@ CONFIG_SKY2=y # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NVIDIA is not set # CONFIG_NET_VENDOR_OKI is not set -# CONFIG_NET_PACKET_ENGINE is not set # CONFIG_NET_VENDOR_QLOGIC is not set -# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_RDC is not set +# CONFIG_NET_VENDOR_REALTEK is not set # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SILAN is not set # CONFIG_NET_VENDOR_SIS is not set @@ -394,7 +369,6 @@ CONFIG_SKY2=y # CONFIG_NET_VENDOR_TOSHIBA is not set # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m # CONFIG_INPUT_KEYBOARD is not set @@ -403,12 +377,9 @@ CONFIG_SERIO_SERPORT=m CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVPTS_MULTIPLE_INSTANCES=y CONFIG_LEGACY_PTY_COUNT=0 CONFIG_SERIAL_NONSTANDARD=y CONFIG_N_HDLC=m -# CONFIG_DEVKMEM is not set -CONFIG_STALDRV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=48 @@ -430,7 +401,6 @@ CONFIG_THERMAL=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1374=y CONFIG_UIO=y -CONFIG_UIO_PDRV=m CONFIG_UIO_PDRV_GENIRQ=m # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT2_FS=y @@ -440,9 +410,6 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_GFS2_FS=m CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y @@ -487,7 +454,7 @@ CONFIG_UFS_FS=m CONFIG_EXOFS_FS=m CONFIG_NFS_FS=m CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y +CONFIG_NFS_V4=m CONFIG_NFS_FSCACHE=y CONFIG_NFSD=m CONFIG_NFSD_V3_ACL=y @@ -498,14 +465,6 @@ CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_CIFS_DFS_UPCALL=y -CONFIG_NCP_FS=m -CONFIG_NCPFS_PACKET_SIGNING=y -CONFIG_NCPFS_IOCTL_LOCKING=y -CONFIG_NCPFS_STRONG=y -CONFIG_NCPFS_NFS_NS=y -CONFIG_NCPFS_OS2_NS=y -CONFIG_NCPFS_NLS=y -CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m CONFIG_AFS_FS=m CONFIG_NLS=y @@ -547,19 +506,6 @@ CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_SCHED_TRACER=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_KGDB=y CONFIG_SECURITY=y CONFIG_LSM_MMAP_MIN_ADDR=0 CONFIG_SECURITY_SELINUX=y @@ -568,10 +514,8 @@ CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 CONFIG_SECURITY_SELINUX_DISABLE=y CONFIG_SECURITY_SMACK=y CONFIG_SECURITY_TOMOYO=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CCM=m CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_LRW=m @@ -585,8 +529,6 @@ CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -602,5 +544,15 @@ CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_LZO=m -CONFIG_CRC_CCITT=m CONFIG_CRC7=m +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +CONFIG_UNUSED_SYMBOLS=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_SCHEDSTATS=y +CONFIG_SCHED_TRACER=y +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_KGDB=y diff --git a/arch/mips/configs/nlm_xlr_defconfig b/arch/mips/configs/nlm_xlr_defconfig index c4477a4d40c1..4ecb157e56d4 100644 --- a/arch/mips/configs/nlm_xlr_defconfig +++ b/arch/mips/configs/nlm_xlr_defconfig @@ -1,47 +1,60 @@ -CONFIG_NLM_XLR_BOARD=y -CONFIG_HIGHMEM=y -CONFIG_KSM=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 -CONFIG_SMP=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_KEXEC=y -CONFIG_CROSS_COMPILE="" # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_AUDIT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y -CONFIG_AUDIT=y CONFIG_NAMESPACES=y CONFIG_SCHED_AUTOGROUP=y CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_BZIP2=y -CONFIG_RD_LZMA=y -CONFIG_INITRAMFS_COMPRESSION_GZIP=y CONFIG_EXPERT=y -CONFIG_KALLSYMS_ALL=y # CONFIG_ELF_CORE is not set +CONFIG_KALLSYMS_ALL=y # CONFIG_PERF_EVENTS is not set # CONFIG_COMPAT_BRK is not set CONFIG_PROFILING=y +CONFIG_NLM_XLR_BOARD=y +CONFIG_HIGHMEM=y +CONFIG_SMP=y +CONFIG_KEXEC=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_DEBUG=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_PCI=y -CONFIG_PCI_MSI=y -CONFIG_PCI_DEBUG=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_ACORN_PARTITION=y +CONFIG_ACORN_PARTITION_ICS=y +CONFIG_ACORN_PARTITION_RISCIX=y +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ATARI_PARTITION=y +CONFIG_MAC_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_SGI_PARTITION=y +CONFIG_ULTRIX_PARTITION=y +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_SYSV68_PARTITION=y CONFIG_BINFMT_MISC=m -CONFIG_PM=y -CONFIG_PM_DEBUG=y +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -73,7 +86,6 @@ CONFIG_TCP_CONG_VENO=m CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=y CONFIG_INET6_AH=m CONFIG_INET6_ESP=m CONFIG_INET6_IPCOMP=m @@ -84,12 +96,10 @@ CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m CONFIG_IPV6_SIT=m CONFIG_IPV6_TUNNEL=m CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_NETLABEL=y CONFIG_NETFILTER=y CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=m CONFIG_NF_CONNTRACK_FTP=m CONFIG_NF_CONNTRACK_H323=m @@ -100,7 +110,6 @@ CONFIG_NF_CONNTRACK_SANE=m CONFIG_NF_CONNTRACK_SIP=m CONFIG_NF_CONNTRACK_TFTP=m CONFIG_NF_CT_NETLINK=m -CONFIG_NETFILTER_TPROXY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CONNMARK=m CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m @@ -160,19 +169,12 @@ CONFIG_IP_VS_DH=m CONFIG_IP_VS_SH=m CONFIG_IP_VS_SED=m CONFIG_IP_VS_NQ=m -CONFIG_IP_VS_FTP=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m @@ -182,8 +184,6 @@ CONFIG_IP_NF_SECURITY=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m -CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m CONFIG_IP6_NF_MATCH_FRAG=m @@ -219,7 +219,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_BRIDGE_EBT_NFLOG=m CONFIG_IP_DCCP=m CONFIG_RDS=m @@ -235,14 +234,12 @@ CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_DECNET=m CONFIG_LLC2=m -CONFIG_IPX=m CONFIG_ATALK=m CONFIG_DEV_APPLETALK=m CONFIG_IPDDP=m CONFIG_IPDDP_ENCAP=y CONFIG_X25=m CONFIG_LAPB=m -CONFIG_WAN_ROUTER=m CONFIG_PHONET=m CONFIG_IEEE802154=m CONFIG_NET_SCHED=y @@ -295,7 +292,6 @@ CONFIG_CONNECTOR=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=m -CONFIG_BLK_DEV_OSD=m CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=65536 CONFIG_CDROM_PKTCDVD=y @@ -307,7 +303,6 @@ CONFIG_CHR_DEV_OSST=m CONFIG_BLK_DEV_SR=y CONFIG_CHR_DEV_SG=y CONFIG_CHR_DEV_SCH=m -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y @@ -315,7 +310,6 @@ CONFIG_SCSI_SPI_ATTRS=m CONFIG_SCSI_SAS_LIBSAS=m CONFIG_SCSI_SRP_ATTRS=m CONFIG_ISCSI_TCP=m -CONFIG_LIBFCOE=m CONFIG_SCSI_DEBUG=m CONFIG_SCSI_DH=y CONFIG_SCSI_DH_RDAC=m @@ -327,7 +321,6 @@ CONFIG_SCSI_OSD_ULD=m CONFIG_NETDEVICES=y CONFIG_E1000E=y CONFIG_SKY2=y -# CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=m # CONFIG_INPUT_KEYBOARD is not set @@ -336,12 +329,9 @@ CONFIG_SERIO_SERPORT=m CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=m CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_DEVPTS_MULTIPLE_INSTANCES=y CONFIG_LEGACY_PTY_COUNT=0 CONFIG_SERIAL_NONSTANDARD=y CONFIG_N_HDLC=m -# CONFIG_DEVKMEM is not set -CONFIG_STALDRV=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=48 @@ -354,13 +344,12 @@ CONFIG_HW_RANDOM_TIMERIOMEM=m CONFIG_RAW_DRIVER=m CONFIG_I2C=y CONFIG_I2C_XLR=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1374=y # CONFIG_HWMON is not set # CONFIG_VGA_CONSOLE is not set # CONFIG_USB_SUPPORT is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1374=y CONFIG_UIO=y -CONFIG_UIO_PDRV=m CONFIG_UIO_PDRV_GENIRQ=m CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y @@ -369,11 +358,7 @@ CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y CONFIG_GFS2_FS=m -CONFIG_GFS2_FS_LOCKING_DLM=y CONFIG_OCFS2_FS=m CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y @@ -420,9 +405,8 @@ CONFIG_SYSV_FS=m CONFIG_UFS_FS=m CONFIG_EXOFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y +CONFIG_NFS_V4=m CONFIG_NFS_FSCACHE=y CONFIG_NFSD=m CONFIG_NFSD_V3_ACL=y @@ -433,35 +417,8 @@ CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_CIFS_DFS_UPCALL=y -CONFIG_NCP_FS=m -CONFIG_NCPFS_PACKET_SIGNING=y -CONFIG_NCPFS_IOCTL_LOCKING=y -CONFIG_NCPFS_STRONG=y -CONFIG_NCPFS_NFS_NS=y -CONFIG_NCPFS_OS2_NS=y -CONFIG_NCPFS_NLS=y -CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m CONFIG_AFS_FS=m -CONFIG_PARTITION_ADVANCED=y -CONFIG_ACORN_PARTITION=y -CONFIG_ACORN_PARTITION_ICS=y -CONFIG_ACORN_PARTITION_RISCIX=y -CONFIG_OSF_PARTITION=y -CONFIG_AMIGA_PARTITION=y -CONFIG_ATARI_PARTITION=y -CONFIG_MAC_PARTITION=y -CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_LDM_PARTITION=y -CONFIG_SGI_PARTITION=y -CONFIG_ULTRIX_PARTITION=y -CONFIG_SUN_PARTITION=y -CONFIG_KARMA_PARTITION=y -CONFIG_EFI_PARTITION=y -CONFIG_SYSV68_PARTITION=y CONFIG_NLS=y CONFIG_NLS_DEFAULT="cp437" CONFIG_NLS_CODEPAGE_437=m @@ -501,20 +458,7 @@ CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_UNUSED_SYMBOLS=y -CONFIG_DETECT_HUNG_TASK=y -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_SCHED_TRACER=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_KGDB=y CONFIG_SECURITY=y -CONFIG_SECURITY_NETWORK=y CONFIG_LSM_MMAP_MIN_ADDR=0 CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y @@ -522,10 +466,8 @@ CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 CONFIG_SECURITY_SELINUX_DISABLE=y CONFIG_SECURITY_SMACK=y CONFIG_SECURITY_TOMOYO=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_TEST=m -CONFIG_CRYPTO_CCM=m CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_CTS=m CONFIG_CRYPTO_LRW=m @@ -539,8 +481,6 @@ CONFIG_CRYPTO_RMD128=m CONFIG_CRYPTO_RMD160=m CONFIG_CRYPTO_RMD256=m CONFIG_CRYPTO_RMD320=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m @@ -556,5 +496,14 @@ CONFIG_CRYPTO_SERPENT=m CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m CONFIG_CRYPTO_LZO=m -CONFIG_CRC_CCITT=m CONFIG_CRC7=m +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_UNUSED_SYMBOLS=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_SCHEDSTATS=y +CONFIG_SCHED_TRACER=y +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_KGDB=y diff --git a/arch/mips/configs/omega2p_defconfig b/arch/mips/configs/omega2p_defconfig index e2731c3cc7e7..0649b8f06b7c 100644 --- a/arch/mips/configs/omega2p_defconfig +++ b/arch/mips/configs/omega2p_defconfig @@ -1,17 +1,9 @@ -CONFIG_RALINK=y -CONFIG_SOC_MT7620=y -CONFIG_DTB_OMEGA2P=y -CONFIG_CPU_MIPS32_R2=y -# CONFIG_COMPACTION is not set -CONFIG_HZ_100=y -CONFIG_PREEMPT=y -# CONFIG_SECCOMP is not set -CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -30,8 +22,16 @@ CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_RALINK=y +CONFIG_SOC_MT7620=y +CONFIG_DTB_OMEGA2P=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y # CONFIG_SUSPEND is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPACTION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -113,6 +113,10 @@ CONFIG_NLS_ISO8859_15=y CONFIG_NLS_KOI8_R=y CONFIG_NLS_KOI8_U=y CONFIG_NLS_UTF8=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRC16=y +CONFIG_XZ_DEC=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_INFO=y CONFIG_STRIP_ASM_SYMS=y @@ -123,7 +127,3 @@ CONFIG_PANIC_TIMEOUT=10 # CONFIG_DEBUG_PREEMPT is not set CONFIG_STACKTRACE=y # CONFIG_FTRACE is not set -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRC16=y -CONFIG_XZ_DEC=y diff --git a/arch/mips/configs/pic32mzda_defconfig b/arch/mips/configs/pic32mzda_defconfig index 41190c2036e6..63fe2da1b37f 100644 --- a/arch/mips/configs/pic32mzda_defconfig +++ b/arch/mips/configs/pic32mzda_defconfig @@ -1,11 +1,7 @@ -CONFIG_MACH_PIC32=y -CONFIG_DTB_PIC32_MZDA_SK=y -CONFIG_HZ_100=y -CONFIG_PREEMPT_VOLUNTARY=y -# CONFIG_SECCOMP is not set CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -14,6 +10,11 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EMBEDDED=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MACH_PIC32=y +CONFIG_DTB_PIC32_MZDA_SK=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +# CONFIG_SUSPEND is not set CONFIG_JUMP_LABEL=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y @@ -23,7 +24,6 @@ CONFIG_BLK_DEV_BSGLIB=y CONFIG_PARTITION_ADVANCED=y CONFIG_SGI_PARTITION=y CONFIG_BINFMT_MISC=m -# CONFIG_SUSPEND is not set CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_ALLOW_DEV_COREDUMP is not set diff --git a/arch/mips/configs/pistachio_defconfig b/arch/mips/configs/pistachio_defconfig index b22a3cf149b6..2f08d071ada6 100644 --- a/arch/mips/configs/pistachio_defconfig +++ b/arch/mips/configs/pistachio_defconfig @@ -1,23 +1,16 @@ -CONFIG_MACH_PISTACHIO=y -CONFIG_MIPS_MT_SMP=y -CONFIG_MIPS_CPS=y -# CONFIG_COMPACTION is not set -CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 -CONFIG_ZSMALLOC=y -CONFIG_NR_CPUS=4 -CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_DEFAULT_HOSTNAME="localhost" CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_IKCONFIG=m CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=18 CONFIG_CGROUPS=y -CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUP_FREEZER=y CONFIG_NAMESPACES=y CONFIG_USER_NS=y CONFIG_BLK_DEV_INITRD=y @@ -29,14 +22,20 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EMBEDDED=y # CONFIG_COMPAT_BRK is not set CONFIG_PROFILING=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_PARTITION_ADVANCED=y +CONFIG_MACH_PISTACHIO=y +CONFIG_MIPS_CPS=y +CONFIG_NR_CPUS=4 CONFIG_PM_DEBUG=y CONFIG_PM_ADVANCED_DEBUG=y CONFIG_CPU_IDLE=y # CONFIG_MIPS_CPS_CPUIDLE is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_PARTITION_ADVANCED=y +# CONFIG_COMPACTION is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ZSMALLOC=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -66,7 +65,6 @@ CONFIG_TCP_CONG_ADVANCED=y # CONFIG_TCP_CONG_HTCP is not set CONFIG_TCP_CONG_LP=m CONFIG_TCP_MD5SIG=y -CONFIG_IPV6=y CONFIG_INET6_AH=m CONFIG_INET6_ESP=m CONFIG_INET6_XFRM_MODE_TRANSPORT=m @@ -89,13 +87,11 @@ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y CONFIG_NETFILTER_XT_MATCH_DSCP=y CONFIG_NETFILTER_XT_MATCH_POLICY=y CONFIG_NETFILTER_XT_MATCH_STATE=y -CONFIG_NF_CONNTRACK_IPV4=y CONFIG_NF_NAT_IPV4=m CONFIG_IP_NF_IPTABLES=y CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y CONFIG_IP_NF_MANGLE=y -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_NF_NAT_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_IPV6HEADER=m @@ -167,15 +163,14 @@ CONFIG_USB_NET_SMSC95XX=m CONFIG_USB_NET_MCS7830=m # CONFIG_USB_NET_CDC_SUBSET is not set # CONFIG_USB_NET_ZAURUS is not set -CONFIG_LIBERTAS_THINFIRM=m -CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_MAC80211_HWSIM=m CONFIG_HOSTAP=m CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_LIBERTAS_THINFIRM=m CONFIG_RT2X00=m CONFIG_RT2800USB=m -# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_MAC80211_HWSIM=m +CONFIG_USB_NET_RNDIS_WLAN=m CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO=y @@ -183,7 +178,6 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_SERIO is not set # CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set CONFIG_SERIAL_8250_CONSOLE=y @@ -204,13 +198,10 @@ CONFIG_GPIO_SYSFS=y CONFIG_POWER_SUPPLY=y CONFIG_THERMAL=y CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_CORE=y CONFIG_IMGPDC_WDT=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y -CONFIG_MEDIA_SUPPORT=y CONFIG_RC_CORE=y -# CONFIG_RC_DECODERS is not set CONFIG_RC_DEVICES=y CONFIG_IR_IMG=y CONFIG_IR_IMG_NEC=y @@ -220,8 +211,7 @@ CONFIG_IR_IMG_SHARP=y CONFIG_IR_IMG_SANYO=y CONFIG_IR_IMG_RC5=y CONFIG_IR_IMG_RC6=y -# CONFIG_DVB_TUNER_DIB0070 is not set -# CONFIG_DVB_TUNER_DIB0090 is not set +CONFIG_MEDIA_SUPPORT=y CONFIG_FB=y CONFIG_FB_MODE_HELPERS=y CONFIG_BACKLIGHT_LCD_SUPPORT=y @@ -229,10 +219,10 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_SOUND=y CONFIG_SND=y -CONFIG_SND_SEQUENCER=m -CONFIG_SND_SEQ_DUMMY=m CONFIG_SND_HRTIMER=m CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m # CONFIG_SND_SPI is not set CONFIG_SND_USB_AUDIO=m CONFIG_USB=y @@ -300,27 +290,9 @@ CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_ASCII=m CONFIG_NLS_ISO8859_1=m -CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_INFO=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 -CONFIG_LOCKUP_DETECTOR=y -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -# CONFIG_SCHED_DEBUG is not set -CONFIG_SCHEDSTATS=y -CONFIG_TIMER_STATS=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_CREDENTIALS=y -CONFIG_FUNCTION_TRACER=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_LKDTM=y -CONFIG_TEST_UDELAY=m -CONFIG_KEYS=y CONFIG_SECURITY=y CONFIG_SECURITY_NETWORK=y CONFIG_SECURITY_YAMA=y -CONFIG_DEFAULT_SECURITY_DAC=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_SHA1=y @@ -328,9 +300,19 @@ CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set CONFIG_CRC_CCITT=y CONFIG_CRC_T10DIF=m CONFIG_CRC7=m -CONFIG_LIBCRC32C=m # CONFIG_XZ_DEC_X86 is not set +CONFIG_PRINTK_TIME=y +CONFIG_DEBUG_INFO=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_CREDENTIALS=y +CONFIG_FUNCTION_TRACER=y +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_LKDTM=y +CONFIG_TEST_UDELAY=m diff --git a/arch/mips/configs/pnx8335_stb225_defconfig b/arch/mips/configs/pnx8335_stb225_defconfig index e73cdb08fc6e..aa0b169800e0 100644 --- a/arch/mips/configs/pnx8335_stb225_defconfig +++ b/arch/mips/configs/pnx8335_stb225_defconfig @@ -1,23 +1,21 @@ -CONFIG_NXP_STB225=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_128=y -CONFIG_PREEMPT_VOLUNTARY=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set # CONFIG_SWAP is not set CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_EXPERT=y CONFIG_SLAB=y +CONFIG_NXP_STB225=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_HZ_128=y +# CONFIG_SECCOMP is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_CFQ is not set -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -42,17 +40,14 @@ CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_LOWLEVEL is not set CONFIG_ATA=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=m CONFIG_INPUT_EVBUG=m # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_VT_CONSOLE is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_PNX8XXX=y CONFIG_SERIAL_PNX8XXX_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y @@ -61,12 +56,9 @@ CONFIG_FB=y # CONFIG_VGA_CONSOLE is not set CONFIG_SOUND=m CONFIG_SND=m -CONFIG_SND_SEQUENCER=m -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_SEQUENCER_OSS=y CONFIG_SND_VERBOSE_PRINTK=y CONFIG_SND_DEBUG=y +CONFIG_SND_SEQUENCER=m CONFIG_EXT2_FS=m # CONFIG_DNOTIFY is not set CONFIG_MSDOS_FS=m @@ -75,7 +67,6 @@ CONFIG_TMPFS=y CONFIG_JFFS2_FS=y CONFIG_CRAMFS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NFSD=m CONFIG_NFSD_V3=y diff --git a/arch/mips/configs/qi_lb60_defconfig b/arch/mips/configs/qi_lb60_defconfig index d8b7211a7b0f..7671fe6a8042 100644 --- a/arch/mips/configs/qi_lb60_defconfig +++ b/arch/mips/configs/qi_lb60_defconfig @@ -1,11 +1,7 @@ -CONFIG_MACH_INGENIC=y -# CONFIG_COMPACTION is not set -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_HZ_100=y -CONFIG_PREEMPT=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y +# CONFIG_CROSS_MEMORY_ATTACH is not set +CONFIG_PREEMPT=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS_ALL=y @@ -13,6 +9,9 @@ CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_MACH_INGENIC=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set @@ -20,6 +19,7 @@ CONFIG_PARTITION_ADVANCED=y # CONFIG_EFI_PARTITION is not set # CONFIG_IOSCHED_CFQ is not set # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPACTION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -49,7 +49,6 @@ CONFIG_MTD_NAND_JZ4740=y CONFIG_MTD_UBI=y CONFIG_NETDEVICES=y # CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO=y @@ -58,7 +57,6 @@ CONFIG_KEYBOARD_MATRIX=y CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set CONFIG_LEGACY_PTY_COUNT=2 -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_SERIAL_8250_DMA is not set @@ -109,7 +107,6 @@ CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_ETH=y # CONFIG_USB_ETH_RNDIS is not set CONFIG_MMC=y -# CONFIG_MMC_BLOCK_BOUNCE is not set CONFIG_MMC_JZ4740=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_JZ4740=y @@ -119,8 +116,6 @@ CONFIG_PWM=y CONFIG_PWM_JZ4740=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -# CONFIG_EXT3_FS_XATTR is not set # CONFIG_DNOTIFY is not set CONFIG_VFAT_FS=y CONFIG_PROC_KCORE=y @@ -171,6 +166,8 @@ CONFIG_NLS_ISO8859_15=y CONFIG_NLS_KOI8_R=y CONFIG_NLS_KOI8_U=y CONFIG_NLS_UTF8=y +CONFIG_FONTS=y +CONFIG_FONT_SUN8x16=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_INFO=y CONFIG_STRIP_ASM_SYMS=y @@ -181,7 +178,3 @@ CONFIG_DEBUG_STACKOVERFLOW=y CONFIG_PANIC_ON_OOPS=y # CONFIG_FTRACE is not set CONFIG_KGDB=y -CONFIG_RUNTIME_DEBUG=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_FONTS=y -CONFIG_FONT_SUN8x16=y diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig index 6fa56c6e53f5..7befe05fd813 100644 --- a/arch/mips/configs/rb532_defconfig +++ b/arch/mips/configs/rb532_defconfig @@ -1,29 +1,30 @@ -CONFIG_MIKROTIK_RB532=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_100=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_BSD_PROCESS_ACCT=y -CONFIG_TINY_RCU=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -# CONFIG_KALLSYMS is not set # CONFIG_ELF_CORE is not set +# CONFIG_KALLSYMS is not set # CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_PCI_QUIRKS is not set CONFIG_SLAB=y +CONFIG_MIKROTIK_RB532=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y +# CONFIG_PCI_QUIRKS is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_BSD_DISKLABEL=y # CONFIG_IOSCHED_CFQ is not set -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -33,7 +34,6 @@ CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_ARPD=y CONFIG_SYN_COOKIES=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set @@ -70,13 +70,9 @@ CONFIG_NETFILTER_XT_MATCH_REALM=m CONFIG_NETFILTER_XT_MATCH_SCTP=m CONFIG_NETFILTER_XT_MATCH_STATE=y CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NF_CONNTRACK_IPV4=y CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y -CONFIG_NF_NAT=y -CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_IP_NF_MANGLE=y CONFIG_IP_NF_RAW=m CONFIG_BRIDGE=y @@ -122,31 +118,27 @@ CONFIG_ATA=y CONFIG_PATA_RB532=y CONFIG_NETDEVICES=y CONFIG_IFB=m -CONFIG_NET_ETHERNET=y CONFIG_KORINA=y -CONFIG_NET_PCI=y CONFIG_VIA_RHINE=y -CONFIG_ATMEL=m CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP_DEFLATE=m CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MULTILINK=y CONFIG_PPPOE=m -# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_PPP_ASYNC=m # CONFIG_KEYBOARD_ATKBD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_RB532_BUTTON=y # CONFIG_SERIO is not set # CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_SERIAL_8250_PCI is not set CONFIG_SERIAL_8250_NR_UARTS=2 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 -# CONFIG_LEGACY_PTYS is not set CONFIG_HW_RANDOM=y CONFIG_GPIO_SYSFS=y # CONFIG_HWMON is not set @@ -171,13 +163,8 @@ CONFIG_JFFS2_FS=y CONFIG_JFFS2_SUMMARY=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_SQUASHFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_MAC_PARTITION=y -CONFIG_BSD_DISKLABEL=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_STRIP_ASM_SYMS=y -CONFIG_CRYPTO=y CONFIG_CRYPTO_TEST=m # CONFIG_CRYPTO_HW is not set CONFIG_CRC16=m -CONFIG_LIBCRC32C=m +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_STRIP_ASM_SYMS=y diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig index fb195e29e449..50a2c9ad583f 100644 --- a/arch/mips/configs/rbtx49xx_defconfig +++ b/arch/mips/configs/rbtx49xx_defconfig @@ -1,27 +1,24 @@ -CONFIG_MACH_TX49XX=y -CONFIG_TOSHIBA_RBTX4927=y -CONFIG_TOSHIBA_RBTX4938=y -CONFIG_TOSHIBA_RBTX4939=y -CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP=y +CONFIG_SYSVIPC=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y -# CONFIG_SECCOMP is not set -CONFIG_SYSVIPC=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -# CONFIG_HOTPLUG is not set -# CONFIG_PCSPKR_PLATFORM is not set # CONFIG_EPOLL is not set CONFIG_SLAB=y +CONFIG_MACH_TX49XX=y +CONFIG_TOSHIBA_RBTX4927=y +CONFIG_TOSHIBA_RBTX4938=y +CONFIG_TOSHIBA_RBTX4939=y +CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_LBDAF is not set # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -52,10 +49,8 @@ CONFIG_IDE=y CONFIG_BLK_DEV_IDE_TX4938=y CONFIG_BLK_DEV_IDE_TX4939=y CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_SMC91X=y CONFIG_NE2000=y -CONFIG_NET_PCI=y +CONFIG_SMC91X=y CONFIG_TC35815=y # CONFIG_WLAN is not set # CONFIG_INPUT is not set @@ -99,7 +94,6 @@ CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_JFFS2_FS=m CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_STRIP_ASM_SYMS=y CONFIG_DEBUG_FS=y diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index 5f71aa598b06..0f4b09f8a0ee 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -1,24 +1,23 @@ -CONFIG_SNI_RM=y -CONFIG_CPU_LITTLE_ENDIAN=y -CONFIG_ARC_CONSOLE=y -CONFIG_HZ_1000=y -CONFIG_PREEMPT_VOLUNTARY=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_PREEMPT_VOLUNTARY=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_RELAY=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y +CONFIG_SNI_RM=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_ARC_CONSOLE=y +CONFIG_HZ_1000=y +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y -CONFIG_PCI=y +CONFIG_PARTITION_ADVANCED=y CONFIG_BINFMT_MISC=m -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=m CONFIG_UNIX=y @@ -27,8 +26,6 @@ CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m -CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y @@ -48,7 +45,6 @@ CONFIG_IPV6_MULTIPLE_TABLES=y CONFIG_IPV6_SUBTREES=y CONFIG_NETWORK_SECMARK=y CONFIG_NETFILTER=y -CONFIG_NETFILTER_NETLINK_QUEUE=m CONFIG_NF_CONNTRACK=m CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_EVENTS=y @@ -92,20 +88,12 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m CONFIG_NETFILTER_XT_MATCH_STATISTIC=m CONFIG_NETFILTER_XT_MATCH_STRING=m CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_ADDRTYPE=m CONFIG_IP_NF_MATCH_AH=m CONFIG_IP_NF_MATCH_ECN=m CONFIG_IP_NF_MATCH_TTL=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_NF_NAT=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_NETMAP=m -CONFIG_IP_NF_TARGET_REDIRECT=m -CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_IP_NF_MANGLE=m CONFIG_IP_NF_TARGET_CLUSTERIP=m CONFIG_IP_NF_TARGET_ECN=m @@ -114,7 +102,6 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m -CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m CONFIG_IP6_NF_MATCH_EUI64=m @@ -149,7 +136,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m CONFIG_BRIDGE_EBT_REDIRECT=m CONFIG_BRIDGE_EBT_SNAT=m CONFIG_BRIDGE_EBT_LOG=m -CONFIG_BRIDGE_EBT_ULOG=m CONFIG_BRIDGE=m CONFIG_DECNET=m CONFIG_NET_SCHED=y @@ -222,7 +208,6 @@ CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_FC_ATTRS=y -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set CONFIG_ISCSI_TCP=m CONFIG_SCSI_AIC94XX=m # CONFIG_AIC94XX_DEBUG is not set @@ -247,34 +232,30 @@ CONFIG_DM_MIRROR=m CONFIG_DM_ZERO=m CONFIG_DM_MULTIPATH=m CONFIG_NETDEVICES=y -CONFIG_DUMMY=m CONFIG_BONDING=m +CONFIG_DUMMY=m CONFIG_EQUALIZER=m CONFIG_TUN=m -CONFIG_PHYLIB=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_NET_ISA=y -CONFIG_NE2000=m -CONFIG_NET_PCI=y CONFIG_PCNET32=y -CONFIG_VIA_VELOCITY=m -CONFIG_QLA3XXX=m CONFIG_CHELSIO_T3=m +CONFIG_NE2000=m +CONFIG_QLA3XXX=m CONFIG_NETXEN_NIC=m +CONFIG_VIA_VELOCITY=m +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m +CONFIG_PLIP=m CONFIG_USB_CATC=m CONFIG_USB_KAWETH=m CONFIG_USB_PEGASUS=m CONFIG_USB_RTL8150=m CONFIG_USB_USBNET=m # CONFIG_USB_NET_CDC_SUBSET is not set -CONFIG_PLIP=m CONFIG_INPUT_FF_MEMLESS=m CONFIG_SERIO_PARKBD=m CONFIG_SERIO_RAW=m @@ -329,7 +310,6 @@ CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m CONFIG_USB_SERIAL_PL2303=m -CONFIG_USB_SERIAL_HP4X=m CONFIG_USB_SERIAL_SAFE=m CONFIG_USB_SERIAL_SAFE_PADDED=y CONFIG_USB_SERIAL_CYBERJACK=m @@ -377,25 +357,11 @@ CONFIG_ROMFS_FS=m CONFIG_SYSV_FS=m CONFIG_UFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFSD=m CONFIG_NFSD_V3=y -CONFIG_RPCSEC_GSS_KRB5=m -CONFIG_RPCSEC_GSS_SPKM3=m -CONFIG_SMB_FS=m CONFIG_CIFS=m -CONFIG_NCP_FS=m -CONFIG_NCPFS_PACKET_SIGNING=y -CONFIG_NCPFS_IOCTL_LOCKING=y -CONFIG_NCPFS_STRONG=y -CONFIG_NCPFS_NFS_NS=y -CONFIG_NCPFS_OS2_NS=y -CONFIG_NCPFS_SMALLDOS=y -CONFIG_NCPFS_NLS=y -CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m CONFIG_AFS_FS=m -CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_CODEPAGE_437=m CONFIG_NLS_CODEPAGE_737=m CONFIG_NLS_CODEPAGE_775=m @@ -434,21 +400,14 @@ CONFIG_NLS_ISO8859_15=m CONFIG_NLS_KOI8_R=m CONFIG_NLS_KOI8_U=m CONFIG_NLS_UTF8=m -CONFIG_DLM=m -CONFIG_CRYPTO_NULL=m -CONFIG_CRYPTO_ECB=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m -CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAST6=m diff --git a/arch/mips/configs/rt305x_defconfig b/arch/mips/configs/rt305x_defconfig index dbe6a4639d05..0392e38010e6 100644 --- a/arch/mips/configs/rt305x_defconfig +++ b/arch/mips/configs/rt305x_defconfig @@ -1,32 +1,29 @@ -CONFIG_RALINK=y -CONFIG_DTB_RT305X_EVAL=y -CONFIG_CPU_MIPS32_R2=y -# CONFIG_COMPACTION is not set -# CONFIG_CROSS_MEMORY_ATTACH is not set -CONFIG_HZ_100=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y +# CONFIG_CROSS_MEMORY_ATTACH is not set CONFIG_HIGH_RES_TIMERS=y CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INITRAMFS_ROOT_UID=1000 -CONFIG_INITRAMFS_ROOT_GID=1000 # CONFIG_RD_GZIP is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_KALLSYMS_ALL=y # CONFIG_AIO is not set +CONFIG_KALLSYMS_ALL=y CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set +CONFIG_RALINK=y +CONFIG_DTB_RT305X_EVAL=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +# CONFIG_SUSPEND is not set CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y # CONFIG_IOSCHED_CFQ is not set # CONFIG_COREDUMP is not set -# CONFIG_SUSPEND is not set +# CONFIG_COMPACTION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -38,7 +35,6 @@ CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_MROUTE=y CONFIG_IP_MROUTE_MULTIPLE_TABLES=y -CONFIG_ARPD=y CONFIG_SYN_COOKIES=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set @@ -63,8 +59,6 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NF_CONNTRACK_IPV4=m -# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m @@ -100,14 +94,12 @@ CONFIG_PPP_ASYNC=m CONFIG_ISDN=y CONFIG_INPUT=m CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_KEYBOARD_ATKBD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set # CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_RUNTIME_UARTS=2 @@ -142,17 +134,7 @@ CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_SQUASHFS=y # CONFIG_SQUASHFS_ZLIB is not set CONFIG_SQUASHFS_XZ=y -CONFIG_PRINTK_TIME=y -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_STRIP_ASM_SYMS=y -CONFIG_DEBUG_FS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_FTRACE is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CRYPTO_MANAGER=m CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_ANSI_CPRNG is not set CONFIG_CRC_ITU_T=m CONFIG_CRC32_SARWATE=y # CONFIG_XZ_DEC_X86 is not set @@ -161,4 +143,11 @@ CONFIG_CRC32_SARWATE=y # CONFIG_XZ_DEC_ARM is not set # CONFIG_XZ_DEC_ARMTHUMB is not set # CONFIG_XZ_DEC_SPARC is not set -CONFIG_AVERAGE=y +CONFIG_PRINTK_TIME=y +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_STRIP_ASM_SYMS=y +CONFIG_DEBUG_FS=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_FTRACE is not set +CONFIG_CMDLINE_BOOL=y diff --git a/arch/mips/configs/sb1250_swarm_defconfig b/arch/mips/configs/sb1250_swarm_defconfig index 1edd8430ad61..ad8981666ee4 100644 --- a/arch/mips/configs/sb1250_swarm_defconfig +++ b/arch/mips/configs/sb1250_swarm_defconfig @@ -1,30 +1,29 @@ -CONFIG_SIBYTE_SWARM=y -CONFIG_CPU_SB1_PASS_2_2=y -CONFIG_64BIT=y -CONFIG_SMP=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_HZ_1000=y CONFIG_SYSVIPC=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_LOG_BUF_SHIFT=15 CONFIG_CGROUPS=y CONFIG_CPUSETS=y # CONFIG_PROC_PID_CPUSET is not set CONFIG_CGROUP_CPUACCT=y -CONFIG_RELAY=y CONFIG_NAMESPACES=y +CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y +CONFIG_SIBYTE_SWARM=y +CONFIG_CPU_SB1_PASS_2_2=y +CONFIG_64BIT=y +CONFIG_SMP=y +CONFIG_NR_CPUS=2 +CONFIG_HZ_1000=y +CONFIG_PCI=y +CONFIG_MIPS32_O32=y +CONFIG_PM=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_PCI=y -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_O32=y -CONFIG_PM=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -43,8 +42,6 @@ CONFIG_TCP_MD5SIG=y CONFIG_NETWORK_SECMARK=y CONFIG_CFG80211=m CONFIG_MAC80211=m -CONFIG_MAC80211_RC_PID=y -CONFIG_MAC80211_RC_DEFAULT_PID=y CONFIG_RFKILL=m CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_FW_LOADER=m @@ -60,10 +57,8 @@ CONFIG_BLK_DEV_IDETAPE=y CONFIG_RAID_ATTRS=m CONFIG_NETDEVICES=y CONFIG_MACVLAN=m -CONFIG_BROADCOM_PHY=y -CONFIG_NET_ETHERNET=y -CONFIG_MII=y CONFIG_SB1250_MAC=y +CONFIG_BROADCOM_PHY=y # CONFIG_INPUT is not set CONFIG_SERIO_RAW=m # CONFIG_VT is not set @@ -81,15 +76,9 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y -CONFIG_DLM=m -CONFIG_KEYS=y -CONFIG_CRYPTO_NULL=m CONFIG_CRYPTO_CRYPTD=m CONFIG_CRYPTO_AUTHENC=m -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m CONFIG_CRYPTO_CBC=m CONFIG_CRYPTO_LRW=m CONFIG_CRYPTO_PCBC=m @@ -98,7 +87,6 @@ CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_XCBC=m CONFIG_CRYPTO_MD4=m CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m CONFIG_CRYPTO_TGR192=m CONFIG_CRYPTO_WP512=m diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig index 4041597e3170..f0a11a72307e 100644 --- a/arch/mips/configs/tb0219_defconfig +++ b/arch/mips/configs/tb0219_defconfig @@ -1,12 +1,9 @@ -CONFIG_MACH_VR41XX=y -CONFIG_TANBAC_TB0219=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_PCSPKR_PLATFORM is not set CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y +CONFIG_TANBAC_TB0219=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -25,7 +22,6 @@ CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_PNP=y CONFIG_IP_PNP_BOOTP=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m CONFIG_SYN_COOKIES=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set @@ -33,33 +29,26 @@ CONFIG_SYN_COOKIES=y # CONFIG_IPV6 is not set CONFIG_NETWORK_SECMARK=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_FW_LOADER=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_XIP=y CONFIG_NETDEVICES=y -CONFIG_PHYLIB=m -CONFIG_MARVELL_PHY=m -CONFIG_DAVICOM_PHY=m -CONFIG_QSEMI_PHY=m -CONFIG_LXT_PHY=m -CONFIG_CICADA_PHY=m -CONFIG_VITESSE_PHY=m -CONFIG_SMSC_PHY=m -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y CONFIG_8139TOO=y +CONFIG_R8169=y CONFIG_VIA_RHINE=y CONFIG_VIA_RHINE_MMIO=y -CONFIG_R8169=y CONFIG_VIA_VELOCITY=y -# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_CICADA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_LXT_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_VITESSE_PHY=m # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_VR41XX=y CONFIG_SERIAL_VR41XX_CONSOLE=y # CONFIG_HW_RANDOM is not set @@ -82,7 +71,6 @@ CONFIG_TMPFS_POSIX_ACL=y CONFIG_CRAMFS=m CONFIG_ROMFS_FS=m CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NFSD=y CONFIG_NFSD_V3=y diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig index 565f0441c50d..025e45656359 100644 --- a/arch/mips/configs/tb0226_defconfig +++ b/arch/mips/configs/tb0226_defconfig @@ -1,18 +1,14 @@ -CONFIG_MACH_VR41XX=y -CONFIG_TANBAC_TB0226=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_PCSPKR_PLATFORM is not set CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y +CONFIG_TANBAC_TB0226=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y -# CONFIG_BLK_DEV_BSG is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -34,28 +30,21 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_XIP=y CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y -CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SAS_LIBSAS=m -# CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y CONFIG_E100=y CONFIG_USB_CATC=m CONFIG_USB_KAWETH=m CONFIG_USB_PEGASUS=m CONFIG_USB_RTL8150=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_VR41XX=y CONFIG_SERIAL_VR41XX_CONSOLE=y # CONFIG_HW_RANDOM is not set @@ -77,10 +66,8 @@ CONFIG_TMPFS_POSIX_ACL=y CONFIG_CRAMFS=m CONFIG_ROMFS_FS=m CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NFSD=m CONFIG_NFSD_V3=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="cca=3 mem=32M console=ttyVR0,115200" -CONFIG_CRC32=m diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig index a702be602fb9..68490248e3f1 100644 --- a/arch/mips/configs/tb0287_defconfig +++ b/arch/mips/configs/tb0287_defconfig @@ -1,12 +1,8 @@ -CONFIG_MACH_VR41XX=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y -# CONFIG_SYSCTL_SYSCALL is not set -# CONFIG_PCSPKR_PLATFORM is not set CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y @@ -25,7 +21,6 @@ CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_PNP=y CONFIG_IP_PNP_BOOTP=y CONFIG_NET_IPIP=m -CONFIG_NET_IPGRE=m CONFIG_SYN_COOKIES=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set @@ -36,36 +31,23 @@ CONFIG_TCP_CONG_CUBIC=m # CONFIG_IPV6 is not set CONFIG_NETWORK_SECMARK=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_FW_LOADER=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_XIP=y CONFIG_BLK_DEV_SD=y CONFIG_SCSI_SCAN_ASYNC=y # CONFIG_SCSI_LOWLEVEL is not set CONFIG_ATA=y CONFIG_PATA_SIL680=y -CONFIG_IEEE1394=m -CONFIG_IEEE1394_OHCI1394=m -CONFIG_IEEE1394_SBP2=m -CONFIG_IEEE1394_ETH1394=m -CONFIG_IEEE1394_RAWIO=m -CONFIG_IEEE1394_VIDEO1394=m -CONFIG_IEEE1394_DV1394=m CONFIG_NETDEVICES=y -CONFIG_NET_ETHERNET=y -CONFIG_NET_PCI=y CONFIG_8139TOO=y +CONFIG_R8169=y CONFIG_VIA_RHINE=y CONFIG_VIA_RHINE_MMIO=y -CONFIG_R8169=y CONFIG_VIA_VELOCITY=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_VR41XX=y CONFIG_SERIAL_VR41XX_CONSOLE=y # CONFIG_HW_RANDOM is not set @@ -76,9 +58,6 @@ CONFIG_FB=y CONFIG_FB_SM501=y # CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FONTS=y -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y CONFIG_USB=m CONFIG_USB_MON=m CONFIG_USB_EHCI_HCD=m @@ -97,9 +76,11 @@ CONFIG_TMPFS_POSIX_ACL=y CONFIG_CRAMFS=m CONFIG_ROMFS_FS=m CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NFSD=m CONFIG_NFSD_V3=y +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="cca=3 mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" diff --git a/arch/mips/configs/vocore2_defconfig b/arch/mips/configs/vocore2_defconfig index 9121e4194a63..ded3dce911d5 100644 --- a/arch/mips/configs/vocore2_defconfig +++ b/arch/mips/configs/vocore2_defconfig @@ -1,17 +1,9 @@ -CONFIG_RALINK=y -CONFIG_SOC_MT7620=y -CONFIG_DTB_VOCORE2=y -CONFIG_CPU_MIPS32_R2=y -# CONFIG_COMPACTION is not set -CONFIG_HZ_100=y -CONFIG_PREEMPT=y -# CONFIG_SECCOMP is not set -CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ_IDLE=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -30,8 +22,16 @@ CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_RALINK=y +CONFIG_SOC_MT7620=y +CONFIG_DTB_VOCORE2=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y # CONFIG_SUSPEND is not set +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_COMPACTION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -113,6 +113,10 @@ CONFIG_NLS_ISO8859_15=y CONFIG_NLS_KOI8_R=y CONFIG_NLS_KOI8_U=y CONFIG_NLS_UTF8=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRC16=y +CONFIG_XZ_DEC=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_INFO=y CONFIG_STRIP_ASM_SYMS=y @@ -123,7 +127,3 @@ CONFIG_PANIC_TIMEOUT=10 # CONFIG_DEBUG_PREEMPT is not set CONFIG_STACKTRACE=y # CONFIG_FTRACE is not set -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRC16=y -CONFIG_XZ_DEC=y diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig index a84eac409c9c..891a5f77305d 100644 --- a/arch/mips/configs/workpad_defconfig +++ b/arch/mips/configs/workpad_defconfig @@ -1,18 +1,17 @@ -CONFIG_MACH_VR41XX=y -CONFIG_IBM_WORKPAD=y CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_EXPERT=y CONFIG_SLAB=y +CONFIG_MACH_VR41XX=y +CONFIG_IBM_WORKPAD=y +CONFIG_PCCARD=y +CONFIG_PCMCIA_VRC4171=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set -CONFIG_PCCARD=y -CONFIG_PCMCIA_VRC4171=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -31,16 +30,14 @@ CONFIG_IDE=y CONFIG_BLK_DEV_IDECS=m CONFIG_IDE_GENERIC=y CONFIG_NETDEVICES=y -CONFIG_NET_PCMCIA=y -CONFIG_PCMCIA_3C589=m CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_NMCLAN=m CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_AXNET=m CONFIG_PCMCIA_PCNET=m -CONFIG_PCMCIA_NMCLAN=m CONFIG_PCMCIA_SMC91C92=m CONFIG_PCMCIA_XIRC2PS=m -CONFIG_PCMCIA_AXNET=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set @@ -62,7 +59,6 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NFSD=m CONFIG_NFSD_V3=y CONFIG_CMDLINE_BOOL=y diff --git a/arch/mips/configs/xway_defconfig b/arch/mips/configs/xway_defconfig index fa750d501c11..c3cac29e8414 100644 --- a/arch/mips/configs/xway_defconfig +++ b/arch/mips/configs/xway_defconfig @@ -1,13 +1,3 @@ -CONFIG_LANTIQ=y -CONFIG_PCI_LANTIQ=y -CONFIG_XRX200_PHY_FW=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_MIPS_MT_SMP=y -CONFIG_MIPS_VPE_LOADER=y -# CONFIG_COMPACTION is not set -CONFIG_NR_CPUS=2 -CONFIG_HZ_100=y -# CONFIG_SECCOMP is not set # CONFIG_LOCALVERSION_AUTO is not set CONFIG_SYSVIPC=y # CONFIG_CROSS_MEMORY_ATTACH is not set @@ -15,19 +5,28 @@ CONFIG_HIGH_RES_TIMERS=y CONFIG_BLK_DEV_INITRD=y # CONFIG_RD_GZIP is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_KALLSYMS_ALL=y # CONFIG_AIO is not set +CONFIG_KALLSYMS_ALL=y CONFIG_EMBEDDED=y # CONFIG_VM_EVENT_COUNTERS is not set # CONFIG_SLUB_DEBUG is not set # CONFIG_COMPAT_BRK is not set +CONFIG_LANTIQ=y +CONFIG_PCI_LANTIQ=y +CONFIG_XRX200_PHY_FW=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_MIPS_VPE_LOADER=y +CONFIG_NR_CPUS=2 +CONFIG_HZ_100=y +# CONFIG_SECCOMP is not set +CONFIG_PCI=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y # CONFIG_IOSCHED_CFQ is not set -CONFIG_PCI=y # CONFIG_COREDUMP is not set +# CONFIG_COMPACTION is not set CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -63,7 +62,6 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NF_CONNTRACK_IPV4=m CONFIG_IP_NF_IPTABLES=m CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m @@ -102,14 +100,12 @@ CONFIG_PPP_ASYNC=m CONFIG_ISDN=y CONFIG_INPUT=m CONFIG_INPUT_POLLDEV=m -# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_KEYBOARD_ATKBD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y # CONFIG_SERIO is not set # CONFIG_VT is not set # CONFIG_LEGACY_PTYS is not set -# CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_RUNTIME_UARTS=2 @@ -150,6 +146,9 @@ CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_SQUASHFS=y # CONFIG_SQUASHFS_ZLIB is not set CONFIG_SQUASHFS_XZ=y +CONFIG_CRYPTO_ARC4=m +CONFIG_CRC_ITU_T=m +CONFIG_CRC32_SARWATE=y CONFIG_PRINTK_TIME=y # CONFIG_ENABLE_MUST_CHECK is not set CONFIG_STRIP_ASM_SYMS=y @@ -158,6 +157,3 @@ CONFIG_MAGIC_SYSRQ=y # CONFIG_SCHED_DEBUG is not set # CONFIG_FTRACE is not set CONFIG_CMDLINE_BOOL=y -CONFIG_CRYPTO_ARC4=m -CONFIG_CRC_ITU_T=m -CONFIG_CRC32_SARWATE=y diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild index 9a81e72119da..f15d5db5dd67 100644 --- a/arch/mips/include/asm/Kbuild +++ b/arch/mips/include/asm/Kbuild @@ -1,4 +1,8 @@ # MIPS headers +generated-y += syscall_table_32_o32.h +generated-y += syscall_table_64_n32.h +generated-y += syscall_table_64_n64.h +generated-y += syscall_table_64_o32.h generic-(CONFIG_GENERIC_CSUM) += checksum.h generic-y += current.h generic-y += device.h diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index d4ea7a5b60cf..e8fbfd419151 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -59,12 +59,13 @@ static __inline__ void atomic_##op(int i, atomic_t * v) \ int temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: ll %0, %1 # atomic_" #op " \n" \ " " #asm_op " %0, %2 \n" \ " sc %0, %1 \n" \ "\t" __scbeqz " %0, 1b \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ } else { \ @@ -85,13 +86,14 @@ static __inline__ int atomic_##op##_return_relaxed(int i, atomic_t * v) \ int temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: ll %1, %2 # atomic_" #op "_return \n" \ " " #asm_op " %0, %1, %3 \n" \ " sc %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ " " #asm_op " %0, %1, %3 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ @@ -117,12 +119,13 @@ static __inline__ int atomic_fetch_##op##_relaxed(int i, atomic_t * v) \ int temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: ll %1, %2 # atomic_fetch_" #op " \n" \ " " #asm_op " %0, %1, %3 \n" \ " sc %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " move %0, %1 \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ @@ -188,17 +191,19 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) int temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_LEVEL" \n" "1: ll %1, %2 # atomic_sub_if_positive\n" - " .set mips0 \n" + " .set pop \n" " subu %0, %1, %3 \n" " move %1, %0 \n" " bltz %0, 1f \n" + " .set push \n" " .set "MIPS_ISA_LEVEL" \n" " sc %1, %2 \n" "\t" __scbeqz " %1, 1b \n" "1: \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) : "Ir" (i)); @@ -252,12 +257,13 @@ static __inline__ void atomic64_##op(long i, atomic64_t * v) \ long temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: lld %0, %1 # atomic64_" #op " \n" \ " " #asm_op " %0, %2 \n" \ " scd %0, %1 \n" \ "\t" __scbeqz " %0, 1b \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ } else { \ @@ -278,13 +284,14 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v) \ long temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: lld %1, %2 # atomic64_" #op "_return\n" \ " " #asm_op " %0, %1, %3 \n" \ " scd %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ " " #asm_op " %0, %1, %3 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ @@ -310,13 +317,14 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \ long temp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ "1: lld %1, %2 # atomic64_fetch_" #op "\n" \ " " #asm_op " %0, %1, %3 \n" \ " scd %0, %2 \n" \ "\t" __scbeqz " %0, 1b \n" \ " move %0, %1 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ : "=&r" (result), "=&r" (temp), \ "+" GCC_OFF_SMALL_ASM() (v->counter) \ : "Ir" (i)); \ @@ -382,6 +390,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) long temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_LEVEL" \n" "1: lld %1, %2 # atomic64_sub_if_positive\n" " dsubu %0, %1, %3 \n" @@ -390,7 +399,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) " scd %1, %2 \n" "\t" __scbeqz " %1, 1b \n" "1: \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) : "Ir" (i)); diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index da1b8718861e..f2a840fb6a9a 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -58,12 +58,13 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit), GCC_OFF_SMALL_ASM() (*m)); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) @@ -80,11 +81,12 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } else if (kernel_uses_llsc) { do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # set_bit \n" " or %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } while (unlikely(!temp)); @@ -110,12 +112,13 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (~(1UL << bit))); #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) @@ -132,11 +135,12 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) } else if (kernel_uses_llsc) { do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # clear_bit \n" " and %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (~(1UL << bit))); } while (unlikely(!temp)); @@ -176,12 +180,13 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" " " __SC "%0, %1 \n" " beqzl %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } else if (kernel_uses_llsc) { @@ -190,11 +195,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # change_bit \n" " xor %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m) : "ir" (1UL << bit)); } while (unlikely(!temp)); @@ -223,13 +229,14 @@ static inline int test_and_set_bit(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -239,11 +246,12 @@ static inline int test_and_set_bit(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -277,13 +285,14 @@ static inline int test_and_set_bit_lock(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -293,11 +302,12 @@ static inline int test_and_set_bit_lock(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_set_bit \n" " or %2, %0, %3 \n" " " __SC "%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -332,6 +342,7 @@ static inline int test_and_clear_bit(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" @@ -339,7 +350,7 @@ static inline int test_and_clear_bit(unsigned long nr, " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -365,12 +376,13 @@ static inline int test_and_clear_bit(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_clear_bit \n" " or %2, %0, %3 \n" " xor %2, %3 \n" " " __SC "%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -406,13 +418,14 @@ static inline int test_and_change_bit(unsigned long nr, unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1: " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" " " __SC "%2, %1 \n" " beqzl %2, 1b \n" " and %2, %0, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); @@ -422,11 +435,12 @@ static inline int test_and_change_bit(unsigned long nr, do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 # test_and_change_bit \n" " xor %2, %0, %3 \n" " " __SC "\t%2, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "r" (1UL << bit) : "memory"); diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 89e9fb7976fe..638de0c25249 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h @@ -47,9 +47,10 @@ extern unsigned long __xchg_called_with_bad_pointer(void) __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set " MIPS_ISA_ARCH_LEVEL " \n" \ "1: " ld " %0, %2 # __xchg_asm \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " move $1, %z3 \n" \ " .set " MIPS_ISA_ARCH_LEVEL " \n" \ " " st " $1, %1 \n" \ @@ -117,10 +118,11 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x, __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "1: " ld " %0, %2 # __cmpxchg_asm \n" \ " bne %0, %z3, 2f \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " move $1, %z4 \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ " " st " $1, %1 \n" \ diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h index cc2eb1b06050..f77e99f1722e 100644 --- a/arch/mips/include/asm/compiler.h +++ b/arch/mips/include/asm/compiler.h @@ -43,28 +43,16 @@ #undef barrier_before_unreachable #define barrier_before_unreachable() asm volatile(".insn") -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) -#define GCC_IMM_ASM() "n" -#define GCC_REG_ACCUM "$0" +#if !defined(CONFIG_CC_IS_GCC) || \ + (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) +# define GCC_OFF_SMALL_ASM() "ZC" +#elif defined(CONFIG_CPU_MICROMIPS) +# error "microMIPS compilation unsupported with GCC older than 4.9" #else -#define GCC_IMM_ASM() "rn" -#define GCC_REG_ACCUM "accum" +# define GCC_OFF_SMALL_ASM() "R" #endif #ifdef CONFIG_CPU_MIPSR6 -/* All MIPS R6 toolchains support the ZC constrain */ -#define GCC_OFF_SMALL_ASM() "ZC" -#else -#ifndef CONFIG_CPU_MICROMIPS -#define GCC_OFF_SMALL_ASM() "R" -#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) -#define GCC_OFF_SMALL_ASM() "ZC" -#else -#error "microMIPS compilation unsupported with GCC older than 4.9" -#endif /* CONFIG_CPU_MICROMIPS */ -#endif /* CONFIG_CPU_MIPSR6 */ - -#ifdef CONFIG_CPU_MIPSR6 #define MIPS_ISA_LEVEL "mips64r6" #define MIPS_ISA_ARCH_LEVEL MIPS_ISA_LEVEL #define MIPS_ISA_LEVEL_RAW mips64r6 diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 0edba3e75747..701e525641b8 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -15,6 +15,7 @@ #include <cpu-feature-overrides.h> #define __ase(ase) (cpu_data[0].ases & (ase)) +#define __isa(isa) (cpu_data[0].isa_level & (isa)) #define __opt(opt) (cpu_data[0].options & (opt)) /* @@ -53,6 +54,18 @@ #define __isa_lt_and_opt(isa, opt) ((MIPS_ISA_REV < (isa)) && __opt(opt)) /* + * Similarly allow for ISA level checks that take into account knowledge of the + * ISA targeted by the kernel build, provided by MIPS_ISA_REV. + */ +#define __isa_ge_and_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) && __isa(flag)) +#define __isa_ge_or_flag(isa, flag) ((MIPS_ISA_REV >= (isa)) || __isa(flag)) +#define __isa_lt_and_flag(isa, flag) ((MIPS_ISA_REV < (isa)) && __isa(flag)) +#define __isa_range(ge, lt) \ + ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt))) +#define __isa_range_or_flag(ge, lt, flag) \ + (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag))) + +/* * SMP assumption: Options of CPU 0 are a superset of all processors. * This is true for all known MIPS systems. */ @@ -115,10 +128,15 @@ #endif /* Don't override `cpu_has_fpu' to 1 or the "nofpu" option won't work. */ #ifndef cpu_has_fpu -#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) -#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) +# ifdef CONFIG_MIPS_FP_SUPPORT +# define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) +# define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) +# else +# define cpu_has_fpu 0 +# define raw_cpu_has_fpu 0 +# endif #else -#define raw_cpu_has_fpu cpu_has_fpu +# define raw_cpu_has_fpu cpu_has_fpu #endif #ifndef cpu_has_32fpr #define cpu_has_32fpr __isa_ge_or_opt(1, MIPS_CPU_32FPR) @@ -195,7 +213,9 @@ #endif #ifndef cpu_has_mmips -# ifdef CONFIG_SYS_SUPPORTS_MICROMIPS +# if defined(__mips_micromips) +# define cpu_has_mmips 1 +# elif defined(CONFIG_SYS_SUPPORTS_MICROMIPS) # define cpu_has_mmips __opt(MIPS_CPU_MICROMIPS) # else # define cpu_has_mmips 0 @@ -246,48 +266,38 @@ #endif #endif -/* __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r */ -#if !((defined(cpu_has_mips32r1) && cpu_has_mips32r1) || \ - (defined(cpu_has_mips32r2) && cpu_has_mips32r2) || \ - (defined(cpu_has_mips32r6) && cpu_has_mips32r6) || \ - (defined(cpu_has_mips64r1) && cpu_has_mips64r1) || \ - (defined(cpu_has_mips64r2) && cpu_has_mips64r2) || \ - (defined(cpu_has_mips64r6) && cpu_has_mips64r6)) -#define CPU_NO_EFFICIENT_FFS 1 -#endif - #ifndef cpu_has_mips_1 -# define cpu_has_mips_1 (!cpu_has_mips_r6) +# define cpu_has_mips_1 (MIPS_ISA_REV < 6) #endif #ifndef cpu_has_mips_2 -# define cpu_has_mips_2 (cpu_data[0].isa_level & MIPS_CPU_ISA_II) +# define cpu_has_mips_2 __isa_lt_and_flag(6, MIPS_CPU_ISA_II) #endif #ifndef cpu_has_mips_3 -# define cpu_has_mips_3 (cpu_data[0].isa_level & MIPS_CPU_ISA_III) +# define cpu_has_mips_3 __isa_lt_and_flag(6, MIPS_CPU_ISA_III) #endif #ifndef cpu_has_mips_4 -# define cpu_has_mips_4 (cpu_data[0].isa_level & MIPS_CPU_ISA_IV) +# define cpu_has_mips_4 __isa_lt_and_flag(6, MIPS_CPU_ISA_IV) #endif #ifndef cpu_has_mips_5 -# define cpu_has_mips_5 (cpu_data[0].isa_level & MIPS_CPU_ISA_V) +# define cpu_has_mips_5 __isa_lt_and_flag(6, MIPS_CPU_ISA_V) #endif #ifndef cpu_has_mips32r1 -# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +# define cpu_has_mips32r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M32R1) #endif #ifndef cpu_has_mips32r2 -# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +# define cpu_has_mips32r2 __isa_range_or_flag(2, 6, MIPS_CPU_ISA_M32R2) #endif #ifndef cpu_has_mips32r6 -# define cpu_has_mips32r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R6) +# define cpu_has_mips32r6 __isa_ge_or_flag(6, MIPS_CPU_ISA_M32R6) #endif #ifndef cpu_has_mips64r1 -# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +# define cpu_has_mips64r1 __isa_range_or_flag(1, 6, MIPS_CPU_ISA_M64R1) #endif #ifndef cpu_has_mips64r2 -# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +# define cpu_has_mips64r2 __isa_range_or_flag(2, 6, MIPS_CPU_ISA_M64R2) #endif #ifndef cpu_has_mips64r6 -# define cpu_has_mips64r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R6) +# define cpu_has_mips64r6 __isa_ge_and_flag(6, MIPS_CPU_ISA_M64R6) #endif /* diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index a41059d47d31..ed7ffe4e63a3 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -50,7 +50,7 @@ struct guest_info { #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ struct cpuinfo_mips { - unsigned long asid_cache; + u64 asid_cache; #ifdef CONFIG_MIPS_ASID_BITS_VARIABLE unsigned long asid_mask; #endif diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index dacbdb84516a..532b49b1dbb3 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -248,8 +248,9 @@ #define PRID_REV_LOONGSON3A_R1 0x0005 #define PRID_REV_LOONGSON3B_R1 0x0006 #define PRID_REV_LOONGSON3B_R2 0x0007 -#define PRID_REV_LOONGSON3A_R2 0x0008 +#define PRID_REV_LOONGSON3A_R2_0 0x0008 #define PRID_REV_LOONGSON3A_R3_0 0x0009 +#define PRID_REV_LOONGSON3A_R2_1 0x000c #define PRID_REV_LOONGSON3A_R3_1 0x000d /* diff --git a/arch/mips/include/asm/dsemul.h b/arch/mips/include/asm/dsemul.h index b47a97527673..6d5b781ad518 100644 --- a/arch/mips/include/asm/dsemul.h +++ b/arch/mips/include/asm/dsemul.h @@ -52,7 +52,14 @@ extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, * * Return: True if an emulation frame was returned from, else false. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern bool do_dsemulret(struct pt_regs *xcp); +#else +static inline bool do_dsemulret(struct pt_regs *xcp) +{ + return false; +} +#endif /** * dsemul_thread_cleanup() - Cleanup thread 'emulation' frame @@ -63,8 +70,14 @@ extern bool do_dsemulret(struct pt_regs *xcp); * * Return: True if a frame was freed, else false. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern bool dsemul_thread_cleanup(struct task_struct *tsk); - +#else +static inline bool dsemul_thread_cleanup(struct task_struct *tsk) +{ + return false; +} +#endif /** * dsemul_thread_rollback() - Rollback from an 'emulation' frame * @regs: User thread register context. @@ -77,7 +90,14 @@ extern bool dsemul_thread_cleanup(struct task_struct *tsk); * * Return: True if a frame was exited, else false. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern bool dsemul_thread_rollback(struct pt_regs *regs); +#else +static inline bool dsemul_thread_rollback(struct pt_regs *regs) +{ + return false; +} +#endif /** * dsemul_mm_cleanup() - Cleanup per-mm delay slot 'emulation' state @@ -87,6 +107,13 @@ extern bool dsemul_thread_rollback(struct pt_regs *regs); * for delay slot 'emulation' book-keeping is freed. This is to be called * before @mm is freed in order to avoid memory leaks. */ +#ifdef CONFIG_MIPS_FP_SUPPORT extern void dsemul_mm_cleanup(struct mm_struct *mm); +#else +static inline void dsemul_mm_cleanup(struct mm_struct *mm) +{ + /* no-op */ +} +#endif #endif /* __MIPS_ASM_DSEMUL_H__ */ diff --git a/arch/mips/include/asm/edac.h b/arch/mips/include/asm/edac.h index fc467767329b..c5d147744423 100644 --- a/arch/mips/include/asm/edac.h +++ b/arch/mips/include/asm/edac.h @@ -21,12 +21,13 @@ static inline void edac_atomic_scrub(void *va, u32 size) */ __asm__ __volatile__ ( + " .set push \n" " .set mips2 \n" "1: ll %0, %1 # edac_atomic_scrub \n" " addu %0, $0 \n" " sc %0, %1 \n" " beqz %0, 1b \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr) : GCC_OFF_SMALL_ASM() (*virt_addr)); diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h index 0eb1a75be105..f8f44b1a6cbb 100644 --- a/arch/mips/include/asm/elf.h +++ b/arch/mips/include/asm/elf.h @@ -481,6 +481,8 @@ struct linux_binprm; extern int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp); +#ifdef CONFIG_MIPS_FP_SUPPORT + struct arch_elf_state { int nan_2008; int fp_abi; @@ -497,19 +499,35 @@ struct arch_elf_state { .overall_fp_mode = -1, \ } -/* Whether to accept legacy-NaN and 2008-NaN user binaries. */ -extern bool mips_use_nan_legacy; -extern bool mips_use_nan_2008; - extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf, bool is_interp, struct arch_elf_state *state); extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr, struct arch_elf_state *state); +/* Whether to accept legacy-NaN and 2008-NaN user binaries. */ +extern bool mips_use_nan_legacy; +extern bool mips_use_nan_2008; + extern void mips_set_personality_nan(struct arch_elf_state *state); extern void mips_set_personality_fp(struct arch_elf_state *state); +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +struct arch_elf_state; + +static inline void mips_set_personality_nan(struct arch_elf_state *state) +{ + /* no-op */ +} + +static inline void mips_set_personality_fp(struct arch_elf_state *state) +{ + /* no-op */ +} + +#endif /* !CONFIG_MIPS_FP_SUPPORT */ + #define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk) extern int mips_elf_read_implies_exec(void *elf_ex, int exstack); diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index a2813fe381cf..42bc2bbbd3d7 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h @@ -30,13 +30,6 @@ #include <asm/mips_mt.h> #endif -struct sigcontext; -struct sigcontext32; - -extern void _init_fpu(unsigned int); -extern void _save_fp(struct task_struct *); -extern void _restore_fp(struct task_struct *); - /* * This enum specifies a mode in which we want the FPU to operate, for cores * which implement the Status.FR bit. Note that the bottom bit of the value @@ -51,6 +44,11 @@ enum fpu_mode { #define FPU_FR_MASK 0x1 }; +#ifdef CONFIG_MIPS_FP_SUPPORT + +extern void _save_fp(struct task_struct *); +extern void _restore_fp(struct task_struct *); + #define __disable_fpu() \ do { \ clear_c0_status(ST0_CU1); \ @@ -198,42 +196,36 @@ static inline void lose_fpu(int save) preempt_enable(); } -static inline int init_fpu(void) +/** + * init_fp_ctx() - Initialize task FP context + * @target: The task whose FP context should be initialized. + * + * Initializes the FP context of the target task to sane default values if that + * target task does not already have valid FP context. Once the context has + * been initialized, the task will be marked as having used FP & thus having + * valid FP context. + * + * Returns: true if context is initialized, else false. + */ +static inline bool init_fp_ctx(struct task_struct *target) { - unsigned int fcr31 = current->thread.fpu.fcr31; - int ret = 0; + /* If FP has been used then the target already has context */ + if (tsk_used_math(target)) + return false; - if (cpu_has_fpu) { - unsigned int config5; - - ret = __own_fpu(); - if (ret) - return ret; + /* Begin with data registers set to all 1s... */ + memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); - if (!cpu_has_fre) { - _init_fpu(fcr31); + /* FCSR has been preset by `mips_set_personality_nan'. */ - return 0; - } - - /* - * Ensure FRE is clear whilst running _init_fpu, since - * single precision FP instructions are used. If FRE - * was set then we'll just end up initialising all 32 - * 64b registers. - */ - config5 = clear_c0_config5(MIPS_CONF5_FRE); - enable_fpu_hazard(); + /* + * Record that the target has "used" math, such that the context + * just initialised, and any modifications made by the caller, + * aren't discarded. + */ + set_stopped_child_used_math(target); - _init_fpu(fcr31); - - /* Restore FRE */ - write_c0_config5(config5); - enable_fpu_hazard(); - } else - fpu_emulator_init_fpu(); - - return ret; + return true; } static inline void save_fp(struct task_struct *tsk) @@ -260,4 +252,81 @@ static inline union fpureg *get_fpu_regs(struct task_struct *tsk) return tsk->thread.fpu.fpr; } +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +/* + * When FP support is disabled we provide only a minimal set of stub functions + * to avoid callers needing to care too much about CONFIG_MIPS_FP_SUPPORT. + */ + +static inline int __enable_fpu(enum fpu_mode mode) +{ + return SIGILL; +} + +static inline void __disable_fpu(void) +{ + /* no-op */ +} + + +static inline int is_fpu_owner(void) +{ + return 0; +} + +static inline void clear_fpu_owner(void) +{ + /* no-op */ +} + +static inline int own_fpu_inatomic(int restore) +{ + return SIGILL; +} + +static inline int own_fpu(int restore) +{ + return SIGILL; +} + +static inline void lose_fpu_inatomic(int save, struct task_struct *tsk) +{ + /* no-op */ +} + +static inline void lose_fpu(int save) +{ + /* no-op */ +} + +static inline bool init_fp_ctx(struct task_struct *target) +{ + return false; +} + +/* + * The following functions should only be called in paths where we know that FP + * support is enabled, typically a path where own_fpu() or __enable_fpu() have + * returned successfully. When CONFIG_MIPS_FP_SUPPORT=n it is known at compile + * time that this should never happen, so calls to these functions should be + * optimized away & never actually be emitted. + */ + +extern void save_fp(struct task_struct *tsk) + __compiletime_error("save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern void _save_fp(struct task_struct *) + __compiletime_error("_save_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern void restore_fp(struct task_struct *tsk) + __compiletime_error("restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern void _restore_fp(struct task_struct *) + __compiletime_error("_restore_fp() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +extern union fpureg *get_fpu_regs(struct task_struct *tsk) + __compiletime_error("get_fpu_regs() should not be called when CONFIG_MIPS_FP_SUPPORT=n"); + +#endif /* !CONFIG_MIPS_FP_SUPPORT */ #endif /* _ASM_FPU_H */ diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h index b36097d3cbf4..7e233055f7b4 100644 --- a/arch/mips/include/asm/fpu_emulator.h +++ b/arch/mips/include/asm/fpu_emulator.h @@ -188,17 +188,6 @@ int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, unsigned long *contpc); -#define SIGNALLING_NAN 0x7ff800007ff80000LL - -static inline void fpu_emulator_init_fpu(void) -{ - struct task_struct *t = current; - int i; - - for (i = 0; i < 32; i++) - set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN); -} - /* * Mask the FCSR Cause bits according to the Enable bits, observing * that Unimplemented is always enabled. diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h index a9e61ea54ca9..8eff134b3a43 100644 --- a/arch/mips/include/asm/futex.h +++ b/arch/mips/include/asm/futex.h @@ -24,9 +24,10 @@ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set arch=r4000 \n" \ "1: ll %1, %4 # __futex_atomic_op \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " " insn " \n" \ " .set arch=r4000 \n" \ "2: sc $1, %2 \n" \ @@ -35,7 +36,6 @@ "3: \n" \ " .insn \n" \ " .set pop \n" \ - " .set mips0 \n" \ " .section .fixup,\"ax\" \n" \ "4: li %0, %6 \n" \ " j 3b \n" \ @@ -53,9 +53,10 @@ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \ - " .set mips0 \n" \ + " .set pop \n" \ " " insn " \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "2: "user_sc("$1", "%2")" \n" \ @@ -64,7 +65,6 @@ "3: \n" \ " .insn \n" \ " .set pop \n" \ - " .set mips0 \n" \ " .section .fixup,\"ax\" \n" \ "4: li %0, %6 \n" \ " j 3b \n" \ @@ -137,10 +137,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "# futex_atomic_cmpxchg_inatomic \n" " .set push \n" " .set noat \n" + " .set push \n" " .set arch=r4000 \n" "1: ll %1, %3 \n" " bne %1, %z4, 3f \n" - " .set mips0 \n" + " .set pop \n" " move $1, %z5 \n" " .set arch=r4000 \n" "2: sc $1, %2 \n" @@ -166,10 +167,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "# futex_atomic_cmpxchg_inatomic \n" " .set push \n" " .set noat \n" + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1: "user_ll("%1", "%3")" \n" " bne %1, %z4, 3f \n" - " .set mips0 \n" + " .set pop \n" " move $1, %z5 \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "2: "user_sc("$1", "%2")" \n" diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h index e0fecf206f2c..0fa27446869a 100644 --- a/arch/mips/include/asm/hazards.h +++ b/arch/mips/include/asm/hazards.h @@ -66,10 +66,11 @@ do { \ unsigned long tmp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set "MIPS_ISA_LEVEL" \n" \ " dla %0, 1f \n" \ " jr.hb %0 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ "1: \n" \ : "=r" (tmp)); \ } while (0) @@ -141,10 +142,11 @@ do { \ unsigned long tmp; \ \ __asm__ __volatile__( \ + " .set push \n" \ " .set mips64r2 \n" \ " dla %0, 1f \n" \ " jr.hb %0 \n" \ - " .set mips0 \n" \ + " .set pop \n" \ "1: \n" \ : "=r" (tmp)); \ } while (0) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 266257d56fb6..845fbbc7a2e3 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -218,6 +218,18 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si } /* + * ioremap_prot - map bus memory into CPU space + * @offset: bus address of the memory + * @size: size of the resource to map + + * ioremap_prot gives the caller control over cache coherency attributes (CCA) + */ +static inline void __iomem *ioremap_prot(phys_addr_t offset, + unsigned long size, unsigned long prot_val) { + return __ioremap_mode(offset, size, prot_val & _CACHE_MASK); +} + +/* * ioremap - map bus memory into CPU space * @offset: bus address of the memory * @size: size of the resource to map @@ -342,13 +354,14 @@ static inline void pfx##write##bwlq(type val, \ if (irq) \ local_irq_save(__flags); \ __asm__ __volatile__( \ - ".set arch=r4000" "\t\t# __writeq""\n\t" \ + ".set push" "\t\t# __writeq""\n\t" \ + ".set arch=r4000" "\n\t" \ "dsll32 %L0, %L0, 0" "\n\t" \ "dsrl32 %L0, %L0, 0" "\n\t" \ "dsll32 %M0, %M0, 0" "\n\t" \ "or %L0, %L0, %M0" "\n\t" \ "sd %L0, %2" "\n\t" \ - ".set mips0" "\n" \ + ".set pop" "\n" \ : "=r" (__tmp) \ : "0" (__val), "m" (*__mem)); \ if (irq) \ @@ -375,11 +388,12 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ if (irq) \ local_irq_save(__flags); \ __asm__ __volatile__( \ - ".set arch=r4000" "\t\t# __readq" "\n\t" \ + ".set push" "\t\t# __readq" "\n\t" \ + ".set arch=r4000" "\n\t" \ "ld %L0, %1" "\n\t" \ "dsra32 %M0, %L0, 0" "\n\t" \ "sll %L0, %L0, 0" "\n\t" \ - ".set mips0" "\n" \ + ".set pop" "\n" \ : "=r" (__val) \ : "m" (*__mem)); \ if (irq) \ diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index 2c1c53d12179..e445026858bc 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -411,11 +411,12 @@ static inline void _kvm_atomic_set_c0_guest_reg(unsigned long *reg, unsigned long temp; do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 \n" " or %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (val)); } while (unlikely(!temp)); @@ -427,11 +428,12 @@ static inline void _kvm_atomic_clear_c0_guest_reg(unsigned long *reg, unsigned long temp; do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 \n" " and %0, %2 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (~val)); } while (unlikely(!temp)); @@ -444,12 +446,13 @@ static inline void _kvm_atomic_change_c0_guest_reg(unsigned long *reg, unsigned long temp; do { __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " " __LL "%0, %1 \n" " and %0, %2 \n" " or %0, %3 \n" " " __SC "%0, %1 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (temp), "+m" (*reg) : "r" (~change), "r" (val & change)); } while (unlikely(!temp)); diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h index ac8264eca1e9..02783e141c32 100644 --- a/arch/mips/include/asm/local.h +++ b/arch/mips/include/asm/local.h @@ -35,13 +35,14 @@ static __inline__ long local_add_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1:" __LL "%1, %2 # local_add_return \n" " addu %0, %1, %3 \n" __SC "%0, %2 \n" " beqzl %0, 1b \n" " addu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); @@ -49,13 +50,14 @@ static __inline__ long local_add_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1:" __LL "%1, %2 # local_add_return \n" " addu %0, %1, %3 \n" __SC "%0, %2 \n" " beqz %0, 1b \n" " addu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); @@ -80,13 +82,14 @@ static __inline__ long local_sub_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set arch=r4000 \n" "1:" __LL "%1, %2 # local_sub_return \n" " subu %0, %1, %3 \n" __SC "%0, %2 \n" " beqzl %0, 1b \n" " subu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); @@ -94,13 +97,14 @@ static __inline__ long local_sub_return(long i, local_t * l) unsigned long temp; __asm__ __volatile__( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1:" __LL "%1, %2 # local_sub_return \n" " subu %0, %1, %3 \n" __SC "%0, %2 \n" " beqz %0, 1b \n" " subu %0, %1, %3 \n" - " .set mips0 \n" + " .set pop \n" : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) : "Ir" (i), "m" (l->a.counter) : "memory"); diff --git a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h index cbac603ced19..b5e288a12dfe 100644 --- a/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h +++ b/arch/mips/include/asm/mach-loongson64/kernel-entry-init.h @@ -31,7 +31,7 @@ /* Enable STFill Buffer */ mfc0 t0, CP0_PRID andi t0, (PRID_IMP_MASK | PRID_REV_MASK) - slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2) + slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2_0) bnez t0, 1f mfc0 t0, CP0_CONFIG6 or t0, 0x100 @@ -60,7 +60,7 @@ /* Enable STFill Buffer */ mfc0 t0, CP0_PRID andi t0, (PRID_IMP_MASK | PRID_REV_MASK) - slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2) + slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2_0) bnez t0, 1f mfc0 t0, CP0_CONFIG6 or t0, 0x100 diff --git a/arch/mips/include/asm/mach-loongson64/mmzone.h b/arch/mips/include/asm/mach-loongson64/mmzone.h index c9f7e231e66b..59c8b11c090e 100644 --- a/arch/mips/include/asm/mach-loongson64/mmzone.h +++ b/arch/mips/include/asm/mach-loongson64/mmzone.h @@ -21,6 +21,7 @@ #define NODE3_ADDRSPACE_OFFSET 0x300000000000UL #define pa_to_nid(addr) (((addr) & 0xf00000000000) >> NODE_ADDRSPACE_SHIFT) +#define nid_to_addrbase(nid) ((nid) << NODE_ADDRSPACE_SHIFT) #define LEVELS_PER_SLICE 128 diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h index 212336b7c0f4..be4cf9d477be 100644 --- a/arch/mips/include/asm/mipsmtregs.h +++ b/arch/mips/include/asm/mipsmtregs.h @@ -255,12 +255,12 @@ static inline unsigned int dmt(void) static inline void __raw_emt(void) { __asm__ __volatile__( + " .set push \n" " .set noreorder \n" " .set mips32r2 \n" " .word 0x41600be1 # emt \n" " ehb \n" - " .set mips0 \n" - " .set reorder"); + " .set pop"); } /* enable multi-threaded execution if previous suggested it should be. @@ -277,9 +277,10 @@ static inline void emt(int previous) static inline void ehb(void) { __asm__ __volatile__( + " .set push \n" " .set mips32r2 \n" " ehb \n" - " .set mips0 \n"); + " .set pop \n"); } #define mftc0(rt,sel) \ diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 341a02c92985..402b80af91aa 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1345,9 +1345,10 @@ do { \ : "=r" (__res)); \ else \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips32\n\t" \ "mfc0\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0\n\t" \ + ".set\tpop\n\t" \ : "=r" (__res)); \ __res; \ }) @@ -1358,15 +1359,17 @@ do { \ __res = __read_64bit_c0_split(source, sel, vol); \ else if (sel == 0) \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips3\n\t" \ "dmfc0\t%0, " #source "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__res)); \ else \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmfc0\t%0, " #source ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__res)); \ __res; \ }) @@ -1391,9 +1394,10 @@ do { \ : : "Jr" ((unsigned int)(value))); \ else \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips32\n\t" \ "mtc0\t%z0, " #register ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : : "Jr" ((unsigned int)(value))); \ } while (0) @@ -1403,15 +1407,17 @@ do { \ __write_64bit_c0_split(register, sel, value); \ else if (sel == 0) \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips3\n\t" \ "dmtc0\t%z0, " #register "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : : "Jr" (value)); \ else \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmtc0\t%z0, " #register ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : : "Jr" (value)); \ } while (0) @@ -1463,19 +1469,21 @@ do { \ local_irq_save(__flags); \ if (sel == 0) \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmfc0\t%L0, " #source "\n\t" \ "dsra\t%M0, %L0, 32\n\t" \ "sll\t%L0, %L0, 0\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__val)); \ else \ __asm__ vol( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dmfc0\t%L0, " #source ", " #sel "\n\t" \ "dsra\t%M0, %L0, 32\n\t" \ "sll\t%L0, %L0, 0\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "=r" (__val)); \ local_irq_restore(__flags); \ \ @@ -1498,23 +1506,25 @@ do { \ : "+r" (__tmp)); \ else if (sel == 0) \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dsll\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ "dsll\t%M0, %M0, 32\n\t" \ "or\t%L0, %L0, %M0\n\t" \ "dmtc0\t%L0, " #source "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "+r" (__tmp)); \ else \ __asm__ __volatile__( \ + ".set\tpush\n\t" \ ".set\tmips64\n\t" \ "dsll\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ "dsll\t%M0, %M0, 32\n\t" \ "or\t%L0, %L0, %M0\n\t" \ "dmtc0\t%L0, " #source ", " #sel "\n\t" \ - ".set\tmips0" \ + ".set\tpop" \ : "+r" (__tmp)); \ local_irq_restore(__flags); \ } while (0) diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h index 0740be7d5d4a..88a108ce62c1 100644 --- a/arch/mips/include/asm/mmu.h +++ b/arch/mips/include/asm/mmu.h @@ -7,9 +7,8 @@ #include <linux/wait.h> typedef struct { - unsigned long asid[NR_CPUS]; + u64 asid[NR_CPUS]; void *vdso; - atomic_t fp_mode_switching; /* lock to be held whilst modifying fp_bd_emupage_allocmap */ spinlock_t bd_emupage_lock; diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index 94414561de0e..a589585be21b 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h @@ -76,14 +76,14 @@ extern unsigned long pgd_current[]; * All unused by hardware upper bits will be considered * as a software asid extension. */ -static unsigned long asid_version_mask(unsigned int cpu) +static inline u64 asid_version_mask(unsigned int cpu) { unsigned long asid_mask = cpu_asid_mask(&cpu_data[cpu]); - return ~(asid_mask | (asid_mask - 1)); + return ~(u64)(asid_mask | (asid_mask - 1)); } -static unsigned long asid_first_version(unsigned int cpu) +static inline u64 asid_first_version(unsigned int cpu) { return ~asid_version_mask(cpu) + 1; } @@ -102,14 +102,12 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) static inline void get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) { - unsigned long asid = asid_cache(cpu); + u64 asid = asid_cache(cpu); if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) { if (cpu_has_vtag_icache) flush_icache_all(); local_flush_tlb_all(); /* start new asid cycle */ - if (!asid) /* fix version if needed */ - asid = asid_first_version(cpu); } cpu_context(cpu, mm) = asid_cache(cpu) = asid; diff --git a/arch/mips/include/asm/mmzone.h b/arch/mips/include/asm/mmzone.h index f085fba41da5..b826b8473e95 100644 --- a/arch/mips/include/asm/mmzone.h +++ b/arch/mips/include/asm/mmzone.h @@ -7,7 +7,18 @@ #define _ASM_MMZONE_H_ #include <asm/page.h> -#include <mmzone.h> + +#ifdef CONFIG_NEED_MULTIPLE_NODES +# include <mmzone.h> +#endif + +#ifndef pa_to_nid +#define pa_to_nid(addr) 0 +#endif + +#ifndef nid_to_addrbase +#define nid_to_addrbase(nid) 0 +#endif #ifdef CONFIG_DISCONTIGMEM diff --git a/arch/mips/include/asm/octeon/cvmx-agl-defs.h b/arch/mips/include/asm/octeon/cvmx-agl-defs.h index 542ee09510b3..3635ab384447 100644 --- a/arch/mips/include/asm/octeon/cvmx-agl-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-agl-defs.h @@ -171,7 +171,6 @@ union cvmx_agl_gmx_bad_reg { uint64_t reserved_38_63:26; #endif } cn52xx; - struct cvmx_agl_gmx_bad_reg_cn52xx cn52xxp1; struct cvmx_agl_gmx_bad_reg_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_35_63:29; @@ -199,13 +198,6 @@ union cvmx_agl_gmx_bad_reg { uint64_t reserved_35_63:29; #endif } cn56xx; - struct cvmx_agl_gmx_bad_reg_cn56xx cn56xxp1; - struct cvmx_agl_gmx_bad_reg_s cn61xx; - struct cvmx_agl_gmx_bad_reg_s cn63xx; - struct cvmx_agl_gmx_bad_reg_s cn63xxp1; - struct cvmx_agl_gmx_bad_reg_s cn66xx; - struct cvmx_agl_gmx_bad_reg_s cn68xx; - struct cvmx_agl_gmx_bad_reg_s cn68xxp1; }; union cvmx_agl_gmx_bist { @@ -228,15 +220,6 @@ union cvmx_agl_gmx_bist { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_agl_gmx_bist_cn52xx cn52xxp1; - struct cvmx_agl_gmx_bist_cn52xx cn56xx; - struct cvmx_agl_gmx_bist_cn52xx cn56xxp1; - struct cvmx_agl_gmx_bist_s cn61xx; - struct cvmx_agl_gmx_bist_s cn63xx; - struct cvmx_agl_gmx_bist_s cn63xxp1; - struct cvmx_agl_gmx_bist_s cn66xx; - struct cvmx_agl_gmx_bist_s cn68xx; - struct cvmx_agl_gmx_bist_s cn68xxp1; }; union cvmx_agl_gmx_drv_ctl { @@ -270,8 +253,6 @@ union cvmx_agl_gmx_drv_ctl { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_agl_gmx_drv_ctl_s cn52xx; - struct cvmx_agl_gmx_drv_ctl_s cn52xxp1; struct cvmx_agl_gmx_drv_ctl_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -289,7 +270,6 @@ union cvmx_agl_gmx_drv_ctl { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_drv_ctl_cn56xx cn56xxp1; }; union cvmx_agl_gmx_inf_mode { @@ -305,10 +285,6 @@ union cvmx_agl_gmx_inf_mode { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_agl_gmx_inf_mode_s cn52xx; - struct cvmx_agl_gmx_inf_mode_s cn52xxp1; - struct cvmx_agl_gmx_inf_mode_s cn56xx; - struct cvmx_agl_gmx_inf_mode_s cn56xxp1; }; union cvmx_agl_gmx_prtx_cfg { @@ -363,15 +339,6 @@ union cvmx_agl_gmx_prtx_cfg { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_agl_gmx_prtx_cfg_cn52xx cn52xxp1; - struct cvmx_agl_gmx_prtx_cfg_cn52xx cn56xx; - struct cvmx_agl_gmx_prtx_cfg_cn52xx cn56xxp1; - struct cvmx_agl_gmx_prtx_cfg_s cn61xx; - struct cvmx_agl_gmx_prtx_cfg_s cn63xx; - struct cvmx_agl_gmx_prtx_cfg_s cn63xxp1; - struct cvmx_agl_gmx_prtx_cfg_s cn66xx; - struct cvmx_agl_gmx_prtx_cfg_s cn68xx; - struct cvmx_agl_gmx_prtx_cfg_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam0 { @@ -383,16 +350,6 @@ union cvmx_agl_gmx_rxx_adr_cam0 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam0_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam1 { @@ -404,16 +361,6 @@ union cvmx_agl_gmx_rxx_adr_cam1 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam1_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam2 { @@ -425,16 +372,6 @@ union cvmx_agl_gmx_rxx_adr_cam2 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam2_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam3 { @@ -446,16 +383,6 @@ union cvmx_agl_gmx_rxx_adr_cam3 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam3_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam4 { @@ -467,16 +394,6 @@ union cvmx_agl_gmx_rxx_adr_cam4 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam4_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam5 { @@ -488,16 +405,6 @@ union cvmx_agl_gmx_rxx_adr_cam5 { uint64_t adr:64; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam5_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_cam_en { @@ -511,16 +418,6 @@ union cvmx_agl_gmx_rxx_adr_cam_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_cam_en_s cn68xxp1; }; union cvmx_agl_gmx_rxx_adr_ctl { @@ -538,16 +435,6 @@ union cvmx_agl_gmx_rxx_adr_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_adr_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_decision { @@ -561,16 +448,6 @@ union cvmx_agl_gmx_rxx_decision { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_agl_gmx_rxx_decision_s cn52xx; - struct cvmx_agl_gmx_rxx_decision_s cn52xxp1; - struct cvmx_agl_gmx_rxx_decision_s cn56xx; - struct cvmx_agl_gmx_rxx_decision_s cn56xxp1; - struct cvmx_agl_gmx_rxx_decision_s cn61xx; - struct cvmx_agl_gmx_rxx_decision_s cn63xx; - struct cvmx_agl_gmx_rxx_decision_s cn63xxp1; - struct cvmx_agl_gmx_rxx_decision_s cn66xx; - struct cvmx_agl_gmx_rxx_decision_s cn68xx; - struct cvmx_agl_gmx_rxx_decision_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_chk { @@ -627,15 +504,6 @@ union cvmx_agl_gmx_rxx_frm_chk { uint64_t reserved_9_63:55; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_chk_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_chk_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_chk_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_ctl { @@ -700,15 +568,6 @@ union cvmx_agl_gmx_rxx_frm_ctl { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_max { @@ -722,16 +581,6 @@ union cvmx_agl_gmx_rxx_frm_max { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_frm_max_s cn52xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_max_s cn56xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_max_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_max_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_max_s cn68xxp1; }; union cvmx_agl_gmx_rxx_frm_min { @@ -745,16 +594,6 @@ union cvmx_agl_gmx_rxx_frm_min { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_frm_min_s cn52xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn52xxp1; - struct cvmx_agl_gmx_rxx_frm_min_s cn56xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn56xxp1; - struct cvmx_agl_gmx_rxx_frm_min_s cn61xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn63xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn63xxp1; - struct cvmx_agl_gmx_rxx_frm_min_s cn66xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn68xx; - struct cvmx_agl_gmx_rxx_frm_min_s cn68xxp1; }; union cvmx_agl_gmx_rxx_ifg { @@ -768,16 +607,6 @@ union cvmx_agl_gmx_rxx_ifg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_rxx_ifg_s cn52xx; - struct cvmx_agl_gmx_rxx_ifg_s cn52xxp1; - struct cvmx_agl_gmx_rxx_ifg_s cn56xx; - struct cvmx_agl_gmx_rxx_ifg_s cn56xxp1; - struct cvmx_agl_gmx_rxx_ifg_s cn61xx; - struct cvmx_agl_gmx_rxx_ifg_s cn63xx; - struct cvmx_agl_gmx_rxx_ifg_s cn63xxp1; - struct cvmx_agl_gmx_rxx_ifg_s cn66xx; - struct cvmx_agl_gmx_rxx_ifg_s cn68xx; - struct cvmx_agl_gmx_rxx_ifg_s cn68xxp1; }; union cvmx_agl_gmx_rxx_int_en { @@ -872,15 +701,6 @@ union cvmx_agl_gmx_rxx_int_en { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_int_en_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_int_en_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_int_en_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_int_en_s cn61xx; - struct cvmx_agl_gmx_rxx_int_en_s cn63xx; - struct cvmx_agl_gmx_rxx_int_en_s cn63xxp1; - struct cvmx_agl_gmx_rxx_int_en_s cn66xx; - struct cvmx_agl_gmx_rxx_int_en_s cn68xx; - struct cvmx_agl_gmx_rxx_int_en_s cn68xxp1; }; union cvmx_agl_gmx_rxx_int_reg { @@ -975,15 +795,6 @@ union cvmx_agl_gmx_rxx_int_reg { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn52xxp1; - struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn56xx; - struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn56xxp1; - struct cvmx_agl_gmx_rxx_int_reg_s cn61xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn63xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn63xxp1; - struct cvmx_agl_gmx_rxx_int_reg_s cn66xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn68xx; - struct cvmx_agl_gmx_rxx_int_reg_s cn68xxp1; }; union cvmx_agl_gmx_rxx_jabber { @@ -997,16 +808,6 @@ union cvmx_agl_gmx_rxx_jabber { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_jabber_s cn52xx; - struct cvmx_agl_gmx_rxx_jabber_s cn52xxp1; - struct cvmx_agl_gmx_rxx_jabber_s cn56xx; - struct cvmx_agl_gmx_rxx_jabber_s cn56xxp1; - struct cvmx_agl_gmx_rxx_jabber_s cn61xx; - struct cvmx_agl_gmx_rxx_jabber_s cn63xx; - struct cvmx_agl_gmx_rxx_jabber_s cn63xxp1; - struct cvmx_agl_gmx_rxx_jabber_s cn66xx; - struct cvmx_agl_gmx_rxx_jabber_s cn68xx; - struct cvmx_agl_gmx_rxx_jabber_s cn68xxp1; }; union cvmx_agl_gmx_rxx_pause_drop_time { @@ -1020,16 +821,6 @@ union cvmx_agl_gmx_rxx_pause_drop_time { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xxp1; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xxp1; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn61xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn63xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn63xxp1; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn66xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn68xx; - struct cvmx_agl_gmx_rxx_pause_drop_time_s cn68xxp1; }; union cvmx_agl_gmx_rxx_rx_inbnd { @@ -1047,12 +838,6 @@ union cvmx_agl_gmx_rxx_rx_inbnd { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn61xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn63xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn63xxp1; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn66xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn68xx; - struct cvmx_agl_gmx_rxx_rx_inbnd_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_ctl { @@ -1066,16 +851,6 @@ union cvmx_agl_gmx_rxx_stats_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs { @@ -1089,16 +864,6 @@ union cvmx_agl_gmx_rxx_stats_octs { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs_ctl { @@ -1112,16 +877,6 @@ union cvmx_agl_gmx_rxx_stats_octs_ctl { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs_dmac { @@ -1135,16 +890,6 @@ union cvmx_agl_gmx_rxx_stats_octs_dmac { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_octs_drp { @@ -1158,16 +903,6 @@ union cvmx_agl_gmx_rxx_stats_octs_drp { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts { @@ -1181,16 +916,6 @@ union cvmx_agl_gmx_rxx_stats_pkts { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_bad { @@ -1204,16 +929,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_bad { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_ctl { @@ -1227,16 +942,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_dmac { @@ -1250,16 +955,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_dmac { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn68xxp1; }; union cvmx_agl_gmx_rxx_stats_pkts_drp { @@ -1273,16 +968,6 @@ union cvmx_agl_gmx_rxx_stats_pkts_drp { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn61xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn63xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn63xxp1; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn66xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn68xx; - struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn68xxp1; }; union cvmx_agl_gmx_rxx_udd_skp { @@ -1300,16 +985,6 @@ union cvmx_agl_gmx_rxx_udd_skp { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_agl_gmx_rxx_udd_skp_s cn52xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn52xxp1; - struct cvmx_agl_gmx_rxx_udd_skp_s cn56xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn56xxp1; - struct cvmx_agl_gmx_rxx_udd_skp_s cn61xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn63xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn63xxp1; - struct cvmx_agl_gmx_rxx_udd_skp_s cn66xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn68xx; - struct cvmx_agl_gmx_rxx_udd_skp_s cn68xxp1; }; union cvmx_agl_gmx_rx_bp_dropx { @@ -1323,16 +998,6 @@ union cvmx_agl_gmx_rx_bp_dropx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_rx_bp_dropx_s cn52xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn52xxp1; - struct cvmx_agl_gmx_rx_bp_dropx_s cn56xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn56xxp1; - struct cvmx_agl_gmx_rx_bp_dropx_s cn61xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn63xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn63xxp1; - struct cvmx_agl_gmx_rx_bp_dropx_s cn66xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn68xx; - struct cvmx_agl_gmx_rx_bp_dropx_s cn68xxp1; }; union cvmx_agl_gmx_rx_bp_offx { @@ -1346,16 +1011,6 @@ union cvmx_agl_gmx_rx_bp_offx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_rx_bp_offx_s cn52xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn52xxp1; - struct cvmx_agl_gmx_rx_bp_offx_s cn56xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn56xxp1; - struct cvmx_agl_gmx_rx_bp_offx_s cn61xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn63xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn63xxp1; - struct cvmx_agl_gmx_rx_bp_offx_s cn66xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn68xx; - struct cvmx_agl_gmx_rx_bp_offx_s cn68xxp1; }; union cvmx_agl_gmx_rx_bp_onx { @@ -1369,16 +1024,6 @@ union cvmx_agl_gmx_rx_bp_onx { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_agl_gmx_rx_bp_onx_s cn52xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn52xxp1; - struct cvmx_agl_gmx_rx_bp_onx_s cn56xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn56xxp1; - struct cvmx_agl_gmx_rx_bp_onx_s cn61xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn63xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn63xxp1; - struct cvmx_agl_gmx_rx_bp_onx_s cn66xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn68xx; - struct cvmx_agl_gmx_rx_bp_onx_s cn68xxp1; }; union cvmx_agl_gmx_rx_prt_info { @@ -1396,8 +1041,6 @@ union cvmx_agl_gmx_rx_prt_info { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_agl_gmx_rx_prt_info_s cn52xx; - struct cvmx_agl_gmx_rx_prt_info_s cn52xxp1; struct cvmx_agl_gmx_rx_prt_info_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -1411,13 +1054,6 @@ union cvmx_agl_gmx_rx_prt_info { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_rx_prt_info_cn56xx cn56xxp1; - struct cvmx_agl_gmx_rx_prt_info_s cn61xx; - struct cvmx_agl_gmx_rx_prt_info_s cn63xx; - struct cvmx_agl_gmx_rx_prt_info_s cn63xxp1; - struct cvmx_agl_gmx_rx_prt_info_s cn66xx; - struct cvmx_agl_gmx_rx_prt_info_s cn68xx; - struct cvmx_agl_gmx_rx_prt_info_s cn68xxp1; }; union cvmx_agl_gmx_rx_tx_status { @@ -1435,8 +1071,6 @@ union cvmx_agl_gmx_rx_tx_status { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_rx_tx_status_s cn52xx; - struct cvmx_agl_gmx_rx_tx_status_s cn52xxp1; struct cvmx_agl_gmx_rx_tx_status_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_5_63:59; @@ -1450,13 +1084,6 @@ union cvmx_agl_gmx_rx_tx_status { uint64_t reserved_5_63:59; #endif } cn56xx; - struct cvmx_agl_gmx_rx_tx_status_cn56xx cn56xxp1; - struct cvmx_agl_gmx_rx_tx_status_s cn61xx; - struct cvmx_agl_gmx_rx_tx_status_s cn63xx; - struct cvmx_agl_gmx_rx_tx_status_s cn63xxp1; - struct cvmx_agl_gmx_rx_tx_status_s cn66xx; - struct cvmx_agl_gmx_rx_tx_status_s cn68xx; - struct cvmx_agl_gmx_rx_tx_status_s cn68xxp1; }; union cvmx_agl_gmx_smacx { @@ -1470,16 +1097,6 @@ union cvmx_agl_gmx_smacx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_smacx_s cn52xx; - struct cvmx_agl_gmx_smacx_s cn52xxp1; - struct cvmx_agl_gmx_smacx_s cn56xx; - struct cvmx_agl_gmx_smacx_s cn56xxp1; - struct cvmx_agl_gmx_smacx_s cn61xx; - struct cvmx_agl_gmx_smacx_s cn63xx; - struct cvmx_agl_gmx_smacx_s cn63xxp1; - struct cvmx_agl_gmx_smacx_s cn66xx; - struct cvmx_agl_gmx_smacx_s cn68xx; - struct cvmx_agl_gmx_smacx_s cn68xxp1; }; union cvmx_agl_gmx_stat_bp { @@ -1495,16 +1112,6 @@ union cvmx_agl_gmx_stat_bp { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_agl_gmx_stat_bp_s cn52xx; - struct cvmx_agl_gmx_stat_bp_s cn52xxp1; - struct cvmx_agl_gmx_stat_bp_s cn56xx; - struct cvmx_agl_gmx_stat_bp_s cn56xxp1; - struct cvmx_agl_gmx_stat_bp_s cn61xx; - struct cvmx_agl_gmx_stat_bp_s cn63xx; - struct cvmx_agl_gmx_stat_bp_s cn63xxp1; - struct cvmx_agl_gmx_stat_bp_s cn66xx; - struct cvmx_agl_gmx_stat_bp_s cn68xx; - struct cvmx_agl_gmx_stat_bp_s cn68xxp1; }; union cvmx_agl_gmx_txx_append { @@ -1524,16 +1131,6 @@ union cvmx_agl_gmx_txx_append { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_agl_gmx_txx_append_s cn52xx; - struct cvmx_agl_gmx_txx_append_s cn52xxp1; - struct cvmx_agl_gmx_txx_append_s cn56xx; - struct cvmx_agl_gmx_txx_append_s cn56xxp1; - struct cvmx_agl_gmx_txx_append_s cn61xx; - struct cvmx_agl_gmx_txx_append_s cn63xx; - struct cvmx_agl_gmx_txx_append_s cn63xxp1; - struct cvmx_agl_gmx_txx_append_s cn66xx; - struct cvmx_agl_gmx_txx_append_s cn68xx; - struct cvmx_agl_gmx_txx_append_s cn68xxp1; }; union cvmx_agl_gmx_txx_clk { @@ -1547,12 +1144,6 @@ union cvmx_agl_gmx_txx_clk { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_txx_clk_s cn61xx; - struct cvmx_agl_gmx_txx_clk_s cn63xx; - struct cvmx_agl_gmx_txx_clk_s cn63xxp1; - struct cvmx_agl_gmx_txx_clk_s cn66xx; - struct cvmx_agl_gmx_txx_clk_s cn68xx; - struct cvmx_agl_gmx_txx_clk_s cn68xxp1; }; union cvmx_agl_gmx_txx_ctl { @@ -1568,16 +1159,6 @@ union cvmx_agl_gmx_txx_ctl { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_agl_gmx_txx_ctl_s cn52xx; - struct cvmx_agl_gmx_txx_ctl_s cn52xxp1; - struct cvmx_agl_gmx_txx_ctl_s cn56xx; - struct cvmx_agl_gmx_txx_ctl_s cn56xxp1; - struct cvmx_agl_gmx_txx_ctl_s cn61xx; - struct cvmx_agl_gmx_txx_ctl_s cn63xx; - struct cvmx_agl_gmx_txx_ctl_s cn63xxp1; - struct cvmx_agl_gmx_txx_ctl_s cn66xx; - struct cvmx_agl_gmx_txx_ctl_s cn68xx; - struct cvmx_agl_gmx_txx_ctl_s cn68xxp1; }; union cvmx_agl_gmx_txx_min_pkt { @@ -1591,16 +1172,6 @@ union cvmx_agl_gmx_txx_min_pkt { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_txx_min_pkt_s cn52xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn52xxp1; - struct cvmx_agl_gmx_txx_min_pkt_s cn56xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn56xxp1; - struct cvmx_agl_gmx_txx_min_pkt_s cn61xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn63xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn63xxp1; - struct cvmx_agl_gmx_txx_min_pkt_s cn66xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn68xx; - struct cvmx_agl_gmx_txx_min_pkt_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_pkt_interval { @@ -1614,16 +1185,6 @@ union cvmx_agl_gmx_txx_pause_pkt_interval { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn61xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn63xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn66xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn68xx; - struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_pkt_time { @@ -1637,16 +1198,6 @@ union cvmx_agl_gmx_txx_pause_pkt_time { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn61xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn63xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn66xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn68xx; - struct cvmx_agl_gmx_txx_pause_pkt_time_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_togo { @@ -1660,16 +1211,6 @@ union cvmx_agl_gmx_txx_pause_togo { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_pause_togo_s cn52xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_togo_s cn56xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_togo_s cn61xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn63xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_togo_s cn66xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn68xx; - struct cvmx_agl_gmx_txx_pause_togo_s cn68xxp1; }; union cvmx_agl_gmx_txx_pause_zero { @@ -1683,16 +1224,6 @@ union cvmx_agl_gmx_txx_pause_zero { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_agl_gmx_txx_pause_zero_s cn52xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn52xxp1; - struct cvmx_agl_gmx_txx_pause_zero_s cn56xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn56xxp1; - struct cvmx_agl_gmx_txx_pause_zero_s cn61xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn63xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn63xxp1; - struct cvmx_agl_gmx_txx_pause_zero_s cn66xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn68xx; - struct cvmx_agl_gmx_txx_pause_zero_s cn68xxp1; }; union cvmx_agl_gmx_txx_soft_pause { @@ -1706,16 +1237,6 @@ union cvmx_agl_gmx_txx_soft_pause { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_txx_soft_pause_s cn52xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn52xxp1; - struct cvmx_agl_gmx_txx_soft_pause_s cn56xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn56xxp1; - struct cvmx_agl_gmx_txx_soft_pause_s cn61xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn63xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn63xxp1; - struct cvmx_agl_gmx_txx_soft_pause_s cn66xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn68xx; - struct cvmx_agl_gmx_txx_soft_pause_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat0 { @@ -1729,16 +1250,6 @@ union cvmx_agl_gmx_txx_stat0 { uint64_t xsdef:32; #endif } s; - struct cvmx_agl_gmx_txx_stat0_s cn52xx; - struct cvmx_agl_gmx_txx_stat0_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat0_s cn56xx; - struct cvmx_agl_gmx_txx_stat0_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat0_s cn61xx; - struct cvmx_agl_gmx_txx_stat0_s cn63xx; - struct cvmx_agl_gmx_txx_stat0_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat0_s cn66xx; - struct cvmx_agl_gmx_txx_stat0_s cn68xx; - struct cvmx_agl_gmx_txx_stat0_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat1 { @@ -1752,16 +1263,6 @@ union cvmx_agl_gmx_txx_stat1 { uint64_t scol:32; #endif } s; - struct cvmx_agl_gmx_txx_stat1_s cn52xx; - struct cvmx_agl_gmx_txx_stat1_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat1_s cn56xx; - struct cvmx_agl_gmx_txx_stat1_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat1_s cn61xx; - struct cvmx_agl_gmx_txx_stat1_s cn63xx; - struct cvmx_agl_gmx_txx_stat1_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat1_s cn66xx; - struct cvmx_agl_gmx_txx_stat1_s cn68xx; - struct cvmx_agl_gmx_txx_stat1_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat2 { @@ -1775,16 +1276,6 @@ union cvmx_agl_gmx_txx_stat2 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_txx_stat2_s cn52xx; - struct cvmx_agl_gmx_txx_stat2_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat2_s cn56xx; - struct cvmx_agl_gmx_txx_stat2_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat2_s cn61xx; - struct cvmx_agl_gmx_txx_stat2_s cn63xx; - struct cvmx_agl_gmx_txx_stat2_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat2_s cn66xx; - struct cvmx_agl_gmx_txx_stat2_s cn68xx; - struct cvmx_agl_gmx_txx_stat2_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat3 { @@ -1798,16 +1289,6 @@ union cvmx_agl_gmx_txx_stat3 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_agl_gmx_txx_stat3_s cn52xx; - struct cvmx_agl_gmx_txx_stat3_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat3_s cn56xx; - struct cvmx_agl_gmx_txx_stat3_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat3_s cn61xx; - struct cvmx_agl_gmx_txx_stat3_s cn63xx; - struct cvmx_agl_gmx_txx_stat3_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat3_s cn66xx; - struct cvmx_agl_gmx_txx_stat3_s cn68xx; - struct cvmx_agl_gmx_txx_stat3_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat4 { @@ -1821,16 +1302,6 @@ union cvmx_agl_gmx_txx_stat4 { uint64_t hist1:32; #endif } s; - struct cvmx_agl_gmx_txx_stat4_s cn52xx; - struct cvmx_agl_gmx_txx_stat4_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat4_s cn56xx; - struct cvmx_agl_gmx_txx_stat4_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat4_s cn61xx; - struct cvmx_agl_gmx_txx_stat4_s cn63xx; - struct cvmx_agl_gmx_txx_stat4_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat4_s cn66xx; - struct cvmx_agl_gmx_txx_stat4_s cn68xx; - struct cvmx_agl_gmx_txx_stat4_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat5 { @@ -1844,16 +1315,6 @@ union cvmx_agl_gmx_txx_stat5 { uint64_t hist3:32; #endif } s; - struct cvmx_agl_gmx_txx_stat5_s cn52xx; - struct cvmx_agl_gmx_txx_stat5_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat5_s cn56xx; - struct cvmx_agl_gmx_txx_stat5_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat5_s cn61xx; - struct cvmx_agl_gmx_txx_stat5_s cn63xx; - struct cvmx_agl_gmx_txx_stat5_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat5_s cn66xx; - struct cvmx_agl_gmx_txx_stat5_s cn68xx; - struct cvmx_agl_gmx_txx_stat5_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat6 { @@ -1867,16 +1328,6 @@ union cvmx_agl_gmx_txx_stat6 { uint64_t hist5:32; #endif } s; - struct cvmx_agl_gmx_txx_stat6_s cn52xx; - struct cvmx_agl_gmx_txx_stat6_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat6_s cn56xx; - struct cvmx_agl_gmx_txx_stat6_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat6_s cn61xx; - struct cvmx_agl_gmx_txx_stat6_s cn63xx; - struct cvmx_agl_gmx_txx_stat6_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat6_s cn66xx; - struct cvmx_agl_gmx_txx_stat6_s cn68xx; - struct cvmx_agl_gmx_txx_stat6_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat7 { @@ -1890,16 +1341,6 @@ union cvmx_agl_gmx_txx_stat7 { uint64_t hist7:32; #endif } s; - struct cvmx_agl_gmx_txx_stat7_s cn52xx; - struct cvmx_agl_gmx_txx_stat7_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat7_s cn56xx; - struct cvmx_agl_gmx_txx_stat7_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat7_s cn61xx; - struct cvmx_agl_gmx_txx_stat7_s cn63xx; - struct cvmx_agl_gmx_txx_stat7_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat7_s cn66xx; - struct cvmx_agl_gmx_txx_stat7_s cn68xx; - struct cvmx_agl_gmx_txx_stat7_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat8 { @@ -1913,16 +1354,6 @@ union cvmx_agl_gmx_txx_stat8 { uint64_t mcst:32; #endif } s; - struct cvmx_agl_gmx_txx_stat8_s cn52xx; - struct cvmx_agl_gmx_txx_stat8_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat8_s cn56xx; - struct cvmx_agl_gmx_txx_stat8_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat8_s cn61xx; - struct cvmx_agl_gmx_txx_stat8_s cn63xx; - struct cvmx_agl_gmx_txx_stat8_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat8_s cn66xx; - struct cvmx_agl_gmx_txx_stat8_s cn68xx; - struct cvmx_agl_gmx_txx_stat8_s cn68xxp1; }; union cvmx_agl_gmx_txx_stat9 { @@ -1936,16 +1367,6 @@ union cvmx_agl_gmx_txx_stat9 { uint64_t undflw:32; #endif } s; - struct cvmx_agl_gmx_txx_stat9_s cn52xx; - struct cvmx_agl_gmx_txx_stat9_s cn52xxp1; - struct cvmx_agl_gmx_txx_stat9_s cn56xx; - struct cvmx_agl_gmx_txx_stat9_s cn56xxp1; - struct cvmx_agl_gmx_txx_stat9_s cn61xx; - struct cvmx_agl_gmx_txx_stat9_s cn63xx; - struct cvmx_agl_gmx_txx_stat9_s cn63xxp1; - struct cvmx_agl_gmx_txx_stat9_s cn66xx; - struct cvmx_agl_gmx_txx_stat9_s cn68xx; - struct cvmx_agl_gmx_txx_stat9_s cn68xxp1; }; union cvmx_agl_gmx_txx_stats_ctl { @@ -1959,16 +1380,6 @@ union cvmx_agl_gmx_txx_stats_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_agl_gmx_txx_stats_ctl_s cn52xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn52xxp1; - struct cvmx_agl_gmx_txx_stats_ctl_s cn56xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn56xxp1; - struct cvmx_agl_gmx_txx_stats_ctl_s cn61xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn63xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn63xxp1; - struct cvmx_agl_gmx_txx_stats_ctl_s cn66xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn68xx; - struct cvmx_agl_gmx_txx_stats_ctl_s cn68xxp1; }; union cvmx_agl_gmx_txx_thresh { @@ -1982,16 +1393,6 @@ union cvmx_agl_gmx_txx_thresh { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_agl_gmx_txx_thresh_s cn52xx; - struct cvmx_agl_gmx_txx_thresh_s cn52xxp1; - struct cvmx_agl_gmx_txx_thresh_s cn56xx; - struct cvmx_agl_gmx_txx_thresh_s cn56xxp1; - struct cvmx_agl_gmx_txx_thresh_s cn61xx; - struct cvmx_agl_gmx_txx_thresh_s cn63xx; - struct cvmx_agl_gmx_txx_thresh_s cn63xxp1; - struct cvmx_agl_gmx_txx_thresh_s cn66xx; - struct cvmx_agl_gmx_txx_thresh_s cn68xx; - struct cvmx_agl_gmx_txx_thresh_s cn68xxp1; }; union cvmx_agl_gmx_tx_bp { @@ -2005,8 +1406,6 @@ union cvmx_agl_gmx_tx_bp { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_agl_gmx_tx_bp_s cn52xx; - struct cvmx_agl_gmx_tx_bp_s cn52xxp1; struct cvmx_agl_gmx_tx_bp_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63:63; @@ -2016,13 +1415,6 @@ union cvmx_agl_gmx_tx_bp { uint64_t reserved_1_63:63; #endif } cn56xx; - struct cvmx_agl_gmx_tx_bp_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_bp_s cn61xx; - struct cvmx_agl_gmx_tx_bp_s cn63xx; - struct cvmx_agl_gmx_tx_bp_s cn63xxp1; - struct cvmx_agl_gmx_tx_bp_s cn66xx; - struct cvmx_agl_gmx_tx_bp_s cn68xx; - struct cvmx_agl_gmx_tx_bp_s cn68xxp1; }; union cvmx_agl_gmx_tx_col_attempt { @@ -2036,16 +1428,6 @@ union cvmx_agl_gmx_tx_col_attempt { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_agl_gmx_tx_col_attempt_s cn52xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn52xxp1; - struct cvmx_agl_gmx_tx_col_attempt_s cn56xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn56xxp1; - struct cvmx_agl_gmx_tx_col_attempt_s cn61xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn63xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn63xxp1; - struct cvmx_agl_gmx_tx_col_attempt_s cn66xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn68xx; - struct cvmx_agl_gmx_tx_col_attempt_s cn68xxp1; }; union cvmx_agl_gmx_tx_ifg { @@ -2061,16 +1443,6 @@ union cvmx_agl_gmx_tx_ifg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_tx_ifg_s cn52xx; - struct cvmx_agl_gmx_tx_ifg_s cn52xxp1; - struct cvmx_agl_gmx_tx_ifg_s cn56xx; - struct cvmx_agl_gmx_tx_ifg_s cn56xxp1; - struct cvmx_agl_gmx_tx_ifg_s cn61xx; - struct cvmx_agl_gmx_tx_ifg_s cn63xx; - struct cvmx_agl_gmx_tx_ifg_s cn63xxp1; - struct cvmx_agl_gmx_tx_ifg_s cn66xx; - struct cvmx_agl_gmx_tx_ifg_s cn68xx; - struct cvmx_agl_gmx_tx_ifg_s cn68xxp1; }; union cvmx_agl_gmx_tx_int_en { @@ -2129,7 +1501,6 @@ union cvmx_agl_gmx_tx_int_en { uint64_t reserved_18_63:46; #endif } cn52xx; - struct cvmx_agl_gmx_tx_int_en_cn52xx cn52xxp1; struct cvmx_agl_gmx_tx_int_en_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -2155,13 +1526,6 @@ union cvmx_agl_gmx_tx_int_en { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_tx_int_en_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_int_en_s cn61xx; - struct cvmx_agl_gmx_tx_int_en_s cn63xx; - struct cvmx_agl_gmx_tx_int_en_s cn63xxp1; - struct cvmx_agl_gmx_tx_int_en_s cn66xx; - struct cvmx_agl_gmx_tx_int_en_s cn68xx; - struct cvmx_agl_gmx_tx_int_en_s cn68xxp1; }; union cvmx_agl_gmx_tx_int_reg { @@ -2220,7 +1584,6 @@ union cvmx_agl_gmx_tx_int_reg { uint64_t reserved_18_63:46; #endif } cn52xx; - struct cvmx_agl_gmx_tx_int_reg_cn52xx cn52xxp1; struct cvmx_agl_gmx_tx_int_reg_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -2246,13 +1609,6 @@ union cvmx_agl_gmx_tx_int_reg { uint64_t reserved_17_63:47; #endif } cn56xx; - struct cvmx_agl_gmx_tx_int_reg_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_int_reg_s cn61xx; - struct cvmx_agl_gmx_tx_int_reg_s cn63xx; - struct cvmx_agl_gmx_tx_int_reg_s cn63xxp1; - struct cvmx_agl_gmx_tx_int_reg_s cn66xx; - struct cvmx_agl_gmx_tx_int_reg_s cn68xx; - struct cvmx_agl_gmx_tx_int_reg_s cn68xxp1; }; union cvmx_agl_gmx_tx_jam { @@ -2266,16 +1622,6 @@ union cvmx_agl_gmx_tx_jam { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_agl_gmx_tx_jam_s cn52xx; - struct cvmx_agl_gmx_tx_jam_s cn52xxp1; - struct cvmx_agl_gmx_tx_jam_s cn56xx; - struct cvmx_agl_gmx_tx_jam_s cn56xxp1; - struct cvmx_agl_gmx_tx_jam_s cn61xx; - struct cvmx_agl_gmx_tx_jam_s cn63xx; - struct cvmx_agl_gmx_tx_jam_s cn63xxp1; - struct cvmx_agl_gmx_tx_jam_s cn66xx; - struct cvmx_agl_gmx_tx_jam_s cn68xx; - struct cvmx_agl_gmx_tx_jam_s cn68xxp1; }; union cvmx_agl_gmx_tx_lfsr { @@ -2289,16 +1635,6 @@ union cvmx_agl_gmx_tx_lfsr { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_tx_lfsr_s cn52xx; - struct cvmx_agl_gmx_tx_lfsr_s cn52xxp1; - struct cvmx_agl_gmx_tx_lfsr_s cn56xx; - struct cvmx_agl_gmx_tx_lfsr_s cn56xxp1; - struct cvmx_agl_gmx_tx_lfsr_s cn61xx; - struct cvmx_agl_gmx_tx_lfsr_s cn63xx; - struct cvmx_agl_gmx_tx_lfsr_s cn63xxp1; - struct cvmx_agl_gmx_tx_lfsr_s cn66xx; - struct cvmx_agl_gmx_tx_lfsr_s cn68xx; - struct cvmx_agl_gmx_tx_lfsr_s cn68xxp1; }; union cvmx_agl_gmx_tx_ovr_bp { @@ -2320,8 +1656,6 @@ union cvmx_agl_gmx_tx_ovr_bp { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_agl_gmx_tx_ovr_bp_s cn52xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn52xxp1; struct cvmx_agl_gmx_tx_ovr_bp_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -2339,13 +1673,6 @@ union cvmx_agl_gmx_tx_ovr_bp { uint64_t reserved_9_63:55; #endif } cn56xx; - struct cvmx_agl_gmx_tx_ovr_bp_cn56xx cn56xxp1; - struct cvmx_agl_gmx_tx_ovr_bp_s cn61xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn63xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn63xxp1; - struct cvmx_agl_gmx_tx_ovr_bp_s cn66xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn68xx; - struct cvmx_agl_gmx_tx_ovr_bp_s cn68xxp1; }; union cvmx_agl_gmx_tx_pause_pkt_dmac { @@ -2359,16 +1686,6 @@ union cvmx_agl_gmx_tx_pause_pkt_dmac { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn61xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn63xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn63xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn66xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn68xx; - struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn68xxp1; }; union cvmx_agl_gmx_tx_pause_pkt_type { @@ -2382,16 +1699,6 @@ union cvmx_agl_gmx_tx_pause_pkt_type { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn61xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn63xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn63xxp1; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn66xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn68xx; - struct cvmx_agl_gmx_tx_pause_pkt_type_s cn68xxp1; }; union cvmx_agl_prtx_ctl { @@ -2447,12 +1754,6 @@ union cvmx_agl_prtx_ctl { uint64_t drv_byp:1; #endif } s; - struct cvmx_agl_prtx_ctl_s cn61xx; - struct cvmx_agl_prtx_ctl_s cn63xx; - struct cvmx_agl_prtx_ctl_s cn63xxp1; - struct cvmx_agl_prtx_ctl_s cn66xx; - struct cvmx_agl_prtx_ctl_s cn68xx; - struct cvmx_agl_prtx_ctl_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-asxx-defs.h b/arch/mips/include/asm/octeon/cvmx-asxx-defs.h index 1eef155979f3..70f4a5729581 100644 --- a/arch/mips/include/asm/octeon/cvmx-asxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-asxx-defs.h @@ -68,9 +68,6 @@ union cvmx_asxx_gmii_rx_clk_set { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_gmii_rx_clk_set_s cn30xx; - struct cvmx_asxx_gmii_rx_clk_set_s cn31xx; - struct cvmx_asxx_gmii_rx_clk_set_s cn50xx; }; union cvmx_asxx_gmii_rx_dat_set { @@ -84,9 +81,6 @@ union cvmx_asxx_gmii_rx_dat_set { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_gmii_rx_dat_set_s cn30xx; - struct cvmx_asxx_gmii_rx_dat_set_s cn31xx; - struct cvmx_asxx_gmii_rx_dat_set_s cn50xx; }; union cvmx_asxx_int_en { @@ -121,12 +115,6 @@ union cvmx_asxx_int_en { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_asxx_int_en_cn30xx cn31xx; - struct cvmx_asxx_int_en_s cn38xx; - struct cvmx_asxx_int_en_s cn38xxp2; - struct cvmx_asxx_int_en_cn30xx cn50xx; - struct cvmx_asxx_int_en_s cn58xx; - struct cvmx_asxx_int_en_s cn58xxp1; }; union cvmx_asxx_int_reg { @@ -161,12 +149,6 @@ union cvmx_asxx_int_reg { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_asxx_int_reg_cn30xx cn31xx; - struct cvmx_asxx_int_reg_s cn38xx; - struct cvmx_asxx_int_reg_s cn38xxp2; - struct cvmx_asxx_int_reg_cn30xx cn50xx; - struct cvmx_asxx_int_reg_s cn58xx; - struct cvmx_asxx_int_reg_s cn58xxp1; }; union cvmx_asxx_mii_rx_dat_set { @@ -180,8 +162,6 @@ union cvmx_asxx_mii_rx_dat_set { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_mii_rx_dat_set_s cn30xx; - struct cvmx_asxx_mii_rx_dat_set_s cn50xx; }; union cvmx_asxx_prt_loop { @@ -210,12 +190,6 @@ union cvmx_asxx_prt_loop { uint64_t reserved_7_63:57; #endif } cn30xx; - struct cvmx_asxx_prt_loop_cn30xx cn31xx; - struct cvmx_asxx_prt_loop_s cn38xx; - struct cvmx_asxx_prt_loop_s cn38xxp2; - struct cvmx_asxx_prt_loop_cn30xx cn50xx; - struct cvmx_asxx_prt_loop_s cn58xx; - struct cvmx_asxx_prt_loop_s cn58xxp1; }; union cvmx_asxx_rld_bypass { @@ -229,10 +203,6 @@ union cvmx_asxx_rld_bypass { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_asxx_rld_bypass_s cn38xx; - struct cvmx_asxx_rld_bypass_s cn38xxp2; - struct cvmx_asxx_rld_bypass_s cn58xx; - struct cvmx_asxx_rld_bypass_s cn58xxp1; }; union cvmx_asxx_rld_bypass_setting { @@ -246,10 +216,6 @@ union cvmx_asxx_rld_bypass_setting { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_bypass_setting_s cn38xx; - struct cvmx_asxx_rld_bypass_setting_s cn38xxp2; - struct cvmx_asxx_rld_bypass_setting_s cn58xx; - struct cvmx_asxx_rld_bypass_setting_s cn58xxp1; }; union cvmx_asxx_rld_comp { @@ -276,9 +242,6 @@ union cvmx_asxx_rld_comp { uint64_t reserved_8_63:56; #endif } cn38xx; - struct cvmx_asxx_rld_comp_cn38xx cn38xxp2; - struct cvmx_asxx_rld_comp_s cn58xx; - struct cvmx_asxx_rld_comp_s cn58xxp1; }; union cvmx_asxx_rld_data_drv { @@ -294,10 +257,6 @@ union cvmx_asxx_rld_data_drv { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_asxx_rld_data_drv_s cn38xx; - struct cvmx_asxx_rld_data_drv_s cn38xxp2; - struct cvmx_asxx_rld_data_drv_s cn58xx; - struct cvmx_asxx_rld_data_drv_s cn58xxp1; }; union cvmx_asxx_rld_fcram_mode { @@ -311,8 +270,6 @@ union cvmx_asxx_rld_fcram_mode { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_asxx_rld_fcram_mode_s cn38xx; - struct cvmx_asxx_rld_fcram_mode_s cn38xxp2; }; union cvmx_asxx_rld_nctl_strong { @@ -326,10 +283,6 @@ union cvmx_asxx_rld_nctl_strong { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_nctl_strong_s cn38xx; - struct cvmx_asxx_rld_nctl_strong_s cn38xxp2; - struct cvmx_asxx_rld_nctl_strong_s cn58xx; - struct cvmx_asxx_rld_nctl_strong_s cn58xxp1; }; union cvmx_asxx_rld_nctl_weak { @@ -343,10 +296,6 @@ union cvmx_asxx_rld_nctl_weak { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_nctl_weak_s cn38xx; - struct cvmx_asxx_rld_nctl_weak_s cn38xxp2; - struct cvmx_asxx_rld_nctl_weak_s cn58xx; - struct cvmx_asxx_rld_nctl_weak_s cn58xxp1; }; union cvmx_asxx_rld_pctl_strong { @@ -360,10 +309,6 @@ union cvmx_asxx_rld_pctl_strong { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_pctl_strong_s cn38xx; - struct cvmx_asxx_rld_pctl_strong_s cn38xxp2; - struct cvmx_asxx_rld_pctl_strong_s cn58xx; - struct cvmx_asxx_rld_pctl_strong_s cn58xxp1; }; union cvmx_asxx_rld_pctl_weak { @@ -377,10 +322,6 @@ union cvmx_asxx_rld_pctl_weak { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rld_pctl_weak_s cn38xx; - struct cvmx_asxx_rld_pctl_weak_s cn38xxp2; - struct cvmx_asxx_rld_pctl_weak_s cn58xx; - struct cvmx_asxx_rld_pctl_weak_s cn58xxp1; }; union cvmx_asxx_rld_setting { @@ -411,9 +352,6 @@ union cvmx_asxx_rld_setting { uint64_t reserved_5_63:59; #endif } cn38xx; - struct cvmx_asxx_rld_setting_cn38xx cn38xxp2; - struct cvmx_asxx_rld_setting_s cn58xx; - struct cvmx_asxx_rld_setting_s cn58xxp1; }; union cvmx_asxx_rx_clk_setx { @@ -427,13 +365,6 @@ union cvmx_asxx_rx_clk_setx { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_rx_clk_setx_s cn30xx; - struct cvmx_asxx_rx_clk_setx_s cn31xx; - struct cvmx_asxx_rx_clk_setx_s cn38xx; - struct cvmx_asxx_rx_clk_setx_s cn38xxp2; - struct cvmx_asxx_rx_clk_setx_s cn50xx; - struct cvmx_asxx_rx_clk_setx_s cn58xx; - struct cvmx_asxx_rx_clk_setx_s cn58xxp1; }; union cvmx_asxx_rx_prt_en { @@ -456,12 +387,6 @@ union cvmx_asxx_rx_prt_en { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_asxx_rx_prt_en_cn30xx cn31xx; - struct cvmx_asxx_rx_prt_en_s cn38xx; - struct cvmx_asxx_rx_prt_en_s cn38xxp2; - struct cvmx_asxx_rx_prt_en_cn30xx cn50xx; - struct cvmx_asxx_rx_prt_en_s cn58xx; - struct cvmx_asxx_rx_prt_en_s cn58xxp1; }; union cvmx_asxx_rx_wol { @@ -477,8 +402,6 @@ union cvmx_asxx_rx_wol { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_asxx_rx_wol_s cn38xx; - struct cvmx_asxx_rx_wol_s cn38xxp2; }; union cvmx_asxx_rx_wol_msk { @@ -490,8 +413,6 @@ union cvmx_asxx_rx_wol_msk { uint64_t msk:64; #endif } s; - struct cvmx_asxx_rx_wol_msk_s cn38xx; - struct cvmx_asxx_rx_wol_msk_s cn38xxp2; }; union cvmx_asxx_rx_wol_powok { @@ -505,8 +426,6 @@ union cvmx_asxx_rx_wol_powok { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_asxx_rx_wol_powok_s cn38xx; - struct cvmx_asxx_rx_wol_powok_s cn38xxp2; }; union cvmx_asxx_rx_wol_sig { @@ -520,8 +439,6 @@ union cvmx_asxx_rx_wol_sig { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_asxx_rx_wol_sig_s cn38xx; - struct cvmx_asxx_rx_wol_sig_s cn38xxp2; }; union cvmx_asxx_tx_clk_setx { @@ -535,13 +452,6 @@ union cvmx_asxx_tx_clk_setx { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_asxx_tx_clk_setx_s cn30xx; - struct cvmx_asxx_tx_clk_setx_s cn31xx; - struct cvmx_asxx_tx_clk_setx_s cn38xx; - struct cvmx_asxx_tx_clk_setx_s cn38xxp2; - struct cvmx_asxx_tx_clk_setx_s cn50xx; - struct cvmx_asxx_tx_clk_setx_s cn58xx; - struct cvmx_asxx_tx_clk_setx_s cn58xxp1; }; union cvmx_asxx_tx_comp_byp { @@ -566,7 +476,6 @@ union cvmx_asxx_tx_comp_byp { uint64_t reserved_9_63:55; #endif } cn30xx; - struct cvmx_asxx_tx_comp_byp_cn30xx cn31xx; struct cvmx_asxx_tx_comp_byp_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -578,7 +487,6 @@ union cvmx_asxx_tx_comp_byp { uint64_t reserved_8_63:56; #endif } cn38xx; - struct cvmx_asxx_tx_comp_byp_cn38xx cn38xxp2; struct cvmx_asxx_tx_comp_byp_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -609,7 +517,6 @@ union cvmx_asxx_tx_comp_byp { uint64_t reserved_13_63:51; #endif } cn58xx; - struct cvmx_asxx_tx_comp_byp_cn58xx cn58xxp1; }; union cvmx_asxx_tx_hi_waterx { @@ -632,12 +539,6 @@ union cvmx_asxx_tx_hi_waterx { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_asxx_tx_hi_waterx_cn30xx cn31xx; - struct cvmx_asxx_tx_hi_waterx_s cn38xx; - struct cvmx_asxx_tx_hi_waterx_s cn38xxp2; - struct cvmx_asxx_tx_hi_waterx_cn30xx cn50xx; - struct cvmx_asxx_tx_hi_waterx_s cn58xx; - struct cvmx_asxx_tx_hi_waterx_s cn58xxp1; }; union cvmx_asxx_tx_prt_en { @@ -660,12 +561,6 @@ union cvmx_asxx_tx_prt_en { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_asxx_tx_prt_en_cn30xx cn31xx; - struct cvmx_asxx_tx_prt_en_s cn38xx; - struct cvmx_asxx_tx_prt_en_s cn38xxp2; - struct cvmx_asxx_tx_prt_en_cn30xx cn50xx; - struct cvmx_asxx_tx_prt_en_s cn58xx; - struct cvmx_asxx_tx_prt_en_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-bootmem.h b/arch/mips/include/asm/octeon/cvmx-bootmem.h index 72d2e403a6e4..689a82cac740 100644 --- a/arch/mips/include/asm/octeon/cvmx-bootmem.h +++ b/arch/mips/include/asm/octeon/cvmx-bootmem.h @@ -146,18 +146,6 @@ struct cvmx_bootmem_desc { extern int cvmx_bootmem_init(void *mem_desc_ptr); /** - * Allocate a block of memory from the free list that was passed - * to the application by the bootloader. - * This is an allocate-only algorithm, so freeing memory is not possible. - * - * @size: Size in bytes of block to allocate - * @alignment: Alignment required - must be power of 2 - * - * Returns pointer to block of memory, NULL on error - */ -extern void *cvmx_bootmem_alloc(uint64_t size, uint64_t alignment); - -/** * Allocate a block of memory from the free list that was * passed to the application by the bootloader at a specific * address. This is an allocate-only algorithm, so @@ -174,22 +162,6 @@ extern void *cvmx_bootmem_alloc_address(uint64_t size, uint64_t address, uint64_t alignment); /** - * Allocate a block of memory from the free list that was - * passed to the application by the bootloader within a specified - * address range. This is an allocate-only algorithm, so - * freeing memory is not possible. Allocation will fail if - * memory cannot be allocated in the requested range. - * - * @size: Size in bytes of block to allocate - * @min_addr: defines the minimum address of the range - * @max_addr: defines the maximum address of the range - * @alignment: Alignment required - must be power of 2 - * Returns pointer to block of memory, NULL on error - */ -extern void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, - uint64_t min_addr, uint64_t max_addr); - -/** * Frees a previously allocated named bootmem block. * * @name: name of block to free @@ -214,27 +186,6 @@ extern void *cvmx_bootmem_alloc_range(uint64_t size, uint64_t alignment, extern void *cvmx_bootmem_alloc_named(uint64_t size, uint64_t alignment, char *name); - - -/** - * Allocate a block of memory from the free list that was passed - * to the application by the bootloader, and assign it a name in the - * global named block table. (part of the cvmx_bootmem_descriptor_t structure) - * Named blocks can later be freed. - * - * @size: Size in bytes of block to allocate - * @address: Physical address to allocate memory at. If this - * memory is not available, the allocation fails. - * @name: name of block - must be less than CVMX_BOOTMEM_NAME_LEN - * bytes - * - * Returns a pointer to block of memory, NULL on error - */ -extern void *cvmx_bootmem_alloc_named_address(uint64_t size, uint64_t address, - char *name); - - - /** * Allocate a block of memory from a specific range of the free list * that was passed to the application by the bootloader, and assign it @@ -351,33 +302,6 @@ int64_t cvmx_bootmem_phy_named_block_alloc(uint64_t size, uint64_t min_addr, char *name, uint32_t flags); /** - * Finds a named memory block by name. - * Also used for finding an unused entry in the named block table. - * - * @name: Name of memory block to find. If NULL pointer given, then - * finds unused descriptor, if available. - * - * @flags: Flags to control options for the allocation. - * - * Returns Pointer to memory block descriptor, NULL if not found. - * If NULL returned when name parameter is NULL, then no memory - * block descriptors are available. - */ -struct cvmx_bootmem_named_block_desc * -cvmx_bootmem_phy_named_block_find(char *name, uint32_t flags); - -/** - * Frees a named block. - * - * @name: name of block to free - * @flags: flags for passing options - * - * Returns 0 on failure - * 1 on success - */ -int cvmx_bootmem_phy_named_block_free(char *name, uint32_t flags); - -/** * Frees a block to the bootmem allocator list. This must * be used with care, as the size provided must match the size * of the block that was allocated, or the list will become diff --git a/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h b/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h index 148bc9a0085d..5babd88d4110 100644 --- a/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h @@ -28,7081 +28,21 @@ #ifndef __CVMX_CIU2_DEFS_H__ #define __CVMX_CIU2_DEFS_H__ -#define CVMX_CIU2_ACK_IOX_INT(block_id) (CVMX_ADD_IO_SEG(0x00010701080C0800ull) + ((block_id) & 1) * 0x200000ull) #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_ACK_PPX_IP4(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108097800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B7800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A7800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108094800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B4800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A4800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070108098800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B8800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A8800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108095800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B5800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A5800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108093800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B3800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A3800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108096800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B6800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A6800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108092800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B2800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A2800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108091800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B1800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A1800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108090800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B0800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_IOX_INT_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A0800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP2_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098200ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8200ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP3_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_EN_PPX_IP4_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0400ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_INTR_CIU_READY (CVMX_ADD_IO_SEG(0x0001070100102008ull)) -#define CVMX_CIU2_INTR_RAM_ECC_CTL (CVMX_ADD_IO_SEG(0x0001070100102010ull)) -#define CVMX_CIU2_INTR_RAM_ECC_ST (CVMX_ADD_IO_SEG(0x0001070100102018ull)) -#define CVMX_CIU2_INTR_SLOWDOWN (CVMX_ADD_IO_SEG(0x0001070100102000ull)) -#define CVMX_CIU2_MSIRED_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_MSIRED_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_MSIRED_PPX_IP4(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_MSI_RCVX(offset) (CVMX_ADD_IO_SEG(0x00010701000C2000ull) + ((offset) & 255) * 8) -#define CVMX_CIU2_MSI_SELX(offset) (CVMX_ADD_IO_SEG(0x00010701000C3000ull) + ((offset) & 255) * 8) -#define CVMX_CIU2_RAW_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108047800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108044800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108045800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108043800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108046800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108042800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108041800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108040800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_RAW_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_RAW_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108087800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108084800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070108088800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108085800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108083800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108086800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108082800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108081800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108080800ull) + ((block_id) & 1) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_SRC_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_SRC_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081000ull) + ((block_id) & 31) * 0x200000ull) #define CVMX_CIU2_SRC_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080000ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080200ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SRC_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080400ull) + ((block_id) & 31) * 0x200000ull) -#define CVMX_CIU2_SUM_IOX_INT(offset) (CVMX_ADD_IO_SEG(0x0001070100000800ull) + ((offset) & 1) * 8) #define CVMX_CIU2_SUM_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x0001070100000000ull) + ((offset) & 31) * 8) #define CVMX_CIU2_SUM_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x0001070100000200ull) + ((offset) & 31) * 8) -#define CVMX_CIU2_SUM_PPX_IP4(offset) (CVMX_ADD_IO_SEG(0x0001070100000400ull) + ((offset) & 31) * 8) - -union cvmx_ciu2_ack_iox_int { - uint64_t u64; - struct cvmx_ciu2_ack_iox_int_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_iox_int_s cn68xx; - struct cvmx_ciu2_ack_iox_int_s cn68xxp1; -}; - -union cvmx_ciu2_ack_ppx_ip2 { - uint64_t u64; - struct cvmx_ciu2_ack_ppx_ip2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_ppx_ip2_s cn68xx; - struct cvmx_ciu2_ack_ppx_ip2_s cn68xxp1; -}; - -union cvmx_ciu2_ack_ppx_ip3 { - uint64_t u64; - struct cvmx_ciu2_ack_ppx_ip3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_ppx_ip3_s cn68xx; - struct cvmx_ciu2_ack_ppx_ip3_s cn68xxp1; -}; - -union cvmx_ciu2_ack_ppx_ip4 { - uint64_t u64; - struct cvmx_ciu2_ack_ppx_ip4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ack:1; -#else - uint64_t ack:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_ack_ppx_ip4_s cn68xx; - struct cvmx_ciu2_ack_ppx_ip4_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_gpio { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_iox_int_gpio_s cn68xx; - struct cvmx_ciu2_en_iox_int_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_iox_int_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_iox_int_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_io { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_iox_int_io_s cn68xx; - struct cvmx_ciu2_en_iox_int_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_iox_int_io_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_iox_int_io_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mbox { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mbox_s cn68xx; - struct cvmx_ciu2_en_iox_int_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mem { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mem_s cn68xx; - struct cvmx_ciu2_en_iox_int_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mio { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mio_s cn68xx; - struct cvmx_ciu2_en_iox_int_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_iox_int_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_pkt { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_iox_int_pkt_s cn68xx; - struct cvmx_ciu2_en_iox_int_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_iox_int_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_iox_int_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_rml { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_iox_int_rml_s cn68xx; - struct cvmx_ciu2_en_iox_int_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_iox_int_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_iox_int_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wdog { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wdog_s cn68xx; - struct cvmx_ciu2_en_iox_int_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wrkq_s cn68xx; - struct cvmx_ciu2_en_iox_int_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_iox_int_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_iox_int_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_iox_int_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_iox_int_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_iox_int_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_gpio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_gpio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_io { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_io_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_io_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_io_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mbox { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mbox_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mem { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mem_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_pkt { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_pkt_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_rml { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_rml_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wdog { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wdog_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wrkq_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip2_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_gpio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_gpio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_io { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_io_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_io_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_io_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mbox { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mbox_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mem { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mem_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_pkt { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_pkt_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_rml { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_rml_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wdog { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wdog_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wrkq_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip3_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_gpio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_gpio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_gpio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_gpio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_io { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_io_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_io_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_io_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_io_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_io_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_io_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_io_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_io_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_io_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_io_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mbox { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mbox_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mbox_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mbox_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mem { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mem_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mem_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mem_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mem_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mio { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mio_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mio_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mio_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_mio_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_pkt { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_pkt_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_pkt_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_pkt_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_rml { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_rml_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_rml_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_rml_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_rml_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_rml_w1c_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_rml_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_rml_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_rml_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_rml_w1s_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wdog { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wdog_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wdog_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wdog_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wrkq { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wrkq_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wrkq_w1c { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s cn68xxp1; -}; - -union cvmx_ciu2_en_ppx_ip4_wrkq_w1s { - uint64_t u64; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s cn68xx; - struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s cn68xxp1; -}; - -union cvmx_ciu2_intr_ciu_ready { - uint64_t u64; - struct cvmx_ciu2_intr_ciu_ready_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t ready:1; -#else - uint64_t ready:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_intr_ciu_ready_s cn68xx; - struct cvmx_ciu2_intr_ciu_ready_s cn68xxp1; -}; - -union cvmx_ciu2_intr_ram_ecc_ctl { - uint64_t u64; - struct cvmx_ciu2_intr_ram_ecc_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t flip_synd:2; - uint64_t ecc_ena:1; -#else - uint64_t ecc_ena:1; - uint64_t flip_synd:2; - uint64_t reserved_3_63:61; -#endif - } s; - struct cvmx_ciu2_intr_ram_ecc_ctl_s cn68xx; - struct cvmx_ciu2_intr_ram_ecc_ctl_s cn68xxp1; -}; - -union cvmx_ciu2_intr_ram_ecc_st { - uint64_t u64; - struct cvmx_ciu2_intr_ram_ecc_st_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_23_63:41; - uint64_t addr:7; - uint64_t reserved_13_15:3; - uint64_t syndrom:9; - uint64_t reserved_2_3:2; - uint64_t dbe:1; - uint64_t sbe:1; -#else - uint64_t sbe:1; - uint64_t dbe:1; - uint64_t reserved_2_3:2; - uint64_t syndrom:9; - uint64_t reserved_13_15:3; - uint64_t addr:7; - uint64_t reserved_23_63:41; -#endif - } s; - struct cvmx_ciu2_intr_ram_ecc_st_s cn68xx; - struct cvmx_ciu2_intr_ram_ecc_st_s cn68xxp1; -}; - -union cvmx_ciu2_intr_slowdown { - uint64_t u64; - struct cvmx_ciu2_intr_slowdown_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t ctl:3; -#else - uint64_t ctl:3; - uint64_t reserved_3_63:61; -#endif - } s; - struct cvmx_ciu2_intr_slowdown_s cn68xx; - struct cvmx_ciu2_intr_slowdown_s cn68xxp1; -}; - -union cvmx_ciu2_msi_rcvx { - uint64_t u64; - struct cvmx_ciu2_msi_rcvx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t msi_rcv:1; -#else - uint64_t msi_rcv:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_ciu2_msi_rcvx_s cn68xx; - struct cvmx_ciu2_msi_rcvx_s cn68xxp1; -}; - -union cvmx_ciu2_msi_selx { - uint64_t u64; - struct cvmx_ciu2_msi_selx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_13_63:51; - uint64_t pp_num:5; - uint64_t reserved_6_7:2; - uint64_t ip_num:2; - uint64_t reserved_1_3:3; - uint64_t en:1; -#else - uint64_t en:1; - uint64_t reserved_1_3:3; - uint64_t ip_num:2; - uint64_t reserved_6_7:2; - uint64_t pp_num:5; - uint64_t reserved_13_63:51; -#endif - } s; - struct cvmx_ciu2_msi_selx_s cn68xx; - struct cvmx_ciu2_msi_selx_s cn68xxp1; -}; - -union cvmx_ciu2_msired_ppx_ip2 { - uint64_t u64; - struct cvmx_ciu2_msired_ppx_ip2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_21_63:43; - uint64_t intr:1; - uint64_t reserved_17_19:3; - uint64_t newint:1; - uint64_t reserved_8_15:8; - uint64_t msi_num:8; -#else - uint64_t msi_num:8; - uint64_t reserved_8_15:8; - uint64_t newint:1; - uint64_t reserved_17_19:3; - uint64_t intr:1; - uint64_t reserved_21_63:43; -#endif - } s; - struct cvmx_ciu2_msired_ppx_ip2_s cn68xx; - struct cvmx_ciu2_msired_ppx_ip2_s cn68xxp1; -}; - -union cvmx_ciu2_msired_ppx_ip3 { - uint64_t u64; - struct cvmx_ciu2_msired_ppx_ip3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_21_63:43; - uint64_t intr:1; - uint64_t reserved_17_19:3; - uint64_t newint:1; - uint64_t reserved_8_15:8; - uint64_t msi_num:8; -#else - uint64_t msi_num:8; - uint64_t reserved_8_15:8; - uint64_t newint:1; - uint64_t reserved_17_19:3; - uint64_t intr:1; - uint64_t reserved_21_63:43; -#endif - } s; - struct cvmx_ciu2_msired_ppx_ip3_s cn68xx; - struct cvmx_ciu2_msired_ppx_ip3_s cn68xxp1; -}; - -union cvmx_ciu2_msired_ppx_ip4 { - uint64_t u64; - struct cvmx_ciu2_msired_ppx_ip4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_21_63:43; - uint64_t intr:1; - uint64_t reserved_17_19:3; - uint64_t newint:1; - uint64_t reserved_8_15:8; - uint64_t msi_num:8; -#else - uint64_t msi_num:8; - uint64_t reserved_8_15:8; - uint64_t newint:1; - uint64_t reserved_17_19:3; - uint64_t intr:1; - uint64_t reserved_21_63:43; -#endif - } s; - struct cvmx_ciu2_msired_ppx_ip4_s cn68xx; - struct cvmx_ciu2_msired_ppx_ip4_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_gpio_s cn68xx; - struct cvmx_ciu2_raw_iox_int_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_io { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_io_s cn68xx; - struct cvmx_ciu2_raw_iox_int_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_mem { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_mem_s cn68xx; - struct cvmx_ciu2_raw_iox_int_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_mio { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_mio_s cn68xx; - struct cvmx_ciu2_raw_iox_int_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_pkt_s cn68xx; - struct cvmx_ciu2_raw_iox_int_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_rml { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_rml_s cn68xx; - struct cvmx_ciu2_raw_iox_int_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_wdog_s cn68xx; - struct cvmx_ciu2_raw_iox_int_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_iox_int_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_iox_int_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_iox_int_wrkq_s cn68xx; - struct cvmx_ciu2_raw_iox_int_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_gpio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_io { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_io_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_mem { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_mem_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_mio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_mio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_pkt_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_rml { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_rml_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_wdog_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip2_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip2_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip2_wrkq_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip2_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_gpio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_io { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_io_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_mem { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_mem_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_mio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_mio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_pkt_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_rml { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_rml_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_wdog_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip3_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip3_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip3_wrkq_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip3_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_gpio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_gpio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_io { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_io_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_io_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_mem { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_mem_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_mem_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_mio { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_mio_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_mio_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_pkt { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_pkt_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_rml { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_rml_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_wdog { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_wdog_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_raw_ppx_ip4_wrkq { - uint64_t u64; - struct cvmx_ciu2_raw_ppx_ip4_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_raw_ppx_ip4_wrkq_s cn68xx; - struct cvmx_ciu2_raw_ppx_ip4_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_gpio { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_iox_int_gpio_s cn68xx; - struct cvmx_ciu2_src_iox_int_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_io { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_iox_int_io_s cn68xx; - struct cvmx_ciu2_src_iox_int_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_mbox { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_iox_int_mbox_s cn68xx; - struct cvmx_ciu2_src_iox_int_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_mem { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_iox_int_mem_s cn68xx; - struct cvmx_ciu2_src_iox_int_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_mio { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_iox_int_mio_s cn68xx; - struct cvmx_ciu2_src_iox_int_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_pkt { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_iox_int_pkt_s cn68xx; - struct cvmx_ciu2_src_iox_int_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_rml { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_iox_int_rml_s cn68xx; - struct cvmx_ciu2_src_iox_int_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_wdog { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_iox_int_wdog_s cn68xx; - struct cvmx_ciu2_src_iox_int_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_iox_int_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_iox_int_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_iox_int_wrkq_s cn68xx; - struct cvmx_ciu2_src_iox_int_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_gpio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_gpio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_io { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_io_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_mbox { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_mbox_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_mem { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_mem_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_mio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_mio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_pkt { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_pkt_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_rml { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_rml_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_wdog { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_wdog_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip2_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip2_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip2_wrkq_s cn68xx; - struct cvmx_ciu2_src_ppx_ip2_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_gpio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_gpio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_io { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_io_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_mbox { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_mbox_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_mem { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_mem_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_mio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_mio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_pkt { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_pkt_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_rml { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_rml_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_wdog { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_wdog_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip3_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip3_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip3_wrkq_s cn68xx; - struct cvmx_ciu2_src_ppx_ip3_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_gpio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_gpio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t gpio:16; -#else - uint64_t gpio:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_gpio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_gpio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_io { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_io_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_34_63:30; - uint64_t pem:2; - uint64_t reserved_18_31:14; - uint64_t pci_inta:2; - uint64_t reserved_13_15:3; - uint64_t msired:1; - uint64_t pci_msi:4; - uint64_t reserved_4_7:4; - uint64_t pci_intr:4; -#else - uint64_t pci_intr:4; - uint64_t reserved_4_7:4; - uint64_t pci_msi:4; - uint64_t msired:1; - uint64_t reserved_13_15:3; - uint64_t pci_inta:2; - uint64_t reserved_18_31:14; - uint64_t pem:2; - uint64_t reserved_34_63:30; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_io_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_io_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_mbox { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_mbox_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t mbox:4; -#else - uint64_t mbox:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_mbox_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_mbox_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_mem { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_mem_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t lmc:4; -#else - uint64_t lmc:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_mem_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_mem_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_mio { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_mio_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t rst:1; - uint64_t reserved_49_62:14; - uint64_t ptp:1; - uint64_t reserved_45_47:3; - uint64_t usb_hci:1; - uint64_t reserved_41_43:3; - uint64_t usb_uctl:1; - uint64_t reserved_38_39:2; - uint64_t uart:2; - uint64_t reserved_34_35:2; - uint64_t twsi:2; - uint64_t reserved_19_31:13; - uint64_t bootdma:1; - uint64_t mio:1; - uint64_t nand:1; - uint64_t reserved_12_15:4; - uint64_t timer:4; - uint64_t reserved_3_7:5; - uint64_t ipd_drp:1; - uint64_t ssoiq:1; - uint64_t ipdppthr:1; -#else - uint64_t ipdppthr:1; - uint64_t ssoiq:1; - uint64_t ipd_drp:1; - uint64_t reserved_3_7:5; - uint64_t timer:4; - uint64_t reserved_12_15:4; - uint64_t nand:1; - uint64_t mio:1; - uint64_t bootdma:1; - uint64_t reserved_19_31:13; - uint64_t twsi:2; - uint64_t reserved_34_35:2; - uint64_t uart:2; - uint64_t reserved_38_39:2; - uint64_t usb_uctl:1; - uint64_t reserved_41_43:3; - uint64_t usb_hci:1; - uint64_t reserved_45_47:3; - uint64_t ptp:1; - uint64_t reserved_49_62:14; - uint64_t rst:1; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_mio_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_mio_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_pkt { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_54_63:10; - uint64_t ilk_drp:2; - uint64_t reserved_49_51:3; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_51:3; - uint64_t ilk_drp:2; - uint64_t reserved_54_63:10; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_pkt_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_pkt_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_49_63:15; - uint64_t ilk:1; - uint64_t reserved_41_47:7; - uint64_t mii:1; - uint64_t reserved_33_39:7; - uint64_t agl:1; - uint64_t reserved_13_31:19; - uint64_t gmx_drp:5; - uint64_t reserved_5_7:3; - uint64_t agx:5; -#else - uint64_t agx:5; - uint64_t reserved_5_7:3; - uint64_t gmx_drp:5; - uint64_t reserved_13_31:19; - uint64_t agl:1; - uint64_t reserved_33_39:7; - uint64_t mii:1; - uint64_t reserved_41_47:7; - uint64_t ilk:1; - uint64_t reserved_49_63:15; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_rml { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_rml_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_37_39:3; - uint64_t dpi_dma:1; - uint64_t reserved_34_35:2; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_35:2; - uint64_t dpi_dma:1; - uint64_t reserved_37_39:3; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_rml_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_rml_cn68xxp1 { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_56_63:8; - uint64_t trace:4; - uint64_t reserved_49_51:3; - uint64_t l2c:1; - uint64_t reserved_41_47:7; - uint64_t dfa:1; - uint64_t reserved_34_39:6; - uint64_t dpi:1; - uint64_t sli:1; - uint64_t reserved_31_31:1; - uint64_t key:1; - uint64_t rad:1; - uint64_t tim:1; - uint64_t reserved_25_27:3; - uint64_t zip:1; - uint64_t reserved_17_23:7; - uint64_t sso:1; - uint64_t reserved_8_15:8; - uint64_t pko:1; - uint64_t pip:1; - uint64_t ipd:1; - uint64_t fpa:1; - uint64_t reserved_1_3:3; - uint64_t iob:1; -#else - uint64_t iob:1; - uint64_t reserved_1_3:3; - uint64_t fpa:1; - uint64_t ipd:1; - uint64_t pip:1; - uint64_t pko:1; - uint64_t reserved_8_15:8; - uint64_t sso:1; - uint64_t reserved_17_23:7; - uint64_t zip:1; - uint64_t reserved_25_27:3; - uint64_t tim:1; - uint64_t rad:1; - uint64_t key:1; - uint64_t reserved_31_31:1; - uint64_t sli:1; - uint64_t dpi:1; - uint64_t reserved_34_39:6; - uint64_t dfa:1; - uint64_t reserved_41_47:7; - uint64_t l2c:1; - uint64_t reserved_49_51:3; - uint64_t trace:4; - uint64_t reserved_56_63:8; -#endif - } cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_wdog { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_wdog_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t wdog:32; -#else - uint64_t wdog:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_wdog_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_wdog_s cn68xxp1; -}; - -union cvmx_ciu2_src_ppx_ip4_wrkq { - uint64_t u64; - struct cvmx_ciu2_src_ppx_ip4_wrkq_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t workq:64; -#else - uint64_t workq:64; -#endif - } s; - struct cvmx_ciu2_src_ppx_ip4_wrkq_s cn68xx; - struct cvmx_ciu2_src_ppx_ip4_wrkq_s cn68xxp1; -}; - -union cvmx_ciu2_sum_iox_int { - uint64_t u64; - struct cvmx_ciu2_sum_iox_int_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_iox_int_s cn68xx; - struct cvmx_ciu2_sum_iox_int_s cn68xxp1; -}; - -union cvmx_ciu2_sum_ppx_ip2 { - uint64_t u64; - struct cvmx_ciu2_sum_ppx_ip2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_ppx_ip2_s cn68xx; - struct cvmx_ciu2_sum_ppx_ip2_s cn68xxp1; -}; - -union cvmx_ciu2_sum_ppx_ip3 { - uint64_t u64; - struct cvmx_ciu2_sum_ppx_ip3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_ppx_ip3_s cn68xx; - struct cvmx_ciu2_sum_ppx_ip3_s cn68xxp1; -}; - -union cvmx_ciu2_sum_ppx_ip4 { - uint64_t u64; - struct cvmx_ciu2_sum_ppx_ip4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mbox:4; - uint64_t reserved_8_59:52; - uint64_t gpio:1; - uint64_t pkt:1; - uint64_t mem:1; - uint64_t io:1; - uint64_t mio:1; - uint64_t rml:1; - uint64_t wdog:1; - uint64_t workq:1; -#else - uint64_t workq:1; - uint64_t wdog:1; - uint64_t rml:1; - uint64_t mio:1; - uint64_t io:1; - uint64_t mem:1; - uint64_t pkt:1; - uint64_t gpio:1; - uint64_t reserved_8_59:52; - uint64_t mbox:4; -#endif - } s; - struct cvmx_ciu2_sum_ppx_ip4_s cn68xx; - struct cvmx_ciu2_sum_ppx_ip4_s cn68xxp1; -}; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-dbg-defs.h b/arch/mips/include/asm/octeon/cvmx-dbg-defs.h index 40799cdae695..828d07d87f03 100644 --- a/arch/mips/include/asm/octeon/cvmx-dbg-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-dbg-defs.h @@ -62,7 +62,6 @@ union cvmx_dbg_data { uint64_t reserved_31_63:33; #endif } cn30xx; - struct cvmx_dbg_data_cn30xx cn31xx; struct cvmx_dbg_data_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -82,8 +81,6 @@ union cvmx_dbg_data { uint64_t reserved_29_63:35; #endif } cn38xx; - struct cvmx_dbg_data_cn38xx cn38xxp2; - struct cvmx_dbg_data_cn30xx cn50xx; struct cvmx_dbg_data_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -99,7 +96,6 @@ union cvmx_dbg_data { uint64_t reserved_29_63:35; #endif } cn58xx; - struct cvmx_dbg_data_cn58xx cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-dpi-defs.h b/arch/mips/include/asm/octeon/cvmx-dpi-defs.h index dd5b0428de35..e8613e1f6930 100644 --- a/arch/mips/include/asm/octeon/cvmx-dpi-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-dpi-defs.h @@ -89,7 +89,6 @@ union cvmx_dpi_bist_status { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_dpi_bist_status_s cn61xx; struct cvmx_dpi_bist_status_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_45_63:19; @@ -108,10 +107,6 @@ union cvmx_dpi_bist_status { uint64_t reserved_37_63:27; #endif } cn63xxp1; - struct cvmx_dpi_bist_status_s cn66xx; - struct cvmx_dpi_bist_status_cn63xx cn68xx; - struct cvmx_dpi_bist_status_cn63xx cn68xxp1; - struct cvmx_dpi_bist_status_s cnf71xx; }; union cvmx_dpi_ctl { @@ -136,12 +131,6 @@ union cvmx_dpi_ctl { uint64_t reserved_1_63:63; #endif } cn61xx; - struct cvmx_dpi_ctl_s cn63xx; - struct cvmx_dpi_ctl_s cn63xxp1; - struct cvmx_dpi_ctl_s cn66xx; - struct cvmx_dpi_ctl_s cn68xx; - struct cvmx_dpi_ctl_s cn68xxp1; - struct cvmx_dpi_ctl_cn61xx cnf71xx; }; union cvmx_dpi_dmax_counts { @@ -157,13 +146,6 @@ union cvmx_dpi_dmax_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_dpi_dmax_counts_s cn61xx; - struct cvmx_dpi_dmax_counts_s cn63xx; - struct cvmx_dpi_dmax_counts_s cn63xxp1; - struct cvmx_dpi_dmax_counts_s cn66xx; - struct cvmx_dpi_dmax_counts_s cn68xx; - struct cvmx_dpi_dmax_counts_s cn68xxp1; - struct cvmx_dpi_dmax_counts_s cnf71xx; }; union cvmx_dpi_dmax_dbell { @@ -177,13 +159,6 @@ union cvmx_dpi_dmax_dbell { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_dpi_dmax_dbell_s cn61xx; - struct cvmx_dpi_dmax_dbell_s cn63xx; - struct cvmx_dpi_dmax_dbell_s cn63xxp1; - struct cvmx_dpi_dmax_dbell_s cn66xx; - struct cvmx_dpi_dmax_dbell_s cn68xx; - struct cvmx_dpi_dmax_dbell_s cn68xxp1; - struct cvmx_dpi_dmax_dbell_s cnf71xx; }; union cvmx_dpi_dmax_err_rsp_status { @@ -197,11 +172,6 @@ union cvmx_dpi_dmax_err_rsp_status { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_dpi_dmax_err_rsp_status_s cn61xx; - struct cvmx_dpi_dmax_err_rsp_status_s cn66xx; - struct cvmx_dpi_dmax_err_rsp_status_s cn68xx; - struct cvmx_dpi_dmax_err_rsp_status_s cn68xxp1; - struct cvmx_dpi_dmax_err_rsp_status_s cnf71xx; }; union cvmx_dpi_dmax_ibuff_saddr { @@ -242,12 +212,6 @@ union cvmx_dpi_dmax_ibuff_saddr { uint64_t reserved_62_63:2; #endif } cn61xx; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xx; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xxp1; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn66xx; - struct cvmx_dpi_dmax_ibuff_saddr_s cn68xx; - struct cvmx_dpi_dmax_ibuff_saddr_s cn68xxp1; - struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cnf71xx; }; union cvmx_dpi_dmax_iflight { @@ -261,11 +225,6 @@ union cvmx_dpi_dmax_iflight { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_dpi_dmax_iflight_s cn61xx; - struct cvmx_dpi_dmax_iflight_s cn66xx; - struct cvmx_dpi_dmax_iflight_s cn68xx; - struct cvmx_dpi_dmax_iflight_s cn68xxp1; - struct cvmx_dpi_dmax_iflight_s cnf71xx; }; union cvmx_dpi_dmax_naddr { @@ -288,12 +247,6 @@ union cvmx_dpi_dmax_naddr { uint64_t reserved_36_63:28; #endif } cn61xx; - struct cvmx_dpi_dmax_naddr_cn61xx cn63xx; - struct cvmx_dpi_dmax_naddr_cn61xx cn63xxp1; - struct cvmx_dpi_dmax_naddr_cn61xx cn66xx; - struct cvmx_dpi_dmax_naddr_s cn68xx; - struct cvmx_dpi_dmax_naddr_s cn68xxp1; - struct cvmx_dpi_dmax_naddr_cn61xx cnf71xx; }; union cvmx_dpi_dmax_reqbnk0 { @@ -305,13 +258,6 @@ union cvmx_dpi_dmax_reqbnk0 { uint64_t state:64; #endif } s; - struct cvmx_dpi_dmax_reqbnk0_s cn61xx; - struct cvmx_dpi_dmax_reqbnk0_s cn63xx; - struct cvmx_dpi_dmax_reqbnk0_s cn63xxp1; - struct cvmx_dpi_dmax_reqbnk0_s cn66xx; - struct cvmx_dpi_dmax_reqbnk0_s cn68xx; - struct cvmx_dpi_dmax_reqbnk0_s cn68xxp1; - struct cvmx_dpi_dmax_reqbnk0_s cnf71xx; }; union cvmx_dpi_dmax_reqbnk1 { @@ -323,13 +269,6 @@ union cvmx_dpi_dmax_reqbnk1 { uint64_t state:64; #endif } s; - struct cvmx_dpi_dmax_reqbnk1_s cn61xx; - struct cvmx_dpi_dmax_reqbnk1_s cn63xx; - struct cvmx_dpi_dmax_reqbnk1_s cn63xxp1; - struct cvmx_dpi_dmax_reqbnk1_s cn66xx; - struct cvmx_dpi_dmax_reqbnk1_s cn68xx; - struct cvmx_dpi_dmax_reqbnk1_s cn68xxp1; - struct cvmx_dpi_dmax_reqbnk1_s cnf71xx; }; union cvmx_dpi_dma_control { @@ -379,7 +318,6 @@ union cvmx_dpi_dma_control { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_dpi_dma_control_s cn61xx; struct cvmx_dpi_dma_control_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_61_63:3; @@ -462,10 +400,6 @@ union cvmx_dpi_dma_control { uint64_t reserved_59_63:5; #endif } cn63xxp1; - struct cvmx_dpi_dma_control_cn63xx cn66xx; - struct cvmx_dpi_dma_control_s cn68xx; - struct cvmx_dpi_dma_control_cn63xx cn68xxp1; - struct cvmx_dpi_dma_control_s cnf71xx; }; union cvmx_dpi_dma_engx_en { @@ -479,13 +413,6 @@ union cvmx_dpi_dma_engx_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_dma_engx_en_s cn61xx; - struct cvmx_dpi_dma_engx_en_s cn63xx; - struct cvmx_dpi_dma_engx_en_s cn63xxp1; - struct cvmx_dpi_dma_engx_en_s cn66xx; - struct cvmx_dpi_dma_engx_en_s cn68xx; - struct cvmx_dpi_dma_engx_en_s cn68xxp1; - struct cvmx_dpi_dma_engx_en_s cnf71xx; }; union cvmx_dpi_dma_ppx_cnt { @@ -499,9 +426,6 @@ union cvmx_dpi_dma_ppx_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_dpi_dma_ppx_cnt_s cn61xx; - struct cvmx_dpi_dma_ppx_cnt_s cn68xx; - struct cvmx_dpi_dma_ppx_cnt_s cnf71xx; }; union cvmx_dpi_engx_buf { @@ -521,7 +445,6 @@ union cvmx_dpi_engx_buf { uint64_t reserved_37_63:27; #endif } s; - struct cvmx_dpi_engx_buf_s cn61xx; struct cvmx_dpi_engx_buf_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -533,11 +456,6 @@ union cvmx_dpi_engx_buf { uint64_t reserved_8_63:56; #endif } cn63xx; - struct cvmx_dpi_engx_buf_cn63xx cn63xxp1; - struct cvmx_dpi_engx_buf_s cn66xx; - struct cvmx_dpi_engx_buf_s cn68xx; - struct cvmx_dpi_engx_buf_s cn68xxp1; - struct cvmx_dpi_engx_buf_s cnf71xx; }; union cvmx_dpi_info_reg { @@ -557,8 +475,6 @@ union cvmx_dpi_info_reg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_info_reg_s cn61xx; - struct cvmx_dpi_info_reg_s cn63xx; struct cvmx_dpi_info_reg_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -570,10 +486,6 @@ union cvmx_dpi_info_reg { uint64_t reserved_2_63:62; #endif } cn63xxp1; - struct cvmx_dpi_info_reg_s cn66xx; - struct cvmx_dpi_info_reg_s cn68xx; - struct cvmx_dpi_info_reg_s cn68xxp1; - struct cvmx_dpi_info_reg_s cnf71xx; }; union cvmx_dpi_int_en { @@ -617,7 +529,6 @@ union cvmx_dpi_int_en { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_dpi_int_en_s cn61xx; struct cvmx_dpi_int_en_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_26_63:38; @@ -653,11 +564,6 @@ union cvmx_dpi_int_en { uint64_t reserved_26_63:38; #endif } cn63xx; - struct cvmx_dpi_int_en_cn63xx cn63xxp1; - struct cvmx_dpi_int_en_s cn66xx; - struct cvmx_dpi_int_en_cn63xx cn68xx; - struct cvmx_dpi_int_en_cn63xx cn68xxp1; - struct cvmx_dpi_int_en_s cnf71xx; }; union cvmx_dpi_int_reg { @@ -701,7 +607,6 @@ union cvmx_dpi_int_reg { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_dpi_int_reg_s cn61xx; struct cvmx_dpi_int_reg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_26_63:38; @@ -737,11 +642,6 @@ union cvmx_dpi_int_reg { uint64_t reserved_26_63:38; #endif } cn63xx; - struct cvmx_dpi_int_reg_cn63xx cn63xxp1; - struct cvmx_dpi_int_reg_s cn66xx; - struct cvmx_dpi_int_reg_cn63xx cn68xx; - struct cvmx_dpi_int_reg_cn63xx cn68xxp1; - struct cvmx_dpi_int_reg_s cnf71xx; }; union cvmx_dpi_ncbx_cfg { @@ -755,10 +655,6 @@ union cvmx_dpi_ncbx_cfg { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_dpi_ncbx_cfg_s cn61xx; - struct cvmx_dpi_ncbx_cfg_s cn66xx; - struct cvmx_dpi_ncbx_cfg_s cn68xx; - struct cvmx_dpi_ncbx_cfg_s cnf71xx; }; union cvmx_dpi_pint_info { @@ -776,13 +672,6 @@ union cvmx_dpi_pint_info { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_dpi_pint_info_s cn61xx; - struct cvmx_dpi_pint_info_s cn63xx; - struct cvmx_dpi_pint_info_s cn63xxp1; - struct cvmx_dpi_pint_info_s cn66xx; - struct cvmx_dpi_pint_info_s cn68xx; - struct cvmx_dpi_pint_info_s cn68xxp1; - struct cvmx_dpi_pint_info_s cnf71xx; }; union cvmx_dpi_pkt_err_rsp { @@ -796,13 +685,6 @@ union cvmx_dpi_pkt_err_rsp { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_dpi_pkt_err_rsp_s cn61xx; - struct cvmx_dpi_pkt_err_rsp_s cn63xx; - struct cvmx_dpi_pkt_err_rsp_s cn63xxp1; - struct cvmx_dpi_pkt_err_rsp_s cn66xx; - struct cvmx_dpi_pkt_err_rsp_s cn68xx; - struct cvmx_dpi_pkt_err_rsp_s cn68xxp1; - struct cvmx_dpi_pkt_err_rsp_s cnf71xx; }; union cvmx_dpi_req_err_rsp { @@ -816,13 +698,6 @@ union cvmx_dpi_req_err_rsp { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rsp_s cn61xx; - struct cvmx_dpi_req_err_rsp_s cn63xx; - struct cvmx_dpi_req_err_rsp_s cn63xxp1; - struct cvmx_dpi_req_err_rsp_s cn66xx; - struct cvmx_dpi_req_err_rsp_s cn68xx; - struct cvmx_dpi_req_err_rsp_s cn68xxp1; - struct cvmx_dpi_req_err_rsp_s cnf71xx; }; union cvmx_dpi_req_err_rsp_en { @@ -836,13 +711,6 @@ union cvmx_dpi_req_err_rsp_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rsp_en_s cn61xx; - struct cvmx_dpi_req_err_rsp_en_s cn63xx; - struct cvmx_dpi_req_err_rsp_en_s cn63xxp1; - struct cvmx_dpi_req_err_rsp_en_s cn66xx; - struct cvmx_dpi_req_err_rsp_en_s cn68xx; - struct cvmx_dpi_req_err_rsp_en_s cn68xxp1; - struct cvmx_dpi_req_err_rsp_en_s cnf71xx; }; union cvmx_dpi_req_err_rst { @@ -856,13 +724,6 @@ union cvmx_dpi_req_err_rst { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rst_s cn61xx; - struct cvmx_dpi_req_err_rst_s cn63xx; - struct cvmx_dpi_req_err_rst_s cn63xxp1; - struct cvmx_dpi_req_err_rst_s cn66xx; - struct cvmx_dpi_req_err_rst_s cn68xx; - struct cvmx_dpi_req_err_rst_s cn68xxp1; - struct cvmx_dpi_req_err_rst_s cnf71xx; }; union cvmx_dpi_req_err_rst_en { @@ -876,13 +737,6 @@ union cvmx_dpi_req_err_rst_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_err_rst_en_s cn61xx; - struct cvmx_dpi_req_err_rst_en_s cn63xx; - struct cvmx_dpi_req_err_rst_en_s cn63xxp1; - struct cvmx_dpi_req_err_rst_en_s cn66xx; - struct cvmx_dpi_req_err_rst_en_s cn68xx; - struct cvmx_dpi_req_err_rst_en_s cn68xxp1; - struct cvmx_dpi_req_err_rst_en_s cnf71xx; }; union cvmx_dpi_req_err_skip_comp { @@ -900,11 +754,6 @@ union cvmx_dpi_req_err_skip_comp { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_dpi_req_err_skip_comp_s cn61xx; - struct cvmx_dpi_req_err_skip_comp_s cn66xx; - struct cvmx_dpi_req_err_skip_comp_s cn68xx; - struct cvmx_dpi_req_err_skip_comp_s cn68xxp1; - struct cvmx_dpi_req_err_skip_comp_s cnf71xx; }; union cvmx_dpi_req_gbl_en { @@ -918,13 +767,6 @@ union cvmx_dpi_req_gbl_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_dpi_req_gbl_en_s cn61xx; - struct cvmx_dpi_req_gbl_en_s cn63xx; - struct cvmx_dpi_req_gbl_en_s cn63xxp1; - struct cvmx_dpi_req_gbl_en_s cn66xx; - struct cvmx_dpi_req_gbl_en_s cn68xx; - struct cvmx_dpi_req_gbl_en_s cn68xxp1; - struct cvmx_dpi_req_gbl_en_s cnf71xx; }; union cvmx_dpi_sli_prtx_cfg { @@ -960,7 +802,6 @@ union cvmx_dpi_sli_prtx_cfg { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_dpi_sli_prtx_cfg_s cn61xx; struct cvmx_dpi_sli_prtx_cfg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -994,11 +835,6 @@ union cvmx_dpi_sli_prtx_cfg { uint64_t reserved_25_63:39; #endif } cn63xx; - struct cvmx_dpi_sli_prtx_cfg_cn63xx cn63xxp1; - struct cvmx_dpi_sli_prtx_cfg_s cn66xx; - struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xx; - struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xxp1; - struct cvmx_dpi_sli_prtx_cfg_s cnf71xx; }; union cvmx_dpi_sli_prtx_err { @@ -1012,13 +848,6 @@ union cvmx_dpi_sli_prtx_err { uint64_t addr:61; #endif } s; - struct cvmx_dpi_sli_prtx_err_s cn61xx; - struct cvmx_dpi_sli_prtx_err_s cn63xx; - struct cvmx_dpi_sli_prtx_err_s cn63xxp1; - struct cvmx_dpi_sli_prtx_err_s cn66xx; - struct cvmx_dpi_sli_prtx_err_s cn68xx; - struct cvmx_dpi_sli_prtx_err_s cn68xxp1; - struct cvmx_dpi_sli_prtx_err_s cnf71xx; }; union cvmx_dpi_sli_prtx_err_info { @@ -1040,13 +869,6 @@ union cvmx_dpi_sli_prtx_err_info { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_dpi_sli_prtx_err_info_s cn61xx; - struct cvmx_dpi_sli_prtx_err_info_s cn63xx; - struct cvmx_dpi_sli_prtx_err_info_s cn63xxp1; - struct cvmx_dpi_sli_prtx_err_info_s cn66xx; - struct cvmx_dpi_sli_prtx_err_info_s cn68xx; - struct cvmx_dpi_sli_prtx_err_info_s cn68xxp1; - struct cvmx_dpi_sli_prtx_err_info_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-fpa-defs.h b/arch/mips/include/asm/octeon/cvmx-fpa-defs.h index 887ff8e1f715..322943f7c4b6 100644 --- a/arch/mips/include/asm/octeon/cvmx-fpa-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-fpa-defs.h @@ -81,11 +81,6 @@ union cvmx_fpa_addr_range_error { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_fpa_addr_range_error_s cn61xx; - struct cvmx_fpa_addr_range_error_s cn66xx; - struct cvmx_fpa_addr_range_error_s cn68xx; - struct cvmx_fpa_addr_range_error_s cn68xxp1; - struct cvmx_fpa_addr_range_error_s cnf71xx; }; union cvmx_fpa_bist_status { @@ -107,24 +102,6 @@ union cvmx_fpa_bist_status { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_fpa_bist_status_s cn30xx; - struct cvmx_fpa_bist_status_s cn31xx; - struct cvmx_fpa_bist_status_s cn38xx; - struct cvmx_fpa_bist_status_s cn38xxp2; - struct cvmx_fpa_bist_status_s cn50xx; - struct cvmx_fpa_bist_status_s cn52xx; - struct cvmx_fpa_bist_status_s cn52xxp1; - struct cvmx_fpa_bist_status_s cn56xx; - struct cvmx_fpa_bist_status_s cn56xxp1; - struct cvmx_fpa_bist_status_s cn58xx; - struct cvmx_fpa_bist_status_s cn58xxp1; - struct cvmx_fpa_bist_status_s cn61xx; - struct cvmx_fpa_bist_status_s cn63xx; - struct cvmx_fpa_bist_status_s cn63xxp1; - struct cvmx_fpa_bist_status_s cn66xx; - struct cvmx_fpa_bist_status_s cn68xx; - struct cvmx_fpa_bist_status_s cn68xxp1; - struct cvmx_fpa_bist_status_s cnf71xx; }; union cvmx_fpa_ctl_status { @@ -173,23 +150,6 @@ union cvmx_fpa_ctl_status { uint64_t reserved_18_63:46; #endif } cn30xx; - struct cvmx_fpa_ctl_status_cn30xx cn31xx; - struct cvmx_fpa_ctl_status_cn30xx cn38xx; - struct cvmx_fpa_ctl_status_cn30xx cn38xxp2; - struct cvmx_fpa_ctl_status_cn30xx cn50xx; - struct cvmx_fpa_ctl_status_cn30xx cn52xx; - struct cvmx_fpa_ctl_status_cn30xx cn52xxp1; - struct cvmx_fpa_ctl_status_cn30xx cn56xx; - struct cvmx_fpa_ctl_status_cn30xx cn56xxp1; - struct cvmx_fpa_ctl_status_cn30xx cn58xx; - struct cvmx_fpa_ctl_status_cn30xx cn58xxp1; - struct cvmx_fpa_ctl_status_s cn61xx; - struct cvmx_fpa_ctl_status_s cn63xx; - struct cvmx_fpa_ctl_status_cn30xx cn63xxp1; - struct cvmx_fpa_ctl_status_s cn66xx; - struct cvmx_fpa_ctl_status_s cn68xx; - struct cvmx_fpa_ctl_status_s cn68xxp1; - struct cvmx_fpa_ctl_status_s cnf71xx; }; union cvmx_fpa_fpfx_marks { @@ -205,19 +165,6 @@ union cvmx_fpa_fpfx_marks { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_fpa_fpfx_marks_s cn38xx; - struct cvmx_fpa_fpfx_marks_s cn38xxp2; - struct cvmx_fpa_fpfx_marks_s cn56xx; - struct cvmx_fpa_fpfx_marks_s cn56xxp1; - struct cvmx_fpa_fpfx_marks_s cn58xx; - struct cvmx_fpa_fpfx_marks_s cn58xxp1; - struct cvmx_fpa_fpfx_marks_s cn61xx; - struct cvmx_fpa_fpfx_marks_s cn63xx; - struct cvmx_fpa_fpfx_marks_s cn63xxp1; - struct cvmx_fpa_fpfx_marks_s cn66xx; - struct cvmx_fpa_fpfx_marks_s cn68xx; - struct cvmx_fpa_fpfx_marks_s cn68xxp1; - struct cvmx_fpa_fpfx_marks_s cnf71xx; }; union cvmx_fpa_fpfx_size { @@ -231,19 +178,6 @@ union cvmx_fpa_fpfx_size { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_fpa_fpfx_size_s cn38xx; - struct cvmx_fpa_fpfx_size_s cn38xxp2; - struct cvmx_fpa_fpfx_size_s cn56xx; - struct cvmx_fpa_fpfx_size_s cn56xxp1; - struct cvmx_fpa_fpfx_size_s cn58xx; - struct cvmx_fpa_fpfx_size_s cn58xxp1; - struct cvmx_fpa_fpfx_size_s cn61xx; - struct cvmx_fpa_fpfx_size_s cn63xx; - struct cvmx_fpa_fpfx_size_s cn63xxp1; - struct cvmx_fpa_fpfx_size_s cn66xx; - struct cvmx_fpa_fpfx_size_s cn68xx; - struct cvmx_fpa_fpfx_size_s cn68xxp1; - struct cvmx_fpa_fpfx_size_s cnf71xx; }; union cvmx_fpa_fpf0_marks { @@ -259,19 +193,6 @@ union cvmx_fpa_fpf0_marks { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_fpa_fpf0_marks_s cn38xx; - struct cvmx_fpa_fpf0_marks_s cn38xxp2; - struct cvmx_fpa_fpf0_marks_s cn56xx; - struct cvmx_fpa_fpf0_marks_s cn56xxp1; - struct cvmx_fpa_fpf0_marks_s cn58xx; - struct cvmx_fpa_fpf0_marks_s cn58xxp1; - struct cvmx_fpa_fpf0_marks_s cn61xx; - struct cvmx_fpa_fpf0_marks_s cn63xx; - struct cvmx_fpa_fpf0_marks_s cn63xxp1; - struct cvmx_fpa_fpf0_marks_s cn66xx; - struct cvmx_fpa_fpf0_marks_s cn68xx; - struct cvmx_fpa_fpf0_marks_s cn68xxp1; - struct cvmx_fpa_fpf0_marks_s cnf71xx; }; union cvmx_fpa_fpf0_size { @@ -285,19 +206,6 @@ union cvmx_fpa_fpf0_size { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_fpa_fpf0_size_s cn38xx; - struct cvmx_fpa_fpf0_size_s cn38xxp2; - struct cvmx_fpa_fpf0_size_s cn56xx; - struct cvmx_fpa_fpf0_size_s cn56xxp1; - struct cvmx_fpa_fpf0_size_s cn58xx; - struct cvmx_fpa_fpf0_size_s cn58xxp1; - struct cvmx_fpa_fpf0_size_s cn61xx; - struct cvmx_fpa_fpf0_size_s cn63xx; - struct cvmx_fpa_fpf0_size_s cn63xxp1; - struct cvmx_fpa_fpf0_size_s cn66xx; - struct cvmx_fpa_fpf0_size_s cn68xx; - struct cvmx_fpa_fpf0_size_s cn68xxp1; - struct cvmx_fpa_fpf0_size_s cnf71xx; }; union cvmx_fpa_fpf8_marks { @@ -313,8 +221,6 @@ union cvmx_fpa_fpf8_marks { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_fpa_fpf8_marks_s cn68xx; - struct cvmx_fpa_fpf8_marks_s cn68xxp1; }; union cvmx_fpa_fpf8_size { @@ -328,8 +234,6 @@ union cvmx_fpa_fpf8_size { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_fpa_fpf8_size_s cn68xx; - struct cvmx_fpa_fpf8_size_s cn68xxp1; }; union cvmx_fpa_int_enb { @@ -496,16 +400,6 @@ union cvmx_fpa_int_enb { uint64_t reserved_28_63:36; #endif } cn30xx; - struct cvmx_fpa_int_enb_cn30xx cn31xx; - struct cvmx_fpa_int_enb_cn30xx cn38xx; - struct cvmx_fpa_int_enb_cn30xx cn38xxp2; - struct cvmx_fpa_int_enb_cn30xx cn50xx; - struct cvmx_fpa_int_enb_cn30xx cn52xx; - struct cvmx_fpa_int_enb_cn30xx cn52xxp1; - struct cvmx_fpa_int_enb_cn30xx cn56xx; - struct cvmx_fpa_int_enb_cn30xx cn56xxp1; - struct cvmx_fpa_int_enb_cn30xx cn58xx; - struct cvmx_fpa_int_enb_cn30xx cn58xxp1; struct cvmx_fpa_int_enb_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_50_63:14; @@ -700,8 +594,6 @@ union cvmx_fpa_int_enb { uint64_t reserved_44_63:20; #endif } cn63xx; - struct cvmx_fpa_int_enb_cn30xx cn63xxp1; - struct cvmx_fpa_int_enb_cn61xx cn66xx; struct cvmx_fpa_int_enb_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_50_63:14; @@ -809,8 +701,6 @@ union cvmx_fpa_int_enb { uint64_t reserved_50_63:14; #endif } cn68xx; - struct cvmx_fpa_int_enb_cn68xx cn68xxp1; - struct cvmx_fpa_int_enb_cn61xx cnf71xx; }; union cvmx_fpa_int_sum { @@ -985,16 +875,6 @@ union cvmx_fpa_int_sum { uint64_t reserved_28_63:36; #endif } cn30xx; - struct cvmx_fpa_int_sum_cn30xx cn31xx; - struct cvmx_fpa_int_sum_cn30xx cn38xx; - struct cvmx_fpa_int_sum_cn30xx cn38xxp2; - struct cvmx_fpa_int_sum_cn30xx cn50xx; - struct cvmx_fpa_int_sum_cn30xx cn52xx; - struct cvmx_fpa_int_sum_cn30xx cn52xxp1; - struct cvmx_fpa_int_sum_cn30xx cn56xx; - struct cvmx_fpa_int_sum_cn30xx cn56xxp1; - struct cvmx_fpa_int_sum_cn30xx cn58xx; - struct cvmx_fpa_int_sum_cn30xx cn58xxp1; struct cvmx_fpa_int_sum_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_50_63:14; @@ -1189,11 +1069,6 @@ union cvmx_fpa_int_sum { uint64_t reserved_44_63:20; #endif } cn63xx; - struct cvmx_fpa_int_sum_cn30xx cn63xxp1; - struct cvmx_fpa_int_sum_cn61xx cn66xx; - struct cvmx_fpa_int_sum_s cn68xx; - struct cvmx_fpa_int_sum_s cn68xxp1; - struct cvmx_fpa_int_sum_cn61xx cnf71xx; }; union cvmx_fpa_packet_threshold { @@ -1207,12 +1082,6 @@ union cvmx_fpa_packet_threshold { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_fpa_packet_threshold_s cn61xx; - struct cvmx_fpa_packet_threshold_s cn63xx; - struct cvmx_fpa_packet_threshold_s cn66xx; - struct cvmx_fpa_packet_threshold_s cn68xx; - struct cvmx_fpa_packet_threshold_s cn68xxp1; - struct cvmx_fpa_packet_threshold_s cnf71xx; }; union cvmx_fpa_poolx_end_addr { @@ -1226,11 +1095,6 @@ union cvmx_fpa_poolx_end_addr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_fpa_poolx_end_addr_s cn61xx; - struct cvmx_fpa_poolx_end_addr_s cn66xx; - struct cvmx_fpa_poolx_end_addr_s cn68xx; - struct cvmx_fpa_poolx_end_addr_s cn68xxp1; - struct cvmx_fpa_poolx_end_addr_s cnf71xx; }; union cvmx_fpa_poolx_start_addr { @@ -1244,11 +1108,6 @@ union cvmx_fpa_poolx_start_addr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_fpa_poolx_start_addr_s cn61xx; - struct cvmx_fpa_poolx_start_addr_s cn66xx; - struct cvmx_fpa_poolx_start_addr_s cn68xx; - struct cvmx_fpa_poolx_start_addr_s cn68xxp1; - struct cvmx_fpa_poolx_start_addr_s cnf71xx; }; union cvmx_fpa_poolx_threshold { @@ -1271,11 +1130,6 @@ union cvmx_fpa_poolx_threshold { uint64_t reserved_29_63:35; #endif } cn61xx; - struct cvmx_fpa_poolx_threshold_cn61xx cn63xx; - struct cvmx_fpa_poolx_threshold_cn61xx cn66xx; - struct cvmx_fpa_poolx_threshold_s cn68xx; - struct cvmx_fpa_poolx_threshold_s cn68xxp1; - struct cvmx_fpa_poolx_threshold_cn61xx cnf71xx; }; union cvmx_fpa_quex_available { @@ -1298,23 +1152,6 @@ union cvmx_fpa_quex_available { uint64_t reserved_29_63:35; #endif } cn30xx; - struct cvmx_fpa_quex_available_cn30xx cn31xx; - struct cvmx_fpa_quex_available_cn30xx cn38xx; - struct cvmx_fpa_quex_available_cn30xx cn38xxp2; - struct cvmx_fpa_quex_available_cn30xx cn50xx; - struct cvmx_fpa_quex_available_cn30xx cn52xx; - struct cvmx_fpa_quex_available_cn30xx cn52xxp1; - struct cvmx_fpa_quex_available_cn30xx cn56xx; - struct cvmx_fpa_quex_available_cn30xx cn56xxp1; - struct cvmx_fpa_quex_available_cn30xx cn58xx; - struct cvmx_fpa_quex_available_cn30xx cn58xxp1; - struct cvmx_fpa_quex_available_cn30xx cn61xx; - struct cvmx_fpa_quex_available_cn30xx cn63xx; - struct cvmx_fpa_quex_available_cn30xx cn63xxp1; - struct cvmx_fpa_quex_available_cn30xx cn66xx; - struct cvmx_fpa_quex_available_s cn68xx; - struct cvmx_fpa_quex_available_s cn68xxp1; - struct cvmx_fpa_quex_available_cn30xx cnf71xx; }; union cvmx_fpa_quex_page_index { @@ -1328,24 +1165,6 @@ union cvmx_fpa_quex_page_index { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_fpa_quex_page_index_s cn30xx; - struct cvmx_fpa_quex_page_index_s cn31xx; - struct cvmx_fpa_quex_page_index_s cn38xx; - struct cvmx_fpa_quex_page_index_s cn38xxp2; - struct cvmx_fpa_quex_page_index_s cn50xx; - struct cvmx_fpa_quex_page_index_s cn52xx; - struct cvmx_fpa_quex_page_index_s cn52xxp1; - struct cvmx_fpa_quex_page_index_s cn56xx; - struct cvmx_fpa_quex_page_index_s cn56xxp1; - struct cvmx_fpa_quex_page_index_s cn58xx; - struct cvmx_fpa_quex_page_index_s cn58xxp1; - struct cvmx_fpa_quex_page_index_s cn61xx; - struct cvmx_fpa_quex_page_index_s cn63xx; - struct cvmx_fpa_quex_page_index_s cn63xxp1; - struct cvmx_fpa_quex_page_index_s cn66xx; - struct cvmx_fpa_quex_page_index_s cn68xx; - struct cvmx_fpa_quex_page_index_s cn68xxp1; - struct cvmx_fpa_quex_page_index_s cnf71xx; }; union cvmx_fpa_que8_page_index { @@ -1359,8 +1178,6 @@ union cvmx_fpa_que8_page_index { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_fpa_que8_page_index_s cn68xx; - struct cvmx_fpa_que8_page_index_s cn68xxp1; }; union cvmx_fpa_que_act { @@ -1376,24 +1193,6 @@ union cvmx_fpa_que_act { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_fpa_que_act_s cn30xx; - struct cvmx_fpa_que_act_s cn31xx; - struct cvmx_fpa_que_act_s cn38xx; - struct cvmx_fpa_que_act_s cn38xxp2; - struct cvmx_fpa_que_act_s cn50xx; - struct cvmx_fpa_que_act_s cn52xx; - struct cvmx_fpa_que_act_s cn52xxp1; - struct cvmx_fpa_que_act_s cn56xx; - struct cvmx_fpa_que_act_s cn56xxp1; - struct cvmx_fpa_que_act_s cn58xx; - struct cvmx_fpa_que_act_s cn58xxp1; - struct cvmx_fpa_que_act_s cn61xx; - struct cvmx_fpa_que_act_s cn63xx; - struct cvmx_fpa_que_act_s cn63xxp1; - struct cvmx_fpa_que_act_s cn66xx; - struct cvmx_fpa_que_act_s cn68xx; - struct cvmx_fpa_que_act_s cn68xxp1; - struct cvmx_fpa_que_act_s cnf71xx; }; union cvmx_fpa_que_exp { @@ -1409,24 +1208,6 @@ union cvmx_fpa_que_exp { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_fpa_que_exp_s cn30xx; - struct cvmx_fpa_que_exp_s cn31xx; - struct cvmx_fpa_que_exp_s cn38xx; - struct cvmx_fpa_que_exp_s cn38xxp2; - struct cvmx_fpa_que_exp_s cn50xx; - struct cvmx_fpa_que_exp_s cn52xx; - struct cvmx_fpa_que_exp_s cn52xxp1; - struct cvmx_fpa_que_exp_s cn56xx; - struct cvmx_fpa_que_exp_s cn56xxp1; - struct cvmx_fpa_que_exp_s cn58xx; - struct cvmx_fpa_que_exp_s cn58xxp1; - struct cvmx_fpa_que_exp_s cn61xx; - struct cvmx_fpa_que_exp_s cn63xx; - struct cvmx_fpa_que_exp_s cn63xxp1; - struct cvmx_fpa_que_exp_s cn66xx; - struct cvmx_fpa_que_exp_s cn68xx; - struct cvmx_fpa_que_exp_s cn68xxp1; - struct cvmx_fpa_que_exp_s cnf71xx; }; union cvmx_fpa_wart_ctl { @@ -1440,17 +1221,6 @@ union cvmx_fpa_wart_ctl { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_fpa_wart_ctl_s cn30xx; - struct cvmx_fpa_wart_ctl_s cn31xx; - struct cvmx_fpa_wart_ctl_s cn38xx; - struct cvmx_fpa_wart_ctl_s cn38xxp2; - struct cvmx_fpa_wart_ctl_s cn50xx; - struct cvmx_fpa_wart_ctl_s cn52xx; - struct cvmx_fpa_wart_ctl_s cn52xxp1; - struct cvmx_fpa_wart_ctl_s cn56xx; - struct cvmx_fpa_wart_ctl_s cn56xxp1; - struct cvmx_fpa_wart_ctl_s cn58xx; - struct cvmx_fpa_wart_ctl_s cn58xxp1; }; union cvmx_fpa_wart_status { @@ -1464,17 +1234,6 @@ union cvmx_fpa_wart_status { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_fpa_wart_status_s cn30xx; - struct cvmx_fpa_wart_status_s cn31xx; - struct cvmx_fpa_wart_status_s cn38xx; - struct cvmx_fpa_wart_status_s cn38xxp2; - struct cvmx_fpa_wart_status_s cn50xx; - struct cvmx_fpa_wart_status_s cn52xx; - struct cvmx_fpa_wart_status_s cn52xxp1; - struct cvmx_fpa_wart_status_s cn56xx; - struct cvmx_fpa_wart_status_s cn56xxp1; - struct cvmx_fpa_wart_status_s cn58xx; - struct cvmx_fpa_wart_status_s cn58xxp1; }; union cvmx_fpa_wqe_threshold { @@ -1488,12 +1247,6 @@ union cvmx_fpa_wqe_threshold { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_fpa_wqe_threshold_s cn61xx; - struct cvmx_fpa_wqe_threshold_s cn63xx; - struct cvmx_fpa_wqe_threshold_s cn66xx; - struct cvmx_fpa_wqe_threshold_s cn68xx; - struct cvmx_fpa_wqe_threshold_s cn68xxp1; - struct cvmx_fpa_wqe_threshold_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h index 80e4f8358b81..bdba676f1f2c 100644 --- a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h @@ -28,82 +28,9 @@ #ifndef __CVMX_GMXX_DEFS_H__ #define __CVMX_GMXX_DEFS_H__ -static inline uint64_t CVMX_GMXX_BAD_REG(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_BIST(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_BPID_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 15) + ((block_id) & 7) * 0x200000ull) * 8) -#define CVMX_GMXX_BPID_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180008000700ull) + ((block_id) & 7) * 0x1000000ull) -static inline uint64_t CVMX_GMXX_CLK_EN(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_EBP_DIS(block_id) (CVMX_ADD_IO_SEG(0x0001180008000608ull) + ((block_id) & 7) * 0x1000000ull) -#define CVMX_GMXX_EBP_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180008000600ull) + ((block_id) & 7) * 0x1000000ull) static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x1000000ull; } @@ -113,82 +40,15 @@ static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id) static inline uint64_t CVMX_GMXX_INF_MODE(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_NXA_ADR(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_PIPE_STATUS(block_id) (CVMX_ADD_IO_SEG(0x0001180008000760ull) + ((block_id) & 7) * 0x1000000ull) -static inline uint64_t CVMX_GMXX_PRTX_CBFC_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -197,23 +57,9 @@ static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long bl return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -#define CVMX_GMXX_RXAUI_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180008000740ull) + ((block_id) & 7) * 0x1000000ull) static inline uint64_t CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -225,19 +71,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -249,19 +82,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -273,19 +93,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -297,19 +104,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -321,19 +115,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned lon static inline uint64_t CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -342,37 +123,9 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned lon return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_ALL_EN(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -384,20 +137,6 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned l static inline uint64_t CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -406,73 +145,9 @@ static inline uint64_t CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_RXX_DECISION(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_FRM_CHK(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -483,48 +158,10 @@ static inline uint64_t CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long #define CVMX_GMXX_RXX_FRM_MAX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000030ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) #define CVMX_GMXX_RXX_FRM_MIN(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000028ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) -static inline uint64_t CVMX_GMXX_RXX_IFG(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} static inline uint64_t CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -536,20 +173,6 @@ static inline uint64_t CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long static inline uint64_t CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -561,20 +184,6 @@ static inline uint64_t CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long static inline uint64_t CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -583,471 +192,20 @@ static inline uint64_t CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_RXX_PAUSE_DROP_TIME(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - #define CVMX_GMXX_RXX_RX_INBND(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000060ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) -static inline uint64_t CVMX_GMXX_RXX_STATS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_DMAC(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_DRP(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_BAD(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_DMAC(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_DRP(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RXX_UDD_SKP(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_RX_BP_DROPX(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x0ull) * 8; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x200000ull) * 8; - } - return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8; -} - -static inline uint64_t CVMX_GMXX_RX_BP_OFFX(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x0ull) * 8; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x200000ull) * 8; - } - return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8; -} - -static inline uint64_t CVMX_GMXX_RX_BP_ONX(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x0ull) * 8; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x200000ull) * 8; - } - return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8; -} - -static inline uint64_t CVMX_GMXX_RX_HG2_STATUS(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_RX_PASS_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800080005F8ull) + ((block_id) & 1) * 0x8000000ull) -#define CVMX_GMXX_RX_PASS_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000600ull) + (((offset) & 15) + ((block_id) & 1) * 0x1000000ull) * 8) static inline uint64_t CVMX_GMXX_RX_PRTS(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_RX_PRT_INFO(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_RX_TX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800080007E8ull)) -static inline uint64_t CVMX_GMXX_RX_XAUI_BAD_COL(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x1000000ull; } @@ -1057,20 +215,6 @@ static inline uint64_t CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id) static inline uint64_t CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1079,97 +223,9 @@ static inline uint64_t CVMX_GMXX_SMACX(unsigned long offset, unsigned long block return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_SOFT_BIST(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x1000000ull; -} - -static inline uint64_t CVMX_GMXX_STAT_BP(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TB_REG(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull; - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TXX_APPEND(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1178,58 +234,10 @@ static inline uint64_t CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long b return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_CBFC_XOFF(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TXX_CBFC_XON(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull; -} - #define CVMX_GMXX_TXX_CLK(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000208ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048) static inline uint64_t CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1238,48 +246,9 @@ static inline uint64_t CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long blo return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_MIN_PKT(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1291,20 +260,6 @@ static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, un static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1313,92 +268,9 @@ static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsign return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_PAUSE_TOGO(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_PAUSE_ZERO(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -#define CVMX_GMXX_TXX_PIPE(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000310ull) + (((offset) & 3) + ((block_id) & 7) * 0x2000ull) * 2048) -static inline uint64_t CVMX_GMXX_TXX_SGMII_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1407,323 +279,9 @@ static inline uint64_t CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long bl return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TXX_SOFT_PAUSE(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT0(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT1(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT2(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT3(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT4(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT5(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT6(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT7(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT8(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STAT9(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - -static inline uint64_t CVMX_GMXX_TXX_STATS_CTL(unsigned long offset, unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x0ull) * 2048; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x2000ull) * 2048; - } - return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048; -} - static inline uint64_t CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; case OCTEON_CN31XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x0ull) * 2048; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: @@ -1732,145 +290,9 @@ static inline uint64_t CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048; } -static inline uint64_t CVMX_GMXX_TX_BP(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull; -} - -#define CVMX_GMXX_TX_CLK_MSKX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000780ull) + (((offset) & 1) + ((block_id) & 0) * 0x0ull) * 8) -static inline uint64_t CVMX_GMXX_TX_COL_ATTEMPT(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_CORRUPT(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_HG2_REG1(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_HG2_REG2(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_IFG(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_TX_INT_EN(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x1000000ull; } @@ -1880,151 +302,24 @@ static inline uint64_t CVMX_GMXX_TX_INT_EN(unsigned long block_id) static inline uint64_t CVMX_GMXX_TX_INT_REG(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_TX_JAM(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_LFSR(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_TX_OVR_BP(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_TX_PAUSE_PKT_DMAC(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull; -} - -static inline uint64_t CVMX_GMXX_TX_PAUSE_PKT_TYPE(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull; -} - static inline uint64_t CVMX_GMXX_TX_PRTS(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CN30XX & OCTEON_FAMILY_MASK: - case OCTEON_CN50XX & OCTEON_FAMILY_MASK: - case OCTEON_CN31XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN38XX & OCTEON_FAMILY_MASK: - case OCTEON_CN58XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x1000000ull; } @@ -2032,286 +327,19 @@ static inline uint64_t CVMX_GMXX_TX_PRTS(unsigned long block_id) } #define CVMX_GMXX_TX_SPI_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800080004C0ull) + ((block_id) & 1) * 0x8000000ull) -#define CVMX_GMXX_TX_SPI_DRAIN(block_id) (CVMX_ADD_IO_SEG(0x00011800080004E0ull) + ((block_id) & 1) * 0x8000000ull) #define CVMX_GMXX_TX_SPI_MAX(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B0ull) + ((block_id) & 1) * 0x8000000ull) -#define CVMX_GMXX_TX_SPI_ROUNDX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8) #define CVMX_GMXX_TX_SPI_THRESH(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B8ull) + ((block_id) & 1) * 0x8000000ull) static inline uint64_t CVMX_GMXX_TX_XAUI_CTL(unsigned long block_id) { switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; case OCTEON_CN68XX & OCTEON_FAMILY_MASK: return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x1000000ull; } return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull; } -static inline uint64_t CVMX_GMXX_XAUI_EXT_LOOPBACK(unsigned long block_id) -{ - switch (cvmx_get_octeon_family()) { - case OCTEON_CNF71XX & OCTEON_FAMILY_MASK: - case OCTEON_CN52XX & OCTEON_FAMILY_MASK: - case OCTEON_CN63XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull; - case OCTEON_CN56XX & OCTEON_FAMILY_MASK: - case OCTEON_CN66XX & OCTEON_FAMILY_MASK: - case OCTEON_CN61XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull; - case OCTEON_CN68XX & OCTEON_FAMILY_MASK: - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x1000000ull; - } - return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull; -} - void __cvmx_interrupt_gmxx_enable(int interface); -union cvmx_gmxx_bad_reg { - uint64_t u64; - struct cvmx_gmxx_bad_reg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_31_63:33; - uint64_t inb_nxa:4; - uint64_t statovr:1; - uint64_t loststat:4; - uint64_t reserved_18_21:4; - uint64_t out_ovr:16; - uint64_t ncb_ovr:1; - uint64_t out_col:1; -#else - uint64_t out_col:1; - uint64_t ncb_ovr:1; - uint64_t out_ovr:16; - uint64_t reserved_18_21:4; - uint64_t loststat:4; - uint64_t statovr:1; - uint64_t inb_nxa:4; - uint64_t reserved_31_63:33; -#endif - } s; - struct cvmx_gmxx_bad_reg_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_31_63:33; - uint64_t inb_nxa:4; - uint64_t statovr:1; - uint64_t reserved_25_25:1; - uint64_t loststat:3; - uint64_t reserved_5_21:17; - uint64_t out_ovr:3; - uint64_t reserved_0_1:2; -#else - uint64_t reserved_0_1:2; - uint64_t out_ovr:3; - uint64_t reserved_5_21:17; - uint64_t loststat:3; - uint64_t reserved_25_25:1; - uint64_t statovr:1; - uint64_t inb_nxa:4; - uint64_t reserved_31_63:33; -#endif - } cn30xx; - struct cvmx_gmxx_bad_reg_cn30xx cn31xx; - struct cvmx_gmxx_bad_reg_s cn38xx; - struct cvmx_gmxx_bad_reg_s cn38xxp2; - struct cvmx_gmxx_bad_reg_cn30xx cn50xx; - struct cvmx_gmxx_bad_reg_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_31_63:33; - uint64_t inb_nxa:4; - uint64_t statovr:1; - uint64_t loststat:4; - uint64_t reserved_6_21:16; - uint64_t out_ovr:4; - uint64_t reserved_0_1:2; -#else - uint64_t reserved_0_1:2; - uint64_t out_ovr:4; - uint64_t reserved_6_21:16; - uint64_t loststat:4; - uint64_t statovr:1; - uint64_t inb_nxa:4; - uint64_t reserved_31_63:33; -#endif - } cn52xx; - struct cvmx_gmxx_bad_reg_cn52xx cn52xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cn56xx; - struct cvmx_gmxx_bad_reg_cn52xx cn56xxp1; - struct cvmx_gmxx_bad_reg_s cn58xx; - struct cvmx_gmxx_bad_reg_s cn58xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cn61xx; - struct cvmx_gmxx_bad_reg_cn52xx cn63xx; - struct cvmx_gmxx_bad_reg_cn52xx cn63xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cn66xx; - struct cvmx_gmxx_bad_reg_cn52xx cn68xx; - struct cvmx_gmxx_bad_reg_cn52xx cn68xxp1; - struct cvmx_gmxx_bad_reg_cn52xx cnf71xx; -}; - -union cvmx_gmxx_bist { - uint64_t u64; - struct cvmx_gmxx_bist_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_25_63:39; - uint64_t status:25; -#else - uint64_t status:25; - uint64_t reserved_25_63:39; -#endif - } s; - struct cvmx_gmxx_bist_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t status:10; -#else - uint64_t status:10; - uint64_t reserved_10_63:54; -#endif - } cn30xx; - struct cvmx_gmxx_bist_cn30xx cn31xx; - struct cvmx_gmxx_bist_cn30xx cn38xx; - struct cvmx_gmxx_bist_cn30xx cn38xxp2; - struct cvmx_gmxx_bist_cn50xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_12_63:52; - uint64_t status:12; -#else - uint64_t status:12; - uint64_t reserved_12_63:52; -#endif - } cn50xx; - struct cvmx_gmxx_bist_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t status:16; -#else - uint64_t status:16; - uint64_t reserved_16_63:48; -#endif - } cn52xx; - struct cvmx_gmxx_bist_cn52xx cn52xxp1; - struct cvmx_gmxx_bist_cn52xx cn56xx; - struct cvmx_gmxx_bist_cn52xx cn56xxp1; - struct cvmx_gmxx_bist_cn58xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_17_63:47; - uint64_t status:17; -#else - uint64_t status:17; - uint64_t reserved_17_63:47; -#endif - } cn58xx; - struct cvmx_gmxx_bist_cn58xx cn58xxp1; - struct cvmx_gmxx_bist_s cn61xx; - struct cvmx_gmxx_bist_s cn63xx; - struct cvmx_gmxx_bist_s cn63xxp1; - struct cvmx_gmxx_bist_s cn66xx; - struct cvmx_gmxx_bist_s cn68xx; - struct cvmx_gmxx_bist_s cn68xxp1; - struct cvmx_gmxx_bist_s cnf71xx; -}; - -union cvmx_gmxx_bpid_mapx { - uint64_t u64; - struct cvmx_gmxx_bpid_mapx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_17_63:47; - uint64_t status:1; - uint64_t reserved_9_15:7; - uint64_t val:1; - uint64_t reserved_6_7:2; - uint64_t bpid:6; -#else - uint64_t bpid:6; - uint64_t reserved_6_7:2; - uint64_t val:1; - uint64_t reserved_9_15:7; - uint64_t status:1; - uint64_t reserved_17_63:47; -#endif - } s; - struct cvmx_gmxx_bpid_mapx_s cn68xx; - struct cvmx_gmxx_bpid_mapx_s cn68xxp1; -}; - -union cvmx_gmxx_bpid_msk { - uint64_t u64; - struct cvmx_gmxx_bpid_msk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t msk_or:16; - uint64_t reserved_16_31:16; - uint64_t msk_and:16; -#else - uint64_t msk_and:16; - uint64_t reserved_16_31:16; - uint64_t msk_or:16; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_bpid_msk_s cn68xx; - struct cvmx_gmxx_bpid_msk_s cn68xxp1; -}; - -union cvmx_gmxx_clk_en { - uint64_t u64; - struct cvmx_gmxx_clk_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t clk_en:1; -#else - uint64_t clk_en:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_clk_en_s cn52xx; - struct cvmx_gmxx_clk_en_s cn52xxp1; - struct cvmx_gmxx_clk_en_s cn56xx; - struct cvmx_gmxx_clk_en_s cn56xxp1; - struct cvmx_gmxx_clk_en_s cn61xx; - struct cvmx_gmxx_clk_en_s cn63xx; - struct cvmx_gmxx_clk_en_s cn63xxp1; - struct cvmx_gmxx_clk_en_s cn66xx; - struct cvmx_gmxx_clk_en_s cn68xx; - struct cvmx_gmxx_clk_en_s cn68xxp1; - struct cvmx_gmxx_clk_en_s cnf71xx; -}; - -union cvmx_gmxx_ebp_dis { - uint64_t u64; - struct cvmx_gmxx_ebp_dis_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t dis:16; -#else - uint64_t dis:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_ebp_dis_s cn68xx; - struct cvmx_gmxx_ebp_dis_s cn68xxp1; -}; - -union cvmx_gmxx_ebp_msk { - uint64_t u64; - struct cvmx_gmxx_ebp_msk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t msk:16; -#else - uint64_t msk:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_ebp_msk_s cn68xx; - struct cvmx_gmxx_ebp_msk_s cn68xxp1; -}; - union cvmx_gmxx_hg2_control { uint64_t u64; struct cvmx_gmxx_hg2_control_s { @@ -2329,16 +357,6 @@ union cvmx_gmxx_hg2_control { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_gmxx_hg2_control_s cn52xx; - struct cvmx_gmxx_hg2_control_s cn52xxp1; - struct cvmx_gmxx_hg2_control_s cn56xx; - struct cvmx_gmxx_hg2_control_s cn61xx; - struct cvmx_gmxx_hg2_control_s cn63xx; - struct cvmx_gmxx_hg2_control_s cn63xxp1; - struct cvmx_gmxx_hg2_control_s cn66xx; - struct cvmx_gmxx_hg2_control_s cn68xx; - struct cvmx_gmxx_hg2_control_s cn68xxp1; - struct cvmx_gmxx_hg2_control_s cnf71xx; }; union cvmx_gmxx_inf_mode { @@ -2392,9 +410,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_2_63:62; #endif } cn31xx; - struct cvmx_gmxx_inf_mode_cn31xx cn38xx; - struct cvmx_gmxx_inf_mode_cn31xx cn38xxp2; - struct cvmx_gmxx_inf_mode_cn30xx cn50xx; struct cvmx_gmxx_inf_mode_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -2414,11 +429,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_gmxx_inf_mode_cn52xx cn52xxp1; - struct cvmx_gmxx_inf_mode_cn52xx cn56xx; - struct cvmx_gmxx_inf_mode_cn52xx cn56xxp1; - struct cvmx_gmxx_inf_mode_cn31xx cn58xx; - struct cvmx_gmxx_inf_mode_cn31xx cn58xxp1; struct cvmx_gmxx_inf_mode_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -2438,8 +448,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_12_63:52; #endif } cn61xx; - struct cvmx_gmxx_inf_mode_cn61xx cn63xx; - struct cvmx_gmxx_inf_mode_cn61xx cn63xxp1; struct cvmx_gmxx_inf_mode_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -2482,108 +490,6 @@ union cvmx_gmxx_inf_mode { uint64_t reserved_12_63:52; #endif } cn68xx; - struct cvmx_gmxx_inf_mode_cn68xx cn68xxp1; - struct cvmx_gmxx_inf_mode_cn61xx cnf71xx; -}; - -union cvmx_gmxx_nxa_adr { - uint64_t u64; - struct cvmx_gmxx_nxa_adr_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_23_63:41; - uint64_t pipe:7; - uint64_t reserved_6_15:10; - uint64_t prt:6; -#else - uint64_t prt:6; - uint64_t reserved_6_15:10; - uint64_t pipe:7; - uint64_t reserved_23_63:41; -#endif - } s; - struct cvmx_gmxx_nxa_adr_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t prt:6; -#else - uint64_t prt:6; - uint64_t reserved_6_63:58; -#endif - } cn30xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn31xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn38xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn38xxp2; - struct cvmx_gmxx_nxa_adr_cn30xx cn50xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn52xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn52xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn56xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn56xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn58xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn58xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn61xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn63xx; - struct cvmx_gmxx_nxa_adr_cn30xx cn63xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cn66xx; - struct cvmx_gmxx_nxa_adr_s cn68xx; - struct cvmx_gmxx_nxa_adr_s cn68xxp1; - struct cvmx_gmxx_nxa_adr_cn30xx cnf71xx; -}; - -union cvmx_gmxx_pipe_status { - uint64_t u64; - struct cvmx_gmxx_pipe_status_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_20_63:44; - uint64_t ovr:4; - uint64_t reserved_12_15:4; - uint64_t bp:4; - uint64_t reserved_4_7:4; - uint64_t stop:4; -#else - uint64_t stop:4; - uint64_t reserved_4_7:4; - uint64_t bp:4; - uint64_t reserved_12_15:4; - uint64_t ovr:4; - uint64_t reserved_20_63:44; -#endif - } s; - struct cvmx_gmxx_pipe_status_s cn68xx; - struct cvmx_gmxx_pipe_status_s cn68xxp1; -}; - -union cvmx_gmxx_prtx_cbfc_ctl { - uint64_t u64; - struct cvmx_gmxx_prtx_cbfc_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t phys_en:16; - uint64_t logl_en:16; - uint64_t phys_bp:16; - uint64_t reserved_4_15:12; - uint64_t bck_en:1; - uint64_t drp_en:1; - uint64_t tx_en:1; - uint64_t rx_en:1; -#else - uint64_t rx_en:1; - uint64_t tx_en:1; - uint64_t drp_en:1; - uint64_t bck_en:1; - uint64_t reserved_4_15:12; - uint64_t phys_bp:16; - uint64_t logl_en:16; - uint64_t phys_en:16; -#endif - } s; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn52xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn56xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn61xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn63xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn63xxp1; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn66xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn68xx; - struct cvmx_gmxx_prtx_cbfc_ctl_s cn68xxp1; - struct cvmx_gmxx_prtx_cbfc_ctl_s cnf71xx; }; union cvmx_gmxx_prtx_cfg { @@ -2632,10 +538,6 @@ union cvmx_gmxx_prtx_cfg { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn31xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn38xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn38xxp2; - struct cvmx_gmxx_prtx_cfg_cn30xx cn50xx; struct cvmx_gmxx_prtx_cfg_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -2661,240 +563,6 @@ union cvmx_gmxx_prtx_cfg { uint64_t reserved_14_63:50; #endif } cn52xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn52xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cn56xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn56xxp1; - struct cvmx_gmxx_prtx_cfg_cn30xx cn58xx; - struct cvmx_gmxx_prtx_cfg_cn30xx cn58xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cn61xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn63xx; - struct cvmx_gmxx_prtx_cfg_cn52xx cn63xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cn66xx; - struct cvmx_gmxx_prtx_cfg_s cn68xx; - struct cvmx_gmxx_prtx_cfg_s cn68xxp1; - struct cvmx_gmxx_prtx_cfg_cn52xx cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam0 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam0_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam0_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam0_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam0_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam0_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam1 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam1_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam1_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam1_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam1_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam1_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam2 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam2_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam2_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam2_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam2_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam3 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam3_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam3_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam3_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam3_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam4 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam4_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam4_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam4_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam4_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam5 { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam5_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t adr:64; -#else - uint64_t adr:64; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam5_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam5_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam5_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam5_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam_all_en { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam_all_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t en:32; -#else - uint64_t en:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam_all_en_s cnf71xx; -}; - -union cvmx_gmxx_rxx_adr_cam_en { - uint64_t u64; - struct cvmx_gmxx_rxx_adr_cam_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t en:8; -#else - uint64_t en:8; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_rxx_adr_cam_en_s cn30xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn31xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn38xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_cam_en_s cn50xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn52xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn56xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn58xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn61xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn63xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cn66xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn68xx; - struct cvmx_gmxx_rxx_adr_cam_en_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_cam_en_s cnf71xx; }; union cvmx_gmxx_rxx_adr_ctl { @@ -2912,174 +580,6 @@ union cvmx_gmxx_rxx_adr_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_gmxx_rxx_adr_ctl_s cn30xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn31xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn38xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_adr_ctl_s cn50xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn52xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn56xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn58xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn61xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn63xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cn66xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn68xx; - struct cvmx_gmxx_rxx_adr_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_adr_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_decision { - uint64_t u64; - struct cvmx_gmxx_rxx_decision_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_5_63:59; - uint64_t cnt:5; -#else - uint64_t cnt:5; - uint64_t reserved_5_63:59; -#endif - } s; - struct cvmx_gmxx_rxx_decision_s cn30xx; - struct cvmx_gmxx_rxx_decision_s cn31xx; - struct cvmx_gmxx_rxx_decision_s cn38xx; - struct cvmx_gmxx_rxx_decision_s cn38xxp2; - struct cvmx_gmxx_rxx_decision_s cn50xx; - struct cvmx_gmxx_rxx_decision_s cn52xx; - struct cvmx_gmxx_rxx_decision_s cn52xxp1; - struct cvmx_gmxx_rxx_decision_s cn56xx; - struct cvmx_gmxx_rxx_decision_s cn56xxp1; - struct cvmx_gmxx_rxx_decision_s cn58xx; - struct cvmx_gmxx_rxx_decision_s cn58xxp1; - struct cvmx_gmxx_rxx_decision_s cn61xx; - struct cvmx_gmxx_rxx_decision_s cn63xx; - struct cvmx_gmxx_rxx_decision_s cn63xxp1; - struct cvmx_gmxx_rxx_decision_s cn66xx; - struct cvmx_gmxx_rxx_decision_s cn68xx; - struct cvmx_gmxx_rxx_decision_s cn68xxp1; - struct cvmx_gmxx_rxx_decision_s cnf71xx; -}; - -union cvmx_gmxx_rxx_frm_chk { - uint64_t u64; - struct cvmx_gmxx_rxx_frm_chk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t niberr:1; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t lenerr:1; - uint64_t alnerr:1; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t maxerr:1; - uint64_t carext:1; - uint64_t minerr:1; -#else - uint64_t minerr:1; - uint64_t carext:1; - uint64_t maxerr:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t alnerr:1; - uint64_t lenerr:1; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t niberr:1; - uint64_t reserved_10_63:54; -#endif - } s; - struct cvmx_gmxx_rxx_frm_chk_s cn30xx; - struct cvmx_gmxx_rxx_frm_chk_s cn31xx; - struct cvmx_gmxx_rxx_frm_chk_s cn38xx; - struct cvmx_gmxx_rxx_frm_chk_s cn38xxp2; - struct cvmx_gmxx_rxx_frm_chk_cn50xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t niberr:1; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t reserved_6_6:1; - uint64_t alnerr:1; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t reserved_2_2:1; - uint64_t carext:1; - uint64_t reserved_0_0:1; -#else - uint64_t reserved_0_0:1; - uint64_t carext:1; - uint64_t reserved_2_2:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t alnerr:1; - uint64_t reserved_6_6:1; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t niberr:1; - uint64_t reserved_10_63:54; -#endif - } cn50xx; - struct cvmx_gmxx_rxx_frm_chk_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t reserved_5_6:2; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t reserved_2_2:1; - uint64_t carext:1; - uint64_t reserved_0_0:1; -#else - uint64_t reserved_0_0:1; - uint64_t carext:1; - uint64_t reserved_2_2:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t reserved_5_6:2; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t reserved_9_63:55; -#endif - } cn52xx; - struct cvmx_gmxx_rxx_frm_chk_cn52xx cn52xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn52xx cn56xx; - struct cvmx_gmxx_rxx_frm_chk_cn52xx cn56xxp1; - struct cvmx_gmxx_rxx_frm_chk_s cn58xx; - struct cvmx_gmxx_rxx_frm_chk_s cn58xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn61xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t skperr:1; - uint64_t rcverr:1; - uint64_t reserved_5_6:2; - uint64_t fcserr:1; - uint64_t jabber:1; - uint64_t reserved_2_2:1; - uint64_t carext:1; - uint64_t minerr:1; -#else - uint64_t minerr:1; - uint64_t carext:1; - uint64_t reserved_2_2:1; - uint64_t jabber:1; - uint64_t fcserr:1; - uint64_t reserved_5_6:2; - uint64_t rcverr:1; - uint64_t skperr:1; - uint64_t reserved_9_63:55; -#endif - } cn61xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn63xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn66xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn68xx; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_frm_chk_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_frm_ctl { @@ -3165,8 +665,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_8_63:56; #endif } cn31xx; - struct cvmx_gmxx_rxx_frm_ctl_cn30xx cn38xx; - struct cvmx_gmxx_rxx_frm_ctl_cn31xx cn38xxp2; struct cvmx_gmxx_rxx_frm_ctl_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -3194,9 +692,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_11_63:53; #endif } cn50xx; - struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn52xx; - struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn52xxp1; - struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn56xx; struct cvmx_gmxx_rxx_frm_ctl_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3251,7 +746,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_11_63:53; #endif } cn58xx; - struct cvmx_gmxx_rxx_frm_ctl_cn30xx cn58xxp1; struct cvmx_gmxx_rxx_frm_ctl_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_13_63:51; @@ -3283,12 +777,6 @@ union cvmx_gmxx_rxx_frm_ctl { uint64_t reserved_13_63:51; #endif } cn61xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn63xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn66xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn68xx; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_frm_ctl_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_frm_max { @@ -3302,12 +790,6 @@ union cvmx_gmxx_rxx_frm_max { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gmxx_rxx_frm_max_s cn30xx; - struct cvmx_gmxx_rxx_frm_max_s cn31xx; - struct cvmx_gmxx_rxx_frm_max_s cn38xx; - struct cvmx_gmxx_rxx_frm_max_s cn38xxp2; - struct cvmx_gmxx_rxx_frm_max_s cn58xx; - struct cvmx_gmxx_rxx_frm_max_s cn58xxp1; }; union cvmx_gmxx_rxx_frm_min { @@ -3321,43 +803,6 @@ union cvmx_gmxx_rxx_frm_min { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gmxx_rxx_frm_min_s cn30xx; - struct cvmx_gmxx_rxx_frm_min_s cn31xx; - struct cvmx_gmxx_rxx_frm_min_s cn38xx; - struct cvmx_gmxx_rxx_frm_min_s cn38xxp2; - struct cvmx_gmxx_rxx_frm_min_s cn58xx; - struct cvmx_gmxx_rxx_frm_min_s cn58xxp1; -}; - -union cvmx_gmxx_rxx_ifg { - uint64_t u64; - struct cvmx_gmxx_rxx_ifg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t ifg:4; -#else - uint64_t ifg:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_rxx_ifg_s cn30xx; - struct cvmx_gmxx_rxx_ifg_s cn31xx; - struct cvmx_gmxx_rxx_ifg_s cn38xx; - struct cvmx_gmxx_rxx_ifg_s cn38xxp2; - struct cvmx_gmxx_rxx_ifg_s cn50xx; - struct cvmx_gmxx_rxx_ifg_s cn52xx; - struct cvmx_gmxx_rxx_ifg_s cn52xxp1; - struct cvmx_gmxx_rxx_ifg_s cn56xx; - struct cvmx_gmxx_rxx_ifg_s cn56xxp1; - struct cvmx_gmxx_rxx_ifg_s cn58xx; - struct cvmx_gmxx_rxx_ifg_s cn58xxp1; - struct cvmx_gmxx_rxx_ifg_s cn61xx; - struct cvmx_gmxx_rxx_ifg_s cn63xx; - struct cvmx_gmxx_rxx_ifg_s cn63xxp1; - struct cvmx_gmxx_rxx_ifg_s cn66xx; - struct cvmx_gmxx_rxx_ifg_s cn68xx; - struct cvmx_gmxx_rxx_ifg_s cn68xxp1; - struct cvmx_gmxx_rxx_ifg_s cnf71xx; }; union cvmx_gmxx_rxx_int_en { @@ -3472,9 +917,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_19_63:45; #endif } cn30xx; - struct cvmx_gmxx_rxx_int_en_cn30xx cn31xx; - struct cvmx_gmxx_rxx_int_en_cn30xx cn38xx; - struct cvmx_gmxx_rxx_int_en_cn30xx cn38xxp2; struct cvmx_gmxx_rxx_int_en_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -3581,8 +1023,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_gmxx_rxx_int_en_cn52xx cn52xxp1; - struct cvmx_gmxx_rxx_int_en_cn52xx cn56xx; struct cvmx_gmxx_rxx_int_en_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_27_63:37; @@ -3685,7 +1125,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_20_63:44; #endif } cn58xx; - struct cvmx_gmxx_rxx_int_en_cn58xx cn58xxp1; struct cvmx_gmxx_rxx_int_en_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -3745,12 +1184,6 @@ union cvmx_gmxx_rxx_int_en { uint64_t reserved_29_63:35; #endif } cn61xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn63xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_int_en_cn61xx cn66xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn68xx; - struct cvmx_gmxx_rxx_int_en_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_int_en_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_int_reg { @@ -3865,9 +1298,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_19_63:45; #endif } cn30xx; - struct cvmx_gmxx_rxx_int_reg_cn30xx cn31xx; - struct cvmx_gmxx_rxx_int_reg_cn30xx cn38xx; - struct cvmx_gmxx_rxx_int_reg_cn30xx cn38xxp2; struct cvmx_gmxx_rxx_int_reg_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -3974,8 +1404,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_gmxx_rxx_int_reg_cn52xx cn52xxp1; - struct cvmx_gmxx_rxx_int_reg_cn52xx cn56xx; struct cvmx_gmxx_rxx_int_reg_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_27_63:37; @@ -4078,7 +1506,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_20_63:44; #endif } cn58xx; - struct cvmx_gmxx_rxx_int_reg_cn58xx cn58xxp1; struct cvmx_gmxx_rxx_int_reg_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -4138,12 +1565,6 @@ union cvmx_gmxx_rxx_int_reg { uint64_t reserved_29_63:35; #endif } cn61xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn63xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn63xxp1; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn66xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn68xx; - struct cvmx_gmxx_rxx_int_reg_cn61xx cn68xxp1; - struct cvmx_gmxx_rxx_int_reg_cn61xx cnf71xx; }; union cvmx_gmxx_rxx_jabber { @@ -4157,51 +1578,6 @@ union cvmx_gmxx_rxx_jabber { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gmxx_rxx_jabber_s cn30xx; - struct cvmx_gmxx_rxx_jabber_s cn31xx; - struct cvmx_gmxx_rxx_jabber_s cn38xx; - struct cvmx_gmxx_rxx_jabber_s cn38xxp2; - struct cvmx_gmxx_rxx_jabber_s cn50xx; - struct cvmx_gmxx_rxx_jabber_s cn52xx; - struct cvmx_gmxx_rxx_jabber_s cn52xxp1; - struct cvmx_gmxx_rxx_jabber_s cn56xx; - struct cvmx_gmxx_rxx_jabber_s cn56xxp1; - struct cvmx_gmxx_rxx_jabber_s cn58xx; - struct cvmx_gmxx_rxx_jabber_s cn58xxp1; - struct cvmx_gmxx_rxx_jabber_s cn61xx; - struct cvmx_gmxx_rxx_jabber_s cn63xx; - struct cvmx_gmxx_rxx_jabber_s cn63xxp1; - struct cvmx_gmxx_rxx_jabber_s cn66xx; - struct cvmx_gmxx_rxx_jabber_s cn68xx; - struct cvmx_gmxx_rxx_jabber_s cn68xxp1; - struct cvmx_gmxx_rxx_jabber_s cnf71xx; -}; - -union cvmx_gmxx_rxx_pause_drop_time { - uint64_t u64; - struct cvmx_gmxx_rxx_pause_drop_time_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t status:16; -#else - uint64_t status:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_rxx_pause_drop_time_s cn50xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn52xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn52xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn56xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn56xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn58xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn58xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn61xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn63xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn63xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cn66xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn68xx; - struct cvmx_gmxx_rxx_pause_drop_time_s cn68xxp1; - struct cvmx_gmxx_rxx_pause_drop_time_s cnf71xx; }; union cvmx_gmxx_rxx_rx_inbnd { @@ -4219,588 +1595,6 @@ union cvmx_gmxx_rxx_rx_inbnd { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_gmxx_rxx_rx_inbnd_s cn30xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn31xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn38xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn38xxp2; - struct cvmx_gmxx_rxx_rx_inbnd_s cn50xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn58xx; - struct cvmx_gmxx_rxx_rx_inbnd_s cn58xxp1; -}; - -union cvmx_gmxx_rxx_stats_ctl { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t rd_clr:1; -#else - uint64_t rd_clr:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_rxx_stats_ctl_s cn30xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn31xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn38xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_ctl_s cn50xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn52xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn56xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn58xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn61xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn63xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cn66xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn68xx; - struct cvmx_gmxx_rxx_stats_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs_ctl { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs_dmac { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_dmac_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_dmac_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_octs_drp { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_octs_drp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t cnt:48; -#else - uint64_t cnt:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn30xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn31xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn38xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn50xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn52xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn56xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn58xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn61xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn63xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn66xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn68xx; - struct cvmx_gmxx_rxx_stats_octs_drp_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_octs_drp_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_bad { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_bad_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_bad_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_ctl { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_dmac { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_dmac_s cnf71xx; -}; - -union cvmx_gmxx_rxx_stats_pkts_drp { - uint64_t u64; - struct cvmx_gmxx_rxx_stats_pkts_drp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t cnt:32; -#else - uint64_t cnt:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn30xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn31xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn38xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn38xxp2; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn50xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn52xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn52xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn56xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn56xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn58xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn58xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn61xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn63xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn63xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn66xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn68xx; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cn68xxp1; - struct cvmx_gmxx_rxx_stats_pkts_drp_s cnf71xx; -}; - -union cvmx_gmxx_rxx_udd_skp { - uint64_t u64; - struct cvmx_gmxx_rxx_udd_skp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t fcssel:1; - uint64_t reserved_7_7:1; - uint64_t len:7; -#else - uint64_t len:7; - uint64_t reserved_7_7:1; - uint64_t fcssel:1; - uint64_t reserved_9_63:55; -#endif - } s; - struct cvmx_gmxx_rxx_udd_skp_s cn30xx; - struct cvmx_gmxx_rxx_udd_skp_s cn31xx; - struct cvmx_gmxx_rxx_udd_skp_s cn38xx; - struct cvmx_gmxx_rxx_udd_skp_s cn38xxp2; - struct cvmx_gmxx_rxx_udd_skp_s cn50xx; - struct cvmx_gmxx_rxx_udd_skp_s cn52xx; - struct cvmx_gmxx_rxx_udd_skp_s cn52xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn56xx; - struct cvmx_gmxx_rxx_udd_skp_s cn56xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn58xx; - struct cvmx_gmxx_rxx_udd_skp_s cn58xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn61xx; - struct cvmx_gmxx_rxx_udd_skp_s cn63xx; - struct cvmx_gmxx_rxx_udd_skp_s cn63xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cn66xx; - struct cvmx_gmxx_rxx_udd_skp_s cn68xx; - struct cvmx_gmxx_rxx_udd_skp_s cn68xxp1; - struct cvmx_gmxx_rxx_udd_skp_s cnf71xx; -}; - -union cvmx_gmxx_rx_bp_dropx { - uint64_t u64; - struct cvmx_gmxx_rx_bp_dropx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t mark:6; -#else - uint64_t mark:6; - uint64_t reserved_6_63:58; -#endif - } s; - struct cvmx_gmxx_rx_bp_dropx_s cn30xx; - struct cvmx_gmxx_rx_bp_dropx_s cn31xx; - struct cvmx_gmxx_rx_bp_dropx_s cn38xx; - struct cvmx_gmxx_rx_bp_dropx_s cn38xxp2; - struct cvmx_gmxx_rx_bp_dropx_s cn50xx; - struct cvmx_gmxx_rx_bp_dropx_s cn52xx; - struct cvmx_gmxx_rx_bp_dropx_s cn52xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn56xx; - struct cvmx_gmxx_rx_bp_dropx_s cn56xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn58xx; - struct cvmx_gmxx_rx_bp_dropx_s cn58xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn61xx; - struct cvmx_gmxx_rx_bp_dropx_s cn63xx; - struct cvmx_gmxx_rx_bp_dropx_s cn63xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cn66xx; - struct cvmx_gmxx_rx_bp_dropx_s cn68xx; - struct cvmx_gmxx_rx_bp_dropx_s cn68xxp1; - struct cvmx_gmxx_rx_bp_dropx_s cnf71xx; -}; - -union cvmx_gmxx_rx_bp_offx { - uint64_t u64; - struct cvmx_gmxx_rx_bp_offx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t mark:6; -#else - uint64_t mark:6; - uint64_t reserved_6_63:58; -#endif - } s; - struct cvmx_gmxx_rx_bp_offx_s cn30xx; - struct cvmx_gmxx_rx_bp_offx_s cn31xx; - struct cvmx_gmxx_rx_bp_offx_s cn38xx; - struct cvmx_gmxx_rx_bp_offx_s cn38xxp2; - struct cvmx_gmxx_rx_bp_offx_s cn50xx; - struct cvmx_gmxx_rx_bp_offx_s cn52xx; - struct cvmx_gmxx_rx_bp_offx_s cn52xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn56xx; - struct cvmx_gmxx_rx_bp_offx_s cn56xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn58xx; - struct cvmx_gmxx_rx_bp_offx_s cn58xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn61xx; - struct cvmx_gmxx_rx_bp_offx_s cn63xx; - struct cvmx_gmxx_rx_bp_offx_s cn63xxp1; - struct cvmx_gmxx_rx_bp_offx_s cn66xx; - struct cvmx_gmxx_rx_bp_offx_s cn68xx; - struct cvmx_gmxx_rx_bp_offx_s cn68xxp1; - struct cvmx_gmxx_rx_bp_offx_s cnf71xx; -}; - -union cvmx_gmxx_rx_bp_onx { - uint64_t u64; - struct cvmx_gmxx_rx_bp_onx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_11_63:53; - uint64_t mark:11; -#else - uint64_t mark:11; - uint64_t reserved_11_63:53; -#endif - } s; - struct cvmx_gmxx_rx_bp_onx_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_9_63:55; - uint64_t mark:9; -#else - uint64_t mark:9; - uint64_t reserved_9_63:55; -#endif - } cn30xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn31xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn38xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn38xxp2; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn50xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn52xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn52xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn56xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn56xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn58xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn58xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn61xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn63xx; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn63xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cn66xx; - struct cvmx_gmxx_rx_bp_onx_s cn68xx; - struct cvmx_gmxx_rx_bp_onx_s cn68xxp1; - struct cvmx_gmxx_rx_bp_onx_cn30xx cnf71xx; -}; - -union cvmx_gmxx_rx_hg2_status { - uint64_t u64; - struct cvmx_gmxx_rx_hg2_status_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t phtim2go:16; - uint64_t xof:16; - uint64_t lgtim2go:16; -#else - uint64_t lgtim2go:16; - uint64_t xof:16; - uint64_t phtim2go:16; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_rx_hg2_status_s cn52xx; - struct cvmx_gmxx_rx_hg2_status_s cn52xxp1; - struct cvmx_gmxx_rx_hg2_status_s cn56xx; - struct cvmx_gmxx_rx_hg2_status_s cn61xx; - struct cvmx_gmxx_rx_hg2_status_s cn63xx; - struct cvmx_gmxx_rx_hg2_status_s cn63xxp1; - struct cvmx_gmxx_rx_hg2_status_s cn66xx; - struct cvmx_gmxx_rx_hg2_status_s cn68xx; - struct cvmx_gmxx_rx_hg2_status_s cn68xxp1; - struct cvmx_gmxx_rx_hg2_status_s cnf71xx; -}; - -union cvmx_gmxx_rx_pass_en { - uint64_t u64; - struct cvmx_gmxx_rx_pass_en_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t en:16; -#else - uint64_t en:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_rx_pass_en_s cn38xx; - struct cvmx_gmxx_rx_pass_en_s cn38xxp2; - struct cvmx_gmxx_rx_pass_en_s cn58xx; - struct cvmx_gmxx_rx_pass_en_s cn58xxp1; -}; - -union cvmx_gmxx_rx_pass_mapx { - uint64_t u64; - struct cvmx_gmxx_rx_pass_mapx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t dprt:4; -#else - uint64_t dprt:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_rx_pass_mapx_s cn38xx; - struct cvmx_gmxx_rx_pass_mapx_s cn38xxp2; - struct cvmx_gmxx_rx_pass_mapx_s cn58xx; - struct cvmx_gmxx_rx_pass_mapx_s cn58xxp1; -}; - -union cvmx_gmxx_rx_prt_info { - uint64_t u64; - struct cvmx_gmxx_rx_prt_info_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t drop:16; - uint64_t commit:16; -#else - uint64_t commit:16; - uint64_t drop:16; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_rx_prt_info_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_19_63:45; - uint64_t drop:3; - uint64_t reserved_3_15:13; - uint64_t commit:3; -#else - uint64_t commit:3; - uint64_t reserved_3_15:13; - uint64_t drop:3; - uint64_t reserved_19_63:45; -#endif - } cn30xx; - struct cvmx_gmxx_rx_prt_info_cn30xx cn31xx; - struct cvmx_gmxx_rx_prt_info_s cn38xx; - struct cvmx_gmxx_rx_prt_info_cn30xx cn50xx; - struct cvmx_gmxx_rx_prt_info_cn52xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_20_63:44; - uint64_t drop:4; - uint64_t reserved_4_15:12; - uint64_t commit:4; -#else - uint64_t commit:4; - uint64_t reserved_4_15:12; - uint64_t drop:4; - uint64_t reserved_20_63:44; -#endif - } cn52xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn52xxp1; - struct cvmx_gmxx_rx_prt_info_cn52xx cn56xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn56xxp1; - struct cvmx_gmxx_rx_prt_info_s cn58xx; - struct cvmx_gmxx_rx_prt_info_s cn58xxp1; - struct cvmx_gmxx_rx_prt_info_cn52xx cn61xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn63xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn63xxp1; - struct cvmx_gmxx_rx_prt_info_cn52xx cn66xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn68xx; - struct cvmx_gmxx_rx_prt_info_cn52xx cn68xxp1; - struct cvmx_gmxx_rx_prt_info_cnf71xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_18_63:46; - uint64_t drop:2; - uint64_t reserved_2_15:14; - uint64_t commit:2; -#else - uint64_t commit:2; - uint64_t reserved_2_15:14; - uint64_t drop:2; - uint64_t reserved_18_63:46; -#endif - } cnf71xx; }; union cvmx_gmxx_rx_prts { @@ -4814,74 +1608,6 @@ union cvmx_gmxx_rx_prts { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_gmxx_rx_prts_s cn30xx; - struct cvmx_gmxx_rx_prts_s cn31xx; - struct cvmx_gmxx_rx_prts_s cn38xx; - struct cvmx_gmxx_rx_prts_s cn38xxp2; - struct cvmx_gmxx_rx_prts_s cn50xx; - struct cvmx_gmxx_rx_prts_s cn52xx; - struct cvmx_gmxx_rx_prts_s cn52xxp1; - struct cvmx_gmxx_rx_prts_s cn56xx; - struct cvmx_gmxx_rx_prts_s cn56xxp1; - struct cvmx_gmxx_rx_prts_s cn58xx; - struct cvmx_gmxx_rx_prts_s cn58xxp1; - struct cvmx_gmxx_rx_prts_s cn61xx; - struct cvmx_gmxx_rx_prts_s cn63xx; - struct cvmx_gmxx_rx_prts_s cn63xxp1; - struct cvmx_gmxx_rx_prts_s cn66xx; - struct cvmx_gmxx_rx_prts_s cn68xx; - struct cvmx_gmxx_rx_prts_s cn68xxp1; - struct cvmx_gmxx_rx_prts_s cnf71xx; -}; - -union cvmx_gmxx_rx_tx_status { - uint64_t u64; - struct cvmx_gmxx_rx_tx_status_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_7_63:57; - uint64_t tx:3; - uint64_t reserved_3_3:1; - uint64_t rx:3; -#else - uint64_t rx:3; - uint64_t reserved_3_3:1; - uint64_t tx:3; - uint64_t reserved_7_63:57; -#endif - } s; - struct cvmx_gmxx_rx_tx_status_s cn30xx; - struct cvmx_gmxx_rx_tx_status_s cn31xx; - struct cvmx_gmxx_rx_tx_status_s cn50xx; -}; - -union cvmx_gmxx_rx_xaui_bad_col { - uint64_t u64; - struct cvmx_gmxx_rx_xaui_bad_col_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_40_63:24; - uint64_t val:1; - uint64_t state:3; - uint64_t lane_rxc:4; - uint64_t lane_rxd:32; -#else - uint64_t lane_rxd:32; - uint64_t lane_rxc:4; - uint64_t state:3; - uint64_t val:1; - uint64_t reserved_40_63:24; -#endif - } s; - struct cvmx_gmxx_rx_xaui_bad_col_s cn52xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn52xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cn56xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn56xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cn61xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn63xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn63xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cn66xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn68xx; - struct cvmx_gmxx_rx_xaui_bad_col_s cn68xxp1; - struct cvmx_gmxx_rx_xaui_bad_col_s cnf71xx; }; union cvmx_gmxx_rx_xaui_ctl { @@ -4895,913 +1621,6 @@ union cvmx_gmxx_rx_xaui_ctl { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_gmxx_rx_xaui_ctl_s cn52xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn52xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cn56xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn56xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cn61xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn63xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn63xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cn66xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn68xx; - struct cvmx_gmxx_rx_xaui_ctl_s cn68xxp1; - struct cvmx_gmxx_rx_xaui_ctl_s cnf71xx; -}; - -union cvmx_gmxx_rxaui_ctl { - uint64_t u64; - struct cvmx_gmxx_rxaui_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t disparity:1; -#else - uint64_t disparity:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_rxaui_ctl_s cn68xx; - struct cvmx_gmxx_rxaui_ctl_s cn68xxp1; -}; - -union cvmx_gmxx_smacx { - uint64_t u64; - struct cvmx_gmxx_smacx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t smac:48; -#else - uint64_t smac:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_smacx_s cn30xx; - struct cvmx_gmxx_smacx_s cn31xx; - struct cvmx_gmxx_smacx_s cn38xx; - struct cvmx_gmxx_smacx_s cn38xxp2; - struct cvmx_gmxx_smacx_s cn50xx; - struct cvmx_gmxx_smacx_s cn52xx; - struct cvmx_gmxx_smacx_s cn52xxp1; - struct cvmx_gmxx_smacx_s cn56xx; - struct cvmx_gmxx_smacx_s cn56xxp1; - struct cvmx_gmxx_smacx_s cn58xx; - struct cvmx_gmxx_smacx_s cn58xxp1; - struct cvmx_gmxx_smacx_s cn61xx; - struct cvmx_gmxx_smacx_s cn63xx; - struct cvmx_gmxx_smacx_s cn63xxp1; - struct cvmx_gmxx_smacx_s cn66xx; - struct cvmx_gmxx_smacx_s cn68xx; - struct cvmx_gmxx_smacx_s cn68xxp1; - struct cvmx_gmxx_smacx_s cnf71xx; -}; - -union cvmx_gmxx_soft_bist { - uint64_t u64; - struct cvmx_gmxx_soft_bist_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t start_bist:1; - uint64_t clear_bist:1; -#else - uint64_t clear_bist:1; - uint64_t start_bist:1; - uint64_t reserved_2_63:62; -#endif - } s; - struct cvmx_gmxx_soft_bist_s cn63xx; - struct cvmx_gmxx_soft_bist_s cn63xxp1; - struct cvmx_gmxx_soft_bist_s cn66xx; - struct cvmx_gmxx_soft_bist_s cn68xx; - struct cvmx_gmxx_soft_bist_s cn68xxp1; -}; - -union cvmx_gmxx_stat_bp { - uint64_t u64; - struct cvmx_gmxx_stat_bp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_17_63:47; - uint64_t bp:1; - uint64_t cnt:16; -#else - uint64_t cnt:16; - uint64_t bp:1; - uint64_t reserved_17_63:47; -#endif - } s; - struct cvmx_gmxx_stat_bp_s cn30xx; - struct cvmx_gmxx_stat_bp_s cn31xx; - struct cvmx_gmxx_stat_bp_s cn38xx; - struct cvmx_gmxx_stat_bp_s cn38xxp2; - struct cvmx_gmxx_stat_bp_s cn50xx; - struct cvmx_gmxx_stat_bp_s cn52xx; - struct cvmx_gmxx_stat_bp_s cn52xxp1; - struct cvmx_gmxx_stat_bp_s cn56xx; - struct cvmx_gmxx_stat_bp_s cn56xxp1; - struct cvmx_gmxx_stat_bp_s cn58xx; - struct cvmx_gmxx_stat_bp_s cn58xxp1; - struct cvmx_gmxx_stat_bp_s cn61xx; - struct cvmx_gmxx_stat_bp_s cn63xx; - struct cvmx_gmxx_stat_bp_s cn63xxp1; - struct cvmx_gmxx_stat_bp_s cn66xx; - struct cvmx_gmxx_stat_bp_s cn68xx; - struct cvmx_gmxx_stat_bp_s cn68xxp1; - struct cvmx_gmxx_stat_bp_s cnf71xx; -}; - -union cvmx_gmxx_tb_reg { - uint64_t u64; - struct cvmx_gmxx_tb_reg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t wr_magic:1; -#else - uint64_t wr_magic:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_tb_reg_s cn61xx; - struct cvmx_gmxx_tb_reg_s cn66xx; - struct cvmx_gmxx_tb_reg_s cn68xx; - struct cvmx_gmxx_tb_reg_s cnf71xx; -}; - -union cvmx_gmxx_txx_append { - uint64_t u64; - struct cvmx_gmxx_txx_append_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t force_fcs:1; - uint64_t fcs:1; - uint64_t pad:1; - uint64_t preamble:1; -#else - uint64_t preamble:1; - uint64_t pad:1; - uint64_t fcs:1; - uint64_t force_fcs:1; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_txx_append_s cn30xx; - struct cvmx_gmxx_txx_append_s cn31xx; - struct cvmx_gmxx_txx_append_s cn38xx; - struct cvmx_gmxx_txx_append_s cn38xxp2; - struct cvmx_gmxx_txx_append_s cn50xx; - struct cvmx_gmxx_txx_append_s cn52xx; - struct cvmx_gmxx_txx_append_s cn52xxp1; - struct cvmx_gmxx_txx_append_s cn56xx; - struct cvmx_gmxx_txx_append_s cn56xxp1; - struct cvmx_gmxx_txx_append_s cn58xx; - struct cvmx_gmxx_txx_append_s cn58xxp1; - struct cvmx_gmxx_txx_append_s cn61xx; - struct cvmx_gmxx_txx_append_s cn63xx; - struct cvmx_gmxx_txx_append_s cn63xxp1; - struct cvmx_gmxx_txx_append_s cn66xx; - struct cvmx_gmxx_txx_append_s cn68xx; - struct cvmx_gmxx_txx_append_s cn68xxp1; - struct cvmx_gmxx_txx_append_s cnf71xx; -}; - -union cvmx_gmxx_txx_burst { - uint64_t u64; - struct cvmx_gmxx_txx_burst_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t burst:16; -#else - uint64_t burst:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_burst_s cn30xx; - struct cvmx_gmxx_txx_burst_s cn31xx; - struct cvmx_gmxx_txx_burst_s cn38xx; - struct cvmx_gmxx_txx_burst_s cn38xxp2; - struct cvmx_gmxx_txx_burst_s cn50xx; - struct cvmx_gmxx_txx_burst_s cn52xx; - struct cvmx_gmxx_txx_burst_s cn52xxp1; - struct cvmx_gmxx_txx_burst_s cn56xx; - struct cvmx_gmxx_txx_burst_s cn56xxp1; - struct cvmx_gmxx_txx_burst_s cn58xx; - struct cvmx_gmxx_txx_burst_s cn58xxp1; - struct cvmx_gmxx_txx_burst_s cn61xx; - struct cvmx_gmxx_txx_burst_s cn63xx; - struct cvmx_gmxx_txx_burst_s cn63xxp1; - struct cvmx_gmxx_txx_burst_s cn66xx; - struct cvmx_gmxx_txx_burst_s cn68xx; - struct cvmx_gmxx_txx_burst_s cn68xxp1; - struct cvmx_gmxx_txx_burst_s cnf71xx; -}; - -union cvmx_gmxx_txx_cbfc_xoff { - uint64_t u64; - struct cvmx_gmxx_txx_cbfc_xoff_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t xoff:16; -#else - uint64_t xoff:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_cbfc_xoff_s cn52xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn56xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn61xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn63xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn63xxp1; - struct cvmx_gmxx_txx_cbfc_xoff_s cn66xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn68xx; - struct cvmx_gmxx_txx_cbfc_xoff_s cn68xxp1; - struct cvmx_gmxx_txx_cbfc_xoff_s cnf71xx; -}; - -union cvmx_gmxx_txx_cbfc_xon { - uint64_t u64; - struct cvmx_gmxx_txx_cbfc_xon_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t xon:16; -#else - uint64_t xon:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_cbfc_xon_s cn52xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn56xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn61xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn63xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn63xxp1; - struct cvmx_gmxx_txx_cbfc_xon_s cn66xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn68xx; - struct cvmx_gmxx_txx_cbfc_xon_s cn68xxp1; - struct cvmx_gmxx_txx_cbfc_xon_s cnf71xx; -}; - -union cvmx_gmxx_txx_clk { - uint64_t u64; - struct cvmx_gmxx_txx_clk_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_6_63:58; - uint64_t clk_cnt:6; -#else - uint64_t clk_cnt:6; - uint64_t reserved_6_63:58; -#endif - } s; - struct cvmx_gmxx_txx_clk_s cn30xx; - struct cvmx_gmxx_txx_clk_s cn31xx; - struct cvmx_gmxx_txx_clk_s cn38xx; - struct cvmx_gmxx_txx_clk_s cn38xxp2; - struct cvmx_gmxx_txx_clk_s cn50xx; - struct cvmx_gmxx_txx_clk_s cn58xx; - struct cvmx_gmxx_txx_clk_s cn58xxp1; -}; - -union cvmx_gmxx_txx_ctl { - uint64_t u64; - struct cvmx_gmxx_txx_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t xsdef_en:1; - uint64_t xscol_en:1; -#else - uint64_t xscol_en:1; - uint64_t xsdef_en:1; - uint64_t reserved_2_63:62; -#endif - } s; - struct cvmx_gmxx_txx_ctl_s cn30xx; - struct cvmx_gmxx_txx_ctl_s cn31xx; - struct cvmx_gmxx_txx_ctl_s cn38xx; - struct cvmx_gmxx_txx_ctl_s cn38xxp2; - struct cvmx_gmxx_txx_ctl_s cn50xx; - struct cvmx_gmxx_txx_ctl_s cn52xx; - struct cvmx_gmxx_txx_ctl_s cn52xxp1; - struct cvmx_gmxx_txx_ctl_s cn56xx; - struct cvmx_gmxx_txx_ctl_s cn56xxp1; - struct cvmx_gmxx_txx_ctl_s cn58xx; - struct cvmx_gmxx_txx_ctl_s cn58xxp1; - struct cvmx_gmxx_txx_ctl_s cn61xx; - struct cvmx_gmxx_txx_ctl_s cn63xx; - struct cvmx_gmxx_txx_ctl_s cn63xxp1; - struct cvmx_gmxx_txx_ctl_s cn66xx; - struct cvmx_gmxx_txx_ctl_s cn68xx; - struct cvmx_gmxx_txx_ctl_s cn68xxp1; - struct cvmx_gmxx_txx_ctl_s cnf71xx; -}; - -union cvmx_gmxx_txx_min_pkt { - uint64_t u64; - struct cvmx_gmxx_txx_min_pkt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t min_size:8; -#else - uint64_t min_size:8; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_txx_min_pkt_s cn30xx; - struct cvmx_gmxx_txx_min_pkt_s cn31xx; - struct cvmx_gmxx_txx_min_pkt_s cn38xx; - struct cvmx_gmxx_txx_min_pkt_s cn38xxp2; - struct cvmx_gmxx_txx_min_pkt_s cn50xx; - struct cvmx_gmxx_txx_min_pkt_s cn52xx; - struct cvmx_gmxx_txx_min_pkt_s cn52xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn56xx; - struct cvmx_gmxx_txx_min_pkt_s cn56xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn58xx; - struct cvmx_gmxx_txx_min_pkt_s cn58xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn61xx; - struct cvmx_gmxx_txx_min_pkt_s cn63xx; - struct cvmx_gmxx_txx_min_pkt_s cn63xxp1; - struct cvmx_gmxx_txx_min_pkt_s cn66xx; - struct cvmx_gmxx_txx_min_pkt_s cn68xx; - struct cvmx_gmxx_txx_min_pkt_s cn68xxp1; - struct cvmx_gmxx_txx_min_pkt_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_pkt_interval { - uint64_t u64; - struct cvmx_gmxx_txx_pause_pkt_interval_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t interval:16; -#else - uint64_t interval:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn30xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn31xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn38xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn38xxp2; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn50xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn52xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn52xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn56xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn56xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn58xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn58xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn61xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn63xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn63xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn66xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn68xx; - struct cvmx_gmxx_txx_pause_pkt_interval_s cn68xxp1; - struct cvmx_gmxx_txx_pause_pkt_interval_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_pkt_time { - uint64_t u64; - struct cvmx_gmxx_txx_pause_pkt_time_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_pause_pkt_time_s cn30xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn31xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn38xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn38xxp2; - struct cvmx_gmxx_txx_pause_pkt_time_s cn50xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn52xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn52xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn56xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn56xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn58xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn58xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn61xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn63xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn63xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cn66xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn68xx; - struct cvmx_gmxx_txx_pause_pkt_time_s cn68xxp1; - struct cvmx_gmxx_txx_pause_pkt_time_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_togo { - uint64_t u64; - struct cvmx_gmxx_txx_pause_togo_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t msg_time:16; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t msg_time:16; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_txx_pause_togo_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t reserved_16_63:48; -#endif - } cn30xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn31xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn38xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn38xxp2; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn50xx; - struct cvmx_gmxx_txx_pause_togo_s cn52xx; - struct cvmx_gmxx_txx_pause_togo_s cn52xxp1; - struct cvmx_gmxx_txx_pause_togo_s cn56xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn56xxp1; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn58xx; - struct cvmx_gmxx_txx_pause_togo_cn30xx cn58xxp1; - struct cvmx_gmxx_txx_pause_togo_s cn61xx; - struct cvmx_gmxx_txx_pause_togo_s cn63xx; - struct cvmx_gmxx_txx_pause_togo_s cn63xxp1; - struct cvmx_gmxx_txx_pause_togo_s cn66xx; - struct cvmx_gmxx_txx_pause_togo_s cn68xx; - struct cvmx_gmxx_txx_pause_togo_s cn68xxp1; - struct cvmx_gmxx_txx_pause_togo_s cnf71xx; -}; - -union cvmx_gmxx_txx_pause_zero { - uint64_t u64; - struct cvmx_gmxx_txx_pause_zero_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t send:1; -#else - uint64_t send:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_txx_pause_zero_s cn30xx; - struct cvmx_gmxx_txx_pause_zero_s cn31xx; - struct cvmx_gmxx_txx_pause_zero_s cn38xx; - struct cvmx_gmxx_txx_pause_zero_s cn38xxp2; - struct cvmx_gmxx_txx_pause_zero_s cn50xx; - struct cvmx_gmxx_txx_pause_zero_s cn52xx; - struct cvmx_gmxx_txx_pause_zero_s cn52xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn56xx; - struct cvmx_gmxx_txx_pause_zero_s cn56xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn58xx; - struct cvmx_gmxx_txx_pause_zero_s cn58xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn61xx; - struct cvmx_gmxx_txx_pause_zero_s cn63xx; - struct cvmx_gmxx_txx_pause_zero_s cn63xxp1; - struct cvmx_gmxx_txx_pause_zero_s cn66xx; - struct cvmx_gmxx_txx_pause_zero_s cn68xx; - struct cvmx_gmxx_txx_pause_zero_s cn68xxp1; - struct cvmx_gmxx_txx_pause_zero_s cnf71xx; -}; - -union cvmx_gmxx_txx_pipe { - uint64_t u64; - struct cvmx_gmxx_txx_pipe_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_33_63:31; - uint64_t ign_bp:1; - uint64_t reserved_21_31:11; - uint64_t nump:5; - uint64_t reserved_7_15:9; - uint64_t base:7; -#else - uint64_t base:7; - uint64_t reserved_7_15:9; - uint64_t nump:5; - uint64_t reserved_21_31:11; - uint64_t ign_bp:1; - uint64_t reserved_33_63:31; -#endif - } s; - struct cvmx_gmxx_txx_pipe_s cn68xx; - struct cvmx_gmxx_txx_pipe_s cn68xxp1; -}; - -union cvmx_gmxx_txx_sgmii_ctl { - uint64_t u64; - struct cvmx_gmxx_txx_sgmii_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t align:1; -#else - uint64_t align:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_txx_sgmii_ctl_s cn52xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn52xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cn56xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn56xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cn61xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn63xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn63xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cn66xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn68xx; - struct cvmx_gmxx_txx_sgmii_ctl_s cn68xxp1; - struct cvmx_gmxx_txx_sgmii_ctl_s cnf71xx; -}; - -union cvmx_gmxx_txx_slot { - uint64_t u64; - struct cvmx_gmxx_txx_slot_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_10_63:54; - uint64_t slot:10; -#else - uint64_t slot:10; - uint64_t reserved_10_63:54; -#endif - } s; - struct cvmx_gmxx_txx_slot_s cn30xx; - struct cvmx_gmxx_txx_slot_s cn31xx; - struct cvmx_gmxx_txx_slot_s cn38xx; - struct cvmx_gmxx_txx_slot_s cn38xxp2; - struct cvmx_gmxx_txx_slot_s cn50xx; - struct cvmx_gmxx_txx_slot_s cn52xx; - struct cvmx_gmxx_txx_slot_s cn52xxp1; - struct cvmx_gmxx_txx_slot_s cn56xx; - struct cvmx_gmxx_txx_slot_s cn56xxp1; - struct cvmx_gmxx_txx_slot_s cn58xx; - struct cvmx_gmxx_txx_slot_s cn58xxp1; - struct cvmx_gmxx_txx_slot_s cn61xx; - struct cvmx_gmxx_txx_slot_s cn63xx; - struct cvmx_gmxx_txx_slot_s cn63xxp1; - struct cvmx_gmxx_txx_slot_s cn66xx; - struct cvmx_gmxx_txx_slot_s cn68xx; - struct cvmx_gmxx_txx_slot_s cn68xxp1; - struct cvmx_gmxx_txx_slot_s cnf71xx; -}; - -union cvmx_gmxx_txx_soft_pause { - uint64_t u64; - struct cvmx_gmxx_txx_soft_pause_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t time:16; -#else - uint64_t time:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_txx_soft_pause_s cn30xx; - struct cvmx_gmxx_txx_soft_pause_s cn31xx; - struct cvmx_gmxx_txx_soft_pause_s cn38xx; - struct cvmx_gmxx_txx_soft_pause_s cn38xxp2; - struct cvmx_gmxx_txx_soft_pause_s cn50xx; - struct cvmx_gmxx_txx_soft_pause_s cn52xx; - struct cvmx_gmxx_txx_soft_pause_s cn52xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn56xx; - struct cvmx_gmxx_txx_soft_pause_s cn56xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn58xx; - struct cvmx_gmxx_txx_soft_pause_s cn58xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn61xx; - struct cvmx_gmxx_txx_soft_pause_s cn63xx; - struct cvmx_gmxx_txx_soft_pause_s cn63xxp1; - struct cvmx_gmxx_txx_soft_pause_s cn66xx; - struct cvmx_gmxx_txx_soft_pause_s cn68xx; - struct cvmx_gmxx_txx_soft_pause_s cn68xxp1; - struct cvmx_gmxx_txx_soft_pause_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat0 { - uint64_t u64; - struct cvmx_gmxx_txx_stat0_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t xsdef:32; - uint64_t xscol:32; -#else - uint64_t xscol:32; - uint64_t xsdef:32; -#endif - } s; - struct cvmx_gmxx_txx_stat0_s cn30xx; - struct cvmx_gmxx_txx_stat0_s cn31xx; - struct cvmx_gmxx_txx_stat0_s cn38xx; - struct cvmx_gmxx_txx_stat0_s cn38xxp2; - struct cvmx_gmxx_txx_stat0_s cn50xx; - struct cvmx_gmxx_txx_stat0_s cn52xx; - struct cvmx_gmxx_txx_stat0_s cn52xxp1; - struct cvmx_gmxx_txx_stat0_s cn56xx; - struct cvmx_gmxx_txx_stat0_s cn56xxp1; - struct cvmx_gmxx_txx_stat0_s cn58xx; - struct cvmx_gmxx_txx_stat0_s cn58xxp1; - struct cvmx_gmxx_txx_stat0_s cn61xx; - struct cvmx_gmxx_txx_stat0_s cn63xx; - struct cvmx_gmxx_txx_stat0_s cn63xxp1; - struct cvmx_gmxx_txx_stat0_s cn66xx; - struct cvmx_gmxx_txx_stat0_s cn68xx; - struct cvmx_gmxx_txx_stat0_s cn68xxp1; - struct cvmx_gmxx_txx_stat0_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat1 { - uint64_t u64; - struct cvmx_gmxx_txx_stat1_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t scol:32; - uint64_t mcol:32; -#else - uint64_t mcol:32; - uint64_t scol:32; -#endif - } s; - struct cvmx_gmxx_txx_stat1_s cn30xx; - struct cvmx_gmxx_txx_stat1_s cn31xx; - struct cvmx_gmxx_txx_stat1_s cn38xx; - struct cvmx_gmxx_txx_stat1_s cn38xxp2; - struct cvmx_gmxx_txx_stat1_s cn50xx; - struct cvmx_gmxx_txx_stat1_s cn52xx; - struct cvmx_gmxx_txx_stat1_s cn52xxp1; - struct cvmx_gmxx_txx_stat1_s cn56xx; - struct cvmx_gmxx_txx_stat1_s cn56xxp1; - struct cvmx_gmxx_txx_stat1_s cn58xx; - struct cvmx_gmxx_txx_stat1_s cn58xxp1; - struct cvmx_gmxx_txx_stat1_s cn61xx; - struct cvmx_gmxx_txx_stat1_s cn63xx; - struct cvmx_gmxx_txx_stat1_s cn63xxp1; - struct cvmx_gmxx_txx_stat1_s cn66xx; - struct cvmx_gmxx_txx_stat1_s cn68xx; - struct cvmx_gmxx_txx_stat1_s cn68xxp1; - struct cvmx_gmxx_txx_stat1_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat2 { - uint64_t u64; - struct cvmx_gmxx_txx_stat2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t octs:48; -#else - uint64_t octs:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_txx_stat2_s cn30xx; - struct cvmx_gmxx_txx_stat2_s cn31xx; - struct cvmx_gmxx_txx_stat2_s cn38xx; - struct cvmx_gmxx_txx_stat2_s cn38xxp2; - struct cvmx_gmxx_txx_stat2_s cn50xx; - struct cvmx_gmxx_txx_stat2_s cn52xx; - struct cvmx_gmxx_txx_stat2_s cn52xxp1; - struct cvmx_gmxx_txx_stat2_s cn56xx; - struct cvmx_gmxx_txx_stat2_s cn56xxp1; - struct cvmx_gmxx_txx_stat2_s cn58xx; - struct cvmx_gmxx_txx_stat2_s cn58xxp1; - struct cvmx_gmxx_txx_stat2_s cn61xx; - struct cvmx_gmxx_txx_stat2_s cn63xx; - struct cvmx_gmxx_txx_stat2_s cn63xxp1; - struct cvmx_gmxx_txx_stat2_s cn66xx; - struct cvmx_gmxx_txx_stat2_s cn68xx; - struct cvmx_gmxx_txx_stat2_s cn68xxp1; - struct cvmx_gmxx_txx_stat2_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat3 { - uint64_t u64; - struct cvmx_gmxx_txx_stat3_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_32_63:32; - uint64_t pkts:32; -#else - uint64_t pkts:32; - uint64_t reserved_32_63:32; -#endif - } s; - struct cvmx_gmxx_txx_stat3_s cn30xx; - struct cvmx_gmxx_txx_stat3_s cn31xx; - struct cvmx_gmxx_txx_stat3_s cn38xx; - struct cvmx_gmxx_txx_stat3_s cn38xxp2; - struct cvmx_gmxx_txx_stat3_s cn50xx; - struct cvmx_gmxx_txx_stat3_s cn52xx; - struct cvmx_gmxx_txx_stat3_s cn52xxp1; - struct cvmx_gmxx_txx_stat3_s cn56xx; - struct cvmx_gmxx_txx_stat3_s cn56xxp1; - struct cvmx_gmxx_txx_stat3_s cn58xx; - struct cvmx_gmxx_txx_stat3_s cn58xxp1; - struct cvmx_gmxx_txx_stat3_s cn61xx; - struct cvmx_gmxx_txx_stat3_s cn63xx; - struct cvmx_gmxx_txx_stat3_s cn63xxp1; - struct cvmx_gmxx_txx_stat3_s cn66xx; - struct cvmx_gmxx_txx_stat3_s cn68xx; - struct cvmx_gmxx_txx_stat3_s cn68xxp1; - struct cvmx_gmxx_txx_stat3_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat4 { - uint64_t u64; - struct cvmx_gmxx_txx_stat4_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist1:32; - uint64_t hist0:32; -#else - uint64_t hist0:32; - uint64_t hist1:32; -#endif - } s; - struct cvmx_gmxx_txx_stat4_s cn30xx; - struct cvmx_gmxx_txx_stat4_s cn31xx; - struct cvmx_gmxx_txx_stat4_s cn38xx; - struct cvmx_gmxx_txx_stat4_s cn38xxp2; - struct cvmx_gmxx_txx_stat4_s cn50xx; - struct cvmx_gmxx_txx_stat4_s cn52xx; - struct cvmx_gmxx_txx_stat4_s cn52xxp1; - struct cvmx_gmxx_txx_stat4_s cn56xx; - struct cvmx_gmxx_txx_stat4_s cn56xxp1; - struct cvmx_gmxx_txx_stat4_s cn58xx; - struct cvmx_gmxx_txx_stat4_s cn58xxp1; - struct cvmx_gmxx_txx_stat4_s cn61xx; - struct cvmx_gmxx_txx_stat4_s cn63xx; - struct cvmx_gmxx_txx_stat4_s cn63xxp1; - struct cvmx_gmxx_txx_stat4_s cn66xx; - struct cvmx_gmxx_txx_stat4_s cn68xx; - struct cvmx_gmxx_txx_stat4_s cn68xxp1; - struct cvmx_gmxx_txx_stat4_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat5 { - uint64_t u64; - struct cvmx_gmxx_txx_stat5_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist3:32; - uint64_t hist2:32; -#else - uint64_t hist2:32; - uint64_t hist3:32; -#endif - } s; - struct cvmx_gmxx_txx_stat5_s cn30xx; - struct cvmx_gmxx_txx_stat5_s cn31xx; - struct cvmx_gmxx_txx_stat5_s cn38xx; - struct cvmx_gmxx_txx_stat5_s cn38xxp2; - struct cvmx_gmxx_txx_stat5_s cn50xx; - struct cvmx_gmxx_txx_stat5_s cn52xx; - struct cvmx_gmxx_txx_stat5_s cn52xxp1; - struct cvmx_gmxx_txx_stat5_s cn56xx; - struct cvmx_gmxx_txx_stat5_s cn56xxp1; - struct cvmx_gmxx_txx_stat5_s cn58xx; - struct cvmx_gmxx_txx_stat5_s cn58xxp1; - struct cvmx_gmxx_txx_stat5_s cn61xx; - struct cvmx_gmxx_txx_stat5_s cn63xx; - struct cvmx_gmxx_txx_stat5_s cn63xxp1; - struct cvmx_gmxx_txx_stat5_s cn66xx; - struct cvmx_gmxx_txx_stat5_s cn68xx; - struct cvmx_gmxx_txx_stat5_s cn68xxp1; - struct cvmx_gmxx_txx_stat5_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat6 { - uint64_t u64; - struct cvmx_gmxx_txx_stat6_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist5:32; - uint64_t hist4:32; -#else - uint64_t hist4:32; - uint64_t hist5:32; -#endif - } s; - struct cvmx_gmxx_txx_stat6_s cn30xx; - struct cvmx_gmxx_txx_stat6_s cn31xx; - struct cvmx_gmxx_txx_stat6_s cn38xx; - struct cvmx_gmxx_txx_stat6_s cn38xxp2; - struct cvmx_gmxx_txx_stat6_s cn50xx; - struct cvmx_gmxx_txx_stat6_s cn52xx; - struct cvmx_gmxx_txx_stat6_s cn52xxp1; - struct cvmx_gmxx_txx_stat6_s cn56xx; - struct cvmx_gmxx_txx_stat6_s cn56xxp1; - struct cvmx_gmxx_txx_stat6_s cn58xx; - struct cvmx_gmxx_txx_stat6_s cn58xxp1; - struct cvmx_gmxx_txx_stat6_s cn61xx; - struct cvmx_gmxx_txx_stat6_s cn63xx; - struct cvmx_gmxx_txx_stat6_s cn63xxp1; - struct cvmx_gmxx_txx_stat6_s cn66xx; - struct cvmx_gmxx_txx_stat6_s cn68xx; - struct cvmx_gmxx_txx_stat6_s cn68xxp1; - struct cvmx_gmxx_txx_stat6_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat7 { - uint64_t u64; - struct cvmx_gmxx_txx_stat7_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t hist7:32; - uint64_t hist6:32; -#else - uint64_t hist6:32; - uint64_t hist7:32; -#endif - } s; - struct cvmx_gmxx_txx_stat7_s cn30xx; - struct cvmx_gmxx_txx_stat7_s cn31xx; - struct cvmx_gmxx_txx_stat7_s cn38xx; - struct cvmx_gmxx_txx_stat7_s cn38xxp2; - struct cvmx_gmxx_txx_stat7_s cn50xx; - struct cvmx_gmxx_txx_stat7_s cn52xx; - struct cvmx_gmxx_txx_stat7_s cn52xxp1; - struct cvmx_gmxx_txx_stat7_s cn56xx; - struct cvmx_gmxx_txx_stat7_s cn56xxp1; - struct cvmx_gmxx_txx_stat7_s cn58xx; - struct cvmx_gmxx_txx_stat7_s cn58xxp1; - struct cvmx_gmxx_txx_stat7_s cn61xx; - struct cvmx_gmxx_txx_stat7_s cn63xx; - struct cvmx_gmxx_txx_stat7_s cn63xxp1; - struct cvmx_gmxx_txx_stat7_s cn66xx; - struct cvmx_gmxx_txx_stat7_s cn68xx; - struct cvmx_gmxx_txx_stat7_s cn68xxp1; - struct cvmx_gmxx_txx_stat7_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat8 { - uint64_t u64; - struct cvmx_gmxx_txx_stat8_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t mcst:32; - uint64_t bcst:32; -#else - uint64_t bcst:32; - uint64_t mcst:32; -#endif - } s; - struct cvmx_gmxx_txx_stat8_s cn30xx; - struct cvmx_gmxx_txx_stat8_s cn31xx; - struct cvmx_gmxx_txx_stat8_s cn38xx; - struct cvmx_gmxx_txx_stat8_s cn38xxp2; - struct cvmx_gmxx_txx_stat8_s cn50xx; - struct cvmx_gmxx_txx_stat8_s cn52xx; - struct cvmx_gmxx_txx_stat8_s cn52xxp1; - struct cvmx_gmxx_txx_stat8_s cn56xx; - struct cvmx_gmxx_txx_stat8_s cn56xxp1; - struct cvmx_gmxx_txx_stat8_s cn58xx; - struct cvmx_gmxx_txx_stat8_s cn58xxp1; - struct cvmx_gmxx_txx_stat8_s cn61xx; - struct cvmx_gmxx_txx_stat8_s cn63xx; - struct cvmx_gmxx_txx_stat8_s cn63xxp1; - struct cvmx_gmxx_txx_stat8_s cn66xx; - struct cvmx_gmxx_txx_stat8_s cn68xx; - struct cvmx_gmxx_txx_stat8_s cn68xxp1; - struct cvmx_gmxx_txx_stat8_s cnf71xx; -}; - -union cvmx_gmxx_txx_stat9 { - uint64_t u64; - struct cvmx_gmxx_txx_stat9_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t undflw:32; - uint64_t ctl:32; -#else - uint64_t ctl:32; - uint64_t undflw:32; -#endif - } s; - struct cvmx_gmxx_txx_stat9_s cn30xx; - struct cvmx_gmxx_txx_stat9_s cn31xx; - struct cvmx_gmxx_txx_stat9_s cn38xx; - struct cvmx_gmxx_txx_stat9_s cn38xxp2; - struct cvmx_gmxx_txx_stat9_s cn50xx; - struct cvmx_gmxx_txx_stat9_s cn52xx; - struct cvmx_gmxx_txx_stat9_s cn52xxp1; - struct cvmx_gmxx_txx_stat9_s cn56xx; - struct cvmx_gmxx_txx_stat9_s cn56xxp1; - struct cvmx_gmxx_txx_stat9_s cn58xx; - struct cvmx_gmxx_txx_stat9_s cn58xxp1; - struct cvmx_gmxx_txx_stat9_s cn61xx; - struct cvmx_gmxx_txx_stat9_s cn63xx; - struct cvmx_gmxx_txx_stat9_s cn63xxp1; - struct cvmx_gmxx_txx_stat9_s cn66xx; - struct cvmx_gmxx_txx_stat9_s cn68xx; - struct cvmx_gmxx_txx_stat9_s cn68xxp1; - struct cvmx_gmxx_txx_stat9_s cnf71xx; -}; - -union cvmx_gmxx_txx_stats_ctl { - uint64_t u64; - struct cvmx_gmxx_txx_stats_ctl_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t rd_clr:1; -#else - uint64_t rd_clr:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_txx_stats_ctl_s cn30xx; - struct cvmx_gmxx_txx_stats_ctl_s cn31xx; - struct cvmx_gmxx_txx_stats_ctl_s cn38xx; - struct cvmx_gmxx_txx_stats_ctl_s cn38xxp2; - struct cvmx_gmxx_txx_stats_ctl_s cn50xx; - struct cvmx_gmxx_txx_stats_ctl_s cn52xx; - struct cvmx_gmxx_txx_stats_ctl_s cn52xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn56xx; - struct cvmx_gmxx_txx_stats_ctl_s cn56xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn58xx; - struct cvmx_gmxx_txx_stats_ctl_s cn58xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn61xx; - struct cvmx_gmxx_txx_stats_ctl_s cn63xx; - struct cvmx_gmxx_txx_stats_ctl_s cn63xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cn66xx; - struct cvmx_gmxx_txx_stats_ctl_s cn68xx; - struct cvmx_gmxx_txx_stats_ctl_s cn68xxp1; - struct cvmx_gmxx_txx_stats_ctl_s cnf71xx; }; union cvmx_gmxx_txx_thresh { @@ -5824,7 +1643,6 @@ union cvmx_gmxx_txx_thresh { uint64_t reserved_7_63:57; #endif } cn30xx; - struct cvmx_gmxx_txx_thresh_cn30xx cn31xx; struct cvmx_gmxx_txx_thresh_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -5834,240 +1652,6 @@ union cvmx_gmxx_txx_thresh { uint64_t reserved_9_63:55; #endif } cn38xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn38xxp2; - struct cvmx_gmxx_txx_thresh_cn30xx cn50xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn52xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn52xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn56xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn56xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn58xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn58xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn61xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn63xx; - struct cvmx_gmxx_txx_thresh_cn38xx cn63xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cn66xx; - struct cvmx_gmxx_txx_thresh_s cn68xx; - struct cvmx_gmxx_txx_thresh_s cn68xxp1; - struct cvmx_gmxx_txx_thresh_cn38xx cnf71xx; -}; - -union cvmx_gmxx_tx_bp { - uint64_t u64; - struct cvmx_gmxx_tx_bp_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t bp:4; -#else - uint64_t bp:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_tx_bp_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t bp:3; -#else - uint64_t bp:3; - uint64_t reserved_3_63:61; -#endif - } cn30xx; - struct cvmx_gmxx_tx_bp_cn30xx cn31xx; - struct cvmx_gmxx_tx_bp_s cn38xx; - struct cvmx_gmxx_tx_bp_s cn38xxp2; - struct cvmx_gmxx_tx_bp_cn30xx cn50xx; - struct cvmx_gmxx_tx_bp_s cn52xx; - struct cvmx_gmxx_tx_bp_s cn52xxp1; - struct cvmx_gmxx_tx_bp_s cn56xx; - struct cvmx_gmxx_tx_bp_s cn56xxp1; - struct cvmx_gmxx_tx_bp_s cn58xx; - struct cvmx_gmxx_tx_bp_s cn58xxp1; - struct cvmx_gmxx_tx_bp_s cn61xx; - struct cvmx_gmxx_tx_bp_s cn63xx; - struct cvmx_gmxx_tx_bp_s cn63xxp1; - struct cvmx_gmxx_tx_bp_s cn66xx; - struct cvmx_gmxx_tx_bp_s cn68xx; - struct cvmx_gmxx_tx_bp_s cn68xxp1; - struct cvmx_gmxx_tx_bp_cnf71xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t bp:2; -#else - uint64_t bp:2; - uint64_t reserved_2_63:62; -#endif - } cnf71xx; -}; - -union cvmx_gmxx_tx_clk_mskx { - uint64_t u64; - struct cvmx_gmxx_tx_clk_mskx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_1_63:63; - uint64_t msk:1; -#else - uint64_t msk:1; - uint64_t reserved_1_63:63; -#endif - } s; - struct cvmx_gmxx_tx_clk_mskx_s cn30xx; - struct cvmx_gmxx_tx_clk_mskx_s cn50xx; -}; - -union cvmx_gmxx_tx_col_attempt { - uint64_t u64; - struct cvmx_gmxx_tx_col_attempt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_5_63:59; - uint64_t limit:5; -#else - uint64_t limit:5; - uint64_t reserved_5_63:59; -#endif - } s; - struct cvmx_gmxx_tx_col_attempt_s cn30xx; - struct cvmx_gmxx_tx_col_attempt_s cn31xx; - struct cvmx_gmxx_tx_col_attempt_s cn38xx; - struct cvmx_gmxx_tx_col_attempt_s cn38xxp2; - struct cvmx_gmxx_tx_col_attempt_s cn50xx; - struct cvmx_gmxx_tx_col_attempt_s cn52xx; - struct cvmx_gmxx_tx_col_attempt_s cn52xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn56xx; - struct cvmx_gmxx_tx_col_attempt_s cn56xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn58xx; - struct cvmx_gmxx_tx_col_attempt_s cn58xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn61xx; - struct cvmx_gmxx_tx_col_attempt_s cn63xx; - struct cvmx_gmxx_tx_col_attempt_s cn63xxp1; - struct cvmx_gmxx_tx_col_attempt_s cn66xx; - struct cvmx_gmxx_tx_col_attempt_s cn68xx; - struct cvmx_gmxx_tx_col_attempt_s cn68xxp1; - struct cvmx_gmxx_tx_col_attempt_s cnf71xx; -}; - -union cvmx_gmxx_tx_corrupt { - uint64_t u64; - struct cvmx_gmxx_tx_corrupt_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_4_63:60; - uint64_t corrupt:4; -#else - uint64_t corrupt:4; - uint64_t reserved_4_63:60; -#endif - } s; - struct cvmx_gmxx_tx_corrupt_cn30xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_3_63:61; - uint64_t corrupt:3; -#else - uint64_t corrupt:3; - uint64_t reserved_3_63:61; -#endif - } cn30xx; - struct cvmx_gmxx_tx_corrupt_cn30xx cn31xx; - struct cvmx_gmxx_tx_corrupt_s cn38xx; - struct cvmx_gmxx_tx_corrupt_s cn38xxp2; - struct cvmx_gmxx_tx_corrupt_cn30xx cn50xx; - struct cvmx_gmxx_tx_corrupt_s cn52xx; - struct cvmx_gmxx_tx_corrupt_s cn52xxp1; - struct cvmx_gmxx_tx_corrupt_s cn56xx; - struct cvmx_gmxx_tx_corrupt_s cn56xxp1; - struct cvmx_gmxx_tx_corrupt_s cn58xx; - struct cvmx_gmxx_tx_corrupt_s cn58xxp1; - struct cvmx_gmxx_tx_corrupt_s cn61xx; - struct cvmx_gmxx_tx_corrupt_s cn63xx; - struct cvmx_gmxx_tx_corrupt_s cn63xxp1; - struct cvmx_gmxx_tx_corrupt_s cn66xx; - struct cvmx_gmxx_tx_corrupt_s cn68xx; - struct cvmx_gmxx_tx_corrupt_s cn68xxp1; - struct cvmx_gmxx_tx_corrupt_cnf71xx { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_2_63:62; - uint64_t corrupt:2; -#else - uint64_t corrupt:2; - uint64_t reserved_2_63:62; -#endif - } cnf71xx; -}; - -union cvmx_gmxx_tx_hg2_reg1 { - uint64_t u64; - struct cvmx_gmxx_tx_hg2_reg1_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t tx_xof:16; -#else - uint64_t tx_xof:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_hg2_reg1_s cn52xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn52xxp1; - struct cvmx_gmxx_tx_hg2_reg1_s cn56xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn61xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn63xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn63xxp1; - struct cvmx_gmxx_tx_hg2_reg1_s cn66xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn68xx; - struct cvmx_gmxx_tx_hg2_reg1_s cn68xxp1; - struct cvmx_gmxx_tx_hg2_reg1_s cnf71xx; -}; - -union cvmx_gmxx_tx_hg2_reg2 { - uint64_t u64; - struct cvmx_gmxx_tx_hg2_reg2_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t tx_xon:16; -#else - uint64_t tx_xon:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_hg2_reg2_s cn52xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn52xxp1; - struct cvmx_gmxx_tx_hg2_reg2_s cn56xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn61xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn63xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn63xxp1; - struct cvmx_gmxx_tx_hg2_reg2_s cn66xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn68xx; - struct cvmx_gmxx_tx_hg2_reg2_s cn68xxp1; - struct cvmx_gmxx_tx_hg2_reg2_s cnf71xx; -}; - -union cvmx_gmxx_tx_ifg { - uint64_t u64; - struct cvmx_gmxx_tx_ifg_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t ifg2:4; - uint64_t ifg1:4; -#else - uint64_t ifg1:4; - uint64_t ifg2:4; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_tx_ifg_s cn30xx; - struct cvmx_gmxx_tx_ifg_s cn31xx; - struct cvmx_gmxx_tx_ifg_s cn38xx; - struct cvmx_gmxx_tx_ifg_s cn38xxp2; - struct cvmx_gmxx_tx_ifg_s cn50xx; - struct cvmx_gmxx_tx_ifg_s cn52xx; - struct cvmx_gmxx_tx_ifg_s cn52xxp1; - struct cvmx_gmxx_tx_ifg_s cn56xx; - struct cvmx_gmxx_tx_ifg_s cn56xxp1; - struct cvmx_gmxx_tx_ifg_s cn58xx; - struct cvmx_gmxx_tx_ifg_s cn58xxp1; - struct cvmx_gmxx_tx_ifg_s cn61xx; - struct cvmx_gmxx_tx_ifg_s cn63xx; - struct cvmx_gmxx_tx_ifg_s cn63xxp1; - struct cvmx_gmxx_tx_ifg_s cn66xx; - struct cvmx_gmxx_tx_ifg_s cn68xx; - struct cvmx_gmxx_tx_ifg_s cn68xxp1; - struct cvmx_gmxx_tx_ifg_s cnf71xx; }; union cvmx_gmxx_tx_int_en { @@ -6183,7 +1767,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_16_63:48; #endif } cn38xxp2; - struct cvmx_gmxx_tx_int_en_cn30xx cn50xx; struct cvmx_gmxx_tx_int_en_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -6205,12 +1788,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_gmxx_tx_int_en_cn52xx cn52xxp1; - struct cvmx_gmxx_tx_int_en_cn52xx cn56xx; - struct cvmx_gmxx_tx_int_en_cn52xx cn56xxp1; - struct cvmx_gmxx_tx_int_en_cn38xx cn58xx; - struct cvmx_gmxx_tx_int_en_cn38xx cn58xxp1; - struct cvmx_gmxx_tx_int_en_s cn61xx; struct cvmx_gmxx_tx_int_en_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -6234,8 +1811,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_gmxx_tx_int_en_cn63xx cn63xxp1; - struct cvmx_gmxx_tx_int_en_s cn66xx; struct cvmx_gmxx_tx_int_en_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6261,7 +1836,6 @@ union cvmx_gmxx_tx_int_en { uint64_t reserved_25_63:39; #endif } cn68xx; - struct cvmx_gmxx_tx_int_en_cn68xx cn68xxp1; struct cvmx_gmxx_tx_int_en_cnf71xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6410,7 +1984,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_16_63:48; #endif } cn38xxp2; - struct cvmx_gmxx_tx_int_reg_cn30xx cn50xx; struct cvmx_gmxx_tx_int_reg_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -6432,12 +2005,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_gmxx_tx_int_reg_cn52xx cn52xxp1; - struct cvmx_gmxx_tx_int_reg_cn52xx cn56xx; - struct cvmx_gmxx_tx_int_reg_cn52xx cn56xxp1; - struct cvmx_gmxx_tx_int_reg_cn38xx cn58xx; - struct cvmx_gmxx_tx_int_reg_cn38xx cn58xxp1; - struct cvmx_gmxx_tx_int_reg_s cn61xx; struct cvmx_gmxx_tx_int_reg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -6461,8 +2028,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_gmxx_tx_int_reg_cn63xx cn63xxp1; - struct cvmx_gmxx_tx_int_reg_s cn66xx; struct cvmx_gmxx_tx_int_reg_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6488,7 +2053,6 @@ union cvmx_gmxx_tx_int_reg { uint64_t reserved_25_63:39; #endif } cn68xx; - struct cvmx_gmxx_tx_int_reg_cn68xx cn68xxp1; struct cvmx_gmxx_tx_int_reg_cnf71xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_25_63:39; @@ -6524,68 +2088,6 @@ union cvmx_gmxx_tx_int_reg { } cnf71xx; }; -union cvmx_gmxx_tx_jam { - uint64_t u64; - struct cvmx_gmxx_tx_jam_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_8_63:56; - uint64_t jam:8; -#else - uint64_t jam:8; - uint64_t reserved_8_63:56; -#endif - } s; - struct cvmx_gmxx_tx_jam_s cn30xx; - struct cvmx_gmxx_tx_jam_s cn31xx; - struct cvmx_gmxx_tx_jam_s cn38xx; - struct cvmx_gmxx_tx_jam_s cn38xxp2; - struct cvmx_gmxx_tx_jam_s cn50xx; - struct cvmx_gmxx_tx_jam_s cn52xx; - struct cvmx_gmxx_tx_jam_s cn52xxp1; - struct cvmx_gmxx_tx_jam_s cn56xx; - struct cvmx_gmxx_tx_jam_s cn56xxp1; - struct cvmx_gmxx_tx_jam_s cn58xx; - struct cvmx_gmxx_tx_jam_s cn58xxp1; - struct cvmx_gmxx_tx_jam_s cn61xx; - struct cvmx_gmxx_tx_jam_s cn63xx; - struct cvmx_gmxx_tx_jam_s cn63xxp1; - struct cvmx_gmxx_tx_jam_s cn66xx; - struct cvmx_gmxx_tx_jam_s cn68xx; - struct cvmx_gmxx_tx_jam_s cn68xxp1; - struct cvmx_gmxx_tx_jam_s cnf71xx; -}; - -union cvmx_gmxx_tx_lfsr { - uint64_t u64; - struct cvmx_gmxx_tx_lfsr_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t lfsr:16; -#else - uint64_t lfsr:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_lfsr_s cn30xx; - struct cvmx_gmxx_tx_lfsr_s cn31xx; - struct cvmx_gmxx_tx_lfsr_s cn38xx; - struct cvmx_gmxx_tx_lfsr_s cn38xxp2; - struct cvmx_gmxx_tx_lfsr_s cn50xx; - struct cvmx_gmxx_tx_lfsr_s cn52xx; - struct cvmx_gmxx_tx_lfsr_s cn52xxp1; - struct cvmx_gmxx_tx_lfsr_s cn56xx; - struct cvmx_gmxx_tx_lfsr_s cn56xxp1; - struct cvmx_gmxx_tx_lfsr_s cn58xx; - struct cvmx_gmxx_tx_lfsr_s cn58xxp1; - struct cvmx_gmxx_tx_lfsr_s cn61xx; - struct cvmx_gmxx_tx_lfsr_s cn63xx; - struct cvmx_gmxx_tx_lfsr_s cn63xxp1; - struct cvmx_gmxx_tx_lfsr_s cn66xx; - struct cvmx_gmxx_tx_lfsr_s cn68xx; - struct cvmx_gmxx_tx_lfsr_s cn68xxp1; - struct cvmx_gmxx_tx_lfsr_s cnf71xx; -}; - union cvmx_gmxx_tx_ovr_bp { uint64_t u64; struct cvmx_gmxx_tx_ovr_bp_s { @@ -6622,7 +2124,6 @@ union cvmx_gmxx_tx_ovr_bp { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_gmxx_tx_ovr_bp_cn30xx cn31xx; struct cvmx_gmxx_tx_ovr_bp_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -6636,20 +2137,6 @@ union cvmx_gmxx_tx_ovr_bp { uint64_t reserved_12_63:52; #endif } cn38xx; - struct cvmx_gmxx_tx_ovr_bp_cn38xx cn38xxp2; - struct cvmx_gmxx_tx_ovr_bp_cn30xx cn50xx; - struct cvmx_gmxx_tx_ovr_bp_s cn52xx; - struct cvmx_gmxx_tx_ovr_bp_s cn52xxp1; - struct cvmx_gmxx_tx_ovr_bp_s cn56xx; - struct cvmx_gmxx_tx_ovr_bp_s cn56xxp1; - struct cvmx_gmxx_tx_ovr_bp_cn38xx cn58xx; - struct cvmx_gmxx_tx_ovr_bp_cn38xx cn58xxp1; - struct cvmx_gmxx_tx_ovr_bp_s cn61xx; - struct cvmx_gmxx_tx_ovr_bp_s cn63xx; - struct cvmx_gmxx_tx_ovr_bp_s cn63xxp1; - struct cvmx_gmxx_tx_ovr_bp_s cn66xx; - struct cvmx_gmxx_tx_ovr_bp_s cn68xx; - struct cvmx_gmxx_tx_ovr_bp_s cn68xxp1; struct cvmx_gmxx_tx_ovr_bp_cnf71xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -6673,68 +2160,6 @@ union cvmx_gmxx_tx_ovr_bp { } cnf71xx; }; -union cvmx_gmxx_tx_pause_pkt_dmac { - uint64_t u64; - struct cvmx_gmxx_tx_pause_pkt_dmac_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_48_63:16; - uint64_t dmac:48; -#else - uint64_t dmac:48; - uint64_t reserved_48_63:16; -#endif - } s; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn30xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn31xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn38xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn38xxp2; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn50xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn52xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn52xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn56xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn56xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn58xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn58xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn61xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn63xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn63xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn66xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn68xx; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cn68xxp1; - struct cvmx_gmxx_tx_pause_pkt_dmac_s cnf71xx; -}; - -union cvmx_gmxx_tx_pause_pkt_type { - uint64_t u64; - struct cvmx_gmxx_tx_pause_pkt_type_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t type:16; -#else - uint64_t type:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_pause_pkt_type_s cn30xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn31xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn38xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn38xxp2; - struct cvmx_gmxx_tx_pause_pkt_type_s cn50xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn52xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn52xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn56xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn56xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn58xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn58xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn61xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn63xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn63xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cn66xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn68xx; - struct cvmx_gmxx_tx_pause_pkt_type_s cn68xxp1; - struct cvmx_gmxx_tx_pause_pkt_type_s cnf71xx; -}; - union cvmx_gmxx_tx_prts { uint64_t u64; struct cvmx_gmxx_tx_prts_s { @@ -6746,24 +2171,6 @@ union cvmx_gmxx_tx_prts { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_gmxx_tx_prts_s cn30xx; - struct cvmx_gmxx_tx_prts_s cn31xx; - struct cvmx_gmxx_tx_prts_s cn38xx; - struct cvmx_gmxx_tx_prts_s cn38xxp2; - struct cvmx_gmxx_tx_prts_s cn50xx; - struct cvmx_gmxx_tx_prts_s cn52xx; - struct cvmx_gmxx_tx_prts_s cn52xxp1; - struct cvmx_gmxx_tx_prts_s cn56xx; - struct cvmx_gmxx_tx_prts_s cn56xxp1; - struct cvmx_gmxx_tx_prts_s cn58xx; - struct cvmx_gmxx_tx_prts_s cn58xxp1; - struct cvmx_gmxx_tx_prts_s cn61xx; - struct cvmx_gmxx_tx_prts_s cn63xx; - struct cvmx_gmxx_tx_prts_s cn63xxp1; - struct cvmx_gmxx_tx_prts_s cn66xx; - struct cvmx_gmxx_tx_prts_s cn68xx; - struct cvmx_gmxx_tx_prts_s cn68xxp1; - struct cvmx_gmxx_tx_prts_s cnf71xx; }; union cvmx_gmxx_tx_spi_ctl { @@ -6779,26 +2186,6 @@ union cvmx_gmxx_tx_spi_ctl { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_gmxx_tx_spi_ctl_s cn38xx; - struct cvmx_gmxx_tx_spi_ctl_s cn38xxp2; - struct cvmx_gmxx_tx_spi_ctl_s cn58xx; - struct cvmx_gmxx_tx_spi_ctl_s cn58xxp1; -}; - -union cvmx_gmxx_tx_spi_drain { - uint64_t u64; - struct cvmx_gmxx_tx_spi_drain_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t drain:16; -#else - uint64_t drain:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_spi_drain_s cn38xx; - struct cvmx_gmxx_tx_spi_drain_s cn58xx; - struct cvmx_gmxx_tx_spi_drain_s cn58xxp1; }; union cvmx_gmxx_tx_spi_max { @@ -6827,24 +2214,6 @@ union cvmx_gmxx_tx_spi_max { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gmxx_tx_spi_max_cn38xx cn38xxp2; - struct cvmx_gmxx_tx_spi_max_s cn58xx; - struct cvmx_gmxx_tx_spi_max_s cn58xxp1; -}; - -union cvmx_gmxx_tx_spi_roundx { - uint64_t u64; - struct cvmx_gmxx_tx_spi_roundx_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_16_63:48; - uint64_t round:16; -#else - uint64_t round:16; - uint64_t reserved_16_63:48; -#endif - } s; - struct cvmx_gmxx_tx_spi_roundx_s cn58xx; - struct cvmx_gmxx_tx_spi_roundx_s cn58xxp1; }; union cvmx_gmxx_tx_spi_thresh { @@ -6858,10 +2227,6 @@ union cvmx_gmxx_tx_spi_thresh { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_gmxx_tx_spi_thresh_s cn38xx; - struct cvmx_gmxx_tx_spi_thresh_s cn38xxp2; - struct cvmx_gmxx_tx_spi_thresh_s cn58xx; - struct cvmx_gmxx_tx_spi_thresh_s cn58xxp1; }; union cvmx_gmxx_tx_xaui_ctl { @@ -6889,43 +2254,6 @@ union cvmx_gmxx_tx_xaui_ctl { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_gmxx_tx_xaui_ctl_s cn52xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn52xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cn56xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn56xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cn61xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn63xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn63xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cn66xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn68xx; - struct cvmx_gmxx_tx_xaui_ctl_s cn68xxp1; - struct cvmx_gmxx_tx_xaui_ctl_s cnf71xx; -}; - -union cvmx_gmxx_xaui_ext_loopback { - uint64_t u64; - struct cvmx_gmxx_xaui_ext_loopback_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t reserved_5_63:59; - uint64_t en:1; - uint64_t thresh:4; -#else - uint64_t thresh:4; - uint64_t en:1; - uint64_t reserved_5_63:59; -#endif - } s; - struct cvmx_gmxx_xaui_ext_loopback_s cn52xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn52xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cn56xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn56xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cn61xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn63xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn63xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cn66xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn68xx; - struct cvmx_gmxx_xaui_ext_loopback_s cn68xxp1; - struct cvmx_gmxx_xaui_ext_loopback_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-gpio-defs.h b/arch/mips/include/asm/octeon/cvmx-gpio-defs.h index 8123b8209369..5420fa667a9c 100644 --- a/arch/mips/include/asm/octeon/cvmx-gpio-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-gpio-defs.h @@ -90,10 +90,6 @@ union cvmx_gpio_bit_cfgx { uint64_t reserved_12_63:52; #endif } cn30xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn31xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn38xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn38xxp2; - struct cvmx_gpio_bit_cfgx_cn30xx cn50xx; struct cvmx_gpio_bit_cfgx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_15_63:49; @@ -117,20 +113,6 @@ union cvmx_gpio_bit_cfgx { uint64_t reserved_15_63:49; #endif } cn52xx; - struct cvmx_gpio_bit_cfgx_cn52xx cn52xxp1; - struct cvmx_gpio_bit_cfgx_cn52xx cn56xx; - struct cvmx_gpio_bit_cfgx_cn52xx cn56xxp1; - struct cvmx_gpio_bit_cfgx_cn30xx cn58xx; - struct cvmx_gpio_bit_cfgx_cn30xx cn58xxp1; - struct cvmx_gpio_bit_cfgx_s cn61xx; - struct cvmx_gpio_bit_cfgx_s cn63xx; - struct cvmx_gpio_bit_cfgx_s cn63xxp1; - struct cvmx_gpio_bit_cfgx_s cn66xx; - struct cvmx_gpio_bit_cfgx_s cn68xx; - struct cvmx_gpio_bit_cfgx_s cn68xxp1; - struct cvmx_gpio_bit_cfgx_s cn70xx; - struct cvmx_gpio_bit_cfgx_s cn73xx; - struct cvmx_gpio_bit_cfgx_s cnf71xx; }; union cvmx_gpio_boot_ena { @@ -146,9 +128,6 @@ union cvmx_gpio_boot_ena { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_gpio_boot_ena_s cn30xx; - struct cvmx_gpio_boot_ena_s cn31xx; - struct cvmx_gpio_boot_ena_s cn50xx; }; union cvmx_gpio_clk_genx { @@ -162,17 +141,6 @@ union cvmx_gpio_clk_genx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_gpio_clk_genx_s cn52xx; - struct cvmx_gpio_clk_genx_s cn52xxp1; - struct cvmx_gpio_clk_genx_s cn56xx; - struct cvmx_gpio_clk_genx_s cn56xxp1; - struct cvmx_gpio_clk_genx_s cn61xx; - struct cvmx_gpio_clk_genx_s cn63xx; - struct cvmx_gpio_clk_genx_s cn63xxp1; - struct cvmx_gpio_clk_genx_s cn66xx; - struct cvmx_gpio_clk_genx_s cn68xx; - struct cvmx_gpio_clk_genx_s cn68xxp1; - struct cvmx_gpio_clk_genx_s cnf71xx; }; union cvmx_gpio_clk_qlmx { @@ -218,11 +186,6 @@ union cvmx_gpio_clk_qlmx { uint64_t reserved_3_63:61; #endif } cn63xx; - struct cvmx_gpio_clk_qlmx_cn63xx cn63xxp1; - struct cvmx_gpio_clk_qlmx_cn61xx cn66xx; - struct cvmx_gpio_clk_qlmx_s cn68xx; - struct cvmx_gpio_clk_qlmx_s cn68xxp1; - struct cvmx_gpio_clk_qlmx_cn61xx cnf71xx; }; union cvmx_gpio_dbg_ena { @@ -236,9 +199,6 @@ union cvmx_gpio_dbg_ena { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_gpio_dbg_ena_s cn30xx; - struct cvmx_gpio_dbg_ena_s cn31xx; - struct cvmx_gpio_dbg_ena_s cn50xx; }; union cvmx_gpio_int_clr { @@ -252,24 +212,6 @@ union cvmx_gpio_int_clr { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_gpio_int_clr_s cn30xx; - struct cvmx_gpio_int_clr_s cn31xx; - struct cvmx_gpio_int_clr_s cn38xx; - struct cvmx_gpio_int_clr_s cn38xxp2; - struct cvmx_gpio_int_clr_s cn50xx; - struct cvmx_gpio_int_clr_s cn52xx; - struct cvmx_gpio_int_clr_s cn52xxp1; - struct cvmx_gpio_int_clr_s cn56xx; - struct cvmx_gpio_int_clr_s cn56xxp1; - struct cvmx_gpio_int_clr_s cn58xx; - struct cvmx_gpio_int_clr_s cn58xxp1; - struct cvmx_gpio_int_clr_s cn61xx; - struct cvmx_gpio_int_clr_s cn63xx; - struct cvmx_gpio_int_clr_s cn63xxp1; - struct cvmx_gpio_int_clr_s cn66xx; - struct cvmx_gpio_int_clr_s cn68xx; - struct cvmx_gpio_int_clr_s cn68xxp1; - struct cvmx_gpio_int_clr_s cnf71xx; }; union cvmx_gpio_multi_cast { @@ -283,8 +225,6 @@ union cvmx_gpio_multi_cast { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_gpio_multi_cast_s cn61xx; - struct cvmx_gpio_multi_cast_s cnf71xx; }; union cvmx_gpio_pin_ena { @@ -302,7 +242,6 @@ union cvmx_gpio_pin_ena { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_gpio_pin_ena_s cn66xx; }; union cvmx_gpio_rx_dat { @@ -316,8 +255,6 @@ union cvmx_gpio_rx_dat { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_gpio_rx_dat_s cn30xx; - struct cvmx_gpio_rx_dat_s cn31xx; struct cvmx_gpio_rx_dat_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -327,14 +264,6 @@ union cvmx_gpio_rx_dat { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gpio_rx_dat_cn38xx cn38xxp2; - struct cvmx_gpio_rx_dat_s cn50xx; - struct cvmx_gpio_rx_dat_cn38xx cn52xx; - struct cvmx_gpio_rx_dat_cn38xx cn52xxp1; - struct cvmx_gpio_rx_dat_cn38xx cn56xx; - struct cvmx_gpio_rx_dat_cn38xx cn56xxp1; - struct cvmx_gpio_rx_dat_cn38xx cn58xx; - struct cvmx_gpio_rx_dat_cn38xx cn58xxp1; struct cvmx_gpio_rx_dat_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -344,12 +273,6 @@ union cvmx_gpio_rx_dat { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_gpio_rx_dat_cn38xx cn63xx; - struct cvmx_gpio_rx_dat_cn38xx cn63xxp1; - struct cvmx_gpio_rx_dat_cn61xx cn66xx; - struct cvmx_gpio_rx_dat_cn38xx cn68xx; - struct cvmx_gpio_rx_dat_cn38xx cn68xxp1; - struct cvmx_gpio_rx_dat_cn61xx cnf71xx; }; union cvmx_gpio_tim_ctl { @@ -363,8 +286,6 @@ union cvmx_gpio_tim_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_gpio_tim_ctl_s cn68xx; - struct cvmx_gpio_tim_ctl_s cn68xxp1; }; union cvmx_gpio_tx_clr { @@ -378,8 +299,6 @@ union cvmx_gpio_tx_clr { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_gpio_tx_clr_s cn30xx; - struct cvmx_gpio_tx_clr_s cn31xx; struct cvmx_gpio_tx_clr_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -389,14 +308,6 @@ union cvmx_gpio_tx_clr { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gpio_tx_clr_cn38xx cn38xxp2; - struct cvmx_gpio_tx_clr_s cn50xx; - struct cvmx_gpio_tx_clr_cn38xx cn52xx; - struct cvmx_gpio_tx_clr_cn38xx cn52xxp1; - struct cvmx_gpio_tx_clr_cn38xx cn56xx; - struct cvmx_gpio_tx_clr_cn38xx cn56xxp1; - struct cvmx_gpio_tx_clr_cn38xx cn58xx; - struct cvmx_gpio_tx_clr_cn38xx cn58xxp1; struct cvmx_gpio_tx_clr_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -406,12 +317,6 @@ union cvmx_gpio_tx_clr { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_gpio_tx_clr_cn38xx cn63xx; - struct cvmx_gpio_tx_clr_cn38xx cn63xxp1; - struct cvmx_gpio_tx_clr_cn61xx cn66xx; - struct cvmx_gpio_tx_clr_cn38xx cn68xx; - struct cvmx_gpio_tx_clr_cn38xx cn68xxp1; - struct cvmx_gpio_tx_clr_cn61xx cnf71xx; }; union cvmx_gpio_tx_set { @@ -425,8 +330,6 @@ union cvmx_gpio_tx_set { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_gpio_tx_set_s cn30xx; - struct cvmx_gpio_tx_set_s cn31xx; struct cvmx_gpio_tx_set_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -436,14 +339,6 @@ union cvmx_gpio_tx_set { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_gpio_tx_set_cn38xx cn38xxp2; - struct cvmx_gpio_tx_set_s cn50xx; - struct cvmx_gpio_tx_set_cn38xx cn52xx; - struct cvmx_gpio_tx_set_cn38xx cn52xxp1; - struct cvmx_gpio_tx_set_cn38xx cn56xx; - struct cvmx_gpio_tx_set_cn38xx cn56xxp1; - struct cvmx_gpio_tx_set_cn38xx cn58xx; - struct cvmx_gpio_tx_set_cn38xx cn58xxp1; struct cvmx_gpio_tx_set_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -453,12 +348,6 @@ union cvmx_gpio_tx_set { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_gpio_tx_set_cn38xx cn63xx; - struct cvmx_gpio_tx_set_cn38xx cn63xxp1; - struct cvmx_gpio_tx_set_cn61xx cn66xx; - struct cvmx_gpio_tx_set_cn38xx cn68xx; - struct cvmx_gpio_tx_set_cn38xx cn68xxp1; - struct cvmx_gpio_tx_set_cn61xx cnf71xx; }; union cvmx_gpio_xbit_cfgx { @@ -505,11 +394,6 @@ union cvmx_gpio_xbit_cfgx { uint64_t reserved_12_63:52; #endif } cn30xx; - struct cvmx_gpio_xbit_cfgx_cn30xx cn31xx; - struct cvmx_gpio_xbit_cfgx_cn30xx cn50xx; - struct cvmx_gpio_xbit_cfgx_s cn61xx; - struct cvmx_gpio_xbit_cfgx_s cn66xx; - struct cvmx_gpio_xbit_cfgx_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h b/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h index f7a95d7de140..ac42b5066bd9 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-rgmii.h @@ -90,21 +90,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_rgmii_link_get(int ipd_port); extern int __cvmx_helper_rgmii_link_set(int ipd_port, cvmx_helper_link_info_t link_info); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_rgmii_configure_loopback(int ipd_port, - int enable_internal, - int enable_external); - #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h b/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h index 63fd21335e4b..3a54dea58c0a 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-sgmii.h @@ -84,21 +84,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_sgmii_link_get(int ipd_port); extern int __cvmx_helper_sgmii_link_set(int ipd_port, cvmx_helper_link_info_t link_info); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_sgmii_configure_loopback(int ipd_port, - int enable_internal, - int enable_external); - #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper-util.h b/arch/mips/include/asm/octeon/cvmx-helper-util.h index f446f212bbd4..e9a97e7ee604 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-util.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-util.h @@ -45,29 +45,6 @@ extern const char *cvmx_helper_interface_mode_to_string(cvmx_helper_interface_mode_t mode); /** - * Debug routine to dump the packet structure to the console - * - * @work: Work queue entry containing the packet to dump - * Returns - */ -extern int cvmx_helper_dump_packet(cvmx_wqe_t *work); - -/** - * Setup Random Early Drop on a specific input queue - * - * @queue: Input queue to setup RED on (0-7) - * @pass_thresh: - * Packets will begin slowly dropping when there are less than - * this many packet buffers free in FPA 0. - * @drop_thresh: - * All incoming packets will be dropped when there are less - * than this many free packet buffers in FPA 0. - * Returns Zero on success. Negative on failure - */ -extern int cvmx_helper_setup_red_queue(int queue, int pass_thresh, - int drop_thresh); - -/** * Setup Random Early Drop to automatically begin dropping packets. * * @pass_thresh: diff --git a/arch/mips/include/asm/octeon/cvmx-helper-xaui.h b/arch/mips/include/asm/octeon/cvmx-helper-xaui.h index f8ce53f6f28f..51f45b495680 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-xaui.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-xaui.h @@ -84,20 +84,4 @@ extern cvmx_helper_link_info_t __cvmx_helper_xaui_link_get(int ipd_port); extern int __cvmx_helper_xaui_link_set(int ipd_port, cvmx_helper_link_info_t link_info); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int __cvmx_helper_xaui_configure_loopback(int ipd_port, - int enable_internal, - int enable_external); #endif diff --git a/arch/mips/include/asm/octeon/cvmx-helper.h b/arch/mips/include/asm/octeon/cvmx-helper.h index 0ed87cb67e7f..ba0e76f578e0 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper.h +++ b/arch/mips/include/asm/octeon/cvmx-helper.h @@ -71,26 +71,6 @@ typedef union { #include <asm/octeon/cvmx-helper-xaui.h> /** - * cvmx_override_pko_queue_priority(int ipd_port, uint64_t - * priorities[16]) is a function pointer. It is meant to allow - * customization of the PKO queue priorities based on the port - * number. Users should set this pointer to a function before - * calling any cvmx-helper operations. - */ -extern void (*cvmx_override_pko_queue_priority) (int pko_port, - uint64_t priorities[16]); - -/** - * cvmx_override_ipd_port_setup(int ipd_port) is a function - * pointer. It is meant to allow customization of the IPD port - * setup before packet input/output comes online. It is called - * after cvmx-helper does the default IPD configuration, but - * before IPD is enabled. Users should set this pointer to a - * function before calling any cvmx-helper operations. - */ -extern void (*cvmx_override_ipd_port_setup) (int ipd_port); - -/** * This function enables the IPD and also enables the packet interfaces. * The packet interfaces (RGMII and SPI) must be enabled after the * IPD. This should be called by the user program after any additional @@ -195,20 +175,4 @@ extern int cvmx_helper_link_set(int ipd_port, extern int cvmx_helper_interface_probe(int interface); extern int cvmx_helper_interface_enumerate(int interface); -/** - * Configure a port for internal and/or external loopback. Internal loopback - * causes packets sent by the port to be received by Octeon. External loopback - * causes packets received from the wire to sent out again. - * - * @ipd_port: IPD/PKO port to loopback. - * @enable_internal: - * Non zero if you want internal loopback - * @enable_external: - * Non zero if you want external loopback - * - * Returns Zero on success, negative on failure. - */ -extern int cvmx_helper_configure_loopback(int ipd_port, int enable_internal, - int enable_external); - #endif /* __CVMX_HELPER_H__ */ diff --git a/arch/mips/include/asm/octeon/cvmx-iob-defs.h b/arch/mips/include/asm/octeon/cvmx-iob-defs.h index 7936f816e93e..989b67bbac5b 100644 --- a/arch/mips/include/asm/octeon/cvmx-iob-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-iob-defs.h @@ -119,16 +119,6 @@ union cvmx_iob_bist_status { uint64_t reserved_18_63:46; #endif } cn30xx; - struct cvmx_iob_bist_status_cn30xx cn31xx; - struct cvmx_iob_bist_status_cn30xx cn38xx; - struct cvmx_iob_bist_status_cn30xx cn38xxp2; - struct cvmx_iob_bist_status_cn30xx cn50xx; - struct cvmx_iob_bist_status_cn30xx cn52xx; - struct cvmx_iob_bist_status_cn30xx cn52xxp1; - struct cvmx_iob_bist_status_cn30xx cn56xx; - struct cvmx_iob_bist_status_cn30xx cn56xxp1; - struct cvmx_iob_bist_status_cn30xx cn58xx; - struct cvmx_iob_bist_status_cn30xx cn58xxp1; struct cvmx_iob_bist_status_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_23_63:41; @@ -182,9 +172,6 @@ union cvmx_iob_bist_status { uint64_t reserved_23_63:41; #endif } cn61xx; - struct cvmx_iob_bist_status_cn61xx cn63xx; - struct cvmx_iob_bist_status_cn61xx cn63xxp1; - struct cvmx_iob_bist_status_cn61xx cn66xx; struct cvmx_iob_bist_status_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_18_63:46; @@ -228,8 +215,6 @@ union cvmx_iob_bist_status { uint64_t reserved_18_63:46; #endif } cn68xx; - struct cvmx_iob_bist_status_cn68xx cn68xxp1; - struct cvmx_iob_bist_status_cn61xx cnf71xx; }; union cvmx_iob_ctl_status { @@ -274,10 +259,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_iob_ctl_status_cn30xx cn31xx; - struct cvmx_iob_ctl_status_cn30xx cn38xx; - struct cvmx_iob_ctl_status_cn30xx cn38xxp2; - struct cvmx_iob_ctl_status_cn30xx cn50xx; struct cvmx_iob_ctl_status_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_6_63:58; @@ -297,11 +278,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_iob_ctl_status_cn30xx cn52xxp1; - struct cvmx_iob_ctl_status_cn30xx cn56xx; - struct cvmx_iob_ctl_status_cn30xx cn56xxp1; - struct cvmx_iob_ctl_status_cn30xx cn58xx; - struct cvmx_iob_ctl_status_cn30xx cn58xxp1; struct cvmx_iob_ctl_status_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -346,8 +322,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_10_63:54; #endif } cn63xx; - struct cvmx_iob_ctl_status_cn63xx cn63xxp1; - struct cvmx_iob_ctl_status_cn61xx cn66xx; struct cvmx_iob_ctl_status_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -371,8 +345,6 @@ union cvmx_iob_ctl_status { uint64_t reserved_11_63:53; #endif } cn68xx; - struct cvmx_iob_ctl_status_cn68xx cn68xxp1; - struct cvmx_iob_ctl_status_cn61xx cnf71xx; }; union cvmx_iob_dwb_pri_cnt { @@ -388,19 +360,6 @@ union cvmx_iob_dwb_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_dwb_pri_cnt_s cn38xx; - struct cvmx_iob_dwb_pri_cnt_s cn38xxp2; - struct cvmx_iob_dwb_pri_cnt_s cn52xx; - struct cvmx_iob_dwb_pri_cnt_s cn52xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn56xx; - struct cvmx_iob_dwb_pri_cnt_s cn56xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn58xx; - struct cvmx_iob_dwb_pri_cnt_s cn58xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn61xx; - struct cvmx_iob_dwb_pri_cnt_s cn63xx; - struct cvmx_iob_dwb_pri_cnt_s cn63xxp1; - struct cvmx_iob_dwb_pri_cnt_s cn66xx; - struct cvmx_iob_dwb_pri_cnt_s cnf71xx; }; union cvmx_iob_fau_timeout { @@ -416,24 +375,6 @@ union cvmx_iob_fau_timeout { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_iob_fau_timeout_s cn30xx; - struct cvmx_iob_fau_timeout_s cn31xx; - struct cvmx_iob_fau_timeout_s cn38xx; - struct cvmx_iob_fau_timeout_s cn38xxp2; - struct cvmx_iob_fau_timeout_s cn50xx; - struct cvmx_iob_fau_timeout_s cn52xx; - struct cvmx_iob_fau_timeout_s cn52xxp1; - struct cvmx_iob_fau_timeout_s cn56xx; - struct cvmx_iob_fau_timeout_s cn56xxp1; - struct cvmx_iob_fau_timeout_s cn58xx; - struct cvmx_iob_fau_timeout_s cn58xxp1; - struct cvmx_iob_fau_timeout_s cn61xx; - struct cvmx_iob_fau_timeout_s cn63xx; - struct cvmx_iob_fau_timeout_s cn63xxp1; - struct cvmx_iob_fau_timeout_s cn66xx; - struct cvmx_iob_fau_timeout_s cn68xx; - struct cvmx_iob_fau_timeout_s cn68xxp1; - struct cvmx_iob_fau_timeout_s cnf71xx; }; union cvmx_iob_i2c_pri_cnt { @@ -449,19 +390,6 @@ union cvmx_iob_i2c_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_i2c_pri_cnt_s cn38xx; - struct cvmx_iob_i2c_pri_cnt_s cn38xxp2; - struct cvmx_iob_i2c_pri_cnt_s cn52xx; - struct cvmx_iob_i2c_pri_cnt_s cn52xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn56xx; - struct cvmx_iob_i2c_pri_cnt_s cn56xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn58xx; - struct cvmx_iob_i2c_pri_cnt_s cn58xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn61xx; - struct cvmx_iob_i2c_pri_cnt_s cn63xx; - struct cvmx_iob_i2c_pri_cnt_s cn63xxp1; - struct cvmx_iob_i2c_pri_cnt_s cn66xx; - struct cvmx_iob_i2c_pri_cnt_s cnf71xx; }; union cvmx_iob_inb_control_match { @@ -481,24 +409,6 @@ union cvmx_iob_inb_control_match { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_iob_inb_control_match_s cn30xx; - struct cvmx_iob_inb_control_match_s cn31xx; - struct cvmx_iob_inb_control_match_s cn38xx; - struct cvmx_iob_inb_control_match_s cn38xxp2; - struct cvmx_iob_inb_control_match_s cn50xx; - struct cvmx_iob_inb_control_match_s cn52xx; - struct cvmx_iob_inb_control_match_s cn52xxp1; - struct cvmx_iob_inb_control_match_s cn56xx; - struct cvmx_iob_inb_control_match_s cn56xxp1; - struct cvmx_iob_inb_control_match_s cn58xx; - struct cvmx_iob_inb_control_match_s cn58xxp1; - struct cvmx_iob_inb_control_match_s cn61xx; - struct cvmx_iob_inb_control_match_s cn63xx; - struct cvmx_iob_inb_control_match_s cn63xxp1; - struct cvmx_iob_inb_control_match_s cn66xx; - struct cvmx_iob_inb_control_match_s cn68xx; - struct cvmx_iob_inb_control_match_s cn68xxp1; - struct cvmx_iob_inb_control_match_s cnf71xx; }; union cvmx_iob_inb_control_match_enb { @@ -518,24 +428,6 @@ union cvmx_iob_inb_control_match_enb { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_iob_inb_control_match_enb_s cn30xx; - struct cvmx_iob_inb_control_match_enb_s cn31xx; - struct cvmx_iob_inb_control_match_enb_s cn38xx; - struct cvmx_iob_inb_control_match_enb_s cn38xxp2; - struct cvmx_iob_inb_control_match_enb_s cn50xx; - struct cvmx_iob_inb_control_match_enb_s cn52xx; - struct cvmx_iob_inb_control_match_enb_s cn52xxp1; - struct cvmx_iob_inb_control_match_enb_s cn56xx; - struct cvmx_iob_inb_control_match_enb_s cn56xxp1; - struct cvmx_iob_inb_control_match_enb_s cn58xx; - struct cvmx_iob_inb_control_match_enb_s cn58xxp1; - struct cvmx_iob_inb_control_match_enb_s cn61xx; - struct cvmx_iob_inb_control_match_enb_s cn63xx; - struct cvmx_iob_inb_control_match_enb_s cn63xxp1; - struct cvmx_iob_inb_control_match_enb_s cn66xx; - struct cvmx_iob_inb_control_match_enb_s cn68xx; - struct cvmx_iob_inb_control_match_enb_s cn68xxp1; - struct cvmx_iob_inb_control_match_enb_s cnf71xx; }; union cvmx_iob_inb_data_match { @@ -547,24 +439,6 @@ union cvmx_iob_inb_data_match { uint64_t data:64; #endif } s; - struct cvmx_iob_inb_data_match_s cn30xx; - struct cvmx_iob_inb_data_match_s cn31xx; - struct cvmx_iob_inb_data_match_s cn38xx; - struct cvmx_iob_inb_data_match_s cn38xxp2; - struct cvmx_iob_inb_data_match_s cn50xx; - struct cvmx_iob_inb_data_match_s cn52xx; - struct cvmx_iob_inb_data_match_s cn52xxp1; - struct cvmx_iob_inb_data_match_s cn56xx; - struct cvmx_iob_inb_data_match_s cn56xxp1; - struct cvmx_iob_inb_data_match_s cn58xx; - struct cvmx_iob_inb_data_match_s cn58xxp1; - struct cvmx_iob_inb_data_match_s cn61xx; - struct cvmx_iob_inb_data_match_s cn63xx; - struct cvmx_iob_inb_data_match_s cn63xxp1; - struct cvmx_iob_inb_data_match_s cn66xx; - struct cvmx_iob_inb_data_match_s cn68xx; - struct cvmx_iob_inb_data_match_s cn68xxp1; - struct cvmx_iob_inb_data_match_s cnf71xx; }; union cvmx_iob_inb_data_match_enb { @@ -576,24 +450,6 @@ union cvmx_iob_inb_data_match_enb { uint64_t data:64; #endif } s; - struct cvmx_iob_inb_data_match_enb_s cn30xx; - struct cvmx_iob_inb_data_match_enb_s cn31xx; - struct cvmx_iob_inb_data_match_enb_s cn38xx; - struct cvmx_iob_inb_data_match_enb_s cn38xxp2; - struct cvmx_iob_inb_data_match_enb_s cn50xx; - struct cvmx_iob_inb_data_match_enb_s cn52xx; - struct cvmx_iob_inb_data_match_enb_s cn52xxp1; - struct cvmx_iob_inb_data_match_enb_s cn56xx; - struct cvmx_iob_inb_data_match_enb_s cn56xxp1; - struct cvmx_iob_inb_data_match_enb_s cn58xx; - struct cvmx_iob_inb_data_match_enb_s cn58xxp1; - struct cvmx_iob_inb_data_match_enb_s cn61xx; - struct cvmx_iob_inb_data_match_enb_s cn63xx; - struct cvmx_iob_inb_data_match_enb_s cn63xxp1; - struct cvmx_iob_inb_data_match_enb_s cn66xx; - struct cvmx_iob_inb_data_match_enb_s cn68xx; - struct cvmx_iob_inb_data_match_enb_s cn68xxp1; - struct cvmx_iob_inb_data_match_enb_s cnf71xx; }; union cvmx_iob_int_enb { @@ -632,20 +488,6 @@ union cvmx_iob_int_enb { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_iob_int_enb_cn30xx cn31xx; - struct cvmx_iob_int_enb_cn30xx cn38xx; - struct cvmx_iob_int_enb_cn30xx cn38xxp2; - struct cvmx_iob_int_enb_s cn50xx; - struct cvmx_iob_int_enb_s cn52xx; - struct cvmx_iob_int_enb_s cn52xxp1; - struct cvmx_iob_int_enb_s cn56xx; - struct cvmx_iob_int_enb_s cn56xxp1; - struct cvmx_iob_int_enb_s cn58xx; - struct cvmx_iob_int_enb_s cn58xxp1; - struct cvmx_iob_int_enb_s cn61xx; - struct cvmx_iob_int_enb_s cn63xx; - struct cvmx_iob_int_enb_s cn63xxp1; - struct cvmx_iob_int_enb_s cn66xx; struct cvmx_iob_int_enb_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_0_63:64; @@ -653,8 +495,6 @@ union cvmx_iob_int_enb { uint64_t reserved_0_63:64; #endif } cn68xx; - struct cvmx_iob_int_enb_cn68xx cn68xxp1; - struct cvmx_iob_int_enb_s cnf71xx; }; union cvmx_iob_int_sum { @@ -693,20 +533,6 @@ union cvmx_iob_int_sum { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_iob_int_sum_cn30xx cn31xx; - struct cvmx_iob_int_sum_cn30xx cn38xx; - struct cvmx_iob_int_sum_cn30xx cn38xxp2; - struct cvmx_iob_int_sum_s cn50xx; - struct cvmx_iob_int_sum_s cn52xx; - struct cvmx_iob_int_sum_s cn52xxp1; - struct cvmx_iob_int_sum_s cn56xx; - struct cvmx_iob_int_sum_s cn56xxp1; - struct cvmx_iob_int_sum_s cn58xx; - struct cvmx_iob_int_sum_s cn58xxp1; - struct cvmx_iob_int_sum_s cn61xx; - struct cvmx_iob_int_sum_s cn63xx; - struct cvmx_iob_int_sum_s cn63xxp1; - struct cvmx_iob_int_sum_s cn66xx; struct cvmx_iob_int_sum_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_0_63:64; @@ -714,8 +540,6 @@ union cvmx_iob_int_sum { uint64_t reserved_0_63:64; #endif } cn68xx; - struct cvmx_iob_int_sum_cn68xx cn68xxp1; - struct cvmx_iob_int_sum_s cnf71xx; }; union cvmx_iob_n2c_l2c_pri_cnt { @@ -731,19 +555,6 @@ union cvmx_iob_n2c_l2c_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xxp2; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn61xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xxp1; - struct cvmx_iob_n2c_l2c_pri_cnt_s cn66xx; - struct cvmx_iob_n2c_l2c_pri_cnt_s cnf71xx; }; union cvmx_iob_n2c_rsp_pri_cnt { @@ -759,19 +570,6 @@ union cvmx_iob_n2c_rsp_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xxp2; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn61xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xxp1; - struct cvmx_iob_n2c_rsp_pri_cnt_s cn66xx; - struct cvmx_iob_n2c_rsp_pri_cnt_s cnf71xx; }; union cvmx_iob_outb_com_pri_cnt { @@ -787,21 +585,6 @@ union cvmx_iob_outb_com_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_outb_com_pri_cnt_s cn38xx; - struct cvmx_iob_outb_com_pri_cnt_s cn38xxp2; - struct cvmx_iob_outb_com_pri_cnt_s cn52xx; - struct cvmx_iob_outb_com_pri_cnt_s cn52xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn56xx; - struct cvmx_iob_outb_com_pri_cnt_s cn56xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn58xx; - struct cvmx_iob_outb_com_pri_cnt_s cn58xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn61xx; - struct cvmx_iob_outb_com_pri_cnt_s cn63xx; - struct cvmx_iob_outb_com_pri_cnt_s cn63xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cn66xx; - struct cvmx_iob_outb_com_pri_cnt_s cn68xx; - struct cvmx_iob_outb_com_pri_cnt_s cn68xxp1; - struct cvmx_iob_outb_com_pri_cnt_s cnf71xx; }; union cvmx_iob_outb_control_match { @@ -821,24 +604,6 @@ union cvmx_iob_outb_control_match { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_iob_outb_control_match_s cn30xx; - struct cvmx_iob_outb_control_match_s cn31xx; - struct cvmx_iob_outb_control_match_s cn38xx; - struct cvmx_iob_outb_control_match_s cn38xxp2; - struct cvmx_iob_outb_control_match_s cn50xx; - struct cvmx_iob_outb_control_match_s cn52xx; - struct cvmx_iob_outb_control_match_s cn52xxp1; - struct cvmx_iob_outb_control_match_s cn56xx; - struct cvmx_iob_outb_control_match_s cn56xxp1; - struct cvmx_iob_outb_control_match_s cn58xx; - struct cvmx_iob_outb_control_match_s cn58xxp1; - struct cvmx_iob_outb_control_match_s cn61xx; - struct cvmx_iob_outb_control_match_s cn63xx; - struct cvmx_iob_outb_control_match_s cn63xxp1; - struct cvmx_iob_outb_control_match_s cn66xx; - struct cvmx_iob_outb_control_match_s cn68xx; - struct cvmx_iob_outb_control_match_s cn68xxp1; - struct cvmx_iob_outb_control_match_s cnf71xx; }; union cvmx_iob_outb_control_match_enb { @@ -858,24 +623,6 @@ union cvmx_iob_outb_control_match_enb { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_iob_outb_control_match_enb_s cn30xx; - struct cvmx_iob_outb_control_match_enb_s cn31xx; - struct cvmx_iob_outb_control_match_enb_s cn38xx; - struct cvmx_iob_outb_control_match_enb_s cn38xxp2; - struct cvmx_iob_outb_control_match_enb_s cn50xx; - struct cvmx_iob_outb_control_match_enb_s cn52xx; - struct cvmx_iob_outb_control_match_enb_s cn52xxp1; - struct cvmx_iob_outb_control_match_enb_s cn56xx; - struct cvmx_iob_outb_control_match_enb_s cn56xxp1; - struct cvmx_iob_outb_control_match_enb_s cn58xx; - struct cvmx_iob_outb_control_match_enb_s cn58xxp1; - struct cvmx_iob_outb_control_match_enb_s cn61xx; - struct cvmx_iob_outb_control_match_enb_s cn63xx; - struct cvmx_iob_outb_control_match_enb_s cn63xxp1; - struct cvmx_iob_outb_control_match_enb_s cn66xx; - struct cvmx_iob_outb_control_match_enb_s cn68xx; - struct cvmx_iob_outb_control_match_enb_s cn68xxp1; - struct cvmx_iob_outb_control_match_enb_s cnf71xx; }; union cvmx_iob_outb_data_match { @@ -887,24 +634,6 @@ union cvmx_iob_outb_data_match { uint64_t data:64; #endif } s; - struct cvmx_iob_outb_data_match_s cn30xx; - struct cvmx_iob_outb_data_match_s cn31xx; - struct cvmx_iob_outb_data_match_s cn38xx; - struct cvmx_iob_outb_data_match_s cn38xxp2; - struct cvmx_iob_outb_data_match_s cn50xx; - struct cvmx_iob_outb_data_match_s cn52xx; - struct cvmx_iob_outb_data_match_s cn52xxp1; - struct cvmx_iob_outb_data_match_s cn56xx; - struct cvmx_iob_outb_data_match_s cn56xxp1; - struct cvmx_iob_outb_data_match_s cn58xx; - struct cvmx_iob_outb_data_match_s cn58xxp1; - struct cvmx_iob_outb_data_match_s cn61xx; - struct cvmx_iob_outb_data_match_s cn63xx; - struct cvmx_iob_outb_data_match_s cn63xxp1; - struct cvmx_iob_outb_data_match_s cn66xx; - struct cvmx_iob_outb_data_match_s cn68xx; - struct cvmx_iob_outb_data_match_s cn68xxp1; - struct cvmx_iob_outb_data_match_s cnf71xx; }; union cvmx_iob_outb_data_match_enb { @@ -916,24 +645,6 @@ union cvmx_iob_outb_data_match_enb { uint64_t data:64; #endif } s; - struct cvmx_iob_outb_data_match_enb_s cn30xx; - struct cvmx_iob_outb_data_match_enb_s cn31xx; - struct cvmx_iob_outb_data_match_enb_s cn38xx; - struct cvmx_iob_outb_data_match_enb_s cn38xxp2; - struct cvmx_iob_outb_data_match_enb_s cn50xx; - struct cvmx_iob_outb_data_match_enb_s cn52xx; - struct cvmx_iob_outb_data_match_enb_s cn52xxp1; - struct cvmx_iob_outb_data_match_enb_s cn56xx; - struct cvmx_iob_outb_data_match_enb_s cn56xxp1; - struct cvmx_iob_outb_data_match_enb_s cn58xx; - struct cvmx_iob_outb_data_match_enb_s cn58xxp1; - struct cvmx_iob_outb_data_match_enb_s cn61xx; - struct cvmx_iob_outb_data_match_enb_s cn63xx; - struct cvmx_iob_outb_data_match_enb_s cn63xxp1; - struct cvmx_iob_outb_data_match_enb_s cn66xx; - struct cvmx_iob_outb_data_match_enb_s cn68xx; - struct cvmx_iob_outb_data_match_enb_s cn68xxp1; - struct cvmx_iob_outb_data_match_enb_s cnf71xx; }; union cvmx_iob_outb_fpa_pri_cnt { @@ -949,21 +660,6 @@ union cvmx_iob_outb_fpa_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_outb_fpa_pri_cnt_s cn38xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn38xxp2; - struct cvmx_iob_outb_fpa_pri_cnt_s cn52xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn52xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn56xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn56xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn58xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn58xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn61xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn63xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn63xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cn66xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn68xx; - struct cvmx_iob_outb_fpa_pri_cnt_s cn68xxp1; - struct cvmx_iob_outb_fpa_pri_cnt_s cnf71xx; }; union cvmx_iob_outb_req_pri_cnt { @@ -979,21 +675,6 @@ union cvmx_iob_outb_req_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_outb_req_pri_cnt_s cn38xx; - struct cvmx_iob_outb_req_pri_cnt_s cn38xxp2; - struct cvmx_iob_outb_req_pri_cnt_s cn52xx; - struct cvmx_iob_outb_req_pri_cnt_s cn52xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn56xx; - struct cvmx_iob_outb_req_pri_cnt_s cn56xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn58xx; - struct cvmx_iob_outb_req_pri_cnt_s cn58xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn61xx; - struct cvmx_iob_outb_req_pri_cnt_s cn63xx; - struct cvmx_iob_outb_req_pri_cnt_s cn63xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cn66xx; - struct cvmx_iob_outb_req_pri_cnt_s cn68xx; - struct cvmx_iob_outb_req_pri_cnt_s cn68xxp1; - struct cvmx_iob_outb_req_pri_cnt_s cnf71xx; }; union cvmx_iob_p2c_req_pri_cnt { @@ -1009,19 +690,6 @@ union cvmx_iob_p2c_req_pri_cnt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_iob_p2c_req_pri_cnt_s cn38xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn38xxp2; - struct cvmx_iob_p2c_req_pri_cnt_s cn52xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn52xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn56xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn56xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn58xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn58xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn61xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn63xx; - struct cvmx_iob_p2c_req_pri_cnt_s cn63xxp1; - struct cvmx_iob_p2c_req_pri_cnt_s cn66xx; - struct cvmx_iob_p2c_req_pri_cnt_s cnf71xx; }; union cvmx_iob_pkt_err { @@ -1046,21 +714,6 @@ union cvmx_iob_pkt_err { uint64_t reserved_6_63:58; #endif } cn30xx; - struct cvmx_iob_pkt_err_cn30xx cn31xx; - struct cvmx_iob_pkt_err_cn30xx cn38xx; - struct cvmx_iob_pkt_err_cn30xx cn38xxp2; - struct cvmx_iob_pkt_err_cn30xx cn50xx; - struct cvmx_iob_pkt_err_cn30xx cn52xx; - struct cvmx_iob_pkt_err_cn30xx cn52xxp1; - struct cvmx_iob_pkt_err_cn30xx cn56xx; - struct cvmx_iob_pkt_err_cn30xx cn56xxp1; - struct cvmx_iob_pkt_err_cn30xx cn58xx; - struct cvmx_iob_pkt_err_cn30xx cn58xxp1; - struct cvmx_iob_pkt_err_s cn61xx; - struct cvmx_iob_pkt_err_s cn63xx; - struct cvmx_iob_pkt_err_s cn63xxp1; - struct cvmx_iob_pkt_err_s cn66xx; - struct cvmx_iob_pkt_err_s cnf71xx; }; union cvmx_iob_to_cmb_credits { @@ -1089,10 +742,6 @@ union cvmx_iob_to_cmb_credits { uint64_t reserved_9_63:55; #endif } cn52xx; - struct cvmx_iob_to_cmb_credits_cn52xx cn61xx; - struct cvmx_iob_to_cmb_credits_cn52xx cn63xx; - struct cvmx_iob_to_cmb_credits_cn52xx cn63xxp1; - struct cvmx_iob_to_cmb_credits_cn52xx cn66xx; struct cvmx_iob_to_cmb_credits_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -1106,8 +755,6 @@ union cvmx_iob_to_cmb_credits { uint64_t reserved_9_63:55; #endif } cn68xx; - struct cvmx_iob_to_cmb_credits_cn68xx cn68xxp1; - struct cvmx_iob_to_cmb_credits_cn52xx cnf71xx; }; union cvmx_iob_to_ncb_did_00_credits { @@ -1121,8 +768,6 @@ union cvmx_iob_to_ncb_did_00_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_00_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_00_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_111_credits { @@ -1136,8 +781,6 @@ union cvmx_iob_to_ncb_did_111_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_111_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_111_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_223_credits { @@ -1151,8 +794,6 @@ union cvmx_iob_to_ncb_did_223_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_223_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_223_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_24_credits { @@ -1166,8 +807,6 @@ union cvmx_iob_to_ncb_did_24_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_24_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_24_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_32_credits { @@ -1181,8 +820,6 @@ union cvmx_iob_to_ncb_did_32_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_32_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_32_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_40_credits { @@ -1196,8 +833,6 @@ union cvmx_iob_to_ncb_did_40_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_40_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_40_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_55_credits { @@ -1211,8 +846,6 @@ union cvmx_iob_to_ncb_did_55_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_55_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_55_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_64_credits { @@ -1226,8 +859,6 @@ union cvmx_iob_to_ncb_did_64_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_64_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_64_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_79_credits { @@ -1241,8 +872,6 @@ union cvmx_iob_to_ncb_did_79_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_79_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_79_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_96_credits { @@ -1256,8 +885,6 @@ union cvmx_iob_to_ncb_did_96_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_96_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_96_credits_s cn68xxp1; }; union cvmx_iob_to_ncb_did_98_credits { @@ -1271,8 +898,6 @@ union cvmx_iob_to_ncb_did_98_credits { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_iob_to_ncb_did_98_credits_s cn68xx; - struct cvmx_iob_to_ncb_did_98_credits_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h index 1193f73bb74a..c0a4ac7b41fb 100644 --- a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h @@ -108,24 +108,6 @@ union cvmx_ipd_1st_mbuff_skip { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_ipd_1st_mbuff_skip_s cn30xx; - struct cvmx_ipd_1st_mbuff_skip_s cn31xx; - struct cvmx_ipd_1st_mbuff_skip_s cn38xx; - struct cvmx_ipd_1st_mbuff_skip_s cn38xxp2; - struct cvmx_ipd_1st_mbuff_skip_s cn50xx; - struct cvmx_ipd_1st_mbuff_skip_s cn52xx; - struct cvmx_ipd_1st_mbuff_skip_s cn52xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn56xx; - struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn58xx; - struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn61xx; - struct cvmx_ipd_1st_mbuff_skip_s cn63xx; - struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cn66xx; - struct cvmx_ipd_1st_mbuff_skip_s cn68xx; - struct cvmx_ipd_1st_mbuff_skip_s cn68xxp1; - struct cvmx_ipd_1st_mbuff_skip_s cnf71xx; }; union cvmx_ipd_1st_next_ptr_back { @@ -139,24 +121,6 @@ union cvmx_ipd_1st_next_ptr_back { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_ipd_1st_next_ptr_back_s cn30xx; - struct cvmx_ipd_1st_next_ptr_back_s cn31xx; - struct cvmx_ipd_1st_next_ptr_back_s cn38xx; - struct cvmx_ipd_1st_next_ptr_back_s cn38xxp2; - struct cvmx_ipd_1st_next_ptr_back_s cn50xx; - struct cvmx_ipd_1st_next_ptr_back_s cn52xx; - struct cvmx_ipd_1st_next_ptr_back_s cn52xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn56xx; - struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn58xx; - struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn61xx; - struct cvmx_ipd_1st_next_ptr_back_s cn63xx; - struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cn66xx; - struct cvmx_ipd_1st_next_ptr_back_s cn68xx; - struct cvmx_ipd_1st_next_ptr_back_s cn68xxp1; - struct cvmx_ipd_1st_next_ptr_back_s cnf71xx; }; union cvmx_ipd_2nd_next_ptr_back { @@ -170,24 +134,6 @@ union cvmx_ipd_2nd_next_ptr_back { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_ipd_2nd_next_ptr_back_s cn30xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn31xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn38xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn38xxp2; - struct cvmx_ipd_2nd_next_ptr_back_s cn50xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn52xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn52xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn56xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn58xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn61xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn63xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cn66xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn68xx; - struct cvmx_ipd_2nd_next_ptr_back_s cn68xxp1; - struct cvmx_ipd_2nd_next_ptr_back_s cnf71xx; }; union cvmx_ipd_bist_status { @@ -284,10 +230,6 @@ union cvmx_ipd_bist_status { uint64_t reserved_16_63:48; #endif } cn30xx; - struct cvmx_ipd_bist_status_cn30xx cn31xx; - struct cvmx_ipd_bist_status_cn30xx cn38xx; - struct cvmx_ipd_bist_status_cn30xx cn38xxp2; - struct cvmx_ipd_bist_status_cn30xx cn50xx; struct cvmx_ipd_bist_status_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_18_63:46; @@ -331,18 +273,6 @@ union cvmx_ipd_bist_status { uint64_t reserved_18_63:46; #endif } cn52xx; - struct cvmx_ipd_bist_status_cn52xx cn52xxp1; - struct cvmx_ipd_bist_status_cn52xx cn56xx; - struct cvmx_ipd_bist_status_cn52xx cn56xxp1; - struct cvmx_ipd_bist_status_cn30xx cn58xx; - struct cvmx_ipd_bist_status_cn30xx cn58xxp1; - struct cvmx_ipd_bist_status_cn52xx cn61xx; - struct cvmx_ipd_bist_status_cn52xx cn63xx; - struct cvmx_ipd_bist_status_cn52xx cn63xxp1; - struct cvmx_ipd_bist_status_cn52xx cn66xx; - struct cvmx_ipd_bist_status_s cn68xx; - struct cvmx_ipd_bist_status_s cn68xxp1; - struct cvmx_ipd_bist_status_cn52xx cnf71xx; }; union cvmx_ipd_bp_prt_red_end { @@ -365,10 +295,6 @@ union cvmx_ipd_bp_prt_red_end { uint64_t reserved_36_63:28; #endif } cn30xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx; struct cvmx_ipd_bp_prt_red_end_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_40_63:24; @@ -378,12 +304,6 @@ union cvmx_ipd_bp_prt_red_end { uint64_t reserved_40_63:24; #endif } cn52xx; - struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1; - struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx; - struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx; - struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1; - struct cvmx_ipd_bp_prt_red_end_s cn61xx; struct cvmx_ipd_bp_prt_red_end_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_44_63:20; @@ -393,9 +313,6 @@ union cvmx_ipd_bp_prt_red_end { uint64_t reserved_44_63:20; #endif } cn63xx; - struct cvmx_ipd_bp_prt_red_end_cn63xx cn63xxp1; - struct cvmx_ipd_bp_prt_red_end_s cn66xx; - struct cvmx_ipd_bp_prt_red_end_s cnf71xx; }; union cvmx_ipd_bpidx_mbuf_th { @@ -411,8 +328,6 @@ union cvmx_ipd_bpidx_mbuf_th { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_bpidx_mbuf_th_s cn68xx; - struct cvmx_ipd_bpidx_mbuf_th_s cn68xxp1; }; union cvmx_ipd_bpid_bp_counterx { @@ -426,8 +341,6 @@ union cvmx_ipd_bpid_bp_counterx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_bpid_bp_counterx_s cn68xx; - struct cvmx_ipd_bpid_bp_counterx_s cn68xxp1; }; union cvmx_ipd_clk_count { @@ -439,24 +352,6 @@ union cvmx_ipd_clk_count { uint64_t clk_cnt:64; #endif } s; - struct cvmx_ipd_clk_count_s cn30xx; - struct cvmx_ipd_clk_count_s cn31xx; - struct cvmx_ipd_clk_count_s cn38xx; - struct cvmx_ipd_clk_count_s cn38xxp2; - struct cvmx_ipd_clk_count_s cn50xx; - struct cvmx_ipd_clk_count_s cn52xx; - struct cvmx_ipd_clk_count_s cn52xxp1; - struct cvmx_ipd_clk_count_s cn56xx; - struct cvmx_ipd_clk_count_s cn56xxp1; - struct cvmx_ipd_clk_count_s cn58xx; - struct cvmx_ipd_clk_count_s cn58xxp1; - struct cvmx_ipd_clk_count_s cn61xx; - struct cvmx_ipd_clk_count_s cn63xx; - struct cvmx_ipd_clk_count_s cn63xxp1; - struct cvmx_ipd_clk_count_s cn66xx; - struct cvmx_ipd_clk_count_s cn68xx; - struct cvmx_ipd_clk_count_s cn68xxp1; - struct cvmx_ipd_clk_count_s cnf71xx; }; union cvmx_ipd_credits { @@ -472,8 +367,6 @@ union cvmx_ipd_credits { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_ipd_credits_s cn68xx; - struct cvmx_ipd_credits_s cn68xxp1; }; union cvmx_ipd_ctl_status { @@ -544,8 +437,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_10_63:54; #endif } cn30xx; - struct cvmx_ipd_ctl_status_cn30xx cn31xx; - struct cvmx_ipd_ctl_status_cn30xx cn38xx; struct cvmx_ipd_ctl_status_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -604,10 +495,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_15_63:49; #endif } cn50xx; - struct cvmx_ipd_ctl_status_cn50xx cn52xx; - struct cvmx_ipd_ctl_status_cn50xx cn52xxp1; - struct cvmx_ipd_ctl_status_cn50xx cn56xx; - struct cvmx_ipd_ctl_status_cn50xx cn56xxp1; struct cvmx_ipd_ctl_status_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -637,9 +524,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_12_63:52; #endif } cn58xx; - struct cvmx_ipd_ctl_status_cn58xx cn58xxp1; - struct cvmx_ipd_ctl_status_s cn61xx; - struct cvmx_ipd_ctl_status_s cn63xx; struct cvmx_ipd_ctl_status_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63:48; @@ -677,10 +561,6 @@ union cvmx_ipd_ctl_status { uint64_t reserved_16_63:48; #endif } cn63xxp1; - struct cvmx_ipd_ctl_status_s cn66xx; - struct cvmx_ipd_ctl_status_s cn68xx; - struct cvmx_ipd_ctl_status_s cn68xxp1; - struct cvmx_ipd_ctl_status_s cnf71xx; }; union cvmx_ipd_ecc_ctl { @@ -700,8 +580,6 @@ union cvmx_ipd_ecc_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_ipd_ecc_ctl_s cn68xx; - struct cvmx_ipd_ecc_ctl_s cn68xxp1; }; union cvmx_ipd_free_ptr_fifo_ctl { @@ -723,8 +601,6 @@ union cvmx_ipd_free_ptr_fifo_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xx; - struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xxp1; }; union cvmx_ipd_free_ptr_value { @@ -738,8 +614,6 @@ union cvmx_ipd_free_ptr_value { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_ipd_free_ptr_value_s cn68xx; - struct cvmx_ipd_free_ptr_value_s cn68xxp1; }; union cvmx_ipd_hold_ptr_fifo_ctl { @@ -761,8 +635,6 @@ union cvmx_ipd_hold_ptr_fifo_ctl { uint64_t reserved_43_63:21; #endif } s; - struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xx; - struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xxp1; }; union cvmx_ipd_int_enb { @@ -837,7 +709,6 @@ union cvmx_ipd_int_enb { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_ipd_int_enb_cn30xx cn31xx; struct cvmx_ipd_int_enb_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -865,8 +736,6 @@ union cvmx_ipd_int_enb { uint64_t reserved_10_63:54; #endif } cn38xx; - struct cvmx_ipd_int_enb_cn30xx cn38xxp2; - struct cvmx_ipd_int_enb_cn38xx cn50xx; struct cvmx_ipd_int_enb_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -898,18 +767,6 @@ union cvmx_ipd_int_enb { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_ipd_int_enb_cn52xx cn52xxp1; - struct cvmx_ipd_int_enb_cn52xx cn56xx; - struct cvmx_ipd_int_enb_cn52xx cn56xxp1; - struct cvmx_ipd_int_enb_cn38xx cn58xx; - struct cvmx_ipd_int_enb_cn38xx cn58xxp1; - struct cvmx_ipd_int_enb_cn52xx cn61xx; - struct cvmx_ipd_int_enb_cn52xx cn63xx; - struct cvmx_ipd_int_enb_cn52xx cn63xxp1; - struct cvmx_ipd_int_enb_cn52xx cn66xx; - struct cvmx_ipd_int_enb_s cn68xx; - struct cvmx_ipd_int_enb_s cn68xxp1; - struct cvmx_ipd_int_enb_cn52xx cnf71xx; }; union cvmx_ipd_int_sum { @@ -984,7 +841,6 @@ union cvmx_ipd_int_sum { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_ipd_int_sum_cn30xx cn31xx; struct cvmx_ipd_int_sum_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -1012,8 +868,6 @@ union cvmx_ipd_int_sum { uint64_t reserved_10_63:54; #endif } cn38xx; - struct cvmx_ipd_int_sum_cn30xx cn38xxp2; - struct cvmx_ipd_int_sum_cn38xx cn50xx; struct cvmx_ipd_int_sum_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1045,18 +899,6 @@ union cvmx_ipd_int_sum { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_ipd_int_sum_cn52xx cn52xxp1; - struct cvmx_ipd_int_sum_cn52xx cn56xx; - struct cvmx_ipd_int_sum_cn52xx cn56xxp1; - struct cvmx_ipd_int_sum_cn38xx cn58xx; - struct cvmx_ipd_int_sum_cn38xx cn58xxp1; - struct cvmx_ipd_int_sum_cn52xx cn61xx; - struct cvmx_ipd_int_sum_cn52xx cn63xx; - struct cvmx_ipd_int_sum_cn52xx cn63xxp1; - struct cvmx_ipd_int_sum_cn52xx cn66xx; - struct cvmx_ipd_int_sum_s cn68xx; - struct cvmx_ipd_int_sum_s cn68xxp1; - struct cvmx_ipd_int_sum_cn52xx cnf71xx; }; union cvmx_ipd_next_pkt_ptr { @@ -1070,8 +912,6 @@ union cvmx_ipd_next_pkt_ptr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_ipd_next_pkt_ptr_s cn68xx; - struct cvmx_ipd_next_pkt_ptr_s cn68xxp1; }; union cvmx_ipd_next_wqe_ptr { @@ -1085,8 +925,6 @@ union cvmx_ipd_next_wqe_ptr { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_ipd_next_wqe_ptr_s cn68xx; - struct cvmx_ipd_next_wqe_ptr_s cn68xxp1; }; union cvmx_ipd_not_1st_mbuff_skip { @@ -1100,24 +938,6 @@ union cvmx_ipd_not_1st_mbuff_skip { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn38xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn38xxp2; - struct cvmx_ipd_not_1st_mbuff_skip_s cn50xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn52xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn52xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn56xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn61xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cn66xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn68xx; - struct cvmx_ipd_not_1st_mbuff_skip_s cn68xxp1; - struct cvmx_ipd_not_1st_mbuff_skip_s cnf71xx; }; union cvmx_ipd_on_bp_drop_pktx { @@ -1129,8 +949,6 @@ union cvmx_ipd_on_bp_drop_pktx { uint64_t prt_enb:64; #endif } s; - struct cvmx_ipd_on_bp_drop_pktx_s cn68xx; - struct cvmx_ipd_on_bp_drop_pktx_s cn68xxp1; }; union cvmx_ipd_packet_mbuff_size { @@ -1144,24 +962,6 @@ union cvmx_ipd_packet_mbuff_size { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_ipd_packet_mbuff_size_s cn30xx; - struct cvmx_ipd_packet_mbuff_size_s cn31xx; - struct cvmx_ipd_packet_mbuff_size_s cn38xx; - struct cvmx_ipd_packet_mbuff_size_s cn38xxp2; - struct cvmx_ipd_packet_mbuff_size_s cn50xx; - struct cvmx_ipd_packet_mbuff_size_s cn52xx; - struct cvmx_ipd_packet_mbuff_size_s cn52xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn56xx; - struct cvmx_ipd_packet_mbuff_size_s cn56xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn58xx; - struct cvmx_ipd_packet_mbuff_size_s cn58xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn61xx; - struct cvmx_ipd_packet_mbuff_size_s cn63xx; - struct cvmx_ipd_packet_mbuff_size_s cn63xxp1; - struct cvmx_ipd_packet_mbuff_size_s cn66xx; - struct cvmx_ipd_packet_mbuff_size_s cn68xx; - struct cvmx_ipd_packet_mbuff_size_s cn68xxp1; - struct cvmx_ipd_packet_mbuff_size_s cnf71xx; }; union cvmx_ipd_pkt_err { @@ -1175,8 +975,6 @@ union cvmx_ipd_pkt_err { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_ipd_pkt_err_s cn68xx; - struct cvmx_ipd_pkt_err_s cn68xxp1; }; union cvmx_ipd_pkt_ptr_valid { @@ -1190,21 +988,6 @@ union cvmx_ipd_pkt_ptr_valid { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_ipd_pkt_ptr_valid_s cn30xx; - struct cvmx_ipd_pkt_ptr_valid_s cn31xx; - struct cvmx_ipd_pkt_ptr_valid_s cn38xx; - struct cvmx_ipd_pkt_ptr_valid_s cn50xx; - struct cvmx_ipd_pkt_ptr_valid_s cn52xx; - struct cvmx_ipd_pkt_ptr_valid_s cn52xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn56xx; - struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn58xx; - struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn61xx; - struct cvmx_ipd_pkt_ptr_valid_s cn63xx; - struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1; - struct cvmx_ipd_pkt_ptr_valid_s cn66xx; - struct cvmx_ipd_pkt_ptr_valid_s cnf71xx; }; union cvmx_ipd_portx_bp_page_cnt { @@ -1220,22 +1003,6 @@ union cvmx_ipd_portx_bp_page_cnt { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_portx_bp_page_cnt_s cn30xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn31xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn38xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn38xxp2; - struct cvmx_ipd_portx_bp_page_cnt_s cn50xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn52xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn52xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn56xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn58xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn61xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn63xx; - struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1; - struct cvmx_ipd_portx_bp_page_cnt_s cn66xx; - struct cvmx_ipd_portx_bp_page_cnt_s cnf71xx; }; union cvmx_ipd_portx_bp_page_cnt2 { @@ -1251,15 +1018,6 @@ union cvmx_ipd_portx_bp_page_cnt2 { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1; - struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1; - struct cvmx_ipd_portx_bp_page_cnt2_s cn61xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1; - struct cvmx_ipd_portx_bp_page_cnt2_s cn66xx; - struct cvmx_ipd_portx_bp_page_cnt2_s cnf71xx; }; union cvmx_ipd_portx_bp_page_cnt3 { @@ -1275,11 +1033,6 @@ union cvmx_ipd_portx_bp_page_cnt3 { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_ipd_portx_bp_page_cnt3_s cn61xx; - struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx; - struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1; - struct cvmx_ipd_portx_bp_page_cnt3_s cn66xx; - struct cvmx_ipd_portx_bp_page_cnt3_s cnf71xx; }; union cvmx_ipd_port_bp_counters2_pairx { @@ -1293,15 +1046,6 @@ union cvmx_ipd_port_bp_counters2_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1; - struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1; - struct cvmx_ipd_port_bp_counters2_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1; - struct cvmx_ipd_port_bp_counters2_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters2_pairx_s cnf71xx; }; union cvmx_ipd_port_bp_counters3_pairx { @@ -1315,11 +1059,6 @@ union cvmx_ipd_port_bp_counters3_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters3_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx; - struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1; - struct cvmx_ipd_port_bp_counters3_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters3_pairx_s cnf71xx; }; union cvmx_ipd_port_bp_counters4_pairx { @@ -1333,9 +1072,6 @@ union cvmx_ipd_port_bp_counters4_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters4_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters4_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters4_pairx_s cnf71xx; }; union cvmx_ipd_port_bp_counters_pairx { @@ -1349,22 +1085,6 @@ union cvmx_ipd_port_bp_counters_pairx { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_ipd_port_bp_counters_pairx_s cn30xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn31xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn38xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn38xxp2; - struct cvmx_ipd_port_bp_counters_pairx_s cn50xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn52xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn52xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn56xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn58xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn61xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn63xx; - struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1; - struct cvmx_ipd_port_bp_counters_pairx_s cn66xx; - struct cvmx_ipd_port_bp_counters_pairx_s cnf71xx; }; union cvmx_ipd_port_ptr_fifo_ctl { @@ -1384,8 +1104,6 @@ union cvmx_ipd_port_ptr_fifo_ctl { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xx; - struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xxp1; }; union cvmx_ipd_port_qos_x_cnt { @@ -1399,17 +1117,6 @@ union cvmx_ipd_port_qos_x_cnt { uint64_t wmark:32; #endif } s; - struct cvmx_ipd_port_qos_x_cnt_s cn52xx; - struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cn56xx; - struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cn61xx; - struct cvmx_ipd_port_qos_x_cnt_s cn63xx; - struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cn66xx; - struct cvmx_ipd_port_qos_x_cnt_s cn68xx; - struct cvmx_ipd_port_qos_x_cnt_s cn68xxp1; - struct cvmx_ipd_port_qos_x_cnt_s cnf71xx; }; union cvmx_ipd_port_qos_intx { @@ -1421,17 +1128,6 @@ union cvmx_ipd_port_qos_intx { uint64_t intr:64; #endif } s; - struct cvmx_ipd_port_qos_intx_s cn52xx; - struct cvmx_ipd_port_qos_intx_s cn52xxp1; - struct cvmx_ipd_port_qos_intx_s cn56xx; - struct cvmx_ipd_port_qos_intx_s cn56xxp1; - struct cvmx_ipd_port_qos_intx_s cn61xx; - struct cvmx_ipd_port_qos_intx_s cn63xx; - struct cvmx_ipd_port_qos_intx_s cn63xxp1; - struct cvmx_ipd_port_qos_intx_s cn66xx; - struct cvmx_ipd_port_qos_intx_s cn68xx; - struct cvmx_ipd_port_qos_intx_s cn68xxp1; - struct cvmx_ipd_port_qos_intx_s cnf71xx; }; union cvmx_ipd_port_qos_int_enbx { @@ -1443,17 +1139,6 @@ union cvmx_ipd_port_qos_int_enbx { uint64_t enb:64; #endif } s; - struct cvmx_ipd_port_qos_int_enbx_s cn52xx; - struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cn56xx; - struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cn61xx; - struct cvmx_ipd_port_qos_int_enbx_s cn63xx; - struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cn66xx; - struct cvmx_ipd_port_qos_int_enbx_s cn68xx; - struct cvmx_ipd_port_qos_int_enbx_s cn68xxp1; - struct cvmx_ipd_port_qos_int_enbx_s cnf71xx; }; union cvmx_ipd_port_sopx { @@ -1465,8 +1150,6 @@ union cvmx_ipd_port_sopx { uint64_t sop:64; #endif } s; - struct cvmx_ipd_port_sopx_s cn68xx; - struct cvmx_ipd_port_sopx_s cn68xxp1; }; union cvmx_ipd_prc_hold_ptr_fifo_ctl { @@ -1488,21 +1171,6 @@ union cvmx_ipd_prc_hold_ptr_fifo_ctl { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn38xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn50xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn52xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn61xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn66xx; - struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cnf71xx; }; union cvmx_ipd_prc_port_ptr_fifo_ctl { @@ -1522,21 +1190,6 @@ union cvmx_ipd_prc_port_ptr_fifo_ctl { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn38xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn50xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn52xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn61xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn66xx; - struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cnf71xx; }; union cvmx_ipd_ptr_count { @@ -1558,24 +1211,6 @@ union cvmx_ipd_ptr_count { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_ipd_ptr_count_s cn30xx; - struct cvmx_ipd_ptr_count_s cn31xx; - struct cvmx_ipd_ptr_count_s cn38xx; - struct cvmx_ipd_ptr_count_s cn38xxp2; - struct cvmx_ipd_ptr_count_s cn50xx; - struct cvmx_ipd_ptr_count_s cn52xx; - struct cvmx_ipd_ptr_count_s cn52xxp1; - struct cvmx_ipd_ptr_count_s cn56xx; - struct cvmx_ipd_ptr_count_s cn56xxp1; - struct cvmx_ipd_ptr_count_s cn58xx; - struct cvmx_ipd_ptr_count_s cn58xxp1; - struct cvmx_ipd_ptr_count_s cn61xx; - struct cvmx_ipd_ptr_count_s cn63xx; - struct cvmx_ipd_ptr_count_s cn63xxp1; - struct cvmx_ipd_ptr_count_s cn66xx; - struct cvmx_ipd_ptr_count_s cn68xx; - struct cvmx_ipd_ptr_count_s cn68xxp1; - struct cvmx_ipd_ptr_count_s cnf71xx; }; union cvmx_ipd_pwp_ptr_fifo_ctl { @@ -1599,21 +1234,6 @@ union cvmx_ipd_pwp_ptr_fifo_ctl { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn38xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn50xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn52xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn61xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn66xx; - struct cvmx_ipd_pwp_ptr_fifo_ctl_s cnf71xx; }; union cvmx_ipd_qosx_red_marks { @@ -1627,24 +1247,6 @@ union cvmx_ipd_qosx_red_marks { uint64_t drop:32; #endif } s; - struct cvmx_ipd_qosx_red_marks_s cn30xx; - struct cvmx_ipd_qosx_red_marks_s cn31xx; - struct cvmx_ipd_qosx_red_marks_s cn38xx; - struct cvmx_ipd_qosx_red_marks_s cn38xxp2; - struct cvmx_ipd_qosx_red_marks_s cn50xx; - struct cvmx_ipd_qosx_red_marks_s cn52xx; - struct cvmx_ipd_qosx_red_marks_s cn52xxp1; - struct cvmx_ipd_qosx_red_marks_s cn56xx; - struct cvmx_ipd_qosx_red_marks_s cn56xxp1; - struct cvmx_ipd_qosx_red_marks_s cn58xx; - struct cvmx_ipd_qosx_red_marks_s cn58xxp1; - struct cvmx_ipd_qosx_red_marks_s cn61xx; - struct cvmx_ipd_qosx_red_marks_s cn63xx; - struct cvmx_ipd_qosx_red_marks_s cn63xxp1; - struct cvmx_ipd_qosx_red_marks_s cn66xx; - struct cvmx_ipd_qosx_red_marks_s cn68xx; - struct cvmx_ipd_qosx_red_marks_s cn68xxp1; - struct cvmx_ipd_qosx_red_marks_s cnf71xx; }; union cvmx_ipd_que0_free_page_cnt { @@ -1658,24 +1260,6 @@ union cvmx_ipd_que0_free_page_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_ipd_que0_free_page_cnt_s cn30xx; - struct cvmx_ipd_que0_free_page_cnt_s cn31xx; - struct cvmx_ipd_que0_free_page_cnt_s cn38xx; - struct cvmx_ipd_que0_free_page_cnt_s cn38xxp2; - struct cvmx_ipd_que0_free_page_cnt_s cn50xx; - struct cvmx_ipd_que0_free_page_cnt_s cn52xx; - struct cvmx_ipd_que0_free_page_cnt_s cn52xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn56xx; - struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn58xx; - struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn61xx; - struct cvmx_ipd_que0_free_page_cnt_s cn63xx; - struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cn66xx; - struct cvmx_ipd_que0_free_page_cnt_s cn68xx; - struct cvmx_ipd_que0_free_page_cnt_s cn68xxp1; - struct cvmx_ipd_que0_free_page_cnt_s cnf71xx; }; union cvmx_ipd_red_bpid_enablex { @@ -1687,8 +1271,6 @@ union cvmx_ipd_red_bpid_enablex { uint64_t prt_enb:64; #endif } s; - struct cvmx_ipd_red_bpid_enablex_s cn68xx; - struct cvmx_ipd_red_bpid_enablex_s cn68xxp1; }; union cvmx_ipd_red_delay { @@ -1704,8 +1286,6 @@ union cvmx_ipd_red_delay { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_ipd_red_delay_s cn68xx; - struct cvmx_ipd_red_delay_s cn68xxp1; }; union cvmx_ipd_red_port_enable { @@ -1721,22 +1301,6 @@ union cvmx_ipd_red_port_enable { uint64_t prb_dly:14; #endif } s; - struct cvmx_ipd_red_port_enable_s cn30xx; - struct cvmx_ipd_red_port_enable_s cn31xx; - struct cvmx_ipd_red_port_enable_s cn38xx; - struct cvmx_ipd_red_port_enable_s cn38xxp2; - struct cvmx_ipd_red_port_enable_s cn50xx; - struct cvmx_ipd_red_port_enable_s cn52xx; - struct cvmx_ipd_red_port_enable_s cn52xxp1; - struct cvmx_ipd_red_port_enable_s cn56xx; - struct cvmx_ipd_red_port_enable_s cn56xxp1; - struct cvmx_ipd_red_port_enable_s cn58xx; - struct cvmx_ipd_red_port_enable_s cn58xxp1; - struct cvmx_ipd_red_port_enable_s cn61xx; - struct cvmx_ipd_red_port_enable_s cn63xx; - struct cvmx_ipd_red_port_enable_s cn63xxp1; - struct cvmx_ipd_red_port_enable_s cn66xx; - struct cvmx_ipd_red_port_enable_s cnf71xx; }; union cvmx_ipd_red_port_enable2 { @@ -1759,10 +1323,6 @@ union cvmx_ipd_red_port_enable2 { uint64_t reserved_4_63:60; #endif } cn52xx; - struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1; - struct cvmx_ipd_red_port_enable2_cn52xx cn56xx; - struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1; - struct cvmx_ipd_red_port_enable2_s cn61xx; struct cvmx_ipd_red_port_enable2_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -1772,9 +1332,6 @@ union cvmx_ipd_red_port_enable2 { uint64_t reserved_8_63:56; #endif } cn63xx; - struct cvmx_ipd_red_port_enable2_cn63xx cn63xxp1; - struct cvmx_ipd_red_port_enable2_s cn66xx; - struct cvmx_ipd_red_port_enable2_s cnf71xx; }; union cvmx_ipd_red_quex_param { @@ -1794,24 +1351,6 @@ union cvmx_ipd_red_quex_param { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_ipd_red_quex_param_s cn30xx; - struct cvmx_ipd_red_quex_param_s cn31xx; - struct cvmx_ipd_red_quex_param_s cn38xx; - struct cvmx_ipd_red_quex_param_s cn38xxp2; - struct cvmx_ipd_red_quex_param_s cn50xx; - struct cvmx_ipd_red_quex_param_s cn52xx; - struct cvmx_ipd_red_quex_param_s cn52xxp1; - struct cvmx_ipd_red_quex_param_s cn56xx; - struct cvmx_ipd_red_quex_param_s cn56xxp1; - struct cvmx_ipd_red_quex_param_s cn58xx; - struct cvmx_ipd_red_quex_param_s cn58xxp1; - struct cvmx_ipd_red_quex_param_s cn61xx; - struct cvmx_ipd_red_quex_param_s cn63xx; - struct cvmx_ipd_red_quex_param_s cn63xxp1; - struct cvmx_ipd_red_quex_param_s cn66xx; - struct cvmx_ipd_red_quex_param_s cn68xx; - struct cvmx_ipd_red_quex_param_s cn68xxp1; - struct cvmx_ipd_red_quex_param_s cnf71xx; }; union cvmx_ipd_req_wgt { @@ -1837,7 +1376,6 @@ union cvmx_ipd_req_wgt { uint64_t wgt7:8; #endif } s; - struct cvmx_ipd_req_wgt_s cn68xx; }; union cvmx_ipd_sub_port_bp_page_cnt { @@ -1853,24 +1391,6 @@ union cvmx_ipd_sub_port_bp_page_cnt { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn38xxp2; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn50xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn52xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn61xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn66xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xx; - struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xxp1; - struct cvmx_ipd_sub_port_bp_page_cnt_s cnf71xx; }; union cvmx_ipd_sub_port_fcs { @@ -1897,7 +1417,6 @@ union cvmx_ipd_sub_port_fcs { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx; struct cvmx_ipd_sub_port_fcs_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1907,19 +1426,6 @@ union cvmx_ipd_sub_port_fcs { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2; - struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx; - struct cvmx_ipd_sub_port_fcs_s cn52xx; - struct cvmx_ipd_sub_port_fcs_s cn52xxp1; - struct cvmx_ipd_sub_port_fcs_s cn56xx; - struct cvmx_ipd_sub_port_fcs_s cn56xxp1; - struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx; - struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1; - struct cvmx_ipd_sub_port_fcs_s cn61xx; - struct cvmx_ipd_sub_port_fcs_s cn63xx; - struct cvmx_ipd_sub_port_fcs_s cn63xxp1; - struct cvmx_ipd_sub_port_fcs_s cn66xx; - struct cvmx_ipd_sub_port_fcs_s cnf71xx; }; union cvmx_ipd_sub_port_qos_cnt { @@ -1935,17 +1441,6 @@ union cvmx_ipd_sub_port_qos_cnt { uint64_t reserved_41_63:23; #endif } s; - struct cvmx_ipd_sub_port_qos_cnt_s cn52xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cn56xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cn61xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn63xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cn66xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn68xx; - struct cvmx_ipd_sub_port_qos_cnt_s cn68xxp1; - struct cvmx_ipd_sub_port_qos_cnt_s cnf71xx; }; union cvmx_ipd_wqe_fpa_queue { @@ -1959,24 +1454,6 @@ union cvmx_ipd_wqe_fpa_queue { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_ipd_wqe_fpa_queue_s cn30xx; - struct cvmx_ipd_wqe_fpa_queue_s cn31xx; - struct cvmx_ipd_wqe_fpa_queue_s cn38xx; - struct cvmx_ipd_wqe_fpa_queue_s cn38xxp2; - struct cvmx_ipd_wqe_fpa_queue_s cn50xx; - struct cvmx_ipd_wqe_fpa_queue_s cn52xx; - struct cvmx_ipd_wqe_fpa_queue_s cn52xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn56xx; - struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn58xx; - struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn61xx; - struct cvmx_ipd_wqe_fpa_queue_s cn63xx; - struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cn66xx; - struct cvmx_ipd_wqe_fpa_queue_s cn68xx; - struct cvmx_ipd_wqe_fpa_queue_s cn68xxp1; - struct cvmx_ipd_wqe_fpa_queue_s cnf71xx; }; union cvmx_ipd_wqe_ptr_valid { @@ -1990,21 +1467,6 @@ union cvmx_ipd_wqe_ptr_valid { uint64_t reserved_29_63:35; #endif } s; - struct cvmx_ipd_wqe_ptr_valid_s cn30xx; - struct cvmx_ipd_wqe_ptr_valid_s cn31xx; - struct cvmx_ipd_wqe_ptr_valid_s cn38xx; - struct cvmx_ipd_wqe_ptr_valid_s cn50xx; - struct cvmx_ipd_wqe_ptr_valid_s cn52xx; - struct cvmx_ipd_wqe_ptr_valid_s cn52xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn56xx; - struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn58xx; - struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn61xx; - struct cvmx_ipd_wqe_ptr_valid_s cn63xx; - struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1; - struct cvmx_ipd_wqe_ptr_valid_s cn66xx; - struct cvmx_ipd_wqe_ptr_valid_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h index fe50671fd1bb..06ea13251448 100644 --- a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h @@ -104,7 +104,6 @@ union cvmx_l2t_err { __BITFIELD_FIELD(uint64_t ecc_ena:1, ;))))))))))))) } cn38xx; - struct cvmx_l2t_err_cn38xx cn38xxp2; struct cvmx_l2t_err_cn50xx { __BITFIELD_FIELD(uint64_t reserved_28_63:36, __BITFIELD_FIELD(uint64_t lck_intena2:1, @@ -139,11 +138,6 @@ union cvmx_l2t_err { __BITFIELD_FIELD(uint64_t ecc_ena:1, ;)))))))))))))) } cn52xx; - struct cvmx_l2t_err_cn52xx cn52xxp1; - struct cvmx_l2t_err_s cn56xx; - struct cvmx_l2t_err_s cn56xxp1; - struct cvmx_l2t_err_s cn58xx; - struct cvmx_l2t_err_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-led-defs.h b/arch/mips/include/asm/octeon/cvmx-led-defs.h index d36d42b8307b..0237907522cb 100644 --- a/arch/mips/include/asm/octeon/cvmx-led-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-led-defs.h @@ -53,12 +53,6 @@ union cvmx_led_blink { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_led_blink_s cn38xx; - struct cvmx_led_blink_s cn38xxp2; - struct cvmx_led_blink_s cn56xx; - struct cvmx_led_blink_s cn56xxp1; - struct cvmx_led_blink_s cn58xx; - struct cvmx_led_blink_s cn58xxp1; }; union cvmx_led_clk_phase { @@ -72,12 +66,6 @@ union cvmx_led_clk_phase { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_led_clk_phase_s cn38xx; - struct cvmx_led_clk_phase_s cn38xxp2; - struct cvmx_led_clk_phase_s cn56xx; - struct cvmx_led_clk_phase_s cn56xxp1; - struct cvmx_led_clk_phase_s cn58xx; - struct cvmx_led_clk_phase_s cn58xxp1; }; union cvmx_led_cylon { @@ -91,12 +79,6 @@ union cvmx_led_cylon { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_led_cylon_s cn38xx; - struct cvmx_led_cylon_s cn38xxp2; - struct cvmx_led_cylon_s cn56xx; - struct cvmx_led_cylon_s cn56xxp1; - struct cvmx_led_cylon_s cn58xx; - struct cvmx_led_cylon_s cn58xxp1; }; union cvmx_led_dbg { @@ -110,12 +92,6 @@ union cvmx_led_dbg { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_led_dbg_s cn38xx; - struct cvmx_led_dbg_s cn38xxp2; - struct cvmx_led_dbg_s cn56xx; - struct cvmx_led_dbg_s cn56xxp1; - struct cvmx_led_dbg_s cn58xx; - struct cvmx_led_dbg_s cn58xxp1; }; union cvmx_led_en { @@ -129,12 +105,6 @@ union cvmx_led_en { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_led_en_s cn38xx; - struct cvmx_led_en_s cn38xxp2; - struct cvmx_led_en_s cn56xx; - struct cvmx_led_en_s cn56xxp1; - struct cvmx_led_en_s cn58xx; - struct cvmx_led_en_s cn58xxp1; }; union cvmx_led_polarity { @@ -148,12 +118,6 @@ union cvmx_led_polarity { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_led_polarity_s cn38xx; - struct cvmx_led_polarity_s cn38xxp2; - struct cvmx_led_polarity_s cn56xx; - struct cvmx_led_polarity_s cn56xxp1; - struct cvmx_led_polarity_s cn58xx; - struct cvmx_led_polarity_s cn58xxp1; }; union cvmx_led_prt { @@ -167,12 +131,6 @@ union cvmx_led_prt { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_led_prt_s cn38xx; - struct cvmx_led_prt_s cn38xxp2; - struct cvmx_led_prt_s cn56xx; - struct cvmx_led_prt_s cn56xxp1; - struct cvmx_led_prt_s cn58xx; - struct cvmx_led_prt_s cn58xxp1; }; union cvmx_led_prt_fmt { @@ -186,12 +144,6 @@ union cvmx_led_prt_fmt { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_led_prt_fmt_s cn38xx; - struct cvmx_led_prt_fmt_s cn38xxp2; - struct cvmx_led_prt_fmt_s cn56xx; - struct cvmx_led_prt_fmt_s cn56xxp1; - struct cvmx_led_prt_fmt_s cn58xx; - struct cvmx_led_prt_fmt_s cn58xxp1; }; union cvmx_led_prt_statusx { @@ -205,12 +157,6 @@ union cvmx_led_prt_statusx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_led_prt_statusx_s cn38xx; - struct cvmx_led_prt_statusx_s cn38xxp2; - struct cvmx_led_prt_statusx_s cn56xx; - struct cvmx_led_prt_statusx_s cn56xxp1; - struct cvmx_led_prt_statusx_s cn58xx; - struct cvmx_led_prt_statusx_s cn58xxp1; }; union cvmx_led_udd_cntx { @@ -224,12 +170,6 @@ union cvmx_led_udd_cntx { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_led_udd_cntx_s cn38xx; - struct cvmx_led_udd_cntx_s cn38xxp2; - struct cvmx_led_udd_cntx_s cn56xx; - struct cvmx_led_udd_cntx_s cn56xxp1; - struct cvmx_led_udd_cntx_s cn58xx; - struct cvmx_led_udd_cntx_s cn58xxp1; }; union cvmx_led_udd_datx { @@ -243,12 +183,6 @@ union cvmx_led_udd_datx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_led_udd_datx_s cn38xx; - struct cvmx_led_udd_datx_s cn38xxp2; - struct cvmx_led_udd_datx_s cn56xx; - struct cvmx_led_udd_datx_s cn56xxp1; - struct cvmx_led_udd_datx_s cn58xx; - struct cvmx_led_udd_datx_s cn58xxp1; }; union cvmx_led_udd_dat_clrx { @@ -262,12 +196,6 @@ union cvmx_led_udd_dat_clrx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_led_udd_dat_clrx_s cn38xx; - struct cvmx_led_udd_dat_clrx_s cn38xxp2; - struct cvmx_led_udd_dat_clrx_s cn56xx; - struct cvmx_led_udd_dat_clrx_s cn56xxp1; - struct cvmx_led_udd_dat_clrx_s cn58xx; - struct cvmx_led_udd_dat_clrx_s cn58xxp1; }; union cvmx_led_udd_dat_setx { @@ -281,12 +209,6 @@ union cvmx_led_udd_dat_setx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_led_udd_dat_setx_s cn38xx; - struct cvmx_led_udd_dat_setx_s cn38xxp2; - struct cvmx_led_udd_dat_setx_s cn56xx; - struct cvmx_led_udd_dat_setx_s cn56xxp1; - struct cvmx_led_udd_dat_setx_s cn58xx; - struct cvmx_led_udd_dat_setx_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h b/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h index 36f510721141..4167a4c7a28d 100644 --- a/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-lmcx-defs.h @@ -189,11 +189,6 @@ union cvmx_lmcx_bist_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_lmcx_bist_ctl_s cn50xx; - struct cvmx_lmcx_bist_ctl_s cn52xx; - struct cvmx_lmcx_bist_ctl_s cn52xxp1; - struct cvmx_lmcx_bist_ctl_s cn56xx; - struct cvmx_lmcx_bist_ctl_s cn56xxp1; }; union cvmx_lmcx_bist_result { @@ -236,10 +231,6 @@ union cvmx_lmcx_bist_result { uint64_t reserved_9_63:55; #endif } cn50xx; - struct cvmx_lmcx_bist_result_s cn52xx; - struct cvmx_lmcx_bist_result_s cn52xxp1; - struct cvmx_lmcx_bist_result_s cn56xx; - struct cvmx_lmcx_bist_result_s cn56xxp1; }; union cvmx_lmcx_char_ctl { @@ -263,7 +254,6 @@ union cvmx_lmcx_char_ctl { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_lmcx_char_ctl_s cn61xx; struct cvmx_lmcx_char_ctl_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -279,11 +269,6 @@ union cvmx_lmcx_char_ctl { uint64_t reserved_42_63:22; #endif } cn63xx; - struct cvmx_lmcx_char_ctl_cn63xx cn63xxp1; - struct cvmx_lmcx_char_ctl_s cn66xx; - struct cvmx_lmcx_char_ctl_s cn68xx; - struct cvmx_lmcx_char_ctl_cn63xx cn68xxp1; - struct cvmx_lmcx_char_ctl_s cnf71xx; }; union cvmx_lmcx_char_mask0 { @@ -295,13 +280,6 @@ union cvmx_lmcx_char_mask0 { uint64_t mask:64; #endif } s; - struct cvmx_lmcx_char_mask0_s cn61xx; - struct cvmx_lmcx_char_mask0_s cn63xx; - struct cvmx_lmcx_char_mask0_s cn63xxp1; - struct cvmx_lmcx_char_mask0_s cn66xx; - struct cvmx_lmcx_char_mask0_s cn68xx; - struct cvmx_lmcx_char_mask0_s cn68xxp1; - struct cvmx_lmcx_char_mask0_s cnf71xx; }; union cvmx_lmcx_char_mask1 { @@ -315,13 +293,6 @@ union cvmx_lmcx_char_mask1 { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_char_mask1_s cn61xx; - struct cvmx_lmcx_char_mask1_s cn63xx; - struct cvmx_lmcx_char_mask1_s cn63xxp1; - struct cvmx_lmcx_char_mask1_s cn66xx; - struct cvmx_lmcx_char_mask1_s cn68xx; - struct cvmx_lmcx_char_mask1_s cn68xxp1; - struct cvmx_lmcx_char_mask1_s cnf71xx; }; union cvmx_lmcx_char_mask2 { @@ -333,13 +304,6 @@ union cvmx_lmcx_char_mask2 { uint64_t mask:64; #endif } s; - struct cvmx_lmcx_char_mask2_s cn61xx; - struct cvmx_lmcx_char_mask2_s cn63xx; - struct cvmx_lmcx_char_mask2_s cn63xxp1; - struct cvmx_lmcx_char_mask2_s cn66xx; - struct cvmx_lmcx_char_mask2_s cn68xx; - struct cvmx_lmcx_char_mask2_s cn68xxp1; - struct cvmx_lmcx_char_mask2_s cnf71xx; }; union cvmx_lmcx_char_mask3 { @@ -353,13 +317,6 @@ union cvmx_lmcx_char_mask3 { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_char_mask3_s cn61xx; - struct cvmx_lmcx_char_mask3_s cn63xx; - struct cvmx_lmcx_char_mask3_s cn63xxp1; - struct cvmx_lmcx_char_mask3_s cn66xx; - struct cvmx_lmcx_char_mask3_s cn68xx; - struct cvmx_lmcx_char_mask3_s cn68xxp1; - struct cvmx_lmcx_char_mask3_s cnf71xx; }; union cvmx_lmcx_char_mask4 { @@ -393,13 +350,6 @@ union cvmx_lmcx_char_mask4 { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_lmcx_char_mask4_s cn61xx; - struct cvmx_lmcx_char_mask4_s cn63xx; - struct cvmx_lmcx_char_mask4_s cn63xxp1; - struct cvmx_lmcx_char_mask4_s cn66xx; - struct cvmx_lmcx_char_mask4_s cn68xx; - struct cvmx_lmcx_char_mask4_s cn68xxp1; - struct cvmx_lmcx_char_mask4_s cnf71xx; }; union cvmx_lmcx_comp_ctl { @@ -448,9 +398,6 @@ union cvmx_lmcx_comp_ctl { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_comp_ctl_cn30xx cn31xx; - struct cvmx_lmcx_comp_ctl_cn30xx cn38xx; - struct cvmx_lmcx_comp_ctl_cn30xx cn38xxp2; struct cvmx_lmcx_comp_ctl_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -470,11 +417,6 @@ union cvmx_lmcx_comp_ctl { uint64_t reserved_32_63:32; #endif } cn50xx; - struct cvmx_lmcx_comp_ctl_cn50xx cn52xx; - struct cvmx_lmcx_comp_ctl_cn50xx cn52xxp1; - struct cvmx_lmcx_comp_ctl_cn50xx cn56xx; - struct cvmx_lmcx_comp_ctl_cn50xx cn56xxp1; - struct cvmx_lmcx_comp_ctl_cn50xx cn58xx; struct cvmx_lmcx_comp_ctl_cn58xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -525,13 +467,6 @@ union cvmx_lmcx_comp_ctl2 { uint64_t reserved_34_63:30; #endif } s; - struct cvmx_lmcx_comp_ctl2_s cn61xx; - struct cvmx_lmcx_comp_ctl2_s cn63xx; - struct cvmx_lmcx_comp_ctl2_s cn63xxp1; - struct cvmx_lmcx_comp_ctl2_s cn66xx; - struct cvmx_lmcx_comp_ctl2_s cn68xx; - struct cvmx_lmcx_comp_ctl2_s cn68xxp1; - struct cvmx_lmcx_comp_ctl2_s cnf71xx; }; union cvmx_lmcx_config { @@ -587,7 +522,6 @@ union cvmx_lmcx_config { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_lmcx_config_s cn61xx; struct cvmx_lmcx_config_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_59_63:5; @@ -723,9 +657,6 @@ union cvmx_lmcx_config { uint64_t reserved_60_63:4; #endif } cn66xx; - struct cvmx_lmcx_config_cn63xx cn68xx; - struct cvmx_lmcx_config_cn63xx cn68xxp1; - struct cvmx_lmcx_config_s cnf71xx; }; union cvmx_lmcx_control { @@ -787,7 +718,6 @@ union cvmx_lmcx_control { uint64_t scramble_ena:1; #endif } s; - struct cvmx_lmcx_control_s cn61xx; struct cvmx_lmcx_control_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -833,7 +763,6 @@ union cvmx_lmcx_control { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_lmcx_control_cn63xx cn63xxp1; struct cvmx_lmcx_control_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t scramble_ena:1; @@ -938,8 +867,6 @@ union cvmx_lmcx_control { uint64_t reserved_63_63:1; #endif } cn68xx; - struct cvmx_lmcx_control_cn68xx cn68xxp1; - struct cvmx_lmcx_control_cn66xx cnf71xx; }; union cvmx_lmcx_ctl { @@ -1032,7 +959,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_ctl_cn30xx cn31xx; struct cvmx_lmcx_ctl_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1076,7 +1002,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_lmcx_ctl_cn38xx cn38xxp2; struct cvmx_lmcx_ctl_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1165,9 +1090,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn52xx; - struct cvmx_lmcx_ctl_cn52xx cn52xxp1; - struct cvmx_lmcx_ctl_cn52xx cn56xx; - struct cvmx_lmcx_ctl_cn52xx cn56xxp1; struct cvmx_lmcx_ctl_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -1211,7 +1133,6 @@ union cvmx_lmcx_ctl { uint64_t reserved_32_63:32; #endif } cn58xx; - struct cvmx_lmcx_ctl_cn58xx cn58xxp1; }; union cvmx_lmcx_ctl1 { @@ -1284,9 +1205,6 @@ union cvmx_lmcx_ctl1 { uint64_t reserved_21_63:43; #endif } cn52xx; - struct cvmx_lmcx_ctl1_cn52xx cn52xxp1; - struct cvmx_lmcx_ctl1_cn52xx cn56xx; - struct cvmx_lmcx_ctl1_cn52xx cn56xxp1; struct cvmx_lmcx_ctl1_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -1300,7 +1218,6 @@ union cvmx_lmcx_ctl1 { uint64_t reserved_10_63:54; #endif } cn58xx; - struct cvmx_lmcx_ctl1_cn58xx cn58xxp1; }; union cvmx_lmcx_dclk_cnt { @@ -1312,13 +1229,6 @@ union cvmx_lmcx_dclk_cnt { uint64_t dclkcnt:64; #endif } s; - struct cvmx_lmcx_dclk_cnt_s cn61xx; - struct cvmx_lmcx_dclk_cnt_s cn63xx; - struct cvmx_lmcx_dclk_cnt_s cn63xxp1; - struct cvmx_lmcx_dclk_cnt_s cn66xx; - struct cvmx_lmcx_dclk_cnt_s cn68xx; - struct cvmx_lmcx_dclk_cnt_s cn68xxp1; - struct cvmx_lmcx_dclk_cnt_s cnf71xx; }; union cvmx_lmcx_dclk_cnt_hi { @@ -1332,17 +1242,6 @@ union cvmx_lmcx_dclk_cnt_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_dclk_cnt_hi_s cn30xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn31xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn38xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn38xxp2; - struct cvmx_lmcx_dclk_cnt_hi_s cn50xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn52xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn52xxp1; - struct cvmx_lmcx_dclk_cnt_hi_s cn56xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn56xxp1; - struct cvmx_lmcx_dclk_cnt_hi_s cn58xx; - struct cvmx_lmcx_dclk_cnt_hi_s cn58xxp1; }; union cvmx_lmcx_dclk_cnt_lo { @@ -1356,17 +1255,6 @@ union cvmx_lmcx_dclk_cnt_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_dclk_cnt_lo_s cn30xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn31xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn38xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn38xxp2; - struct cvmx_lmcx_dclk_cnt_lo_s cn50xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn52xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn52xxp1; - struct cvmx_lmcx_dclk_cnt_lo_s cn56xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn56xxp1; - struct cvmx_lmcx_dclk_cnt_lo_s cn58xx; - struct cvmx_lmcx_dclk_cnt_lo_s cn58xxp1; }; union cvmx_lmcx_dclk_ctl { @@ -1386,8 +1274,6 @@ union cvmx_lmcx_dclk_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_dclk_ctl_s cn56xx; - struct cvmx_lmcx_dclk_ctl_s cn56xxp1; }; union cvmx_lmcx_ddr2_ctl { @@ -1474,16 +1360,6 @@ union cvmx_lmcx_ddr2_ctl { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_ddr2_ctl_cn30xx cn31xx; - struct cvmx_lmcx_ddr2_ctl_s cn38xx; - struct cvmx_lmcx_ddr2_ctl_s cn38xxp2; - struct cvmx_lmcx_ddr2_ctl_s cn50xx; - struct cvmx_lmcx_ddr2_ctl_s cn52xx; - struct cvmx_lmcx_ddr2_ctl_s cn52xxp1; - struct cvmx_lmcx_ddr2_ctl_s cn56xx; - struct cvmx_lmcx_ddr2_ctl_s cn56xxp1; - struct cvmx_lmcx_ddr2_ctl_s cn58xx; - struct cvmx_lmcx_ddr2_ctl_s cn58xxp1; }; union cvmx_lmcx_ddr_pll_ctl { @@ -1515,13 +1391,6 @@ union cvmx_lmcx_ddr_pll_ctl { uint64_t reserved_27_63:37; #endif } s; - struct cvmx_lmcx_ddr_pll_ctl_s cn61xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn63xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn63xxp1; - struct cvmx_lmcx_ddr_pll_ctl_s cn66xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn68xx; - struct cvmx_lmcx_ddr_pll_ctl_s cn68xxp1; - struct cvmx_lmcx_ddr_pll_ctl_s cnf71xx; }; union cvmx_lmcx_delay_cfg { @@ -1539,7 +1408,6 @@ union cvmx_lmcx_delay_cfg { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_lmcx_delay_cfg_s cn30xx; struct cvmx_lmcx_delay_cfg_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -1557,13 +1425,6 @@ union cvmx_lmcx_delay_cfg { uint64_t reserved_14_63:50; #endif } cn38xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn50xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn52xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn52xxp1; - struct cvmx_lmcx_delay_cfg_cn38xx cn56xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn56xxp1; - struct cvmx_lmcx_delay_cfg_cn38xx cn58xx; - struct cvmx_lmcx_delay_cfg_cn38xx cn58xxp1; }; union cvmx_lmcx_dimmx_params { @@ -1605,13 +1466,6 @@ union cvmx_lmcx_dimmx_params { uint64_t rc15:4; #endif } s; - struct cvmx_lmcx_dimmx_params_s cn61xx; - struct cvmx_lmcx_dimmx_params_s cn63xx; - struct cvmx_lmcx_dimmx_params_s cn63xxp1; - struct cvmx_lmcx_dimmx_params_s cn66xx; - struct cvmx_lmcx_dimmx_params_s cn68xx; - struct cvmx_lmcx_dimmx_params_s cn68xxp1; - struct cvmx_lmcx_dimmx_params_s cnf71xx; }; union cvmx_lmcx_dimm_ctl { @@ -1631,13 +1485,6 @@ union cvmx_lmcx_dimm_ctl { uint64_t reserved_46_63:18; #endif } s; - struct cvmx_lmcx_dimm_ctl_s cn61xx; - struct cvmx_lmcx_dimm_ctl_s cn63xx; - struct cvmx_lmcx_dimm_ctl_s cn63xxp1; - struct cvmx_lmcx_dimm_ctl_s cn66xx; - struct cvmx_lmcx_dimm_ctl_s cn68xx; - struct cvmx_lmcx_dimm_ctl_s cn68xxp1; - struct cvmx_lmcx_dimm_ctl_s cnf71xx; }; union cvmx_lmcx_dll_ctl { @@ -1657,10 +1504,6 @@ union cvmx_lmcx_dll_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_lmcx_dll_ctl_s cn52xx; - struct cvmx_lmcx_dll_ctl_s cn52xxp1; - struct cvmx_lmcx_dll_ctl_s cn56xx; - struct cvmx_lmcx_dll_ctl_s cn56xxp1; }; union cvmx_lmcx_dll_ctl2 { @@ -1684,7 +1527,6 @@ union cvmx_lmcx_dll_ctl2 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_lmcx_dll_ctl2_s cn61xx; struct cvmx_lmcx_dll_ctl2_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_15_63:49; @@ -1702,11 +1544,6 @@ union cvmx_lmcx_dll_ctl2 { uint64_t reserved_15_63:49; #endif } cn63xx; - struct cvmx_lmcx_dll_ctl2_cn63xx cn63xxp1; - struct cvmx_lmcx_dll_ctl2_cn63xx cn66xx; - struct cvmx_lmcx_dll_ctl2_s cn68xx; - struct cvmx_lmcx_dll_ctl2_s cn68xxp1; - struct cvmx_lmcx_dll_ctl2_s cnf71xx; }; union cvmx_lmcx_dll_ctl3 { @@ -1748,7 +1585,6 @@ union cvmx_lmcx_dll_ctl3 { uint64_t reserved_41_63:23; #endif } s; - struct cvmx_lmcx_dll_ctl3_s cn61xx; struct cvmx_lmcx_dll_ctl3_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -1776,11 +1612,6 @@ union cvmx_lmcx_dll_ctl3 { uint64_t reserved_29_63:35; #endif } cn63xx; - struct cvmx_lmcx_dll_ctl3_cn63xx cn63xxp1; - struct cvmx_lmcx_dll_ctl3_cn63xx cn66xx; - struct cvmx_lmcx_dll_ctl3_s cn68xx; - struct cvmx_lmcx_dll_ctl3_s cn68xxp1; - struct cvmx_lmcx_dll_ctl3_s cnf71xx; }; union cvmx_lmcx_dual_memcfg { @@ -1800,13 +1631,6 @@ union cvmx_lmcx_dual_memcfg { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_lmcx_dual_memcfg_s cn50xx; - struct cvmx_lmcx_dual_memcfg_s cn52xx; - struct cvmx_lmcx_dual_memcfg_s cn52xxp1; - struct cvmx_lmcx_dual_memcfg_s cn56xx; - struct cvmx_lmcx_dual_memcfg_s cn56xxp1; - struct cvmx_lmcx_dual_memcfg_s cn58xx; - struct cvmx_lmcx_dual_memcfg_s cn58xxp1; struct cvmx_lmcx_dual_memcfg_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_19_63:45; @@ -1820,12 +1644,6 @@ union cvmx_lmcx_dual_memcfg { uint64_t reserved_19_63:45; #endif } cn61xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn63xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn63xxp1; - struct cvmx_lmcx_dual_memcfg_cn61xx cn66xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn68xx; - struct cvmx_lmcx_dual_memcfg_cn61xx cn68xxp1; - struct cvmx_lmcx_dual_memcfg_cn61xx cnf71xx; }; union cvmx_lmcx_ecc_synd { @@ -1845,24 +1663,6 @@ union cvmx_lmcx_ecc_synd { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ecc_synd_s cn30xx; - struct cvmx_lmcx_ecc_synd_s cn31xx; - struct cvmx_lmcx_ecc_synd_s cn38xx; - struct cvmx_lmcx_ecc_synd_s cn38xxp2; - struct cvmx_lmcx_ecc_synd_s cn50xx; - struct cvmx_lmcx_ecc_synd_s cn52xx; - struct cvmx_lmcx_ecc_synd_s cn52xxp1; - struct cvmx_lmcx_ecc_synd_s cn56xx; - struct cvmx_lmcx_ecc_synd_s cn56xxp1; - struct cvmx_lmcx_ecc_synd_s cn58xx; - struct cvmx_lmcx_ecc_synd_s cn58xxp1; - struct cvmx_lmcx_ecc_synd_s cn61xx; - struct cvmx_lmcx_ecc_synd_s cn63xx; - struct cvmx_lmcx_ecc_synd_s cn63xxp1; - struct cvmx_lmcx_ecc_synd_s cn66xx; - struct cvmx_lmcx_ecc_synd_s cn68xx; - struct cvmx_lmcx_ecc_synd_s cn68xxp1; - struct cvmx_lmcx_ecc_synd_s cnf71xx; }; union cvmx_lmcx_fadr { @@ -1891,16 +1691,6 @@ union cvmx_lmcx_fadr { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_fadr_cn30xx cn31xx; - struct cvmx_lmcx_fadr_cn30xx cn38xx; - struct cvmx_lmcx_fadr_cn30xx cn38xxp2; - struct cvmx_lmcx_fadr_cn30xx cn50xx; - struct cvmx_lmcx_fadr_cn30xx cn52xx; - struct cvmx_lmcx_fadr_cn30xx cn52xxp1; - struct cvmx_lmcx_fadr_cn30xx cn56xx; - struct cvmx_lmcx_fadr_cn30xx cn56xxp1; - struct cvmx_lmcx_fadr_cn30xx cn58xx; - struct cvmx_lmcx_fadr_cn30xx cn58xxp1; struct cvmx_lmcx_fadr_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1918,12 +1708,6 @@ union cvmx_lmcx_fadr { uint64_t reserved_36_63:28; #endif } cn61xx; - struct cvmx_lmcx_fadr_cn61xx cn63xx; - struct cvmx_lmcx_fadr_cn61xx cn63xxp1; - struct cvmx_lmcx_fadr_cn61xx cn66xx; - struct cvmx_lmcx_fadr_cn61xx cn68xx; - struct cvmx_lmcx_fadr_cn61xx cn68xxp1; - struct cvmx_lmcx_fadr_cn61xx cnf71xx; }; union cvmx_lmcx_ifb_cnt { @@ -1935,13 +1719,6 @@ union cvmx_lmcx_ifb_cnt { uint64_t ifbcnt:64; #endif } s; - struct cvmx_lmcx_ifb_cnt_s cn61xx; - struct cvmx_lmcx_ifb_cnt_s cn63xx; - struct cvmx_lmcx_ifb_cnt_s cn63xxp1; - struct cvmx_lmcx_ifb_cnt_s cn66xx; - struct cvmx_lmcx_ifb_cnt_s cn68xx; - struct cvmx_lmcx_ifb_cnt_s cn68xxp1; - struct cvmx_lmcx_ifb_cnt_s cnf71xx; }; union cvmx_lmcx_ifb_cnt_hi { @@ -1955,17 +1732,6 @@ union cvmx_lmcx_ifb_cnt_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ifb_cnt_hi_s cn30xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn31xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn38xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn38xxp2; - struct cvmx_lmcx_ifb_cnt_hi_s cn50xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn52xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn52xxp1; - struct cvmx_lmcx_ifb_cnt_hi_s cn56xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn56xxp1; - struct cvmx_lmcx_ifb_cnt_hi_s cn58xx; - struct cvmx_lmcx_ifb_cnt_hi_s cn58xxp1; }; union cvmx_lmcx_ifb_cnt_lo { @@ -1979,17 +1745,6 @@ union cvmx_lmcx_ifb_cnt_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ifb_cnt_lo_s cn30xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn31xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn38xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn38xxp2; - struct cvmx_lmcx_ifb_cnt_lo_s cn50xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn52xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn52xxp1; - struct cvmx_lmcx_ifb_cnt_lo_s cn56xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn56xxp1; - struct cvmx_lmcx_ifb_cnt_lo_s cn58xx; - struct cvmx_lmcx_ifb_cnt_lo_s cn58xxp1; }; union cvmx_lmcx_int { @@ -2007,13 +1762,6 @@ union cvmx_lmcx_int { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_lmcx_int_s cn61xx; - struct cvmx_lmcx_int_s cn63xx; - struct cvmx_lmcx_int_s cn63xxp1; - struct cvmx_lmcx_int_s cn66xx; - struct cvmx_lmcx_int_s cn68xx; - struct cvmx_lmcx_int_s cn68xxp1; - struct cvmx_lmcx_int_s cnf71xx; }; union cvmx_lmcx_int_en { @@ -2031,13 +1779,6 @@ union cvmx_lmcx_int_en { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_lmcx_int_en_s cn61xx; - struct cvmx_lmcx_int_en_s cn63xx; - struct cvmx_lmcx_int_en_s cn63xxp1; - struct cvmx_lmcx_int_en_s cn66xx; - struct cvmx_lmcx_int_en_s cn68xx; - struct cvmx_lmcx_int_en_s cn68xxp1; - struct cvmx_lmcx_int_en_s cnf71xx; }; union cvmx_lmcx_mem_cfg0 { @@ -2075,17 +1816,6 @@ union cvmx_lmcx_mem_cfg0 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_mem_cfg0_s cn30xx; - struct cvmx_lmcx_mem_cfg0_s cn31xx; - struct cvmx_lmcx_mem_cfg0_s cn38xx; - struct cvmx_lmcx_mem_cfg0_s cn38xxp2; - struct cvmx_lmcx_mem_cfg0_s cn50xx; - struct cvmx_lmcx_mem_cfg0_s cn52xx; - struct cvmx_lmcx_mem_cfg0_s cn52xxp1; - struct cvmx_lmcx_mem_cfg0_s cn56xx; - struct cvmx_lmcx_mem_cfg0_s cn56xxp1; - struct cvmx_lmcx_mem_cfg0_s cn58xx; - struct cvmx_lmcx_mem_cfg0_s cn58xxp1; }; union cvmx_lmcx_mem_cfg1 { @@ -2115,8 +1845,6 @@ union cvmx_lmcx_mem_cfg1 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_mem_cfg1_s cn30xx; - struct cvmx_lmcx_mem_cfg1_s cn31xx; struct cvmx_lmcx_mem_cfg1_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_31_63:33; @@ -2140,14 +1868,6 @@ union cvmx_lmcx_mem_cfg1 { uint64_t reserved_31_63:33; #endif } cn38xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn38xxp2; - struct cvmx_lmcx_mem_cfg1_s cn50xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn52xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn52xxp1; - struct cvmx_lmcx_mem_cfg1_cn38xx cn56xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn56xxp1; - struct cvmx_lmcx_mem_cfg1_cn38xx cn58xx; - struct cvmx_lmcx_mem_cfg1_cn38xx cn58xxp1; }; union cvmx_lmcx_modereg_params0 { @@ -2189,13 +1909,6 @@ union cvmx_lmcx_modereg_params0 { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_lmcx_modereg_params0_s cn61xx; - struct cvmx_lmcx_modereg_params0_s cn63xx; - struct cvmx_lmcx_modereg_params0_s cn63xxp1; - struct cvmx_lmcx_modereg_params0_s cn66xx; - struct cvmx_lmcx_modereg_params0_s cn68xx; - struct cvmx_lmcx_modereg_params0_s cn68xxp1; - struct cvmx_lmcx_modereg_params0_s cnf71xx; }; union cvmx_lmcx_modereg_params1 { @@ -2255,13 +1968,6 @@ union cvmx_lmcx_modereg_params1 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_lmcx_modereg_params1_s cn61xx; - struct cvmx_lmcx_modereg_params1_s cn63xx; - struct cvmx_lmcx_modereg_params1_s cn63xxp1; - struct cvmx_lmcx_modereg_params1_s cn66xx; - struct cvmx_lmcx_modereg_params1_s cn68xx; - struct cvmx_lmcx_modereg_params1_s cn68xxp1; - struct cvmx_lmcx_modereg_params1_s cnf71xx; }; union cvmx_lmcx_nxm { @@ -2300,15 +2006,6 @@ union cvmx_lmcx_nxm { uint64_t reserved_8_63:56; #endif } cn52xx; - struct cvmx_lmcx_nxm_cn52xx cn56xx; - struct cvmx_lmcx_nxm_cn52xx cn58xx; - struct cvmx_lmcx_nxm_s cn61xx; - struct cvmx_lmcx_nxm_s cn63xx; - struct cvmx_lmcx_nxm_s cn63xxp1; - struct cvmx_lmcx_nxm_s cn66xx; - struct cvmx_lmcx_nxm_s cn68xx; - struct cvmx_lmcx_nxm_s cn68xxp1; - struct cvmx_lmcx_nxm_s cnf71xx; }; union cvmx_lmcx_ops_cnt { @@ -2320,13 +2017,6 @@ union cvmx_lmcx_ops_cnt { uint64_t opscnt:64; #endif } s; - struct cvmx_lmcx_ops_cnt_s cn61xx; - struct cvmx_lmcx_ops_cnt_s cn63xx; - struct cvmx_lmcx_ops_cnt_s cn63xxp1; - struct cvmx_lmcx_ops_cnt_s cn66xx; - struct cvmx_lmcx_ops_cnt_s cn68xx; - struct cvmx_lmcx_ops_cnt_s cn68xxp1; - struct cvmx_lmcx_ops_cnt_s cnf71xx; }; union cvmx_lmcx_ops_cnt_hi { @@ -2340,17 +2030,6 @@ union cvmx_lmcx_ops_cnt_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ops_cnt_hi_s cn30xx; - struct cvmx_lmcx_ops_cnt_hi_s cn31xx; - struct cvmx_lmcx_ops_cnt_hi_s cn38xx; - struct cvmx_lmcx_ops_cnt_hi_s cn38xxp2; - struct cvmx_lmcx_ops_cnt_hi_s cn50xx; - struct cvmx_lmcx_ops_cnt_hi_s cn52xx; - struct cvmx_lmcx_ops_cnt_hi_s cn52xxp1; - struct cvmx_lmcx_ops_cnt_hi_s cn56xx; - struct cvmx_lmcx_ops_cnt_hi_s cn56xxp1; - struct cvmx_lmcx_ops_cnt_hi_s cn58xx; - struct cvmx_lmcx_ops_cnt_hi_s cn58xxp1; }; union cvmx_lmcx_ops_cnt_lo { @@ -2364,17 +2043,6 @@ union cvmx_lmcx_ops_cnt_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_ops_cnt_lo_s cn30xx; - struct cvmx_lmcx_ops_cnt_lo_s cn31xx; - struct cvmx_lmcx_ops_cnt_lo_s cn38xx; - struct cvmx_lmcx_ops_cnt_lo_s cn38xxp2; - struct cvmx_lmcx_ops_cnt_lo_s cn50xx; - struct cvmx_lmcx_ops_cnt_lo_s cn52xx; - struct cvmx_lmcx_ops_cnt_lo_s cn52xxp1; - struct cvmx_lmcx_ops_cnt_lo_s cn56xx; - struct cvmx_lmcx_ops_cnt_lo_s cn56xxp1; - struct cvmx_lmcx_ops_cnt_lo_s cn58xx; - struct cvmx_lmcx_ops_cnt_lo_s cn58xxp1; }; union cvmx_lmcx_phy_ctl { @@ -2404,8 +2072,6 @@ union cvmx_lmcx_phy_ctl { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_lmcx_phy_ctl_s cn61xx; - struct cvmx_lmcx_phy_ctl_s cn63xx; struct cvmx_lmcx_phy_ctl_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -2429,10 +2095,6 @@ union cvmx_lmcx_phy_ctl { uint64_t reserved_14_63:50; #endif } cn63xxp1; - struct cvmx_lmcx_phy_ctl_s cn66xx; - struct cvmx_lmcx_phy_ctl_s cn68xx; - struct cvmx_lmcx_phy_ctl_s cn68xxp1; - struct cvmx_lmcx_phy_ctl_s cnf71xx; }; union cvmx_lmcx_pll_bwctl { @@ -2448,10 +2110,6 @@ union cvmx_lmcx_pll_bwctl { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_lmcx_pll_bwctl_s cn30xx; - struct cvmx_lmcx_pll_bwctl_s cn31xx; - struct cvmx_lmcx_pll_bwctl_s cn38xx; - struct cvmx_lmcx_pll_bwctl_s cn38xxp2; }; union cvmx_lmcx_pll_ctl { @@ -2520,9 +2178,6 @@ union cvmx_lmcx_pll_ctl { uint64_t reserved_29_63:35; #endif } cn50xx; - struct cvmx_lmcx_pll_ctl_s cn52xx; - struct cvmx_lmcx_pll_ctl_s cn52xxp1; - struct cvmx_lmcx_pll_ctl_cn50xx cn56xx; struct cvmx_lmcx_pll_ctl_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -2552,8 +2207,6 @@ union cvmx_lmcx_pll_ctl { uint64_t reserved_28_63:36; #endif } cn56xxp1; - struct cvmx_lmcx_pll_ctl_cn56xxp1 cn58xx; - struct cvmx_lmcx_pll_ctl_cn56xxp1 cn58xxp1; }; union cvmx_lmcx_pll_status { @@ -2575,12 +2228,6 @@ union cvmx_lmcx_pll_status { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_pll_status_s cn50xx; - struct cvmx_lmcx_pll_status_s cn52xx; - struct cvmx_lmcx_pll_status_s cn52xxp1; - struct cvmx_lmcx_pll_status_s cn56xx; - struct cvmx_lmcx_pll_status_s cn56xxp1; - struct cvmx_lmcx_pll_status_s cn58xx; struct cvmx_lmcx_pll_status_cn58xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -2615,10 +2262,6 @@ union cvmx_lmcx_read_level_ctl { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_lmcx_read_level_ctl_s cn52xx; - struct cvmx_lmcx_read_level_ctl_s cn52xxp1; - struct cvmx_lmcx_read_level_ctl_s cn56xx; - struct cvmx_lmcx_read_level_ctl_s cn56xxp1; }; union cvmx_lmcx_read_level_dbg { @@ -2636,10 +2279,6 @@ union cvmx_lmcx_read_level_dbg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_read_level_dbg_s cn52xx; - struct cvmx_lmcx_read_level_dbg_s cn52xxp1; - struct cvmx_lmcx_read_level_dbg_s cn56xx; - struct cvmx_lmcx_read_level_dbg_s cn56xxp1; }; union cvmx_lmcx_read_level_rankx { @@ -2671,10 +2310,6 @@ union cvmx_lmcx_read_level_rankx { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_lmcx_read_level_rankx_s cn52xx; - struct cvmx_lmcx_read_level_rankx_s cn52xxp1; - struct cvmx_lmcx_read_level_rankx_s cn56xx; - struct cvmx_lmcx_read_level_rankx_s cn56xxp1; }; union cvmx_lmcx_reset_ctl { @@ -2694,13 +2329,6 @@ union cvmx_lmcx_reset_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_lmcx_reset_ctl_s cn61xx; - struct cvmx_lmcx_reset_ctl_s cn63xx; - struct cvmx_lmcx_reset_ctl_s cn63xxp1; - struct cvmx_lmcx_reset_ctl_s cn66xx; - struct cvmx_lmcx_reset_ctl_s cn68xx; - struct cvmx_lmcx_reset_ctl_s cn68xxp1; - struct cvmx_lmcx_reset_ctl_s cnf71xx; }; union cvmx_lmcx_rlevel_ctl { @@ -2730,8 +2358,6 @@ union cvmx_lmcx_rlevel_ctl { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_lmcx_rlevel_ctl_s cn61xx; - struct cvmx_lmcx_rlevel_ctl_s cn63xx; struct cvmx_lmcx_rlevel_ctl_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -2745,10 +2371,6 @@ union cvmx_lmcx_rlevel_ctl { uint64_t reserved_9_63:55; #endif } cn63xxp1; - struct cvmx_lmcx_rlevel_ctl_s cn66xx; - struct cvmx_lmcx_rlevel_ctl_s cn68xx; - struct cvmx_lmcx_rlevel_ctl_s cn68xxp1; - struct cvmx_lmcx_rlevel_ctl_s cnf71xx; }; union cvmx_lmcx_rlevel_dbg { @@ -2760,13 +2382,6 @@ union cvmx_lmcx_rlevel_dbg { uint64_t bitmask:64; #endif } s; - struct cvmx_lmcx_rlevel_dbg_s cn61xx; - struct cvmx_lmcx_rlevel_dbg_s cn63xx; - struct cvmx_lmcx_rlevel_dbg_s cn63xxp1; - struct cvmx_lmcx_rlevel_dbg_s cn66xx; - struct cvmx_lmcx_rlevel_dbg_s cn68xx; - struct cvmx_lmcx_rlevel_dbg_s cn68xxp1; - struct cvmx_lmcx_rlevel_dbg_s cnf71xx; }; union cvmx_lmcx_rlevel_rankx { @@ -2798,13 +2413,6 @@ union cvmx_lmcx_rlevel_rankx { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_lmcx_rlevel_rankx_s cn61xx; - struct cvmx_lmcx_rlevel_rankx_s cn63xx; - struct cvmx_lmcx_rlevel_rankx_s cn63xxp1; - struct cvmx_lmcx_rlevel_rankx_s cn66xx; - struct cvmx_lmcx_rlevel_rankx_s cn68xx; - struct cvmx_lmcx_rlevel_rankx_s cn68xxp1; - struct cvmx_lmcx_rlevel_rankx_s cnf71xx; }; union cvmx_lmcx_rodt_comp_ctl { @@ -2826,13 +2434,6 @@ union cvmx_lmcx_rodt_comp_ctl { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_lmcx_rodt_comp_ctl_s cn50xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn52xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn52xxp1; - struct cvmx_lmcx_rodt_comp_ctl_s cn56xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn56xxp1; - struct cvmx_lmcx_rodt_comp_ctl_s cn58xx; - struct cvmx_lmcx_rodt_comp_ctl_s cn58xxp1; }; union cvmx_lmcx_rodt_ctl { @@ -2860,17 +2461,6 @@ union cvmx_lmcx_rodt_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_rodt_ctl_s cn30xx; - struct cvmx_lmcx_rodt_ctl_s cn31xx; - struct cvmx_lmcx_rodt_ctl_s cn38xx; - struct cvmx_lmcx_rodt_ctl_s cn38xxp2; - struct cvmx_lmcx_rodt_ctl_s cn50xx; - struct cvmx_lmcx_rodt_ctl_s cn52xx; - struct cvmx_lmcx_rodt_ctl_s cn52xxp1; - struct cvmx_lmcx_rodt_ctl_s cn56xx; - struct cvmx_lmcx_rodt_ctl_s cn56xxp1; - struct cvmx_lmcx_rodt_ctl_s cn58xx; - struct cvmx_lmcx_rodt_ctl_s cn58xxp1; }; union cvmx_lmcx_rodt_mask { @@ -2896,13 +2486,6 @@ union cvmx_lmcx_rodt_mask { uint64_t rodt_d3_r1:8; #endif } s; - struct cvmx_lmcx_rodt_mask_s cn61xx; - struct cvmx_lmcx_rodt_mask_s cn63xx; - struct cvmx_lmcx_rodt_mask_s cn63xxp1; - struct cvmx_lmcx_rodt_mask_s cn66xx; - struct cvmx_lmcx_rodt_mask_s cn68xx; - struct cvmx_lmcx_rodt_mask_s cn68xxp1; - struct cvmx_lmcx_rodt_mask_s cnf71xx; }; union cvmx_lmcx_scramble_cfg0 { @@ -2914,9 +2497,6 @@ union cvmx_lmcx_scramble_cfg0 { uint64_t key:64; #endif } s; - struct cvmx_lmcx_scramble_cfg0_s cn61xx; - struct cvmx_lmcx_scramble_cfg0_s cn66xx; - struct cvmx_lmcx_scramble_cfg0_s cnf71xx; }; union cvmx_lmcx_scramble_cfg1 { @@ -2928,9 +2508,6 @@ union cvmx_lmcx_scramble_cfg1 { uint64_t key:64; #endif } s; - struct cvmx_lmcx_scramble_cfg1_s cn61xx; - struct cvmx_lmcx_scramble_cfg1_s cn66xx; - struct cvmx_lmcx_scramble_cfg1_s cnf71xx; }; union cvmx_lmcx_scrambled_fadr { @@ -2952,9 +2529,6 @@ union cvmx_lmcx_scrambled_fadr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_lmcx_scrambled_fadr_s cn61xx; - struct cvmx_lmcx_scrambled_fadr_s cn66xx; - struct cvmx_lmcx_scrambled_fadr_s cnf71xx; }; union cvmx_lmcx_slot_ctl0 { @@ -2974,13 +2548,6 @@ union cvmx_lmcx_slot_ctl0 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_lmcx_slot_ctl0_s cn61xx; - struct cvmx_lmcx_slot_ctl0_s cn63xx; - struct cvmx_lmcx_slot_ctl0_s cn63xxp1; - struct cvmx_lmcx_slot_ctl0_s cn66xx; - struct cvmx_lmcx_slot_ctl0_s cn68xx; - struct cvmx_lmcx_slot_ctl0_s cn68xxp1; - struct cvmx_lmcx_slot_ctl0_s cnf71xx; }; union cvmx_lmcx_slot_ctl1 { @@ -3000,13 +2567,6 @@ union cvmx_lmcx_slot_ctl1 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_lmcx_slot_ctl1_s cn61xx; - struct cvmx_lmcx_slot_ctl1_s cn63xx; - struct cvmx_lmcx_slot_ctl1_s cn63xxp1; - struct cvmx_lmcx_slot_ctl1_s cn66xx; - struct cvmx_lmcx_slot_ctl1_s cn68xx; - struct cvmx_lmcx_slot_ctl1_s cn68xxp1; - struct cvmx_lmcx_slot_ctl1_s cnf71xx; }; union cvmx_lmcx_slot_ctl2 { @@ -3026,13 +2586,6 @@ union cvmx_lmcx_slot_ctl2 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_lmcx_slot_ctl2_s cn61xx; - struct cvmx_lmcx_slot_ctl2_s cn63xx; - struct cvmx_lmcx_slot_ctl2_s cn63xxp1; - struct cvmx_lmcx_slot_ctl2_s cn66xx; - struct cvmx_lmcx_slot_ctl2_s cn68xx; - struct cvmx_lmcx_slot_ctl2_s cn68xxp1; - struct cvmx_lmcx_slot_ctl2_s cnf71xx; }; union cvmx_lmcx_timing_params0 { @@ -3095,7 +2648,6 @@ union cvmx_lmcx_timing_params0 { uint64_t reserved_47_63:17; #endif } cn61xx; - struct cvmx_lmcx_timing_params0_cn61xx cn63xx; struct cvmx_lmcx_timing_params0_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_46_63:18; @@ -3123,10 +2675,6 @@ union cvmx_lmcx_timing_params0 { uint64_t reserved_46_63:18; #endif } cn63xxp1; - struct cvmx_lmcx_timing_params0_cn61xx cn66xx; - struct cvmx_lmcx_timing_params0_cn61xx cn68xx; - struct cvmx_lmcx_timing_params0_cn61xx cn68xxp1; - struct cvmx_lmcx_timing_params0_cn61xx cnf71xx; }; union cvmx_lmcx_timing_params1 { @@ -3162,8 +2710,6 @@ union cvmx_lmcx_timing_params1 { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_lmcx_timing_params1_s cn61xx; - struct cvmx_lmcx_timing_params1_s cn63xx; struct cvmx_lmcx_timing_params1_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_46_63:18; @@ -3193,10 +2739,6 @@ union cvmx_lmcx_timing_params1 { uint64_t reserved_46_63:18; #endif } cn63xxp1; - struct cvmx_lmcx_timing_params1_s cn66xx; - struct cvmx_lmcx_timing_params1_s cn68xx; - struct cvmx_lmcx_timing_params1_s cn68xxp1; - struct cvmx_lmcx_timing_params1_s cnf71xx; }; union cvmx_lmcx_tro_ctl { @@ -3212,13 +2754,6 @@ union cvmx_lmcx_tro_ctl { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_lmcx_tro_ctl_s cn61xx; - struct cvmx_lmcx_tro_ctl_s cn63xx; - struct cvmx_lmcx_tro_ctl_s cn63xxp1; - struct cvmx_lmcx_tro_ctl_s cn66xx; - struct cvmx_lmcx_tro_ctl_s cn68xx; - struct cvmx_lmcx_tro_ctl_s cn68xxp1; - struct cvmx_lmcx_tro_ctl_s cnf71xx; }; union cvmx_lmcx_tro_stat { @@ -3232,13 +2767,6 @@ union cvmx_lmcx_tro_stat { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_tro_stat_s cn61xx; - struct cvmx_lmcx_tro_stat_s cn63xx; - struct cvmx_lmcx_tro_stat_s cn63xxp1; - struct cvmx_lmcx_tro_stat_s cn66xx; - struct cvmx_lmcx_tro_stat_s cn68xx; - struct cvmx_lmcx_tro_stat_s cn68xxp1; - struct cvmx_lmcx_tro_stat_s cnf71xx; }; union cvmx_lmcx_wlevel_ctl { @@ -3260,8 +2788,6 @@ union cvmx_lmcx_wlevel_ctl { uint64_t reserved_22_63:42; #endif } s; - struct cvmx_lmcx_wlevel_ctl_s cn61xx; - struct cvmx_lmcx_wlevel_ctl_s cn63xx; struct cvmx_lmcx_wlevel_ctl_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3273,10 +2799,6 @@ union cvmx_lmcx_wlevel_ctl { uint64_t reserved_10_63:54; #endif } cn63xxp1; - struct cvmx_lmcx_wlevel_ctl_s cn66xx; - struct cvmx_lmcx_wlevel_ctl_s cn68xx; - struct cvmx_lmcx_wlevel_ctl_s cn68xxp1; - struct cvmx_lmcx_wlevel_ctl_s cnf71xx; }; union cvmx_lmcx_wlevel_dbg { @@ -3292,13 +2814,6 @@ union cvmx_lmcx_wlevel_dbg { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_lmcx_wlevel_dbg_s cn61xx; - struct cvmx_lmcx_wlevel_dbg_s cn63xx; - struct cvmx_lmcx_wlevel_dbg_s cn63xxp1; - struct cvmx_lmcx_wlevel_dbg_s cn66xx; - struct cvmx_lmcx_wlevel_dbg_s cn68xx; - struct cvmx_lmcx_wlevel_dbg_s cn68xxp1; - struct cvmx_lmcx_wlevel_dbg_s cnf71xx; }; union cvmx_lmcx_wlevel_rankx { @@ -3330,13 +2845,6 @@ union cvmx_lmcx_wlevel_rankx { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_lmcx_wlevel_rankx_s cn61xx; - struct cvmx_lmcx_wlevel_rankx_s cn63xx; - struct cvmx_lmcx_wlevel_rankx_s cn63xxp1; - struct cvmx_lmcx_wlevel_rankx_s cn66xx; - struct cvmx_lmcx_wlevel_rankx_s cn68xx; - struct cvmx_lmcx_wlevel_rankx_s cn68xxp1; - struct cvmx_lmcx_wlevel_rankx_s cnf71xx; }; union cvmx_lmcx_wodt_ctl0 { @@ -3363,7 +2871,6 @@ union cvmx_lmcx_wodt_ctl0 { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn31xx; struct cvmx_lmcx_wodt_ctl0_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -3387,14 +2894,6 @@ union cvmx_lmcx_wodt_ctl0 { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn38xxp2; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn50xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn52xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn52xxp1; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn56xx; - struct cvmx_lmcx_wodt_ctl0_cn30xx cn56xxp1; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn58xx; - struct cvmx_lmcx_wodt_ctl0_cn38xx cn58xxp1; }; union cvmx_lmcx_wodt_ctl1 { @@ -3414,12 +2913,6 @@ union cvmx_lmcx_wodt_ctl1 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_lmcx_wodt_ctl1_s cn30xx; - struct cvmx_lmcx_wodt_ctl1_s cn31xx; - struct cvmx_lmcx_wodt_ctl1_s cn52xx; - struct cvmx_lmcx_wodt_ctl1_s cn52xxp1; - struct cvmx_lmcx_wodt_ctl1_s cn56xx; - struct cvmx_lmcx_wodt_ctl1_s cn56xxp1; }; union cvmx_lmcx_wodt_mask { @@ -3445,13 +2938,6 @@ union cvmx_lmcx_wodt_mask { uint64_t wodt_d3_r1:8; #endif } s; - struct cvmx_lmcx_wodt_mask_s cn61xx; - struct cvmx_lmcx_wodt_mask_s cn63xx; - struct cvmx_lmcx_wodt_mask_s cn63xxp1; - struct cvmx_lmcx_wodt_mask_s cn66xx; - struct cvmx_lmcx_wodt_mask_s cn68xx; - struct cvmx_lmcx_wodt_mask_s cn68xxp1; - struct cvmx_lmcx_wodt_mask_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-mio-defs.h b/arch/mips/include/asm/octeon/cvmx-mio-defs.h index 5196c04eee41..4ad95d040bb1 100644 --- a/arch/mips/include/asm/octeon/cvmx-mio-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-mio-defs.h @@ -188,7 +188,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_mio_boot_bist_stat_cn30xx cn31xx; struct cvmx_mio_boot_bist_stat_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_3_63:61; @@ -202,7 +201,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_3_63:61; #endif } cn38xx; - struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2; struct cvmx_mio_boot_bist_stat_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_6_63:58; @@ -254,10 +252,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_4_63:60; #endif } cn52xxp1; - struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx; - struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1; - struct cvmx_mio_boot_bist_stat_cn38xx cn58xx; - struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1; struct cvmx_mio_boot_bist_stat_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -276,7 +270,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_9_63:55; #endif } cn63xx; - struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1; struct cvmx_mio_boot_bist_stat_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -286,9 +279,6 @@ union cvmx_mio_boot_bist_stat { uint64_t reserved_10_63:54; #endif } cn66xx; - struct cvmx_mio_boot_bist_stat_cn66xx cn68xx; - struct cvmx_mio_boot_bist_stat_cn66xx cn68xxp1; - struct cvmx_mio_boot_bist_stat_cn61xx cnf71xx; }; union cvmx_mio_boot_comp { @@ -311,10 +301,6 @@ union cvmx_mio_boot_comp { uint64_t reserved_10_63:54; #endif } cn50xx; - struct cvmx_mio_boot_comp_cn50xx cn52xx; - struct cvmx_mio_boot_comp_cn50xx cn52xxp1; - struct cvmx_mio_boot_comp_cn50xx cn56xx; - struct cvmx_mio_boot_comp_cn50xx cn56xxp1; struct cvmx_mio_boot_comp_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -326,12 +312,6 @@ union cvmx_mio_boot_comp { uint64_t reserved_12_63:52; #endif } cn61xx; - struct cvmx_mio_boot_comp_cn61xx cn63xx; - struct cvmx_mio_boot_comp_cn61xx cn63xxp1; - struct cvmx_mio_boot_comp_cn61xx cn66xx; - struct cvmx_mio_boot_comp_cn61xx cn68xx; - struct cvmx_mio_boot_comp_cn61xx cn68xxp1; - struct cvmx_mio_boot_comp_cn61xx cnf71xx; }; union cvmx_mio_boot_dma_cfgx { @@ -361,17 +341,6 @@ union cvmx_mio_boot_dma_cfgx { uint64_t en:1; #endif } s; - struct cvmx_mio_boot_dma_cfgx_s cn52xx; - struct cvmx_mio_boot_dma_cfgx_s cn52xxp1; - struct cvmx_mio_boot_dma_cfgx_s cn56xx; - struct cvmx_mio_boot_dma_cfgx_s cn56xxp1; - struct cvmx_mio_boot_dma_cfgx_s cn61xx; - struct cvmx_mio_boot_dma_cfgx_s cn63xx; - struct cvmx_mio_boot_dma_cfgx_s cn63xxp1; - struct cvmx_mio_boot_dma_cfgx_s cn66xx; - struct cvmx_mio_boot_dma_cfgx_s cn68xx; - struct cvmx_mio_boot_dma_cfgx_s cn68xxp1; - struct cvmx_mio_boot_dma_cfgx_s cnf71xx; }; union cvmx_mio_boot_dma_intx { @@ -387,17 +356,6 @@ union cvmx_mio_boot_dma_intx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_dma_intx_s cn52xx; - struct cvmx_mio_boot_dma_intx_s cn52xxp1; - struct cvmx_mio_boot_dma_intx_s cn56xx; - struct cvmx_mio_boot_dma_intx_s cn56xxp1; - struct cvmx_mio_boot_dma_intx_s cn61xx; - struct cvmx_mio_boot_dma_intx_s cn63xx; - struct cvmx_mio_boot_dma_intx_s cn63xxp1; - struct cvmx_mio_boot_dma_intx_s cn66xx; - struct cvmx_mio_boot_dma_intx_s cn68xx; - struct cvmx_mio_boot_dma_intx_s cn68xxp1; - struct cvmx_mio_boot_dma_intx_s cnf71xx; }; union cvmx_mio_boot_dma_int_enx { @@ -413,17 +371,6 @@ union cvmx_mio_boot_dma_int_enx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_dma_int_enx_s cn52xx; - struct cvmx_mio_boot_dma_int_enx_s cn52xxp1; - struct cvmx_mio_boot_dma_int_enx_s cn56xx; - struct cvmx_mio_boot_dma_int_enx_s cn56xxp1; - struct cvmx_mio_boot_dma_int_enx_s cn61xx; - struct cvmx_mio_boot_dma_int_enx_s cn63xx; - struct cvmx_mio_boot_dma_int_enx_s cn63xxp1; - struct cvmx_mio_boot_dma_int_enx_s cn66xx; - struct cvmx_mio_boot_dma_int_enx_s cn68xx; - struct cvmx_mio_boot_dma_int_enx_s cn68xxp1; - struct cvmx_mio_boot_dma_int_enx_s cnf71xx; }; union cvmx_mio_boot_dma_timx { @@ -463,17 +410,6 @@ union cvmx_mio_boot_dma_timx { uint64_t dmack_pi:1; #endif } s; - struct cvmx_mio_boot_dma_timx_s cn52xx; - struct cvmx_mio_boot_dma_timx_s cn52xxp1; - struct cvmx_mio_boot_dma_timx_s cn56xx; - struct cvmx_mio_boot_dma_timx_s cn56xxp1; - struct cvmx_mio_boot_dma_timx_s cn61xx; - struct cvmx_mio_boot_dma_timx_s cn63xx; - struct cvmx_mio_boot_dma_timx_s cn63xxp1; - struct cvmx_mio_boot_dma_timx_s cn66xx; - struct cvmx_mio_boot_dma_timx_s cn68xx; - struct cvmx_mio_boot_dma_timx_s cn68xxp1; - struct cvmx_mio_boot_dma_timx_s cnf71xx; }; union cvmx_mio_boot_err { @@ -489,24 +425,6 @@ union cvmx_mio_boot_err { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_err_s cn30xx; - struct cvmx_mio_boot_err_s cn31xx; - struct cvmx_mio_boot_err_s cn38xx; - struct cvmx_mio_boot_err_s cn38xxp2; - struct cvmx_mio_boot_err_s cn50xx; - struct cvmx_mio_boot_err_s cn52xx; - struct cvmx_mio_boot_err_s cn52xxp1; - struct cvmx_mio_boot_err_s cn56xx; - struct cvmx_mio_boot_err_s cn56xxp1; - struct cvmx_mio_boot_err_s cn58xx; - struct cvmx_mio_boot_err_s cn58xxp1; - struct cvmx_mio_boot_err_s cn61xx; - struct cvmx_mio_boot_err_s cn63xx; - struct cvmx_mio_boot_err_s cn63xxp1; - struct cvmx_mio_boot_err_s cn66xx; - struct cvmx_mio_boot_err_s cn68xx; - struct cvmx_mio_boot_err_s cn68xxp1; - struct cvmx_mio_boot_err_s cnf71xx; }; union cvmx_mio_boot_int { @@ -522,24 +440,6 @@ union cvmx_mio_boot_int { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_boot_int_s cn30xx; - struct cvmx_mio_boot_int_s cn31xx; - struct cvmx_mio_boot_int_s cn38xx; - struct cvmx_mio_boot_int_s cn38xxp2; - struct cvmx_mio_boot_int_s cn50xx; - struct cvmx_mio_boot_int_s cn52xx; - struct cvmx_mio_boot_int_s cn52xxp1; - struct cvmx_mio_boot_int_s cn56xx; - struct cvmx_mio_boot_int_s cn56xxp1; - struct cvmx_mio_boot_int_s cn58xx; - struct cvmx_mio_boot_int_s cn58xxp1; - struct cvmx_mio_boot_int_s cn61xx; - struct cvmx_mio_boot_int_s cn63xx; - struct cvmx_mio_boot_int_s cn63xxp1; - struct cvmx_mio_boot_int_s cn66xx; - struct cvmx_mio_boot_int_s cn68xx; - struct cvmx_mio_boot_int_s cn68xxp1; - struct cvmx_mio_boot_int_s cnf71xx; }; union cvmx_mio_boot_loc_adr { @@ -555,24 +455,6 @@ union cvmx_mio_boot_loc_adr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_boot_loc_adr_s cn30xx; - struct cvmx_mio_boot_loc_adr_s cn31xx; - struct cvmx_mio_boot_loc_adr_s cn38xx; - struct cvmx_mio_boot_loc_adr_s cn38xxp2; - struct cvmx_mio_boot_loc_adr_s cn50xx; - struct cvmx_mio_boot_loc_adr_s cn52xx; - struct cvmx_mio_boot_loc_adr_s cn52xxp1; - struct cvmx_mio_boot_loc_adr_s cn56xx; - struct cvmx_mio_boot_loc_adr_s cn56xxp1; - struct cvmx_mio_boot_loc_adr_s cn58xx; - struct cvmx_mio_boot_loc_adr_s cn58xxp1; - struct cvmx_mio_boot_loc_adr_s cn61xx; - struct cvmx_mio_boot_loc_adr_s cn63xx; - struct cvmx_mio_boot_loc_adr_s cn63xxp1; - struct cvmx_mio_boot_loc_adr_s cn66xx; - struct cvmx_mio_boot_loc_adr_s cn68xx; - struct cvmx_mio_boot_loc_adr_s cn68xxp1; - struct cvmx_mio_boot_loc_adr_s cnf71xx; }; union cvmx_mio_boot_loc_cfgx { @@ -592,24 +474,6 @@ union cvmx_mio_boot_loc_cfgx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_boot_loc_cfgx_s cn30xx; - struct cvmx_mio_boot_loc_cfgx_s cn31xx; - struct cvmx_mio_boot_loc_cfgx_s cn38xx; - struct cvmx_mio_boot_loc_cfgx_s cn38xxp2; - struct cvmx_mio_boot_loc_cfgx_s cn50xx; - struct cvmx_mio_boot_loc_cfgx_s cn52xx; - struct cvmx_mio_boot_loc_cfgx_s cn52xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn56xx; - struct cvmx_mio_boot_loc_cfgx_s cn56xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn58xx; - struct cvmx_mio_boot_loc_cfgx_s cn58xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn61xx; - struct cvmx_mio_boot_loc_cfgx_s cn63xx; - struct cvmx_mio_boot_loc_cfgx_s cn63xxp1; - struct cvmx_mio_boot_loc_cfgx_s cn66xx; - struct cvmx_mio_boot_loc_cfgx_s cn68xx; - struct cvmx_mio_boot_loc_cfgx_s cn68xxp1; - struct cvmx_mio_boot_loc_cfgx_s cnf71xx; }; union cvmx_mio_boot_loc_dat { @@ -621,24 +485,6 @@ union cvmx_mio_boot_loc_dat { uint64_t data:64; #endif } s; - struct cvmx_mio_boot_loc_dat_s cn30xx; - struct cvmx_mio_boot_loc_dat_s cn31xx; - struct cvmx_mio_boot_loc_dat_s cn38xx; - struct cvmx_mio_boot_loc_dat_s cn38xxp2; - struct cvmx_mio_boot_loc_dat_s cn50xx; - struct cvmx_mio_boot_loc_dat_s cn52xx; - struct cvmx_mio_boot_loc_dat_s cn52xxp1; - struct cvmx_mio_boot_loc_dat_s cn56xx; - struct cvmx_mio_boot_loc_dat_s cn56xxp1; - struct cvmx_mio_boot_loc_dat_s cn58xx; - struct cvmx_mio_boot_loc_dat_s cn58xxp1; - struct cvmx_mio_boot_loc_dat_s cn61xx; - struct cvmx_mio_boot_loc_dat_s cn63xx; - struct cvmx_mio_boot_loc_dat_s cn63xxp1; - struct cvmx_mio_boot_loc_dat_s cn66xx; - struct cvmx_mio_boot_loc_dat_s cn68xx; - struct cvmx_mio_boot_loc_dat_s cn68xxp1; - struct cvmx_mio_boot_loc_dat_s cnf71xx; }; union cvmx_mio_boot_pin_defs { @@ -737,12 +583,6 @@ union cvmx_mio_boot_pin_defs { uint64_t reserved_32_63:32; #endif } cn61xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn63xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1; - struct cvmx_mio_boot_pin_defs_cn52xx cn66xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn68xx; - struct cvmx_mio_boot_pin_defs_cn52xx cn68xxp1; - struct cvmx_mio_boot_pin_defs_cn61xx cnf71xx; }; union cvmx_mio_boot_reg_cfgx { @@ -803,7 +643,6 @@ union cvmx_mio_boot_reg_cfgx { uint64_t reserved_37_63:27; #endif } cn30xx; - struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx; struct cvmx_mio_boot_reg_cfgx_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -821,7 +660,6 @@ union cvmx_mio_boot_reg_cfgx { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2; struct cvmx_mio_boot_reg_cfgx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -851,19 +689,6 @@ union cvmx_mio_boot_reg_cfgx { uint64_t reserved_42_63:22; #endif } cn50xx; - struct cvmx_mio_boot_reg_cfgx_s cn52xx; - struct cvmx_mio_boot_reg_cfgx_s cn52xxp1; - struct cvmx_mio_boot_reg_cfgx_s cn56xx; - struct cvmx_mio_boot_reg_cfgx_s cn56xxp1; - struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xx; - struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xxp1; - struct cvmx_mio_boot_reg_cfgx_s cn61xx; - struct cvmx_mio_boot_reg_cfgx_s cn63xx; - struct cvmx_mio_boot_reg_cfgx_s cn63xxp1; - struct cvmx_mio_boot_reg_cfgx_s cn66xx; - struct cvmx_mio_boot_reg_cfgx_s cn68xx; - struct cvmx_mio_boot_reg_cfgx_s cn68xxp1; - struct cvmx_mio_boot_reg_cfgx_s cnf71xx; }; union cvmx_mio_boot_reg_timx { @@ -899,8 +724,6 @@ union cvmx_mio_boot_reg_timx { uint64_t pagem:1; #endif } s; - struct cvmx_mio_boot_reg_timx_s cn30xx; - struct cvmx_mio_boot_reg_timx_s cn31xx; struct cvmx_mio_boot_reg_timx_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t pagem:1; @@ -932,21 +755,6 @@ union cvmx_mio_boot_reg_timx { uint64_t pagem:1; #endif } cn38xx; - struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2; - struct cvmx_mio_boot_reg_timx_s cn50xx; - struct cvmx_mio_boot_reg_timx_s cn52xx; - struct cvmx_mio_boot_reg_timx_s cn52xxp1; - struct cvmx_mio_boot_reg_timx_s cn56xx; - struct cvmx_mio_boot_reg_timx_s cn56xxp1; - struct cvmx_mio_boot_reg_timx_s cn58xx; - struct cvmx_mio_boot_reg_timx_s cn58xxp1; - struct cvmx_mio_boot_reg_timx_s cn61xx; - struct cvmx_mio_boot_reg_timx_s cn63xx; - struct cvmx_mio_boot_reg_timx_s cn63xxp1; - struct cvmx_mio_boot_reg_timx_s cn66xx; - struct cvmx_mio_boot_reg_timx_s cn68xx; - struct cvmx_mio_boot_reg_timx_s cn68xxp1; - struct cvmx_mio_boot_reg_timx_s cnf71xx; }; union cvmx_mio_boot_thr { @@ -981,23 +789,6 @@ union cvmx_mio_boot_thr { uint64_t reserved_14_63:50; #endif } cn30xx; - struct cvmx_mio_boot_thr_cn30xx cn31xx; - struct cvmx_mio_boot_thr_cn30xx cn38xx; - struct cvmx_mio_boot_thr_cn30xx cn38xxp2; - struct cvmx_mio_boot_thr_cn30xx cn50xx; - struct cvmx_mio_boot_thr_s cn52xx; - struct cvmx_mio_boot_thr_s cn52xxp1; - struct cvmx_mio_boot_thr_s cn56xx; - struct cvmx_mio_boot_thr_s cn56xxp1; - struct cvmx_mio_boot_thr_cn30xx cn58xx; - struct cvmx_mio_boot_thr_cn30xx cn58xxp1; - struct cvmx_mio_boot_thr_s cn61xx; - struct cvmx_mio_boot_thr_s cn63xx; - struct cvmx_mio_boot_thr_s cn63xxp1; - struct cvmx_mio_boot_thr_s cn66xx; - struct cvmx_mio_boot_thr_s cn68xx; - struct cvmx_mio_boot_thr_s cn68xxp1; - struct cvmx_mio_boot_thr_s cnf71xx; }; union cvmx_mio_emm_buf_dat { @@ -1009,8 +800,6 @@ union cvmx_mio_emm_buf_dat { uint64_t dat:64; #endif } s; - struct cvmx_mio_emm_buf_dat_s cn61xx; - struct cvmx_mio_emm_buf_dat_s cnf71xx; }; union cvmx_mio_emm_buf_idx { @@ -1030,8 +819,6 @@ union cvmx_mio_emm_buf_idx { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_mio_emm_buf_idx_s cn61xx; - struct cvmx_mio_emm_buf_idx_s cnf71xx; }; union cvmx_mio_emm_cfg { @@ -1049,8 +836,6 @@ union cvmx_mio_emm_cfg { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_mio_emm_cfg_s cn61xx; - struct cvmx_mio_emm_cfg_s cnf71xx; }; union cvmx_mio_emm_cmd { @@ -1082,8 +867,6 @@ union cvmx_mio_emm_cmd { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_cmd_s cn61xx; - struct cvmx_mio_emm_cmd_s cnf71xx; }; union cvmx_mio_emm_dma { @@ -1115,8 +898,6 @@ union cvmx_mio_emm_dma { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_dma_s cn61xx; - struct cvmx_mio_emm_dma_s cnf71xx; }; union cvmx_mio_emm_int { @@ -1142,8 +923,6 @@ union cvmx_mio_emm_int { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_emm_int_s cn61xx; - struct cvmx_mio_emm_int_s cnf71xx; }; union cvmx_mio_emm_int_en { @@ -1169,8 +948,6 @@ union cvmx_mio_emm_int_en { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_emm_int_en_s cn61xx; - struct cvmx_mio_emm_int_en_s cnf71xx; }; union cvmx_mio_emm_modex { @@ -1196,8 +973,6 @@ union cvmx_mio_emm_modex { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_mio_emm_modex_s cn61xx; - struct cvmx_mio_emm_modex_s cnf71xx; }; union cvmx_mio_emm_rca { @@ -1211,8 +986,6 @@ union cvmx_mio_emm_rca { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_mio_emm_rca_s cn61xx; - struct cvmx_mio_emm_rca_s cnf71xx; }; union cvmx_mio_emm_rsp_hi { @@ -1224,8 +997,6 @@ union cvmx_mio_emm_rsp_hi { uint64_t dat:64; #endif } s; - struct cvmx_mio_emm_rsp_hi_s cn61xx; - struct cvmx_mio_emm_rsp_hi_s cnf71xx; }; union cvmx_mio_emm_rsp_lo { @@ -1237,8 +1008,6 @@ union cvmx_mio_emm_rsp_lo { uint64_t dat:64; #endif } s; - struct cvmx_mio_emm_rsp_lo_s cn61xx; - struct cvmx_mio_emm_rsp_lo_s cnf71xx; }; union cvmx_mio_emm_rsp_sts { @@ -1298,8 +1067,6 @@ union cvmx_mio_emm_rsp_sts { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_rsp_sts_s cn61xx; - struct cvmx_mio_emm_rsp_sts_s cnf71xx; }; union cvmx_mio_emm_sample { @@ -1317,8 +1084,6 @@ union cvmx_mio_emm_sample { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_mio_emm_sample_s cn61xx; - struct cvmx_mio_emm_sample_s cnf71xx; }; union cvmx_mio_emm_sts_mask { @@ -1332,8 +1097,6 @@ union cvmx_mio_emm_sts_mask { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_emm_sts_mask_s cn61xx; - struct cvmx_mio_emm_sts_mask_s cnf71xx; }; union cvmx_mio_emm_switch { @@ -1371,8 +1134,6 @@ union cvmx_mio_emm_switch { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_mio_emm_switch_s cn61xx; - struct cvmx_mio_emm_switch_s cnf71xx; }; union cvmx_mio_emm_wdog { @@ -1386,8 +1147,6 @@ union cvmx_mio_emm_wdog { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_mio_emm_wdog_s cn61xx; - struct cvmx_mio_emm_wdog_s cnf71xx; }; union cvmx_mio_fus_bnk_datx { @@ -1399,20 +1158,6 @@ union cvmx_mio_fus_bnk_datx { uint64_t dat:64; #endif } s; - struct cvmx_mio_fus_bnk_datx_s cn50xx; - struct cvmx_mio_fus_bnk_datx_s cn52xx; - struct cvmx_mio_fus_bnk_datx_s cn52xxp1; - struct cvmx_mio_fus_bnk_datx_s cn56xx; - struct cvmx_mio_fus_bnk_datx_s cn56xxp1; - struct cvmx_mio_fus_bnk_datx_s cn58xx; - struct cvmx_mio_fus_bnk_datx_s cn58xxp1; - struct cvmx_mio_fus_bnk_datx_s cn61xx; - struct cvmx_mio_fus_bnk_datx_s cn63xx; - struct cvmx_mio_fus_bnk_datx_s cn63xxp1; - struct cvmx_mio_fus_bnk_datx_s cn66xx; - struct cvmx_mio_fus_bnk_datx_s cn68xx; - struct cvmx_mio_fus_bnk_datx_s cn68xxp1; - struct cvmx_mio_fus_bnk_datx_s cnf71xx; }; union cvmx_mio_fus_dat0 { @@ -1426,24 +1171,6 @@ union cvmx_mio_fus_dat0 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_fus_dat0_s cn30xx; - struct cvmx_mio_fus_dat0_s cn31xx; - struct cvmx_mio_fus_dat0_s cn38xx; - struct cvmx_mio_fus_dat0_s cn38xxp2; - struct cvmx_mio_fus_dat0_s cn50xx; - struct cvmx_mio_fus_dat0_s cn52xx; - struct cvmx_mio_fus_dat0_s cn52xxp1; - struct cvmx_mio_fus_dat0_s cn56xx; - struct cvmx_mio_fus_dat0_s cn56xxp1; - struct cvmx_mio_fus_dat0_s cn58xx; - struct cvmx_mio_fus_dat0_s cn58xxp1; - struct cvmx_mio_fus_dat0_s cn61xx; - struct cvmx_mio_fus_dat0_s cn63xx; - struct cvmx_mio_fus_dat0_s cn63xxp1; - struct cvmx_mio_fus_dat0_s cn66xx; - struct cvmx_mio_fus_dat0_s cn68xx; - struct cvmx_mio_fus_dat0_s cn68xxp1; - struct cvmx_mio_fus_dat0_s cnf71xx; }; union cvmx_mio_fus_dat1 { @@ -1457,24 +1184,6 @@ union cvmx_mio_fus_dat1 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_fus_dat1_s cn30xx; - struct cvmx_mio_fus_dat1_s cn31xx; - struct cvmx_mio_fus_dat1_s cn38xx; - struct cvmx_mio_fus_dat1_s cn38xxp2; - struct cvmx_mio_fus_dat1_s cn50xx; - struct cvmx_mio_fus_dat1_s cn52xx; - struct cvmx_mio_fus_dat1_s cn52xxp1; - struct cvmx_mio_fus_dat1_s cn56xx; - struct cvmx_mio_fus_dat1_s cn56xxp1; - struct cvmx_mio_fus_dat1_s cn58xx; - struct cvmx_mio_fus_dat1_s cn58xxp1; - struct cvmx_mio_fus_dat1_s cn61xx; - struct cvmx_mio_fus_dat1_s cn63xx; - struct cvmx_mio_fus_dat1_s cn63xxp1; - struct cvmx_mio_fus_dat1_s cn66xx; - struct cvmx_mio_fus_dat1_s cn68xx; - struct cvmx_mio_fus_dat1_s cn68xxp1; - struct cvmx_mio_fus_dat1_s cnf71xx; }; union cvmx_mio_fus_dat2 { @@ -1591,7 +1300,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_29_63:35; #endif } cn38xx; - struct cvmx_mio_fus_dat2_cn38xx cn38xxp2; struct cvmx_mio_fus_dat2_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_34_63:30; @@ -1654,7 +1362,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_34_63:30; #endif } cn52xx; - struct cvmx_mio_fus_dat2_cn52xx cn52xxp1; struct cvmx_mio_fus_dat2_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_34_63:30; @@ -1686,7 +1393,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_34_63:30; #endif } cn56xx; - struct cvmx_mio_fus_dat2_cn56xx cn56xxp1; struct cvmx_mio_fus_dat2_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_30_63:34; @@ -1710,7 +1416,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_30_63:34; #endif } cn58xx; - struct cvmx_mio_fus_dat2_cn58xx cn58xxp1; struct cvmx_mio_fus_dat2_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -1775,7 +1480,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_35_63:29; #endif } cn63xx; - struct cvmx_mio_fus_dat2_cn63xx cn63xxp1; struct cvmx_mio_fus_dat2_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -1840,7 +1544,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_37_63:27; #endif } cn68xx; - struct cvmx_mio_fus_dat2_cn68xx cn68xxp1; struct cvmx_mio_fus_dat2_cn70xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -1874,7 +1577,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_48_63:16; #endif } cn70xx; - struct cvmx_mio_fus_dat2_cn70xx cn70xxp1; struct cvmx_mio_fus_dat2_cn73xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_59_63:5; @@ -1986,8 +1688,6 @@ union cvmx_mio_fus_dat2 { uint64_t reserved_59_63:5; #endif } cn78xxp2; - struct cvmx_mio_fus_dat2_cn61xx cnf71xx; - struct cvmx_mio_fus_dat2_cn73xx cnf75xx; }; union cvmx_mio_fus_dat3 { @@ -2115,13 +1815,6 @@ union cvmx_mio_fus_dat3 { uint64_t reserved_29_63:35; #endif } cn38xxp2; - struct cvmx_mio_fus_dat3_cn38xx cn50xx; - struct cvmx_mio_fus_dat3_cn38xx cn52xx; - struct cvmx_mio_fus_dat3_cn38xx cn52xxp1; - struct cvmx_mio_fus_dat3_cn38xx cn56xx; - struct cvmx_mio_fus_dat3_cn38xx cn56xxp1; - struct cvmx_mio_fus_dat3_cn38xx cn58xx; - struct cvmx_mio_fus_dat3_cn38xx cn58xxp1; struct cvmx_mio_fus_dat3_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_58_63:6; @@ -2163,11 +1856,6 @@ union cvmx_mio_fus_dat3 { uint64_t reserved_58_63:6; #endif } cn61xx; - struct cvmx_mio_fus_dat3_cn61xx cn63xx; - struct cvmx_mio_fus_dat3_cn61xx cn63xxp1; - struct cvmx_mio_fus_dat3_cn61xx cn66xx; - struct cvmx_mio_fus_dat3_cn61xx cn68xx; - struct cvmx_mio_fus_dat3_cn61xx cn68xxp1; struct cvmx_mio_fus_dat3_cn70xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t ema0:6; @@ -2352,8 +2040,6 @@ union cvmx_mio_fus_dat3 { uint64_t ema0:6; #endif } cn78xx; - struct cvmx_mio_fus_dat3_cn73xx cn78xxp2; - struct cvmx_mio_fus_dat3_cn61xx cnf71xx; struct cvmx_mio_fus_dat3_cnf75xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t ema0:6; @@ -2418,11 +2104,6 @@ union cvmx_mio_fus_ema { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_fus_ema_s cn50xx; - struct cvmx_mio_fus_ema_s cn52xx; - struct cvmx_mio_fus_ema_s cn52xxp1; - struct cvmx_mio_fus_ema_s cn56xx; - struct cvmx_mio_fus_ema_s cn56xxp1; struct cvmx_mio_fus_ema_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -2432,14 +2113,6 @@ union cvmx_mio_fus_ema { uint64_t reserved_2_63:62; #endif } cn58xx; - struct cvmx_mio_fus_ema_cn58xx cn58xxp1; - struct cvmx_mio_fus_ema_s cn61xx; - struct cvmx_mio_fus_ema_s cn63xx; - struct cvmx_mio_fus_ema_s cn63xxp1; - struct cvmx_mio_fus_ema_s cn66xx; - struct cvmx_mio_fus_ema_s cn68xx; - struct cvmx_mio_fus_ema_s cn68xxp1; - struct cvmx_mio_fus_ema_s cnf71xx; }; union cvmx_mio_fus_pdf { @@ -2451,19 +2124,6 @@ union cvmx_mio_fus_pdf { uint64_t pdf:64; #endif } s; - struct cvmx_mio_fus_pdf_s cn50xx; - struct cvmx_mio_fus_pdf_s cn52xx; - struct cvmx_mio_fus_pdf_s cn52xxp1; - struct cvmx_mio_fus_pdf_s cn56xx; - struct cvmx_mio_fus_pdf_s cn56xxp1; - struct cvmx_mio_fus_pdf_s cn58xx; - struct cvmx_mio_fus_pdf_s cn61xx; - struct cvmx_mio_fus_pdf_s cn63xx; - struct cvmx_mio_fus_pdf_s cn63xxp1; - struct cvmx_mio_fus_pdf_s cn66xx; - struct cvmx_mio_fus_pdf_s cn68xx; - struct cvmx_mio_fus_pdf_s cn68xxp1; - struct cvmx_mio_fus_pdf_s cnf71xx; }; union cvmx_mio_fus_pll { @@ -2504,12 +2164,6 @@ union cvmx_mio_fus_pll { uint64_t reserved_2_63:62; #endif } cn50xx; - struct cvmx_mio_fus_pll_cn50xx cn52xx; - struct cvmx_mio_fus_pll_cn50xx cn52xxp1; - struct cvmx_mio_fus_pll_cn50xx cn56xx; - struct cvmx_mio_fus_pll_cn50xx cn56xxp1; - struct cvmx_mio_fus_pll_cn50xx cn58xx; - struct cvmx_mio_fus_pll_cn50xx cn58xxp1; struct cvmx_mio_fus_pll_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63:56; @@ -2529,12 +2183,6 @@ union cvmx_mio_fus_pll { uint64_t reserved_8_63:56; #endif } cn61xx; - struct cvmx_mio_fus_pll_cn61xx cn63xx; - struct cvmx_mio_fus_pll_cn61xx cn63xxp1; - struct cvmx_mio_fus_pll_cn61xx cn66xx; - struct cvmx_mio_fus_pll_s cn68xx; - struct cvmx_mio_fus_pll_s cn68xxp1; - struct cvmx_mio_fus_pll_cn61xx cnf71xx; }; union cvmx_mio_fus_prog { @@ -2559,23 +2207,6 @@ union cvmx_mio_fus_prog { uint64_t reserved_1_63:63; #endif } cn30xx; - struct cvmx_mio_fus_prog_cn30xx cn31xx; - struct cvmx_mio_fus_prog_cn30xx cn38xx; - struct cvmx_mio_fus_prog_cn30xx cn38xxp2; - struct cvmx_mio_fus_prog_cn30xx cn50xx; - struct cvmx_mio_fus_prog_cn30xx cn52xx; - struct cvmx_mio_fus_prog_cn30xx cn52xxp1; - struct cvmx_mio_fus_prog_cn30xx cn56xx; - struct cvmx_mio_fus_prog_cn30xx cn56xxp1; - struct cvmx_mio_fus_prog_cn30xx cn58xx; - struct cvmx_mio_fus_prog_cn30xx cn58xxp1; - struct cvmx_mio_fus_prog_s cn61xx; - struct cvmx_mio_fus_prog_s cn63xx; - struct cvmx_mio_fus_prog_s cn63xxp1; - struct cvmx_mio_fus_prog_s cn66xx; - struct cvmx_mio_fus_prog_s cn68xx; - struct cvmx_mio_fus_prog_s cn68xxp1; - struct cvmx_mio_fus_prog_s cnf71xx; }; union cvmx_mio_fus_prog_times { @@ -2614,12 +2245,6 @@ union cvmx_mio_fus_prog_times { uint64_t reserved_33_63:31; #endif } cn50xx; - struct cvmx_mio_fus_prog_times_cn50xx cn52xx; - struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1; - struct cvmx_mio_fus_prog_times_cn50xx cn56xx; - struct cvmx_mio_fus_prog_times_cn50xx cn56xxp1; - struct cvmx_mio_fus_prog_times_cn50xx cn58xx; - struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1; struct cvmx_mio_fus_prog_times_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_35_63:29; @@ -2641,12 +2266,6 @@ union cvmx_mio_fus_prog_times { uint64_t reserved_35_63:29; #endif } cn61xx; - struct cvmx_mio_fus_prog_times_cn61xx cn63xx; - struct cvmx_mio_fus_prog_times_cn61xx cn63xxp1; - struct cvmx_mio_fus_prog_times_cn61xx cn66xx; - struct cvmx_mio_fus_prog_times_cn61xx cn68xx; - struct cvmx_mio_fus_prog_times_cn61xx cn68xxp1; - struct cvmx_mio_fus_prog_times_cn61xx cnf71xx; }; union cvmx_mio_fus_rcmd { @@ -2691,23 +2310,6 @@ union cvmx_mio_fus_rcmd { uint64_t reserved_24_63:40; #endif } cn30xx; - struct cvmx_mio_fus_rcmd_cn30xx cn31xx; - struct cvmx_mio_fus_rcmd_cn30xx cn38xx; - struct cvmx_mio_fus_rcmd_cn30xx cn38xxp2; - struct cvmx_mio_fus_rcmd_cn30xx cn50xx; - struct cvmx_mio_fus_rcmd_s cn52xx; - struct cvmx_mio_fus_rcmd_s cn52xxp1; - struct cvmx_mio_fus_rcmd_s cn56xx; - struct cvmx_mio_fus_rcmd_s cn56xxp1; - struct cvmx_mio_fus_rcmd_cn30xx cn58xx; - struct cvmx_mio_fus_rcmd_cn30xx cn58xxp1; - struct cvmx_mio_fus_rcmd_s cn61xx; - struct cvmx_mio_fus_rcmd_s cn63xx; - struct cvmx_mio_fus_rcmd_s cn63xxp1; - struct cvmx_mio_fus_rcmd_s cn66xx; - struct cvmx_mio_fus_rcmd_s cn68xx; - struct cvmx_mio_fus_rcmd_s cn68xxp1; - struct cvmx_mio_fus_rcmd_s cnf71xx; }; union cvmx_mio_fus_read_times { @@ -2729,13 +2331,6 @@ union cvmx_mio_fus_read_times { uint64_t reserved_26_63:38; #endif } s; - struct cvmx_mio_fus_read_times_s cn61xx; - struct cvmx_mio_fus_read_times_s cn63xx; - struct cvmx_mio_fus_read_times_s cn63xxp1; - struct cvmx_mio_fus_read_times_s cn66xx; - struct cvmx_mio_fus_read_times_s cn68xx; - struct cvmx_mio_fus_read_times_s cn68xxp1; - struct cvmx_mio_fus_read_times_s cnf71xx; }; union cvmx_mio_fus_repair_res0 { @@ -2755,13 +2350,6 @@ union cvmx_mio_fus_repair_res0 { uint64_t reserved_55_63:9; #endif } s; - struct cvmx_mio_fus_repair_res0_s cn61xx; - struct cvmx_mio_fus_repair_res0_s cn63xx; - struct cvmx_mio_fus_repair_res0_s cn63xxp1; - struct cvmx_mio_fus_repair_res0_s cn66xx; - struct cvmx_mio_fus_repair_res0_s cn68xx; - struct cvmx_mio_fus_repair_res0_s cn68xxp1; - struct cvmx_mio_fus_repair_res0_s cnf71xx; }; union cvmx_mio_fus_repair_res1 { @@ -2779,13 +2367,6 @@ union cvmx_mio_fus_repair_res1 { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_mio_fus_repair_res1_s cn61xx; - struct cvmx_mio_fus_repair_res1_s cn63xx; - struct cvmx_mio_fus_repair_res1_s cn63xxp1; - struct cvmx_mio_fus_repair_res1_s cn66xx; - struct cvmx_mio_fus_repair_res1_s cn68xx; - struct cvmx_mio_fus_repair_res1_s cn68xxp1; - struct cvmx_mio_fus_repair_res1_s cnf71xx; }; union cvmx_mio_fus_repair_res2 { @@ -2799,13 +2380,6 @@ union cvmx_mio_fus_repair_res2 { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_mio_fus_repair_res2_s cn61xx; - struct cvmx_mio_fus_repair_res2_s cn63xx; - struct cvmx_mio_fus_repair_res2_s cn63xxp1; - struct cvmx_mio_fus_repair_res2_s cn66xx; - struct cvmx_mio_fus_repair_res2_s cn68xx; - struct cvmx_mio_fus_repair_res2_s cn68xxp1; - struct cvmx_mio_fus_repair_res2_s cnf71xx; }; union cvmx_mio_fus_spr_repair_res { @@ -2823,23 +2397,6 @@ union cvmx_mio_fus_spr_repair_res { uint64_t reserved_42_63:22; #endif } s; - struct cvmx_mio_fus_spr_repair_res_s cn30xx; - struct cvmx_mio_fus_spr_repair_res_s cn31xx; - struct cvmx_mio_fus_spr_repair_res_s cn38xx; - struct cvmx_mio_fus_spr_repair_res_s cn50xx; - struct cvmx_mio_fus_spr_repair_res_s cn52xx; - struct cvmx_mio_fus_spr_repair_res_s cn52xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn56xx; - struct cvmx_mio_fus_spr_repair_res_s cn56xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn58xx; - struct cvmx_mio_fus_spr_repair_res_s cn58xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn61xx; - struct cvmx_mio_fus_spr_repair_res_s cn63xx; - struct cvmx_mio_fus_spr_repair_res_s cn63xxp1; - struct cvmx_mio_fus_spr_repair_res_s cn66xx; - struct cvmx_mio_fus_spr_repair_res_s cn68xx; - struct cvmx_mio_fus_spr_repair_res_s cn68xxp1; - struct cvmx_mio_fus_spr_repair_res_s cnf71xx; }; union cvmx_mio_fus_spr_repair_sum { @@ -2853,23 +2410,6 @@ union cvmx_mio_fus_spr_repair_sum { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_fus_spr_repair_sum_s cn30xx; - struct cvmx_mio_fus_spr_repair_sum_s cn31xx; - struct cvmx_mio_fus_spr_repair_sum_s cn38xx; - struct cvmx_mio_fus_spr_repair_sum_s cn50xx; - struct cvmx_mio_fus_spr_repair_sum_s cn52xx; - struct cvmx_mio_fus_spr_repair_sum_s cn52xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn56xx; - struct cvmx_mio_fus_spr_repair_sum_s cn56xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn58xx; - struct cvmx_mio_fus_spr_repair_sum_s cn58xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn61xx; - struct cvmx_mio_fus_spr_repair_sum_s cn63xx; - struct cvmx_mio_fus_spr_repair_sum_s cn63xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cn66xx; - struct cvmx_mio_fus_spr_repair_sum_s cn68xx; - struct cvmx_mio_fus_spr_repair_sum_s cn68xxp1; - struct cvmx_mio_fus_spr_repair_sum_s cnf71xx; }; union cvmx_mio_fus_tgg { @@ -2883,9 +2423,6 @@ union cvmx_mio_fus_tgg { uint64_t val:1; #endif } s; - struct cvmx_mio_fus_tgg_s cn61xx; - struct cvmx_mio_fus_tgg_s cn66xx; - struct cvmx_mio_fus_tgg_s cnf71xx; }; union cvmx_mio_fus_unlock { @@ -2899,8 +2436,6 @@ union cvmx_mio_fus_unlock { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_mio_fus_unlock_s cn30xx; - struct cvmx_mio_fus_unlock_s cn31xx; }; union cvmx_mio_fus_wadr { @@ -2914,10 +2449,6 @@ union cvmx_mio_fus_wadr { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_mio_fus_wadr_s cn30xx; - struct cvmx_mio_fus_wadr_s cn31xx; - struct cvmx_mio_fus_wadr_s cn38xx; - struct cvmx_mio_fus_wadr_s cn38xxp2; struct cvmx_mio_fus_wadr_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -2936,11 +2467,6 @@ union cvmx_mio_fus_wadr { uint64_t reserved_3_63:61; #endif } cn52xx; - struct cvmx_mio_fus_wadr_cn52xx cn52xxp1; - struct cvmx_mio_fus_wadr_cn52xx cn56xx; - struct cvmx_mio_fus_wadr_cn52xx cn56xxp1; - struct cvmx_mio_fus_wadr_cn50xx cn58xx; - struct cvmx_mio_fus_wadr_cn50xx cn58xxp1; struct cvmx_mio_fus_wadr_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_4_63:60; @@ -2950,12 +2476,6 @@ union cvmx_mio_fus_wadr { uint64_t reserved_4_63:60; #endif } cn61xx; - struct cvmx_mio_fus_wadr_cn61xx cn63xx; - struct cvmx_mio_fus_wadr_cn61xx cn63xxp1; - struct cvmx_mio_fus_wadr_cn61xx cn66xx; - struct cvmx_mio_fus_wadr_cn61xx cn68xx; - struct cvmx_mio_fus_wadr_cn61xx cn68xxp1; - struct cvmx_mio_fus_wadr_cn61xx cnf71xx; }; union cvmx_mio_gpio_comp { @@ -2971,13 +2491,6 @@ union cvmx_mio_gpio_comp { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_mio_gpio_comp_s cn61xx; - struct cvmx_mio_gpio_comp_s cn63xx; - struct cvmx_mio_gpio_comp_s cn63xxp1; - struct cvmx_mio_gpio_comp_s cn66xx; - struct cvmx_mio_gpio_comp_s cn68xx; - struct cvmx_mio_gpio_comp_s cn68xxp1; - struct cvmx_mio_gpio_comp_s cnf71xx; }; union cvmx_mio_ndf_dma_cfg { @@ -3007,14 +2520,6 @@ union cvmx_mio_ndf_dma_cfg { uint64_t en:1; #endif } s; - struct cvmx_mio_ndf_dma_cfg_s cn52xx; - struct cvmx_mio_ndf_dma_cfg_s cn61xx; - struct cvmx_mio_ndf_dma_cfg_s cn63xx; - struct cvmx_mio_ndf_dma_cfg_s cn63xxp1; - struct cvmx_mio_ndf_dma_cfg_s cn66xx; - struct cvmx_mio_ndf_dma_cfg_s cn68xx; - struct cvmx_mio_ndf_dma_cfg_s cn68xxp1; - struct cvmx_mio_ndf_dma_cfg_s cnf71xx; }; union cvmx_mio_ndf_dma_int { @@ -3028,14 +2533,6 @@ union cvmx_mio_ndf_dma_int { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_ndf_dma_int_s cn52xx; - struct cvmx_mio_ndf_dma_int_s cn61xx; - struct cvmx_mio_ndf_dma_int_s cn63xx; - struct cvmx_mio_ndf_dma_int_s cn63xxp1; - struct cvmx_mio_ndf_dma_int_s cn66xx; - struct cvmx_mio_ndf_dma_int_s cn68xx; - struct cvmx_mio_ndf_dma_int_s cn68xxp1; - struct cvmx_mio_ndf_dma_int_s cnf71xx; }; union cvmx_mio_ndf_dma_int_en { @@ -3049,14 +2546,6 @@ union cvmx_mio_ndf_dma_int_en { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_ndf_dma_int_en_s cn52xx; - struct cvmx_mio_ndf_dma_int_en_s cn61xx; - struct cvmx_mio_ndf_dma_int_en_s cn63xx; - struct cvmx_mio_ndf_dma_int_en_s cn63xxp1; - struct cvmx_mio_ndf_dma_int_en_s cn66xx; - struct cvmx_mio_ndf_dma_int_en_s cn68xx; - struct cvmx_mio_ndf_dma_int_en_s cn68xxp1; - struct cvmx_mio_ndf_dma_int_en_s cnf71xx; }; union cvmx_mio_pll_ctl { @@ -3070,8 +2559,6 @@ union cvmx_mio_pll_ctl { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_pll_ctl_s cn30xx; - struct cvmx_mio_pll_ctl_s cn31xx; }; union cvmx_mio_pll_setting { @@ -3085,8 +2572,6 @@ union cvmx_mio_pll_setting { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_mio_pll_setting_s cn30xx; - struct cvmx_mio_pll_setting_s cn31xx; }; union cvmx_mio_ptp_ckout_hi_incr { @@ -3100,10 +2585,6 @@ union cvmx_mio_ptp_ckout_hi_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_ckout_hi_incr_s cn61xx; - struct cvmx_mio_ptp_ckout_hi_incr_s cn66xx; - struct cvmx_mio_ptp_ckout_hi_incr_s cn68xx; - struct cvmx_mio_ptp_ckout_hi_incr_s cnf71xx; }; union cvmx_mio_ptp_ckout_lo_incr { @@ -3117,10 +2598,6 @@ union cvmx_mio_ptp_ckout_lo_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_ckout_lo_incr_s cn61xx; - struct cvmx_mio_ptp_ckout_lo_incr_s cn66xx; - struct cvmx_mio_ptp_ckout_lo_incr_s cn68xx; - struct cvmx_mio_ptp_ckout_lo_incr_s cnf71xx; }; union cvmx_mio_ptp_ckout_thresh_hi { @@ -3132,10 +2609,6 @@ union cvmx_mio_ptp_ckout_thresh_hi { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_ckout_thresh_hi_s cn61xx; - struct cvmx_mio_ptp_ckout_thresh_hi_s cn66xx; - struct cvmx_mio_ptp_ckout_thresh_hi_s cn68xx; - struct cvmx_mio_ptp_ckout_thresh_hi_s cnf71xx; }; union cvmx_mio_ptp_ckout_thresh_lo { @@ -3149,10 +2622,6 @@ union cvmx_mio_ptp_ckout_thresh_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_ptp_ckout_thresh_lo_s cn61xx; - struct cvmx_mio_ptp_ckout_thresh_lo_s cn66xx; - struct cvmx_mio_ptp_ckout_thresh_lo_s cn68xx; - struct cvmx_mio_ptp_ckout_thresh_lo_s cnf71xx; }; union cvmx_mio_ptp_clock_cfg { @@ -3202,7 +2671,6 @@ union cvmx_mio_ptp_clock_cfg { uint64_t reserved_42_63:22; #endif } s; - struct cvmx_mio_ptp_clock_cfg_s cn61xx; struct cvmx_mio_ptp_clock_cfg_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -3228,7 +2696,6 @@ union cvmx_mio_ptp_clock_cfg { uint64_t reserved_24_63:40; #endif } cn63xx; - struct cvmx_mio_ptp_clock_cfg_cn63xx cn63xxp1; struct cvmx_mio_ptp_clock_cfg_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_40_63:24; @@ -3270,9 +2737,6 @@ union cvmx_mio_ptp_clock_cfg { uint64_t reserved_40_63:24; #endif } cn66xx; - struct cvmx_mio_ptp_clock_cfg_s cn68xx; - struct cvmx_mio_ptp_clock_cfg_cn63xx cn68xxp1; - struct cvmx_mio_ptp_clock_cfg_s cnf71xx; }; union cvmx_mio_ptp_clock_comp { @@ -3286,13 +2750,6 @@ union cvmx_mio_ptp_clock_comp { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_clock_comp_s cn61xx; - struct cvmx_mio_ptp_clock_comp_s cn63xx; - struct cvmx_mio_ptp_clock_comp_s cn63xxp1; - struct cvmx_mio_ptp_clock_comp_s cn66xx; - struct cvmx_mio_ptp_clock_comp_s cn68xx; - struct cvmx_mio_ptp_clock_comp_s cn68xxp1; - struct cvmx_mio_ptp_clock_comp_s cnf71xx; }; union cvmx_mio_ptp_clock_hi { @@ -3304,13 +2761,6 @@ union cvmx_mio_ptp_clock_hi { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_clock_hi_s cn61xx; - struct cvmx_mio_ptp_clock_hi_s cn63xx; - struct cvmx_mio_ptp_clock_hi_s cn63xxp1; - struct cvmx_mio_ptp_clock_hi_s cn66xx; - struct cvmx_mio_ptp_clock_hi_s cn68xx; - struct cvmx_mio_ptp_clock_hi_s cn68xxp1; - struct cvmx_mio_ptp_clock_hi_s cnf71xx; }; union cvmx_mio_ptp_clock_lo { @@ -3324,13 +2774,6 @@ union cvmx_mio_ptp_clock_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_ptp_clock_lo_s cn61xx; - struct cvmx_mio_ptp_clock_lo_s cn63xx; - struct cvmx_mio_ptp_clock_lo_s cn63xxp1; - struct cvmx_mio_ptp_clock_lo_s cn66xx; - struct cvmx_mio_ptp_clock_lo_s cn68xx; - struct cvmx_mio_ptp_clock_lo_s cn68xxp1; - struct cvmx_mio_ptp_clock_lo_s cnf71xx; }; union cvmx_mio_ptp_evt_cnt { @@ -3342,13 +2785,6 @@ union cvmx_mio_ptp_evt_cnt { uint64_t cntr:64; #endif } s; - struct cvmx_mio_ptp_evt_cnt_s cn61xx; - struct cvmx_mio_ptp_evt_cnt_s cn63xx; - struct cvmx_mio_ptp_evt_cnt_s cn63xxp1; - struct cvmx_mio_ptp_evt_cnt_s cn66xx; - struct cvmx_mio_ptp_evt_cnt_s cn68xx; - struct cvmx_mio_ptp_evt_cnt_s cn68xxp1; - struct cvmx_mio_ptp_evt_cnt_s cnf71xx; }; union cvmx_mio_ptp_phy_1pps_in { @@ -3362,7 +2798,6 @@ union cvmx_mio_ptp_phy_1pps_in { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_ptp_phy_1pps_in_s cnf71xx; }; union cvmx_mio_ptp_pps_hi_incr { @@ -3376,10 +2811,6 @@ union cvmx_mio_ptp_pps_hi_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_pps_hi_incr_s cn61xx; - struct cvmx_mio_ptp_pps_hi_incr_s cn66xx; - struct cvmx_mio_ptp_pps_hi_incr_s cn68xx; - struct cvmx_mio_ptp_pps_hi_incr_s cnf71xx; }; union cvmx_mio_ptp_pps_lo_incr { @@ -3393,10 +2824,6 @@ union cvmx_mio_ptp_pps_lo_incr { uint64_t nanosec:32; #endif } s; - struct cvmx_mio_ptp_pps_lo_incr_s cn61xx; - struct cvmx_mio_ptp_pps_lo_incr_s cn66xx; - struct cvmx_mio_ptp_pps_lo_incr_s cn68xx; - struct cvmx_mio_ptp_pps_lo_incr_s cnf71xx; }; union cvmx_mio_ptp_pps_thresh_hi { @@ -3408,10 +2835,6 @@ union cvmx_mio_ptp_pps_thresh_hi { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_pps_thresh_hi_s cn61xx; - struct cvmx_mio_ptp_pps_thresh_hi_s cn66xx; - struct cvmx_mio_ptp_pps_thresh_hi_s cn68xx; - struct cvmx_mio_ptp_pps_thresh_hi_s cnf71xx; }; union cvmx_mio_ptp_pps_thresh_lo { @@ -3425,10 +2848,6 @@ union cvmx_mio_ptp_pps_thresh_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_ptp_pps_thresh_lo_s cn61xx; - struct cvmx_mio_ptp_pps_thresh_lo_s cn66xx; - struct cvmx_mio_ptp_pps_thresh_lo_s cn68xx; - struct cvmx_mio_ptp_pps_thresh_lo_s cnf71xx; }; union cvmx_mio_ptp_timestamp { @@ -3440,13 +2859,6 @@ union cvmx_mio_ptp_timestamp { uint64_t nanosec:64; #endif } s; - struct cvmx_mio_ptp_timestamp_s cn61xx; - struct cvmx_mio_ptp_timestamp_s cn63xx; - struct cvmx_mio_ptp_timestamp_s cn63xxp1; - struct cvmx_mio_ptp_timestamp_s cn66xx; - struct cvmx_mio_ptp_timestamp_s cn68xx; - struct cvmx_mio_ptp_timestamp_s cn68xxp1; - struct cvmx_mio_ptp_timestamp_s cnf71xx; }; union cvmx_mio_qlmx_cfg { @@ -3511,8 +2923,6 @@ union cvmx_mio_qlmx_cfg { uint64_t reserved_12_63:52; #endif } cn68xx; - struct cvmx_mio_qlmx_cfg_cn68xx cn68xxp1; - struct cvmx_mio_qlmx_cfg_cn61xx cnf71xx; }; union cvmx_mio_rst_boot { @@ -3622,7 +3032,6 @@ union cvmx_mio_rst_boot { uint64_t reserved_36_63:28; #endif } cn63xx; - struct cvmx_mio_rst_boot_cn63xx cn63xxp1; struct cvmx_mio_rst_boot_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t chipkill:1; @@ -3718,7 +3127,6 @@ union cvmx_mio_rst_boot { uint64_t reserved_44_63:20; #endif } cn68xxp1; - struct cvmx_mio_rst_boot_cn61xx cnf71xx; }; union cvmx_mio_rst_cfg { @@ -3751,7 +3159,6 @@ union cvmx_mio_rst_cfg { uint64_t bist_delay:58; #endif } cn61xx; - struct cvmx_mio_rst_cfg_cn61xx cn63xx; struct cvmx_mio_rst_cfg_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t bist_delay:58; @@ -3765,7 +3172,6 @@ union cvmx_mio_rst_cfg { uint64_t bist_delay:58; #endif } cn63xxp1; - struct cvmx_mio_rst_cfg_cn61xx cn66xx; struct cvmx_mio_rst_cfg_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t bist_delay:56; @@ -3781,8 +3187,6 @@ union cvmx_mio_rst_cfg { uint64_t bist_delay:56; #endif } cn68xx; - struct cvmx_mio_rst_cfg_cn68xx cn68xxp1; - struct cvmx_mio_rst_cfg_cn61xx cnf71xx; }; union cvmx_mio_rst_ckill { @@ -3796,9 +3200,6 @@ union cvmx_mio_rst_ckill { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_mio_rst_ckill_s cn61xx; - struct cvmx_mio_rst_ckill_s cn66xx; - struct cvmx_mio_rst_ckill_s cnf71xx; }; union cvmx_mio_rst_cntlx { @@ -3834,7 +3235,6 @@ union cvmx_mio_rst_cntlx { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_mio_rst_cntlx_s cn61xx; struct cvmx_mio_rst_cntlx_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3860,8 +3260,6 @@ union cvmx_mio_rst_cntlx { uint64_t reserved_10_63:54; #endif } cn66xx; - struct cvmx_mio_rst_cntlx_cn66xx cn68xx; - struct cvmx_mio_rst_cntlx_s cnf71xx; }; union cvmx_mio_rst_ctlx { @@ -3897,7 +3295,6 @@ union cvmx_mio_rst_ctlx { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_mio_rst_ctlx_s cn61xx; struct cvmx_mio_rst_ctlx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -3946,10 +3343,6 @@ union cvmx_mio_rst_ctlx { uint64_t reserved_9_63:55; #endif } cn63xxp1; - struct cvmx_mio_rst_ctlx_cn63xx cn66xx; - struct cvmx_mio_rst_ctlx_cn63xx cn68xx; - struct cvmx_mio_rst_ctlx_cn63xx cn68xxp1; - struct cvmx_mio_rst_ctlx_s cnf71xx; }; union cvmx_mio_rst_delay { @@ -3965,13 +3358,6 @@ union cvmx_mio_rst_delay { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_mio_rst_delay_s cn61xx; - struct cvmx_mio_rst_delay_s cn63xx; - struct cvmx_mio_rst_delay_s cn63xxp1; - struct cvmx_mio_rst_delay_s cn66xx; - struct cvmx_mio_rst_delay_s cn68xx; - struct cvmx_mio_rst_delay_s cn68xxp1; - struct cvmx_mio_rst_delay_s cnf71xx; }; union cvmx_mio_rst_int { @@ -4014,12 +3400,6 @@ union cvmx_mio_rst_int { uint64_t reserved_10_63:54; #endif } cn61xx; - struct cvmx_mio_rst_int_cn61xx cn63xx; - struct cvmx_mio_rst_int_cn61xx cn63xxp1; - struct cvmx_mio_rst_int_s cn66xx; - struct cvmx_mio_rst_int_cn61xx cn68xx; - struct cvmx_mio_rst_int_cn61xx cn68xxp1; - struct cvmx_mio_rst_int_cn61xx cnf71xx; }; union cvmx_mio_rst_int_en { @@ -4062,12 +3442,6 @@ union cvmx_mio_rst_int_en { uint64_t reserved_10_63:54; #endif } cn61xx; - struct cvmx_mio_rst_int_en_cn61xx cn63xx; - struct cvmx_mio_rst_int_en_cn61xx cn63xxp1; - struct cvmx_mio_rst_int_en_s cn66xx; - struct cvmx_mio_rst_int_en_cn61xx cn68xx; - struct cvmx_mio_rst_int_en_cn61xx cn68xxp1; - struct cvmx_mio_rst_int_en_cn61xx cnf71xx; }; union cvmx_mio_twsx_int { @@ -4103,9 +3477,6 @@ union cvmx_mio_twsx_int { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_mio_twsx_int_s cn30xx; - struct cvmx_mio_twsx_int_s cn31xx; - struct cvmx_mio_twsx_int_s cn38xx; struct cvmx_mio_twsx_int_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_7_63:57; @@ -4127,20 +3498,6 @@ union cvmx_mio_twsx_int { uint64_t reserved_7_63:57; #endif } cn38xxp2; - struct cvmx_mio_twsx_int_s cn50xx; - struct cvmx_mio_twsx_int_s cn52xx; - struct cvmx_mio_twsx_int_s cn52xxp1; - struct cvmx_mio_twsx_int_s cn56xx; - struct cvmx_mio_twsx_int_s cn56xxp1; - struct cvmx_mio_twsx_int_s cn58xx; - struct cvmx_mio_twsx_int_s cn58xxp1; - struct cvmx_mio_twsx_int_s cn61xx; - struct cvmx_mio_twsx_int_s cn63xx; - struct cvmx_mio_twsx_int_s cn63xxp1; - struct cvmx_mio_twsx_int_s cn66xx; - struct cvmx_mio_twsx_int_s cn68xx; - struct cvmx_mio_twsx_int_s cn68xxp1; - struct cvmx_mio_twsx_int_s cnf71xx; }; union cvmx_mio_twsx_sw_twsi { @@ -4174,24 +3531,6 @@ union cvmx_mio_twsx_sw_twsi { uint64_t v:1; #endif } s; - struct cvmx_mio_twsx_sw_twsi_s cn30xx; - struct cvmx_mio_twsx_sw_twsi_s cn31xx; - struct cvmx_mio_twsx_sw_twsi_s cn38xx; - struct cvmx_mio_twsx_sw_twsi_s cn38xxp2; - struct cvmx_mio_twsx_sw_twsi_s cn50xx; - struct cvmx_mio_twsx_sw_twsi_s cn52xx; - struct cvmx_mio_twsx_sw_twsi_s cn52xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn56xx; - struct cvmx_mio_twsx_sw_twsi_s cn56xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn58xx; - struct cvmx_mio_twsx_sw_twsi_s cn58xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn61xx; - struct cvmx_mio_twsx_sw_twsi_s cn63xx; - struct cvmx_mio_twsx_sw_twsi_s cn63xxp1; - struct cvmx_mio_twsx_sw_twsi_s cn66xx; - struct cvmx_mio_twsx_sw_twsi_s cn68xx; - struct cvmx_mio_twsx_sw_twsi_s cn68xxp1; - struct cvmx_mio_twsx_sw_twsi_s cnf71xx; }; union cvmx_mio_twsx_sw_twsi_ext { @@ -4207,24 +3546,6 @@ union cvmx_mio_twsx_sw_twsi_ext { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn38xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn38xxp2; - struct cvmx_mio_twsx_sw_twsi_ext_s cn50xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn52xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn52xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn56xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn56xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn58xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn58xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn61xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn63xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn63xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cn66xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn68xx; - struct cvmx_mio_twsx_sw_twsi_ext_s cn68xxp1; - struct cvmx_mio_twsx_sw_twsi_ext_s cnf71xx; }; union cvmx_mio_twsx_twsi_sw { @@ -4240,24 +3561,6 @@ union cvmx_mio_twsx_twsi_sw { uint64_t v:2; #endif } s; - struct cvmx_mio_twsx_twsi_sw_s cn30xx; - struct cvmx_mio_twsx_twsi_sw_s cn31xx; - struct cvmx_mio_twsx_twsi_sw_s cn38xx; - struct cvmx_mio_twsx_twsi_sw_s cn38xxp2; - struct cvmx_mio_twsx_twsi_sw_s cn50xx; - struct cvmx_mio_twsx_twsi_sw_s cn52xx; - struct cvmx_mio_twsx_twsi_sw_s cn52xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn56xx; - struct cvmx_mio_twsx_twsi_sw_s cn56xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn58xx; - struct cvmx_mio_twsx_twsi_sw_s cn58xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn61xx; - struct cvmx_mio_twsx_twsi_sw_s cn63xx; - struct cvmx_mio_twsx_twsi_sw_s cn63xxp1; - struct cvmx_mio_twsx_twsi_sw_s cn66xx; - struct cvmx_mio_twsx_twsi_sw_s cn68xx; - struct cvmx_mio_twsx_twsi_sw_s cn68xxp1; - struct cvmx_mio_twsx_twsi_sw_s cnf71xx; }; union cvmx_mio_uartx_dlh { @@ -4271,24 +3574,6 @@ union cvmx_mio_uartx_dlh { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_dlh_s cn30xx; - struct cvmx_mio_uartx_dlh_s cn31xx; - struct cvmx_mio_uartx_dlh_s cn38xx; - struct cvmx_mio_uartx_dlh_s cn38xxp2; - struct cvmx_mio_uartx_dlh_s cn50xx; - struct cvmx_mio_uartx_dlh_s cn52xx; - struct cvmx_mio_uartx_dlh_s cn52xxp1; - struct cvmx_mio_uartx_dlh_s cn56xx; - struct cvmx_mio_uartx_dlh_s cn56xxp1; - struct cvmx_mio_uartx_dlh_s cn58xx; - struct cvmx_mio_uartx_dlh_s cn58xxp1; - struct cvmx_mio_uartx_dlh_s cn61xx; - struct cvmx_mio_uartx_dlh_s cn63xx; - struct cvmx_mio_uartx_dlh_s cn63xxp1; - struct cvmx_mio_uartx_dlh_s cn66xx; - struct cvmx_mio_uartx_dlh_s cn68xx; - struct cvmx_mio_uartx_dlh_s cn68xxp1; - struct cvmx_mio_uartx_dlh_s cnf71xx; }; union cvmx_mio_uartx_dll { @@ -4302,24 +3587,6 @@ union cvmx_mio_uartx_dll { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_dll_s cn30xx; - struct cvmx_mio_uartx_dll_s cn31xx; - struct cvmx_mio_uartx_dll_s cn38xx; - struct cvmx_mio_uartx_dll_s cn38xxp2; - struct cvmx_mio_uartx_dll_s cn50xx; - struct cvmx_mio_uartx_dll_s cn52xx; - struct cvmx_mio_uartx_dll_s cn52xxp1; - struct cvmx_mio_uartx_dll_s cn56xx; - struct cvmx_mio_uartx_dll_s cn56xxp1; - struct cvmx_mio_uartx_dll_s cn58xx; - struct cvmx_mio_uartx_dll_s cn58xxp1; - struct cvmx_mio_uartx_dll_s cn61xx; - struct cvmx_mio_uartx_dll_s cn63xx; - struct cvmx_mio_uartx_dll_s cn63xxp1; - struct cvmx_mio_uartx_dll_s cn66xx; - struct cvmx_mio_uartx_dll_s cn68xx; - struct cvmx_mio_uartx_dll_s cn68xxp1; - struct cvmx_mio_uartx_dll_s cnf71xx; }; union cvmx_mio_uartx_far { @@ -4333,24 +3600,6 @@ union cvmx_mio_uartx_far { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_far_s cn30xx; - struct cvmx_mio_uartx_far_s cn31xx; - struct cvmx_mio_uartx_far_s cn38xx; - struct cvmx_mio_uartx_far_s cn38xxp2; - struct cvmx_mio_uartx_far_s cn50xx; - struct cvmx_mio_uartx_far_s cn52xx; - struct cvmx_mio_uartx_far_s cn52xxp1; - struct cvmx_mio_uartx_far_s cn56xx; - struct cvmx_mio_uartx_far_s cn56xxp1; - struct cvmx_mio_uartx_far_s cn58xx; - struct cvmx_mio_uartx_far_s cn58xxp1; - struct cvmx_mio_uartx_far_s cn61xx; - struct cvmx_mio_uartx_far_s cn63xx; - struct cvmx_mio_uartx_far_s cn63xxp1; - struct cvmx_mio_uartx_far_s cn66xx; - struct cvmx_mio_uartx_far_s cn68xx; - struct cvmx_mio_uartx_far_s cn68xxp1; - struct cvmx_mio_uartx_far_s cnf71xx; }; union cvmx_mio_uartx_fcr { @@ -4374,24 +3623,6 @@ union cvmx_mio_uartx_fcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_fcr_s cn30xx; - struct cvmx_mio_uartx_fcr_s cn31xx; - struct cvmx_mio_uartx_fcr_s cn38xx; - struct cvmx_mio_uartx_fcr_s cn38xxp2; - struct cvmx_mio_uartx_fcr_s cn50xx; - struct cvmx_mio_uartx_fcr_s cn52xx; - struct cvmx_mio_uartx_fcr_s cn52xxp1; - struct cvmx_mio_uartx_fcr_s cn56xx; - struct cvmx_mio_uartx_fcr_s cn56xxp1; - struct cvmx_mio_uartx_fcr_s cn58xx; - struct cvmx_mio_uartx_fcr_s cn58xxp1; - struct cvmx_mio_uartx_fcr_s cn61xx; - struct cvmx_mio_uartx_fcr_s cn63xx; - struct cvmx_mio_uartx_fcr_s cn63xxp1; - struct cvmx_mio_uartx_fcr_s cn66xx; - struct cvmx_mio_uartx_fcr_s cn68xx; - struct cvmx_mio_uartx_fcr_s cn68xxp1; - struct cvmx_mio_uartx_fcr_s cnf71xx; }; union cvmx_mio_uartx_htx { @@ -4405,24 +3636,6 @@ union cvmx_mio_uartx_htx { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_htx_s cn30xx; - struct cvmx_mio_uartx_htx_s cn31xx; - struct cvmx_mio_uartx_htx_s cn38xx; - struct cvmx_mio_uartx_htx_s cn38xxp2; - struct cvmx_mio_uartx_htx_s cn50xx; - struct cvmx_mio_uartx_htx_s cn52xx; - struct cvmx_mio_uartx_htx_s cn52xxp1; - struct cvmx_mio_uartx_htx_s cn56xx; - struct cvmx_mio_uartx_htx_s cn56xxp1; - struct cvmx_mio_uartx_htx_s cn58xx; - struct cvmx_mio_uartx_htx_s cn58xxp1; - struct cvmx_mio_uartx_htx_s cn61xx; - struct cvmx_mio_uartx_htx_s cn63xx; - struct cvmx_mio_uartx_htx_s cn63xxp1; - struct cvmx_mio_uartx_htx_s cn66xx; - struct cvmx_mio_uartx_htx_s cn68xx; - struct cvmx_mio_uartx_htx_s cn68xxp1; - struct cvmx_mio_uartx_htx_s cnf71xx; }; union cvmx_mio_uartx_ier { @@ -4446,24 +3659,6 @@ union cvmx_mio_uartx_ier { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_ier_s cn30xx; - struct cvmx_mio_uartx_ier_s cn31xx; - struct cvmx_mio_uartx_ier_s cn38xx; - struct cvmx_mio_uartx_ier_s cn38xxp2; - struct cvmx_mio_uartx_ier_s cn50xx; - struct cvmx_mio_uartx_ier_s cn52xx; - struct cvmx_mio_uartx_ier_s cn52xxp1; - struct cvmx_mio_uartx_ier_s cn56xx; - struct cvmx_mio_uartx_ier_s cn56xxp1; - struct cvmx_mio_uartx_ier_s cn58xx; - struct cvmx_mio_uartx_ier_s cn58xxp1; - struct cvmx_mio_uartx_ier_s cn61xx; - struct cvmx_mio_uartx_ier_s cn63xx; - struct cvmx_mio_uartx_ier_s cn63xxp1; - struct cvmx_mio_uartx_ier_s cn66xx; - struct cvmx_mio_uartx_ier_s cn68xx; - struct cvmx_mio_uartx_ier_s cn68xxp1; - struct cvmx_mio_uartx_ier_s cnf71xx; }; union cvmx_mio_uartx_iir { @@ -4481,24 +3676,6 @@ union cvmx_mio_uartx_iir { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_iir_s cn30xx; - struct cvmx_mio_uartx_iir_s cn31xx; - struct cvmx_mio_uartx_iir_s cn38xx; - struct cvmx_mio_uartx_iir_s cn38xxp2; - struct cvmx_mio_uartx_iir_s cn50xx; - struct cvmx_mio_uartx_iir_s cn52xx; - struct cvmx_mio_uartx_iir_s cn52xxp1; - struct cvmx_mio_uartx_iir_s cn56xx; - struct cvmx_mio_uartx_iir_s cn56xxp1; - struct cvmx_mio_uartx_iir_s cn58xx; - struct cvmx_mio_uartx_iir_s cn58xxp1; - struct cvmx_mio_uartx_iir_s cn61xx; - struct cvmx_mio_uartx_iir_s cn63xx; - struct cvmx_mio_uartx_iir_s cn63xxp1; - struct cvmx_mio_uartx_iir_s cn66xx; - struct cvmx_mio_uartx_iir_s cn68xx; - struct cvmx_mio_uartx_iir_s cn68xxp1; - struct cvmx_mio_uartx_iir_s cnf71xx; }; union cvmx_mio_uartx_lcr { @@ -4524,24 +3701,6 @@ union cvmx_mio_uartx_lcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_lcr_s cn30xx; - struct cvmx_mio_uartx_lcr_s cn31xx; - struct cvmx_mio_uartx_lcr_s cn38xx; - struct cvmx_mio_uartx_lcr_s cn38xxp2; - struct cvmx_mio_uartx_lcr_s cn50xx; - struct cvmx_mio_uartx_lcr_s cn52xx; - struct cvmx_mio_uartx_lcr_s cn52xxp1; - struct cvmx_mio_uartx_lcr_s cn56xx; - struct cvmx_mio_uartx_lcr_s cn56xxp1; - struct cvmx_mio_uartx_lcr_s cn58xx; - struct cvmx_mio_uartx_lcr_s cn58xxp1; - struct cvmx_mio_uartx_lcr_s cn61xx; - struct cvmx_mio_uartx_lcr_s cn63xx; - struct cvmx_mio_uartx_lcr_s cn63xxp1; - struct cvmx_mio_uartx_lcr_s cn66xx; - struct cvmx_mio_uartx_lcr_s cn68xx; - struct cvmx_mio_uartx_lcr_s cn68xxp1; - struct cvmx_mio_uartx_lcr_s cnf71xx; }; union cvmx_mio_uartx_lsr { @@ -4569,24 +3728,6 @@ union cvmx_mio_uartx_lsr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_lsr_s cn30xx; - struct cvmx_mio_uartx_lsr_s cn31xx; - struct cvmx_mio_uartx_lsr_s cn38xx; - struct cvmx_mio_uartx_lsr_s cn38xxp2; - struct cvmx_mio_uartx_lsr_s cn50xx; - struct cvmx_mio_uartx_lsr_s cn52xx; - struct cvmx_mio_uartx_lsr_s cn52xxp1; - struct cvmx_mio_uartx_lsr_s cn56xx; - struct cvmx_mio_uartx_lsr_s cn56xxp1; - struct cvmx_mio_uartx_lsr_s cn58xx; - struct cvmx_mio_uartx_lsr_s cn58xxp1; - struct cvmx_mio_uartx_lsr_s cn61xx; - struct cvmx_mio_uartx_lsr_s cn63xx; - struct cvmx_mio_uartx_lsr_s cn63xxp1; - struct cvmx_mio_uartx_lsr_s cn66xx; - struct cvmx_mio_uartx_lsr_s cn68xx; - struct cvmx_mio_uartx_lsr_s cn68xxp1; - struct cvmx_mio_uartx_lsr_s cnf71xx; }; union cvmx_mio_uartx_mcr { @@ -4610,24 +3751,6 @@ union cvmx_mio_uartx_mcr { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_mio_uartx_mcr_s cn30xx; - struct cvmx_mio_uartx_mcr_s cn31xx; - struct cvmx_mio_uartx_mcr_s cn38xx; - struct cvmx_mio_uartx_mcr_s cn38xxp2; - struct cvmx_mio_uartx_mcr_s cn50xx; - struct cvmx_mio_uartx_mcr_s cn52xx; - struct cvmx_mio_uartx_mcr_s cn52xxp1; - struct cvmx_mio_uartx_mcr_s cn56xx; - struct cvmx_mio_uartx_mcr_s cn56xxp1; - struct cvmx_mio_uartx_mcr_s cn58xx; - struct cvmx_mio_uartx_mcr_s cn58xxp1; - struct cvmx_mio_uartx_mcr_s cn61xx; - struct cvmx_mio_uartx_mcr_s cn63xx; - struct cvmx_mio_uartx_mcr_s cn63xxp1; - struct cvmx_mio_uartx_mcr_s cn66xx; - struct cvmx_mio_uartx_mcr_s cn68xx; - struct cvmx_mio_uartx_mcr_s cn68xxp1; - struct cvmx_mio_uartx_mcr_s cnf71xx; }; union cvmx_mio_uartx_msr { @@ -4655,24 +3778,6 @@ union cvmx_mio_uartx_msr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_msr_s cn30xx; - struct cvmx_mio_uartx_msr_s cn31xx; - struct cvmx_mio_uartx_msr_s cn38xx; - struct cvmx_mio_uartx_msr_s cn38xxp2; - struct cvmx_mio_uartx_msr_s cn50xx; - struct cvmx_mio_uartx_msr_s cn52xx; - struct cvmx_mio_uartx_msr_s cn52xxp1; - struct cvmx_mio_uartx_msr_s cn56xx; - struct cvmx_mio_uartx_msr_s cn56xxp1; - struct cvmx_mio_uartx_msr_s cn58xx; - struct cvmx_mio_uartx_msr_s cn58xxp1; - struct cvmx_mio_uartx_msr_s cn61xx; - struct cvmx_mio_uartx_msr_s cn63xx; - struct cvmx_mio_uartx_msr_s cn63xxp1; - struct cvmx_mio_uartx_msr_s cn66xx; - struct cvmx_mio_uartx_msr_s cn68xx; - struct cvmx_mio_uartx_msr_s cn68xxp1; - struct cvmx_mio_uartx_msr_s cnf71xx; }; union cvmx_mio_uartx_rbr { @@ -4686,24 +3791,6 @@ union cvmx_mio_uartx_rbr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_rbr_s cn30xx; - struct cvmx_mio_uartx_rbr_s cn31xx; - struct cvmx_mio_uartx_rbr_s cn38xx; - struct cvmx_mio_uartx_rbr_s cn38xxp2; - struct cvmx_mio_uartx_rbr_s cn50xx; - struct cvmx_mio_uartx_rbr_s cn52xx; - struct cvmx_mio_uartx_rbr_s cn52xxp1; - struct cvmx_mio_uartx_rbr_s cn56xx; - struct cvmx_mio_uartx_rbr_s cn56xxp1; - struct cvmx_mio_uartx_rbr_s cn58xx; - struct cvmx_mio_uartx_rbr_s cn58xxp1; - struct cvmx_mio_uartx_rbr_s cn61xx; - struct cvmx_mio_uartx_rbr_s cn63xx; - struct cvmx_mio_uartx_rbr_s cn63xxp1; - struct cvmx_mio_uartx_rbr_s cn66xx; - struct cvmx_mio_uartx_rbr_s cn68xx; - struct cvmx_mio_uartx_rbr_s cn68xxp1; - struct cvmx_mio_uartx_rbr_s cnf71xx; }; union cvmx_mio_uartx_rfl { @@ -4717,24 +3804,6 @@ union cvmx_mio_uartx_rfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uartx_rfl_s cn30xx; - struct cvmx_mio_uartx_rfl_s cn31xx; - struct cvmx_mio_uartx_rfl_s cn38xx; - struct cvmx_mio_uartx_rfl_s cn38xxp2; - struct cvmx_mio_uartx_rfl_s cn50xx; - struct cvmx_mio_uartx_rfl_s cn52xx; - struct cvmx_mio_uartx_rfl_s cn52xxp1; - struct cvmx_mio_uartx_rfl_s cn56xx; - struct cvmx_mio_uartx_rfl_s cn56xxp1; - struct cvmx_mio_uartx_rfl_s cn58xx; - struct cvmx_mio_uartx_rfl_s cn58xxp1; - struct cvmx_mio_uartx_rfl_s cn61xx; - struct cvmx_mio_uartx_rfl_s cn63xx; - struct cvmx_mio_uartx_rfl_s cn63xxp1; - struct cvmx_mio_uartx_rfl_s cn66xx; - struct cvmx_mio_uartx_rfl_s cn68xx; - struct cvmx_mio_uartx_rfl_s cn68xxp1; - struct cvmx_mio_uartx_rfl_s cnf71xx; }; union cvmx_mio_uartx_rfw { @@ -4752,24 +3821,6 @@ union cvmx_mio_uartx_rfw { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_mio_uartx_rfw_s cn30xx; - struct cvmx_mio_uartx_rfw_s cn31xx; - struct cvmx_mio_uartx_rfw_s cn38xx; - struct cvmx_mio_uartx_rfw_s cn38xxp2; - struct cvmx_mio_uartx_rfw_s cn50xx; - struct cvmx_mio_uartx_rfw_s cn52xx; - struct cvmx_mio_uartx_rfw_s cn52xxp1; - struct cvmx_mio_uartx_rfw_s cn56xx; - struct cvmx_mio_uartx_rfw_s cn56xxp1; - struct cvmx_mio_uartx_rfw_s cn58xx; - struct cvmx_mio_uartx_rfw_s cn58xxp1; - struct cvmx_mio_uartx_rfw_s cn61xx; - struct cvmx_mio_uartx_rfw_s cn63xx; - struct cvmx_mio_uartx_rfw_s cn63xxp1; - struct cvmx_mio_uartx_rfw_s cn66xx; - struct cvmx_mio_uartx_rfw_s cn68xx; - struct cvmx_mio_uartx_rfw_s cn68xxp1; - struct cvmx_mio_uartx_rfw_s cnf71xx; }; union cvmx_mio_uartx_sbcr { @@ -4783,24 +3834,6 @@ union cvmx_mio_uartx_sbcr { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_sbcr_s cn30xx; - struct cvmx_mio_uartx_sbcr_s cn31xx; - struct cvmx_mio_uartx_sbcr_s cn38xx; - struct cvmx_mio_uartx_sbcr_s cn38xxp2; - struct cvmx_mio_uartx_sbcr_s cn50xx; - struct cvmx_mio_uartx_sbcr_s cn52xx; - struct cvmx_mio_uartx_sbcr_s cn52xxp1; - struct cvmx_mio_uartx_sbcr_s cn56xx; - struct cvmx_mio_uartx_sbcr_s cn56xxp1; - struct cvmx_mio_uartx_sbcr_s cn58xx; - struct cvmx_mio_uartx_sbcr_s cn58xxp1; - struct cvmx_mio_uartx_sbcr_s cn61xx; - struct cvmx_mio_uartx_sbcr_s cn63xx; - struct cvmx_mio_uartx_sbcr_s cn63xxp1; - struct cvmx_mio_uartx_sbcr_s cn66xx; - struct cvmx_mio_uartx_sbcr_s cn68xx; - struct cvmx_mio_uartx_sbcr_s cn68xxp1; - struct cvmx_mio_uartx_sbcr_s cnf71xx; }; union cvmx_mio_uartx_scr { @@ -4814,24 +3847,6 @@ union cvmx_mio_uartx_scr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_scr_s cn30xx; - struct cvmx_mio_uartx_scr_s cn31xx; - struct cvmx_mio_uartx_scr_s cn38xx; - struct cvmx_mio_uartx_scr_s cn38xxp2; - struct cvmx_mio_uartx_scr_s cn50xx; - struct cvmx_mio_uartx_scr_s cn52xx; - struct cvmx_mio_uartx_scr_s cn52xxp1; - struct cvmx_mio_uartx_scr_s cn56xx; - struct cvmx_mio_uartx_scr_s cn56xxp1; - struct cvmx_mio_uartx_scr_s cn58xx; - struct cvmx_mio_uartx_scr_s cn58xxp1; - struct cvmx_mio_uartx_scr_s cn61xx; - struct cvmx_mio_uartx_scr_s cn63xx; - struct cvmx_mio_uartx_scr_s cn63xxp1; - struct cvmx_mio_uartx_scr_s cn66xx; - struct cvmx_mio_uartx_scr_s cn68xx; - struct cvmx_mio_uartx_scr_s cn68xxp1; - struct cvmx_mio_uartx_scr_s cnf71xx; }; union cvmx_mio_uartx_sfe { @@ -4845,24 +3860,6 @@ union cvmx_mio_uartx_sfe { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_sfe_s cn30xx; - struct cvmx_mio_uartx_sfe_s cn31xx; - struct cvmx_mio_uartx_sfe_s cn38xx; - struct cvmx_mio_uartx_sfe_s cn38xxp2; - struct cvmx_mio_uartx_sfe_s cn50xx; - struct cvmx_mio_uartx_sfe_s cn52xx; - struct cvmx_mio_uartx_sfe_s cn52xxp1; - struct cvmx_mio_uartx_sfe_s cn56xx; - struct cvmx_mio_uartx_sfe_s cn56xxp1; - struct cvmx_mio_uartx_sfe_s cn58xx; - struct cvmx_mio_uartx_sfe_s cn58xxp1; - struct cvmx_mio_uartx_sfe_s cn61xx; - struct cvmx_mio_uartx_sfe_s cn63xx; - struct cvmx_mio_uartx_sfe_s cn63xxp1; - struct cvmx_mio_uartx_sfe_s cn66xx; - struct cvmx_mio_uartx_sfe_s cn68xx; - struct cvmx_mio_uartx_sfe_s cn68xxp1; - struct cvmx_mio_uartx_sfe_s cnf71xx; }; union cvmx_mio_uartx_srr { @@ -4880,24 +3877,6 @@ union cvmx_mio_uartx_srr { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_mio_uartx_srr_s cn30xx; - struct cvmx_mio_uartx_srr_s cn31xx; - struct cvmx_mio_uartx_srr_s cn38xx; - struct cvmx_mio_uartx_srr_s cn38xxp2; - struct cvmx_mio_uartx_srr_s cn50xx; - struct cvmx_mio_uartx_srr_s cn52xx; - struct cvmx_mio_uartx_srr_s cn52xxp1; - struct cvmx_mio_uartx_srr_s cn56xx; - struct cvmx_mio_uartx_srr_s cn56xxp1; - struct cvmx_mio_uartx_srr_s cn58xx; - struct cvmx_mio_uartx_srr_s cn58xxp1; - struct cvmx_mio_uartx_srr_s cn61xx; - struct cvmx_mio_uartx_srr_s cn63xx; - struct cvmx_mio_uartx_srr_s cn63xxp1; - struct cvmx_mio_uartx_srr_s cn66xx; - struct cvmx_mio_uartx_srr_s cn68xx; - struct cvmx_mio_uartx_srr_s cn68xxp1; - struct cvmx_mio_uartx_srr_s cnf71xx; }; union cvmx_mio_uartx_srt { @@ -4911,24 +3890,6 @@ union cvmx_mio_uartx_srt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uartx_srt_s cn30xx; - struct cvmx_mio_uartx_srt_s cn31xx; - struct cvmx_mio_uartx_srt_s cn38xx; - struct cvmx_mio_uartx_srt_s cn38xxp2; - struct cvmx_mio_uartx_srt_s cn50xx; - struct cvmx_mio_uartx_srt_s cn52xx; - struct cvmx_mio_uartx_srt_s cn52xxp1; - struct cvmx_mio_uartx_srt_s cn56xx; - struct cvmx_mio_uartx_srt_s cn56xxp1; - struct cvmx_mio_uartx_srt_s cn58xx; - struct cvmx_mio_uartx_srt_s cn58xxp1; - struct cvmx_mio_uartx_srt_s cn61xx; - struct cvmx_mio_uartx_srt_s cn63xx; - struct cvmx_mio_uartx_srt_s cn63xxp1; - struct cvmx_mio_uartx_srt_s cn66xx; - struct cvmx_mio_uartx_srt_s cn68xx; - struct cvmx_mio_uartx_srt_s cn68xxp1; - struct cvmx_mio_uartx_srt_s cnf71xx; }; union cvmx_mio_uartx_srts { @@ -4942,24 +3903,6 @@ union cvmx_mio_uartx_srts { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uartx_srts_s cn30xx; - struct cvmx_mio_uartx_srts_s cn31xx; - struct cvmx_mio_uartx_srts_s cn38xx; - struct cvmx_mio_uartx_srts_s cn38xxp2; - struct cvmx_mio_uartx_srts_s cn50xx; - struct cvmx_mio_uartx_srts_s cn52xx; - struct cvmx_mio_uartx_srts_s cn52xxp1; - struct cvmx_mio_uartx_srts_s cn56xx; - struct cvmx_mio_uartx_srts_s cn56xxp1; - struct cvmx_mio_uartx_srts_s cn58xx; - struct cvmx_mio_uartx_srts_s cn58xxp1; - struct cvmx_mio_uartx_srts_s cn61xx; - struct cvmx_mio_uartx_srts_s cn63xx; - struct cvmx_mio_uartx_srts_s cn63xxp1; - struct cvmx_mio_uartx_srts_s cn66xx; - struct cvmx_mio_uartx_srts_s cn68xx; - struct cvmx_mio_uartx_srts_s cn68xxp1; - struct cvmx_mio_uartx_srts_s cnf71xx; }; union cvmx_mio_uartx_stt { @@ -4973,24 +3916,6 @@ union cvmx_mio_uartx_stt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uartx_stt_s cn30xx; - struct cvmx_mio_uartx_stt_s cn31xx; - struct cvmx_mio_uartx_stt_s cn38xx; - struct cvmx_mio_uartx_stt_s cn38xxp2; - struct cvmx_mio_uartx_stt_s cn50xx; - struct cvmx_mio_uartx_stt_s cn52xx; - struct cvmx_mio_uartx_stt_s cn52xxp1; - struct cvmx_mio_uartx_stt_s cn56xx; - struct cvmx_mio_uartx_stt_s cn56xxp1; - struct cvmx_mio_uartx_stt_s cn58xx; - struct cvmx_mio_uartx_stt_s cn58xxp1; - struct cvmx_mio_uartx_stt_s cn61xx; - struct cvmx_mio_uartx_stt_s cn63xx; - struct cvmx_mio_uartx_stt_s cn63xxp1; - struct cvmx_mio_uartx_stt_s cn66xx; - struct cvmx_mio_uartx_stt_s cn68xx; - struct cvmx_mio_uartx_stt_s cn68xxp1; - struct cvmx_mio_uartx_stt_s cnf71xx; }; union cvmx_mio_uartx_tfl { @@ -5004,24 +3929,6 @@ union cvmx_mio_uartx_tfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uartx_tfl_s cn30xx; - struct cvmx_mio_uartx_tfl_s cn31xx; - struct cvmx_mio_uartx_tfl_s cn38xx; - struct cvmx_mio_uartx_tfl_s cn38xxp2; - struct cvmx_mio_uartx_tfl_s cn50xx; - struct cvmx_mio_uartx_tfl_s cn52xx; - struct cvmx_mio_uartx_tfl_s cn52xxp1; - struct cvmx_mio_uartx_tfl_s cn56xx; - struct cvmx_mio_uartx_tfl_s cn56xxp1; - struct cvmx_mio_uartx_tfl_s cn58xx; - struct cvmx_mio_uartx_tfl_s cn58xxp1; - struct cvmx_mio_uartx_tfl_s cn61xx; - struct cvmx_mio_uartx_tfl_s cn63xx; - struct cvmx_mio_uartx_tfl_s cn63xxp1; - struct cvmx_mio_uartx_tfl_s cn66xx; - struct cvmx_mio_uartx_tfl_s cn68xx; - struct cvmx_mio_uartx_tfl_s cn68xxp1; - struct cvmx_mio_uartx_tfl_s cnf71xx; }; union cvmx_mio_uartx_tfr { @@ -5035,24 +3942,6 @@ union cvmx_mio_uartx_tfr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_tfr_s cn30xx; - struct cvmx_mio_uartx_tfr_s cn31xx; - struct cvmx_mio_uartx_tfr_s cn38xx; - struct cvmx_mio_uartx_tfr_s cn38xxp2; - struct cvmx_mio_uartx_tfr_s cn50xx; - struct cvmx_mio_uartx_tfr_s cn52xx; - struct cvmx_mio_uartx_tfr_s cn52xxp1; - struct cvmx_mio_uartx_tfr_s cn56xx; - struct cvmx_mio_uartx_tfr_s cn56xxp1; - struct cvmx_mio_uartx_tfr_s cn58xx; - struct cvmx_mio_uartx_tfr_s cn58xxp1; - struct cvmx_mio_uartx_tfr_s cn61xx; - struct cvmx_mio_uartx_tfr_s cn63xx; - struct cvmx_mio_uartx_tfr_s cn63xxp1; - struct cvmx_mio_uartx_tfr_s cn66xx; - struct cvmx_mio_uartx_tfr_s cn68xx; - struct cvmx_mio_uartx_tfr_s cn68xxp1; - struct cvmx_mio_uartx_tfr_s cnf71xx; }; union cvmx_mio_uartx_thr { @@ -5066,24 +3955,6 @@ union cvmx_mio_uartx_thr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uartx_thr_s cn30xx; - struct cvmx_mio_uartx_thr_s cn31xx; - struct cvmx_mio_uartx_thr_s cn38xx; - struct cvmx_mio_uartx_thr_s cn38xxp2; - struct cvmx_mio_uartx_thr_s cn50xx; - struct cvmx_mio_uartx_thr_s cn52xx; - struct cvmx_mio_uartx_thr_s cn52xxp1; - struct cvmx_mio_uartx_thr_s cn56xx; - struct cvmx_mio_uartx_thr_s cn56xxp1; - struct cvmx_mio_uartx_thr_s cn58xx; - struct cvmx_mio_uartx_thr_s cn58xxp1; - struct cvmx_mio_uartx_thr_s cn61xx; - struct cvmx_mio_uartx_thr_s cn63xx; - struct cvmx_mio_uartx_thr_s cn63xxp1; - struct cvmx_mio_uartx_thr_s cn66xx; - struct cvmx_mio_uartx_thr_s cn68xx; - struct cvmx_mio_uartx_thr_s cn68xxp1; - struct cvmx_mio_uartx_thr_s cnf71xx; }; union cvmx_mio_uartx_usr { @@ -5105,24 +3976,6 @@ union cvmx_mio_uartx_usr { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_uartx_usr_s cn30xx; - struct cvmx_mio_uartx_usr_s cn31xx; - struct cvmx_mio_uartx_usr_s cn38xx; - struct cvmx_mio_uartx_usr_s cn38xxp2; - struct cvmx_mio_uartx_usr_s cn50xx; - struct cvmx_mio_uartx_usr_s cn52xx; - struct cvmx_mio_uartx_usr_s cn52xxp1; - struct cvmx_mio_uartx_usr_s cn56xx; - struct cvmx_mio_uartx_usr_s cn56xxp1; - struct cvmx_mio_uartx_usr_s cn58xx; - struct cvmx_mio_uartx_usr_s cn58xxp1; - struct cvmx_mio_uartx_usr_s cn61xx; - struct cvmx_mio_uartx_usr_s cn63xx; - struct cvmx_mio_uartx_usr_s cn63xxp1; - struct cvmx_mio_uartx_usr_s cn66xx; - struct cvmx_mio_uartx_usr_s cn68xx; - struct cvmx_mio_uartx_usr_s cn68xxp1; - struct cvmx_mio_uartx_usr_s cnf71xx; }; union cvmx_mio_uart2_dlh { @@ -5136,8 +3989,6 @@ union cvmx_mio_uart2_dlh { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_dlh_s cn52xx; - struct cvmx_mio_uart2_dlh_s cn52xxp1; }; union cvmx_mio_uart2_dll { @@ -5151,8 +4002,6 @@ union cvmx_mio_uart2_dll { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_dll_s cn52xx; - struct cvmx_mio_uart2_dll_s cn52xxp1; }; union cvmx_mio_uart2_far { @@ -5166,8 +4015,6 @@ union cvmx_mio_uart2_far { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_far_s cn52xx; - struct cvmx_mio_uart2_far_s cn52xxp1; }; union cvmx_mio_uart2_fcr { @@ -5191,8 +4038,6 @@ union cvmx_mio_uart2_fcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_fcr_s cn52xx; - struct cvmx_mio_uart2_fcr_s cn52xxp1; }; union cvmx_mio_uart2_htx { @@ -5206,8 +4051,6 @@ union cvmx_mio_uart2_htx { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_htx_s cn52xx; - struct cvmx_mio_uart2_htx_s cn52xxp1; }; union cvmx_mio_uart2_ier { @@ -5231,8 +4074,6 @@ union cvmx_mio_uart2_ier { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_ier_s cn52xx; - struct cvmx_mio_uart2_ier_s cn52xxp1; }; union cvmx_mio_uart2_iir { @@ -5250,8 +4091,6 @@ union cvmx_mio_uart2_iir { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_iir_s cn52xx; - struct cvmx_mio_uart2_iir_s cn52xxp1; }; union cvmx_mio_uart2_lcr { @@ -5277,8 +4116,6 @@ union cvmx_mio_uart2_lcr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_lcr_s cn52xx; - struct cvmx_mio_uart2_lcr_s cn52xxp1; }; union cvmx_mio_uart2_lsr { @@ -5306,8 +4143,6 @@ union cvmx_mio_uart2_lsr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_lsr_s cn52xx; - struct cvmx_mio_uart2_lsr_s cn52xxp1; }; union cvmx_mio_uart2_mcr { @@ -5331,8 +4166,6 @@ union cvmx_mio_uart2_mcr { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_mio_uart2_mcr_s cn52xx; - struct cvmx_mio_uart2_mcr_s cn52xxp1; }; union cvmx_mio_uart2_msr { @@ -5360,8 +4193,6 @@ union cvmx_mio_uart2_msr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_msr_s cn52xx; - struct cvmx_mio_uart2_msr_s cn52xxp1; }; union cvmx_mio_uart2_rbr { @@ -5375,8 +4206,6 @@ union cvmx_mio_uart2_rbr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_rbr_s cn52xx; - struct cvmx_mio_uart2_rbr_s cn52xxp1; }; union cvmx_mio_uart2_rfl { @@ -5390,8 +4219,6 @@ union cvmx_mio_uart2_rfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uart2_rfl_s cn52xx; - struct cvmx_mio_uart2_rfl_s cn52xxp1; }; union cvmx_mio_uart2_rfw { @@ -5409,8 +4236,6 @@ union cvmx_mio_uart2_rfw { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_mio_uart2_rfw_s cn52xx; - struct cvmx_mio_uart2_rfw_s cn52xxp1; }; union cvmx_mio_uart2_sbcr { @@ -5424,8 +4249,6 @@ union cvmx_mio_uart2_sbcr { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_sbcr_s cn52xx; - struct cvmx_mio_uart2_sbcr_s cn52xxp1; }; union cvmx_mio_uart2_scr { @@ -5439,8 +4262,6 @@ union cvmx_mio_uart2_scr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_scr_s cn52xx; - struct cvmx_mio_uart2_scr_s cn52xxp1; }; union cvmx_mio_uart2_sfe { @@ -5454,8 +4275,6 @@ union cvmx_mio_uart2_sfe { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_sfe_s cn52xx; - struct cvmx_mio_uart2_sfe_s cn52xxp1; }; union cvmx_mio_uart2_srr { @@ -5473,8 +4292,6 @@ union cvmx_mio_uart2_srr { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_mio_uart2_srr_s cn52xx; - struct cvmx_mio_uart2_srr_s cn52xxp1; }; union cvmx_mio_uart2_srt { @@ -5488,8 +4305,6 @@ union cvmx_mio_uart2_srt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uart2_srt_s cn52xx; - struct cvmx_mio_uart2_srt_s cn52xxp1; }; union cvmx_mio_uart2_srts { @@ -5503,8 +4318,6 @@ union cvmx_mio_uart2_srts { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_mio_uart2_srts_s cn52xx; - struct cvmx_mio_uart2_srts_s cn52xxp1; }; union cvmx_mio_uart2_stt { @@ -5518,8 +4331,6 @@ union cvmx_mio_uart2_stt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_mio_uart2_stt_s cn52xx; - struct cvmx_mio_uart2_stt_s cn52xxp1; }; union cvmx_mio_uart2_tfl { @@ -5533,8 +4344,6 @@ union cvmx_mio_uart2_tfl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_mio_uart2_tfl_s cn52xx; - struct cvmx_mio_uart2_tfl_s cn52xxp1; }; union cvmx_mio_uart2_tfr { @@ -5548,8 +4357,6 @@ union cvmx_mio_uart2_tfr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_tfr_s cn52xx; - struct cvmx_mio_uart2_tfr_s cn52xxp1; }; union cvmx_mio_uart2_thr { @@ -5563,8 +4370,6 @@ union cvmx_mio_uart2_thr { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_mio_uart2_thr_s cn52xx; - struct cvmx_mio_uart2_thr_s cn52xxp1; }; union cvmx_mio_uart2_usr { @@ -5586,8 +4391,6 @@ union cvmx_mio_uart2_usr { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_mio_uart2_usr_s cn52xx; - struct cvmx_mio_uart2_usr_s cn52xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h index 3155e6019dc8..cd60d43e809a 100644 --- a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h @@ -80,15 +80,6 @@ union cvmx_mixx_bist { uint64_t reserved_4_63:60; #endif } cn52xx; - struct cvmx_mixx_bist_cn52xx cn52xxp1; - struct cvmx_mixx_bist_cn52xx cn56xx; - struct cvmx_mixx_bist_cn52xx cn56xxp1; - struct cvmx_mixx_bist_s cn61xx; - struct cvmx_mixx_bist_s cn63xx; - struct cvmx_mixx_bist_s cn63xxp1; - struct cvmx_mixx_bist_s cn66xx; - struct cvmx_mixx_bist_s cn68xx; - struct cvmx_mixx_bist_s cn68xxp1; }; union cvmx_mixx_ctl { @@ -137,15 +128,6 @@ union cvmx_mixx_ctl { uint64_t reserved_8_63:56; #endif } cn52xx; - struct cvmx_mixx_ctl_cn52xx cn52xxp1; - struct cvmx_mixx_ctl_cn52xx cn56xx; - struct cvmx_mixx_ctl_cn52xx cn56xxp1; - struct cvmx_mixx_ctl_s cn61xx; - struct cvmx_mixx_ctl_s cn63xx; - struct cvmx_mixx_ctl_s cn63xxp1; - struct cvmx_mixx_ctl_s cn66xx; - struct cvmx_mixx_ctl_s cn68xx; - struct cvmx_mixx_ctl_s cn68xxp1; }; union cvmx_mixx_intena { @@ -194,15 +176,6 @@ union cvmx_mixx_intena { uint64_t reserved_7_63:57; #endif } cn52xx; - struct cvmx_mixx_intena_cn52xx cn52xxp1; - struct cvmx_mixx_intena_cn52xx cn56xx; - struct cvmx_mixx_intena_cn52xx cn56xxp1; - struct cvmx_mixx_intena_s cn61xx; - struct cvmx_mixx_intena_s cn63xx; - struct cvmx_mixx_intena_s cn63xxp1; - struct cvmx_mixx_intena_s cn66xx; - struct cvmx_mixx_intena_s cn68xx; - struct cvmx_mixx_intena_s cn68xxp1; }; union cvmx_mixx_ircnt { @@ -216,16 +189,6 @@ union cvmx_mixx_ircnt { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_mixx_ircnt_s cn52xx; - struct cvmx_mixx_ircnt_s cn52xxp1; - struct cvmx_mixx_ircnt_s cn56xx; - struct cvmx_mixx_ircnt_s cn56xxp1; - struct cvmx_mixx_ircnt_s cn61xx; - struct cvmx_mixx_ircnt_s cn63xx; - struct cvmx_mixx_ircnt_s cn63xxp1; - struct cvmx_mixx_ircnt_s cn66xx; - struct cvmx_mixx_ircnt_s cn68xx; - struct cvmx_mixx_ircnt_s cn68xxp1; }; union cvmx_mixx_irhwm { @@ -241,16 +204,6 @@ union cvmx_mixx_irhwm { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_mixx_irhwm_s cn52xx; - struct cvmx_mixx_irhwm_s cn52xxp1; - struct cvmx_mixx_irhwm_s cn56xx; - struct cvmx_mixx_irhwm_s cn56xxp1; - struct cvmx_mixx_irhwm_s cn61xx; - struct cvmx_mixx_irhwm_s cn63xx; - struct cvmx_mixx_irhwm_s cn63xxp1; - struct cvmx_mixx_irhwm_s cn66xx; - struct cvmx_mixx_irhwm_s cn68xx; - struct cvmx_mixx_irhwm_s cn68xxp1; }; union cvmx_mixx_iring1 { @@ -283,15 +236,6 @@ union cvmx_mixx_iring1 { uint64_t reserved_60_63:4; #endif } cn52xx; - struct cvmx_mixx_iring1_cn52xx cn52xxp1; - struct cvmx_mixx_iring1_cn52xx cn56xx; - struct cvmx_mixx_iring1_cn52xx cn56xxp1; - struct cvmx_mixx_iring1_s cn61xx; - struct cvmx_mixx_iring1_s cn63xx; - struct cvmx_mixx_iring1_s cn63xxp1; - struct cvmx_mixx_iring1_s cn66xx; - struct cvmx_mixx_iring1_s cn68xx; - struct cvmx_mixx_iring1_s cn68xxp1; }; union cvmx_mixx_iring2 { @@ -309,16 +253,6 @@ union cvmx_mixx_iring2 { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_mixx_iring2_s cn52xx; - struct cvmx_mixx_iring2_s cn52xxp1; - struct cvmx_mixx_iring2_s cn56xx; - struct cvmx_mixx_iring2_s cn56xxp1; - struct cvmx_mixx_iring2_s cn61xx; - struct cvmx_mixx_iring2_s cn63xx; - struct cvmx_mixx_iring2_s cn63xxp1; - struct cvmx_mixx_iring2_s cn66xx; - struct cvmx_mixx_iring2_s cn68xx; - struct cvmx_mixx_iring2_s cn68xxp1; }; union cvmx_mixx_isr { @@ -367,15 +301,6 @@ union cvmx_mixx_isr { uint64_t reserved_7_63:57; #endif } cn52xx; - struct cvmx_mixx_isr_cn52xx cn52xxp1; - struct cvmx_mixx_isr_cn52xx cn56xx; - struct cvmx_mixx_isr_cn52xx cn56xxp1; - struct cvmx_mixx_isr_s cn61xx; - struct cvmx_mixx_isr_s cn63xx; - struct cvmx_mixx_isr_s cn63xxp1; - struct cvmx_mixx_isr_s cn66xx; - struct cvmx_mixx_isr_s cn68xx; - struct cvmx_mixx_isr_s cn68xxp1; }; union cvmx_mixx_orcnt { @@ -389,16 +314,6 @@ union cvmx_mixx_orcnt { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_mixx_orcnt_s cn52xx; - struct cvmx_mixx_orcnt_s cn52xxp1; - struct cvmx_mixx_orcnt_s cn56xx; - struct cvmx_mixx_orcnt_s cn56xxp1; - struct cvmx_mixx_orcnt_s cn61xx; - struct cvmx_mixx_orcnt_s cn63xx; - struct cvmx_mixx_orcnt_s cn63xxp1; - struct cvmx_mixx_orcnt_s cn66xx; - struct cvmx_mixx_orcnt_s cn68xx; - struct cvmx_mixx_orcnt_s cn68xxp1; }; union cvmx_mixx_orhwm { @@ -412,16 +327,6 @@ union cvmx_mixx_orhwm { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_mixx_orhwm_s cn52xx; - struct cvmx_mixx_orhwm_s cn52xxp1; - struct cvmx_mixx_orhwm_s cn56xx; - struct cvmx_mixx_orhwm_s cn56xxp1; - struct cvmx_mixx_orhwm_s cn61xx; - struct cvmx_mixx_orhwm_s cn63xx; - struct cvmx_mixx_orhwm_s cn63xxp1; - struct cvmx_mixx_orhwm_s cn66xx; - struct cvmx_mixx_orhwm_s cn68xx; - struct cvmx_mixx_orhwm_s cn68xxp1; }; union cvmx_mixx_oring1 { @@ -454,15 +359,6 @@ union cvmx_mixx_oring1 { uint64_t reserved_60_63:4; #endif } cn52xx; - struct cvmx_mixx_oring1_cn52xx cn52xxp1; - struct cvmx_mixx_oring1_cn52xx cn56xx; - struct cvmx_mixx_oring1_cn52xx cn56xxp1; - struct cvmx_mixx_oring1_s cn61xx; - struct cvmx_mixx_oring1_s cn63xx; - struct cvmx_mixx_oring1_s cn63xxp1; - struct cvmx_mixx_oring1_s cn66xx; - struct cvmx_mixx_oring1_s cn68xx; - struct cvmx_mixx_oring1_s cn68xxp1; }; union cvmx_mixx_oring2 { @@ -480,16 +376,6 @@ union cvmx_mixx_oring2 { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_mixx_oring2_s cn52xx; - struct cvmx_mixx_oring2_s cn52xxp1; - struct cvmx_mixx_oring2_s cn56xx; - struct cvmx_mixx_oring2_s cn56xxp1; - struct cvmx_mixx_oring2_s cn61xx; - struct cvmx_mixx_oring2_s cn63xx; - struct cvmx_mixx_oring2_s cn63xxp1; - struct cvmx_mixx_oring2_s cn66xx; - struct cvmx_mixx_oring2_s cn68xx; - struct cvmx_mixx_oring2_s cn68xxp1; }; union cvmx_mixx_remcnt { @@ -507,16 +393,6 @@ union cvmx_mixx_remcnt { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_mixx_remcnt_s cn52xx; - struct cvmx_mixx_remcnt_s cn52xxp1; - struct cvmx_mixx_remcnt_s cn56xx; - struct cvmx_mixx_remcnt_s cn56xxp1; - struct cvmx_mixx_remcnt_s cn61xx; - struct cvmx_mixx_remcnt_s cn63xx; - struct cvmx_mixx_remcnt_s cn63xxp1; - struct cvmx_mixx_remcnt_s cn66xx; - struct cvmx_mixx_remcnt_s cn68xx; - struct cvmx_mixx_remcnt_s cn68xxp1; }; union cvmx_mixx_tsctl { @@ -538,12 +414,6 @@ union cvmx_mixx_tsctl { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_mixx_tsctl_s cn61xx; - struct cvmx_mixx_tsctl_s cn63xx; - struct cvmx_mixx_tsctl_s cn63xxp1; - struct cvmx_mixx_tsctl_s cn66xx; - struct cvmx_mixx_tsctl_s cn68xx; - struct cvmx_mixx_tsctl_s cn68xxp1; }; union cvmx_mixx_tstamp { @@ -555,12 +425,6 @@ union cvmx_mixx_tstamp { uint64_t tstamp:64; #endif } s; - struct cvmx_mixx_tstamp_s cn61xx; - struct cvmx_mixx_tstamp_s cn63xx; - struct cvmx_mixx_tstamp_s cn63xxp1; - struct cvmx_mixx_tstamp_s cn66xx; - struct cvmx_mixx_tstamp_s cn68xx; - struct cvmx_mixx_tstamp_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-npei-defs.h b/arch/mips/include/asm/octeon/cvmx-npei-defs.h index 58114d414356..6a51b1ef8c9b 100644 --- a/arch/mips/include/asm/octeon/cvmx-npei-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-npei-defs.h @@ -154,10 +154,6 @@ union cvmx_npei_bar1_indexx { uint32_t reserved_18_31:14; #endif } s; - struct cvmx_npei_bar1_indexx_s cn52xx; - struct cvmx_npei_bar1_indexx_s cn52xxp1; - struct cvmx_npei_bar1_indexx_s cn56xx; - struct cvmx_npei_bar1_indexx_s cn56xxp1; }; union cvmx_npei_bist_status { @@ -485,7 +481,6 @@ union cvmx_npei_bist_status { uint64_t reserved_46_63:18; #endif } cn52xxp1; - struct cvmx_npei_bist_status_cn52xx cn56xx; struct cvmx_npei_bist_status_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_58_63:6; @@ -648,8 +643,6 @@ union cvmx_npei_bist_status2 { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_npei_bist_status2_s cn52xx; - struct cvmx_npei_bist_status2_s cn56xx; }; union cvmx_npei_ctl_port0 { @@ -693,10 +686,6 @@ union cvmx_npei_ctl_port0 { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_npei_ctl_port0_s cn52xx; - struct cvmx_npei_ctl_port0_s cn52xxp1; - struct cvmx_npei_ctl_port0_s cn56xx; - struct cvmx_npei_ctl_port0_s cn56xxp1; }; union cvmx_npei_ctl_port1 { @@ -740,10 +729,6 @@ union cvmx_npei_ctl_port1 { uint64_t reserved_21_63:43; #endif } s; - struct cvmx_npei_ctl_port1_s cn52xx; - struct cvmx_npei_ctl_port1_s cn52xxp1; - struct cvmx_npei_ctl_port1_s cn56xx; - struct cvmx_npei_ctl_port1_s cn56xxp1; }; union cvmx_npei_ctl_status { @@ -773,7 +758,6 @@ union cvmx_npei_ctl_status { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npei_ctl_status_s cn52xx; struct cvmx_npei_ctl_status_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_44_63:20; @@ -799,7 +783,6 @@ union cvmx_npei_ctl_status { uint64_t reserved_44_63:20; #endif } cn52xxp1; - struct cvmx_npei_ctl_status_s cn56xx; struct cvmx_npei_ctl_status_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_15_63:49; @@ -848,10 +831,6 @@ union cvmx_npei_ctl_status2 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_ctl_status2_s cn52xx; - struct cvmx_npei_ctl_status2_s cn52xxp1; - struct cvmx_npei_ctl_status2_s cn56xx; - struct cvmx_npei_ctl_status2_s cn56xxp1; }; union cvmx_npei_data_out_cnt { @@ -871,10 +850,6 @@ union cvmx_npei_data_out_cnt { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npei_data_out_cnt_s cn52xx; - struct cvmx_npei_data_out_cnt_s cn52xxp1; - struct cvmx_npei_data_out_cnt_s cn56xx; - struct cvmx_npei_data_out_cnt_s cn56xxp1; }; union cvmx_npei_dbg_data { @@ -919,7 +894,6 @@ union cvmx_npei_dbg_data { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_npei_dbg_data_cn52xx cn52xxp1; struct cvmx_npei_dbg_data_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -941,7 +915,6 @@ union cvmx_npei_dbg_data { uint64_t reserved_29_63:35; #endif } cn56xx; - struct cvmx_npei_dbg_data_cn56xx cn56xxp1; }; union cvmx_npei_dbg_select { @@ -955,10 +928,6 @@ union cvmx_npei_dbg_select { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_dbg_select_s cn52xx; - struct cvmx_npei_dbg_select_s cn52xxp1; - struct cvmx_npei_dbg_select_s cn56xx; - struct cvmx_npei_dbg_select_s cn56xxp1; }; union cvmx_npei_dmax_counts { @@ -974,10 +943,6 @@ union cvmx_npei_dmax_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_npei_dmax_counts_s cn52xx; - struct cvmx_npei_dmax_counts_s cn52xxp1; - struct cvmx_npei_dmax_counts_s cn56xx; - struct cvmx_npei_dmax_counts_s cn56xxp1; }; union cvmx_npei_dmax_dbell { @@ -991,10 +956,6 @@ union cvmx_npei_dmax_dbell { uint32_t reserved_16_31:16; #endif } s; - struct cvmx_npei_dmax_dbell_s cn52xx; - struct cvmx_npei_dmax_dbell_s cn52xxp1; - struct cvmx_npei_dmax_dbell_s cn56xx; - struct cvmx_npei_dmax_dbell_s cn56xxp1; }; union cvmx_npei_dmax_ibuff_saddr { @@ -1012,7 +973,6 @@ union cvmx_npei_dmax_ibuff_saddr { uint64_t reserved_37_63:27; #endif } s; - struct cvmx_npei_dmax_ibuff_saddr_s cn52xx; struct cvmx_npei_dmax_ibuff_saddr_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1024,8 +984,6 @@ union cvmx_npei_dmax_ibuff_saddr { uint64_t reserved_36_63:28; #endif } cn52xxp1; - struct cvmx_npei_dmax_ibuff_saddr_s cn56xx; - struct cvmx_npei_dmax_ibuff_saddr_cn52xxp1 cn56xxp1; }; union cvmx_npei_dmax_naddr { @@ -1039,10 +997,6 @@ union cvmx_npei_dmax_naddr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npei_dmax_naddr_s cn52xx; - struct cvmx_npei_dmax_naddr_s cn52xxp1; - struct cvmx_npei_dmax_naddr_s cn56xx; - struct cvmx_npei_dmax_naddr_s cn56xxp1; }; union cvmx_npei_dma0_int_level { @@ -1056,10 +1010,6 @@ union cvmx_npei_dma0_int_level { uint64_t time:32; #endif } s; - struct cvmx_npei_dma0_int_level_s cn52xx; - struct cvmx_npei_dma0_int_level_s cn52xxp1; - struct cvmx_npei_dma0_int_level_s cn56xx; - struct cvmx_npei_dma0_int_level_s cn56xxp1; }; union cvmx_npei_dma1_int_level { @@ -1073,10 +1023,6 @@ union cvmx_npei_dma1_int_level { uint64_t time:32; #endif } s; - struct cvmx_npei_dma1_int_level_s cn52xx; - struct cvmx_npei_dma1_int_level_s cn52xxp1; - struct cvmx_npei_dma1_int_level_s cn56xx; - struct cvmx_npei_dma1_int_level_s cn56xxp1; }; union cvmx_npei_dma_cnts { @@ -1090,10 +1036,6 @@ union cvmx_npei_dma_cnts { uint64_t dma1:32; #endif } s; - struct cvmx_npei_dma_cnts_s cn52xx; - struct cvmx_npei_dma_cnts_s cn52xxp1; - struct cvmx_npei_dma_cnts_s cn56xx; - struct cvmx_npei_dma_cnts_s cn56xxp1; }; union cvmx_npei_dma_control { @@ -1137,7 +1079,6 @@ union cvmx_npei_dma_control { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npei_dma_control_s cn52xx; struct cvmx_npei_dma_control_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_38_63:26; @@ -1173,7 +1114,6 @@ union cvmx_npei_dma_control { uint64_t reserved_38_63:26; #endif } cn52xxp1; - struct cvmx_npei_dma_control_s cn56xx; struct cvmx_npei_dma_control_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_39_63:25; @@ -1250,8 +1190,6 @@ union cvmx_npei_dma_pcie_req_num { uint64_t dma_arb:1; #endif } s; - struct cvmx_npei_dma_pcie_req_num_s cn52xx; - struct cvmx_npei_dma_pcie_req_num_s cn56xx; }; union cvmx_npei_dma_state1 { @@ -1273,7 +1211,6 @@ union cvmx_npei_dma_state1 { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npei_dma_state1_s cn52xx; }; union cvmx_npei_dma_state1_p1 { @@ -1332,7 +1269,6 @@ union cvmx_npei_dma_state1_p1 { uint64_t reserved_60_63:4; #endif } cn52xxp1; - struct cvmx_npei_dma_state1_p1_s cn56xxp1; }; union cvmx_npei_dma_state2 { @@ -1354,7 +1290,6 @@ union cvmx_npei_dma_state2 { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_npei_dma_state2_s cn52xx; }; union cvmx_npei_dma_state2_p1 { @@ -1393,7 +1328,6 @@ union cvmx_npei_dma_state2_p1 { uint64_t reserved_45_63:19; #endif } cn52xxp1; - struct cvmx_npei_dma_state2_p1_s cn56xxp1; }; union cvmx_npei_dma_state3_p1 { @@ -1413,8 +1347,6 @@ union cvmx_npei_dma_state3_p1 { uint64_t reserved_60_63:4; #endif } s; - struct cvmx_npei_dma_state3_p1_s cn52xxp1; - struct cvmx_npei_dma_state3_p1_s cn56xxp1; }; union cvmx_npei_dma_state4_p1 { @@ -1434,8 +1366,6 @@ union cvmx_npei_dma_state4_p1 { uint64_t reserved_52_63:12; #endif } s; - struct cvmx_npei_dma_state4_p1_s cn52xxp1; - struct cvmx_npei_dma_state4_p1_s cn56xxp1; }; union cvmx_npei_dma_state5_p1 { @@ -1451,7 +1381,6 @@ union cvmx_npei_dma_state5_p1 { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_npei_dma_state5_p1_s cn56xxp1; }; union cvmx_npei_int_a_enb { @@ -1483,7 +1412,6 @@ union cvmx_npei_int_a_enb { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npei_int_a_enb_s cn52xx; struct cvmx_npei_int_a_enb_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -1495,7 +1423,6 @@ union cvmx_npei_int_a_enb { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_npei_int_a_enb_s cn56xx; }; union cvmx_npei_int_a_enb2 { @@ -1527,7 +1454,6 @@ union cvmx_npei_int_a_enb2 { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npei_int_a_enb2_s cn52xx; struct cvmx_npei_int_a_enb2_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -1539,7 +1465,6 @@ union cvmx_npei_int_a_enb2 { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_npei_int_a_enb2_s cn56xx; }; union cvmx_npei_int_a_sum { @@ -1571,7 +1496,6 @@ union cvmx_npei_int_a_sum { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npei_int_a_sum_s cn52xx; struct cvmx_npei_int_a_sum_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -1583,7 +1507,6 @@ union cvmx_npei_int_a_sum { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_npei_int_a_sum_s cn56xx; }; union cvmx_npei_int_enb { @@ -1721,7 +1644,6 @@ union cvmx_npei_int_enb { uint64_t mio_inta:1; #endif } s; - struct cvmx_npei_int_enb_s cn52xx; struct cvmx_npei_int_enb_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -1855,7 +1777,6 @@ union cvmx_npei_int_enb { uint64_t mio_inta:1; #endif } cn52xxp1; - struct cvmx_npei_int_enb_s cn56xx; struct cvmx_npei_int_enb_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -2122,7 +2043,6 @@ union cvmx_npei_int_enb2 { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_npei_int_enb2_s cn52xx; struct cvmx_npei_int_enb2_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_62_63:2; @@ -2254,7 +2174,6 @@ union cvmx_npei_int_enb2 { uint64_t reserved_62_63:2; #endif } cn52xxp1; - struct cvmx_npei_int_enb2_s cn56xx; struct cvmx_npei_int_enb2_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_61_63:3; @@ -2399,9 +2318,6 @@ union cvmx_npei_int_info { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_npei_int_info_s cn52xx; - struct cvmx_npei_int_info_s cn56xx; - struct cvmx_npei_int_info_s cn56xxp1; }; union cvmx_npei_int_sum { @@ -2539,7 +2455,6 @@ union cvmx_npei_int_sum { uint64_t mio_inta:1; #endif } s; - struct cvmx_npei_int_sum_s cn52xx; struct cvmx_npei_int_sum_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -2667,7 +2582,6 @@ union cvmx_npei_int_sum { uint64_t mio_inta:1; #endif } cn52xxp1; - struct cvmx_npei_int_sum_s cn56xx; struct cvmx_npei_int_sum_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t mio_inta:1; @@ -2924,9 +2838,6 @@ union cvmx_npei_int_sum2 { uint64_t mio_inta:1; #endif } s; - struct cvmx_npei_int_sum2_s cn52xx; - struct cvmx_npei_int_sum2_s cn52xxp1; - struct cvmx_npei_int_sum2_s cn56xx; }; union cvmx_npei_last_win_rdata0 { @@ -2938,10 +2849,6 @@ union cvmx_npei_last_win_rdata0 { uint64_t data:64; #endif } s; - struct cvmx_npei_last_win_rdata0_s cn52xx; - struct cvmx_npei_last_win_rdata0_s cn52xxp1; - struct cvmx_npei_last_win_rdata0_s cn56xx; - struct cvmx_npei_last_win_rdata0_s cn56xxp1; }; union cvmx_npei_last_win_rdata1 { @@ -2953,10 +2860,6 @@ union cvmx_npei_last_win_rdata1 { uint64_t data:64; #endif } s; - struct cvmx_npei_last_win_rdata1_s cn52xx; - struct cvmx_npei_last_win_rdata1_s cn52xxp1; - struct cvmx_npei_last_win_rdata1_s cn56xx; - struct cvmx_npei_last_win_rdata1_s cn56xxp1; }; union cvmx_npei_mem_access_ctl { @@ -2972,10 +2875,6 @@ union cvmx_npei_mem_access_ctl { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_npei_mem_access_ctl_s cn52xx; - struct cvmx_npei_mem_access_ctl_s cn52xxp1; - struct cvmx_npei_mem_access_ctl_s cn56xx; - struct cvmx_npei_mem_access_ctl_s cn56xxp1; }; union cvmx_npei_mem_access_subidx { @@ -3007,10 +2906,6 @@ union cvmx_npei_mem_access_subidx { uint64_t reserved_42_63:22; #endif } s; - struct cvmx_npei_mem_access_subidx_s cn52xx; - struct cvmx_npei_mem_access_subidx_s cn52xxp1; - struct cvmx_npei_mem_access_subidx_s cn56xx; - struct cvmx_npei_mem_access_subidx_s cn56xxp1; }; union cvmx_npei_msi_enb0 { @@ -3022,10 +2917,6 @@ union cvmx_npei_msi_enb0 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb0_s cn52xx; - struct cvmx_npei_msi_enb0_s cn52xxp1; - struct cvmx_npei_msi_enb0_s cn56xx; - struct cvmx_npei_msi_enb0_s cn56xxp1; }; union cvmx_npei_msi_enb1 { @@ -3037,10 +2928,6 @@ union cvmx_npei_msi_enb1 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb1_s cn52xx; - struct cvmx_npei_msi_enb1_s cn52xxp1; - struct cvmx_npei_msi_enb1_s cn56xx; - struct cvmx_npei_msi_enb1_s cn56xxp1; }; union cvmx_npei_msi_enb2 { @@ -3052,10 +2939,6 @@ union cvmx_npei_msi_enb2 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb2_s cn52xx; - struct cvmx_npei_msi_enb2_s cn52xxp1; - struct cvmx_npei_msi_enb2_s cn56xx; - struct cvmx_npei_msi_enb2_s cn56xxp1; }; union cvmx_npei_msi_enb3 { @@ -3067,10 +2950,6 @@ union cvmx_npei_msi_enb3 { uint64_t enb:64; #endif } s; - struct cvmx_npei_msi_enb3_s cn52xx; - struct cvmx_npei_msi_enb3_s cn52xxp1; - struct cvmx_npei_msi_enb3_s cn56xx; - struct cvmx_npei_msi_enb3_s cn56xxp1; }; union cvmx_npei_msi_rcv0 { @@ -3082,10 +2961,6 @@ union cvmx_npei_msi_rcv0 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv0_s cn52xx; - struct cvmx_npei_msi_rcv0_s cn52xxp1; - struct cvmx_npei_msi_rcv0_s cn56xx; - struct cvmx_npei_msi_rcv0_s cn56xxp1; }; union cvmx_npei_msi_rcv1 { @@ -3097,10 +2972,6 @@ union cvmx_npei_msi_rcv1 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv1_s cn52xx; - struct cvmx_npei_msi_rcv1_s cn52xxp1; - struct cvmx_npei_msi_rcv1_s cn56xx; - struct cvmx_npei_msi_rcv1_s cn56xxp1; }; union cvmx_npei_msi_rcv2 { @@ -3112,10 +2983,6 @@ union cvmx_npei_msi_rcv2 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv2_s cn52xx; - struct cvmx_npei_msi_rcv2_s cn52xxp1; - struct cvmx_npei_msi_rcv2_s cn56xx; - struct cvmx_npei_msi_rcv2_s cn56xxp1; }; union cvmx_npei_msi_rcv3 { @@ -3127,10 +2994,6 @@ union cvmx_npei_msi_rcv3 { uint64_t intr:64; #endif } s; - struct cvmx_npei_msi_rcv3_s cn52xx; - struct cvmx_npei_msi_rcv3_s cn52xxp1; - struct cvmx_npei_msi_rcv3_s cn56xx; - struct cvmx_npei_msi_rcv3_s cn56xxp1; }; union cvmx_npei_msi_rd_map { @@ -3146,10 +3009,6 @@ union cvmx_npei_msi_rd_map { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_msi_rd_map_s cn52xx; - struct cvmx_npei_msi_rd_map_s cn52xxp1; - struct cvmx_npei_msi_rd_map_s cn56xx; - struct cvmx_npei_msi_rd_map_s cn56xxp1; }; union cvmx_npei_msi_w1c_enb0 { @@ -3161,8 +3020,6 @@ union cvmx_npei_msi_w1c_enb0 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb0_s cn52xx; - struct cvmx_npei_msi_w1c_enb0_s cn56xx; }; union cvmx_npei_msi_w1c_enb1 { @@ -3174,8 +3031,6 @@ union cvmx_npei_msi_w1c_enb1 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb1_s cn52xx; - struct cvmx_npei_msi_w1c_enb1_s cn56xx; }; union cvmx_npei_msi_w1c_enb2 { @@ -3187,8 +3042,6 @@ union cvmx_npei_msi_w1c_enb2 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb2_s cn52xx; - struct cvmx_npei_msi_w1c_enb2_s cn56xx; }; union cvmx_npei_msi_w1c_enb3 { @@ -3200,8 +3053,6 @@ union cvmx_npei_msi_w1c_enb3 { uint64_t clr:64; #endif } s; - struct cvmx_npei_msi_w1c_enb3_s cn52xx; - struct cvmx_npei_msi_w1c_enb3_s cn56xx; }; union cvmx_npei_msi_w1s_enb0 { @@ -3213,8 +3064,6 @@ union cvmx_npei_msi_w1s_enb0 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb0_s cn52xx; - struct cvmx_npei_msi_w1s_enb0_s cn56xx; }; union cvmx_npei_msi_w1s_enb1 { @@ -3226,8 +3075,6 @@ union cvmx_npei_msi_w1s_enb1 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb1_s cn52xx; - struct cvmx_npei_msi_w1s_enb1_s cn56xx; }; union cvmx_npei_msi_w1s_enb2 { @@ -3239,8 +3086,6 @@ union cvmx_npei_msi_w1s_enb2 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb2_s cn52xx; - struct cvmx_npei_msi_w1s_enb2_s cn56xx; }; union cvmx_npei_msi_w1s_enb3 { @@ -3252,8 +3097,6 @@ union cvmx_npei_msi_w1s_enb3 { uint64_t set:64; #endif } s; - struct cvmx_npei_msi_w1s_enb3_s cn52xx; - struct cvmx_npei_msi_w1s_enb3_s cn56xx; }; union cvmx_npei_msi_wr_map { @@ -3269,10 +3112,6 @@ union cvmx_npei_msi_wr_map { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_msi_wr_map_s cn52xx; - struct cvmx_npei_msi_wr_map_s cn52xxp1; - struct cvmx_npei_msi_wr_map_s cn56xx; - struct cvmx_npei_msi_wr_map_s cn56xxp1; }; union cvmx_npei_pcie_credit_cnt { @@ -3296,8 +3135,6 @@ union cvmx_npei_pcie_credit_cnt { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_npei_pcie_credit_cnt_s cn52xx; - struct cvmx_npei_pcie_credit_cnt_s cn56xx; }; union cvmx_npei_pcie_msi_rcv { @@ -3311,10 +3148,6 @@ union cvmx_npei_pcie_msi_rcv { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_npei_pcie_msi_rcv_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_s cn56xxp1; }; union cvmx_npei_pcie_msi_rcv_b1 { @@ -3330,10 +3163,6 @@ union cvmx_npei_pcie_msi_rcv_b1 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npei_pcie_msi_rcv_b1_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_b1_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_b1_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_b1_s cn56xxp1; }; union cvmx_npei_pcie_msi_rcv_b2 { @@ -3349,10 +3178,6 @@ union cvmx_npei_pcie_msi_rcv_b2 { uint64_t reserved_24_63:40; #endif } s; - struct cvmx_npei_pcie_msi_rcv_b2_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_b2_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_b2_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_b2_s cn56xxp1; }; union cvmx_npei_pcie_msi_rcv_b3 { @@ -3368,10 +3193,6 @@ union cvmx_npei_pcie_msi_rcv_b3 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pcie_msi_rcv_b3_s cn52xx; - struct cvmx_npei_pcie_msi_rcv_b3_s cn52xxp1; - struct cvmx_npei_pcie_msi_rcv_b3_s cn56xx; - struct cvmx_npei_pcie_msi_rcv_b3_s cn56xxp1; }; union cvmx_npei_pktx_cnts { @@ -3387,8 +3208,6 @@ union cvmx_npei_pktx_cnts { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_npei_pktx_cnts_s cn52xx; - struct cvmx_npei_pktx_cnts_s cn56xx; }; union cvmx_npei_pktx_in_bp { @@ -3402,8 +3221,6 @@ union cvmx_npei_pktx_in_bp { uint64_t wmark:32; #endif } s; - struct cvmx_npei_pktx_in_bp_s cn52xx; - struct cvmx_npei_pktx_in_bp_s cn56xx; }; union cvmx_npei_pktx_instr_baddr { @@ -3417,8 +3234,6 @@ union cvmx_npei_pktx_instr_baddr { uint64_t addr:61; #endif } s; - struct cvmx_npei_pktx_instr_baddr_s cn52xx; - struct cvmx_npei_pktx_instr_baddr_s cn56xx; }; union cvmx_npei_pktx_instr_baoff_dbell { @@ -3432,8 +3247,6 @@ union cvmx_npei_pktx_instr_baoff_dbell { uint64_t aoff:32; #endif } s; - struct cvmx_npei_pktx_instr_baoff_dbell_s cn52xx; - struct cvmx_npei_pktx_instr_baoff_dbell_s cn56xx; }; union cvmx_npei_pktx_instr_fifo_rsize { @@ -3453,8 +3266,6 @@ union cvmx_npei_pktx_instr_fifo_rsize { uint64_t max:9; #endif } s; - struct cvmx_npei_pktx_instr_fifo_rsize_s cn52xx; - struct cvmx_npei_pktx_instr_fifo_rsize_s cn56xx; }; union cvmx_npei_pktx_instr_header { @@ -3490,8 +3301,6 @@ union cvmx_npei_pktx_instr_header { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npei_pktx_instr_header_s cn52xx; - struct cvmx_npei_pktx_instr_header_s cn56xx; }; union cvmx_npei_pktx_slist_baddr { @@ -3505,8 +3314,6 @@ union cvmx_npei_pktx_slist_baddr { uint64_t addr:60; #endif } s; - struct cvmx_npei_pktx_slist_baddr_s cn52xx; - struct cvmx_npei_pktx_slist_baddr_s cn56xx; }; union cvmx_npei_pktx_slist_baoff_dbell { @@ -3520,8 +3327,6 @@ union cvmx_npei_pktx_slist_baoff_dbell { uint64_t aoff:32; #endif } s; - struct cvmx_npei_pktx_slist_baoff_dbell_s cn52xx; - struct cvmx_npei_pktx_slist_baoff_dbell_s cn56xx; }; union cvmx_npei_pktx_slist_fifo_rsize { @@ -3535,8 +3340,6 @@ union cvmx_npei_pktx_slist_fifo_rsize { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pktx_slist_fifo_rsize_s cn52xx; - struct cvmx_npei_pktx_slist_fifo_rsize_s cn56xx; }; union cvmx_npei_pkt_cnt_int { @@ -3550,8 +3353,6 @@ union cvmx_npei_pkt_cnt_int { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_cnt_int_s cn52xx; - struct cvmx_npei_pkt_cnt_int_s cn56xx; }; union cvmx_npei_pkt_cnt_int_enb { @@ -3565,8 +3366,6 @@ union cvmx_npei_pkt_cnt_int_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_cnt_int_enb_s cn52xx; - struct cvmx_npei_pkt_cnt_int_enb_s cn56xx; }; union cvmx_npei_pkt_data_out_es { @@ -3578,8 +3377,6 @@ union cvmx_npei_pkt_data_out_es { uint64_t es:64; #endif } s; - struct cvmx_npei_pkt_data_out_es_s cn52xx; - struct cvmx_npei_pkt_data_out_es_s cn56xx; }; union cvmx_npei_pkt_data_out_ns { @@ -3593,8 +3390,6 @@ union cvmx_npei_pkt_data_out_ns { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_data_out_ns_s cn52xx; - struct cvmx_npei_pkt_data_out_ns_s cn56xx; }; union cvmx_npei_pkt_data_out_ror { @@ -3608,8 +3403,6 @@ union cvmx_npei_pkt_data_out_ror { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_data_out_ror_s cn52xx; - struct cvmx_npei_pkt_data_out_ror_s cn56xx; }; union cvmx_npei_pkt_dpaddr { @@ -3623,8 +3416,6 @@ union cvmx_npei_pkt_dpaddr { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_dpaddr_s cn52xx; - struct cvmx_npei_pkt_dpaddr_s cn56xx; }; union cvmx_npei_pkt_in_bp { @@ -3638,8 +3429,6 @@ union cvmx_npei_pkt_in_bp { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_in_bp_s cn52xx; - struct cvmx_npei_pkt_in_bp_s cn56xx; }; union cvmx_npei_pkt_in_donex_cnts { @@ -3653,8 +3442,6 @@ union cvmx_npei_pkt_in_donex_cnts { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_in_donex_cnts_s cn52xx; - struct cvmx_npei_pkt_in_donex_cnts_s cn56xx; }; union cvmx_npei_pkt_in_instr_counts { @@ -3668,8 +3455,6 @@ union cvmx_npei_pkt_in_instr_counts { uint64_t wr_cnt:32; #endif } s; - struct cvmx_npei_pkt_in_instr_counts_s cn52xx; - struct cvmx_npei_pkt_in_instr_counts_s cn56xx; }; union cvmx_npei_pkt_in_pcie_port { @@ -3681,8 +3466,6 @@ union cvmx_npei_pkt_in_pcie_port { uint64_t pp:64; #endif } s; - struct cvmx_npei_pkt_in_pcie_port_s cn52xx; - struct cvmx_npei_pkt_in_pcie_port_s cn56xx; }; union cvmx_npei_pkt_input_control { @@ -3712,8 +3495,6 @@ union cvmx_npei_pkt_input_control { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_npei_pkt_input_control_s cn52xx; - struct cvmx_npei_pkt_input_control_s cn56xx; }; union cvmx_npei_pkt_instr_enb { @@ -3727,8 +3508,6 @@ union cvmx_npei_pkt_instr_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_instr_enb_s cn52xx; - struct cvmx_npei_pkt_instr_enb_s cn56xx; }; union cvmx_npei_pkt_instr_rd_size { @@ -3740,8 +3519,6 @@ union cvmx_npei_pkt_instr_rd_size { uint64_t rdsize:64; #endif } s; - struct cvmx_npei_pkt_instr_rd_size_s cn52xx; - struct cvmx_npei_pkt_instr_rd_size_s cn56xx; }; union cvmx_npei_pkt_instr_size { @@ -3755,8 +3532,6 @@ union cvmx_npei_pkt_instr_size { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_instr_size_s cn52xx; - struct cvmx_npei_pkt_instr_size_s cn56xx; }; union cvmx_npei_pkt_int_levels { @@ -3772,8 +3547,6 @@ union cvmx_npei_pkt_int_levels { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_npei_pkt_int_levels_s cn52xx; - struct cvmx_npei_pkt_int_levels_s cn56xx; }; union cvmx_npei_pkt_iptr { @@ -3787,8 +3560,6 @@ union cvmx_npei_pkt_iptr { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_iptr_s cn52xx; - struct cvmx_npei_pkt_iptr_s cn56xx; }; union cvmx_npei_pkt_out_bmode { @@ -3802,8 +3573,6 @@ union cvmx_npei_pkt_out_bmode { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_out_bmode_s cn52xx; - struct cvmx_npei_pkt_out_bmode_s cn56xx; }; union cvmx_npei_pkt_out_enb { @@ -3817,8 +3586,6 @@ union cvmx_npei_pkt_out_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_out_enb_s cn52xx; - struct cvmx_npei_pkt_out_enb_s cn56xx; }; union cvmx_npei_pkt_output_wmark { @@ -3832,8 +3599,6 @@ union cvmx_npei_pkt_output_wmark { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_output_wmark_s cn52xx; - struct cvmx_npei_pkt_output_wmark_s cn56xx; }; union cvmx_npei_pkt_pcie_port { @@ -3845,8 +3610,6 @@ union cvmx_npei_pkt_pcie_port { uint64_t pp:64; #endif } s; - struct cvmx_npei_pkt_pcie_port_s cn52xx; - struct cvmx_npei_pkt_pcie_port_s cn56xx; }; union cvmx_npei_pkt_port_in_rst { @@ -3860,8 +3623,6 @@ union cvmx_npei_pkt_port_in_rst { uint64_t in_rst:32; #endif } s; - struct cvmx_npei_pkt_port_in_rst_s cn52xx; - struct cvmx_npei_pkt_port_in_rst_s cn56xx; }; union cvmx_npei_pkt_slist_es { @@ -3873,8 +3634,6 @@ union cvmx_npei_pkt_slist_es { uint64_t es:64; #endif } s; - struct cvmx_npei_pkt_slist_es_s cn52xx; - struct cvmx_npei_pkt_slist_es_s cn56xx; }; union cvmx_npei_pkt_slist_id_size { @@ -3890,8 +3649,6 @@ union cvmx_npei_pkt_slist_id_size { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_npei_pkt_slist_id_size_s cn52xx; - struct cvmx_npei_pkt_slist_id_size_s cn56xx; }; union cvmx_npei_pkt_slist_ns { @@ -3905,8 +3662,6 @@ union cvmx_npei_pkt_slist_ns { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_slist_ns_s cn52xx; - struct cvmx_npei_pkt_slist_ns_s cn56xx; }; union cvmx_npei_pkt_slist_ror { @@ -3920,8 +3675,6 @@ union cvmx_npei_pkt_slist_ror { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_slist_ror_s cn52xx; - struct cvmx_npei_pkt_slist_ror_s cn56xx; }; union cvmx_npei_pkt_time_int { @@ -3935,8 +3688,6 @@ union cvmx_npei_pkt_time_int { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_time_int_s cn52xx; - struct cvmx_npei_pkt_time_int_s cn56xx; }; union cvmx_npei_pkt_time_int_enb { @@ -3950,8 +3701,6 @@ union cvmx_npei_pkt_time_int_enb { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_pkt_time_int_enb_s cn52xx; - struct cvmx_npei_pkt_time_int_enb_s cn56xx; }; union cvmx_npei_rsl_int_blocks { @@ -4019,10 +3768,6 @@ union cvmx_npei_rsl_int_blocks { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_npei_rsl_int_blocks_s cn52xx; - struct cvmx_npei_rsl_int_blocks_s cn52xxp1; - struct cvmx_npei_rsl_int_blocks_s cn56xx; - struct cvmx_npei_rsl_int_blocks_s cn56xxp1; }; union cvmx_npei_scratch_1 { @@ -4034,10 +3779,6 @@ union cvmx_npei_scratch_1 { uint64_t data:64; #endif } s; - struct cvmx_npei_scratch_1_s cn52xx; - struct cvmx_npei_scratch_1_s cn52xxp1; - struct cvmx_npei_scratch_1_s cn56xx; - struct cvmx_npei_scratch_1_s cn56xxp1; }; union cvmx_npei_state1 { @@ -4055,10 +3796,6 @@ union cvmx_npei_state1 { uint64_t cpl1:12; #endif } s; - struct cvmx_npei_state1_s cn52xx; - struct cvmx_npei_state1_s cn52xxp1; - struct cvmx_npei_state1_s cn56xx; - struct cvmx_npei_state1_s cn56xxp1; }; union cvmx_npei_state2 { @@ -4082,10 +3819,6 @@ union cvmx_npei_state2 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_npei_state2_s cn52xx; - struct cvmx_npei_state2_s cn52xxp1; - struct cvmx_npei_state2_s cn56xx; - struct cvmx_npei_state2_s cn56xxp1; }; union cvmx_npei_state3 { @@ -4105,10 +3838,6 @@ union cvmx_npei_state3 { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_npei_state3_s cn52xx; - struct cvmx_npei_state3_s cn52xxp1; - struct cvmx_npei_state3_s cn56xx; - struct cvmx_npei_state3_s cn56xxp1; }; union cvmx_npei_win_rd_addr { @@ -4126,10 +3855,6 @@ union cvmx_npei_win_rd_addr { uint64_t reserved_51_63:13; #endif } s; - struct cvmx_npei_win_rd_addr_s cn52xx; - struct cvmx_npei_win_rd_addr_s cn52xxp1; - struct cvmx_npei_win_rd_addr_s cn56xx; - struct cvmx_npei_win_rd_addr_s cn56xxp1; }; union cvmx_npei_win_rd_data { @@ -4141,10 +3866,6 @@ union cvmx_npei_win_rd_data { uint64_t rd_data:64; #endif } s; - struct cvmx_npei_win_rd_data_s cn52xx; - struct cvmx_npei_win_rd_data_s cn52xxp1; - struct cvmx_npei_win_rd_data_s cn56xx; - struct cvmx_npei_win_rd_data_s cn56xxp1; }; union cvmx_npei_win_wr_addr { @@ -4162,10 +3883,6 @@ union cvmx_npei_win_wr_addr { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_npei_win_wr_addr_s cn52xx; - struct cvmx_npei_win_wr_addr_s cn52xxp1; - struct cvmx_npei_win_wr_addr_s cn56xx; - struct cvmx_npei_win_wr_addr_s cn56xxp1; }; union cvmx_npei_win_wr_data { @@ -4177,10 +3894,6 @@ union cvmx_npei_win_wr_data { uint64_t wr_data:64; #endif } s; - struct cvmx_npei_win_wr_data_s cn52xx; - struct cvmx_npei_win_wr_data_s cn52xxp1; - struct cvmx_npei_win_wr_data_s cn56xx; - struct cvmx_npei_win_wr_data_s cn56xxp1; }; union cvmx_npei_win_wr_mask { @@ -4194,10 +3907,6 @@ union cvmx_npei_win_wr_mask { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_npei_win_wr_mask_s cn52xx; - struct cvmx_npei_win_wr_mask_s cn52xxp1; - struct cvmx_npei_win_wr_mask_s cn56xx; - struct cvmx_npei_win_wr_mask_s cn56xxp1; }; union cvmx_npei_window_ctl { @@ -4211,10 +3920,6 @@ union cvmx_npei_window_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npei_window_ctl_s cn52xx; - struct cvmx_npei_window_ctl_s cn52xxp1; - struct cvmx_npei_window_ctl_s cn56xx; - struct cvmx_npei_window_ctl_s cn56xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-npi-defs.h b/arch/mips/include/asm/octeon/cvmx-npi-defs.h index 129bb250e534..ba4967fda480 100644 --- a/arch/mips/include/asm/octeon/cvmx-npi-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-npi-defs.h @@ -160,13 +160,6 @@ union cvmx_npi_base_addr_inputx { uint64_t baddr:61; #endif } s; - struct cvmx_npi_base_addr_inputx_s cn30xx; - struct cvmx_npi_base_addr_inputx_s cn31xx; - struct cvmx_npi_base_addr_inputx_s cn38xx; - struct cvmx_npi_base_addr_inputx_s cn38xxp2; - struct cvmx_npi_base_addr_inputx_s cn50xx; - struct cvmx_npi_base_addr_inputx_s cn58xx; - struct cvmx_npi_base_addr_inputx_s cn58xxp1; }; union cvmx_npi_base_addr_outputx { @@ -180,13 +173,6 @@ union cvmx_npi_base_addr_outputx { uint64_t baddr:61; #endif } s; - struct cvmx_npi_base_addr_outputx_s cn30xx; - struct cvmx_npi_base_addr_outputx_s cn31xx; - struct cvmx_npi_base_addr_outputx_s cn38xx; - struct cvmx_npi_base_addr_outputx_s cn38xxp2; - struct cvmx_npi_base_addr_outputx_s cn50xx; - struct cvmx_npi_base_addr_outputx_s cn58xx; - struct cvmx_npi_base_addr_outputx_s cn58xxp1; }; union cvmx_npi_bist_status { @@ -281,9 +267,6 @@ union cvmx_npi_bist_status { uint64_t reserved_20_63:44; #endif } cn30xx; - struct cvmx_npi_bist_status_s cn31xx; - struct cvmx_npi_bist_status_s cn38xx; - struct cvmx_npi_bist_status_s cn38xxp2; struct cvmx_npi_bist_status_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -329,8 +312,6 @@ union cvmx_npi_bist_status { uint64_t reserved_20_63:44; #endif } cn50xx; - struct cvmx_npi_bist_status_s cn58xx; - struct cvmx_npi_bist_status_s cn58xxp1; }; union cvmx_npi_buff_size_outputx { @@ -346,13 +327,6 @@ union cvmx_npi_buff_size_outputx { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_npi_buff_size_outputx_s cn30xx; - struct cvmx_npi_buff_size_outputx_s cn31xx; - struct cvmx_npi_buff_size_outputx_s cn38xx; - struct cvmx_npi_buff_size_outputx_s cn38xxp2; - struct cvmx_npi_buff_size_outputx_s cn50xx; - struct cvmx_npi_buff_size_outputx_s cn58xx; - struct cvmx_npi_buff_size_outputx_s cn58xxp1; }; union cvmx_npi_comp_ctl { @@ -368,9 +342,6 @@ union cvmx_npi_comp_ctl { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_npi_comp_ctl_s cn50xx; - struct cvmx_npi_comp_ctl_s cn58xx; - struct cvmx_npi_comp_ctl_s cn58xxp1; }; union cvmx_npi_ctl_status { @@ -498,11 +469,6 @@ union cvmx_npi_ctl_status { uint64_t reserved_63_63:1; #endif } cn31xx; - struct cvmx_npi_ctl_status_s cn38xx; - struct cvmx_npi_ctl_status_s cn38xxp2; - struct cvmx_npi_ctl_status_cn31xx cn50xx; - struct cvmx_npi_ctl_status_s cn58xx; - struct cvmx_npi_ctl_status_s cn58xxp1; }; union cvmx_npi_dbg_select { @@ -516,13 +482,6 @@ union cvmx_npi_dbg_select { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npi_dbg_select_s cn30xx; - struct cvmx_npi_dbg_select_s cn31xx; - struct cvmx_npi_dbg_select_s cn38xx; - struct cvmx_npi_dbg_select_s cn38xxp2; - struct cvmx_npi_dbg_select_s cn50xx; - struct cvmx_npi_dbg_select_s cn58xx; - struct cvmx_npi_dbg_select_s cn58xxp1; }; union cvmx_npi_dma_control { @@ -558,13 +517,6 @@ union cvmx_npi_dma_control { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npi_dma_control_s cn30xx; - struct cvmx_npi_dma_control_s cn31xx; - struct cvmx_npi_dma_control_s cn38xx; - struct cvmx_npi_dma_control_s cn38xxp2; - struct cvmx_npi_dma_control_s cn50xx; - struct cvmx_npi_dma_control_s cn58xx; - struct cvmx_npi_dma_control_s cn58xxp1; }; union cvmx_npi_dma_highp_counts { @@ -580,13 +532,6 @@ union cvmx_npi_dma_highp_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_npi_dma_highp_counts_s cn30xx; - struct cvmx_npi_dma_highp_counts_s cn31xx; - struct cvmx_npi_dma_highp_counts_s cn38xx; - struct cvmx_npi_dma_highp_counts_s cn38xxp2; - struct cvmx_npi_dma_highp_counts_s cn50xx; - struct cvmx_npi_dma_highp_counts_s cn58xx; - struct cvmx_npi_dma_highp_counts_s cn58xxp1; }; union cvmx_npi_dma_highp_naddr { @@ -602,13 +547,6 @@ union cvmx_npi_dma_highp_naddr { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npi_dma_highp_naddr_s cn30xx; - struct cvmx_npi_dma_highp_naddr_s cn31xx; - struct cvmx_npi_dma_highp_naddr_s cn38xx; - struct cvmx_npi_dma_highp_naddr_s cn38xxp2; - struct cvmx_npi_dma_highp_naddr_s cn50xx; - struct cvmx_npi_dma_highp_naddr_s cn58xx; - struct cvmx_npi_dma_highp_naddr_s cn58xxp1; }; union cvmx_npi_dma_lowp_counts { @@ -624,13 +562,6 @@ union cvmx_npi_dma_lowp_counts { uint64_t reserved_39_63:25; #endif } s; - struct cvmx_npi_dma_lowp_counts_s cn30xx; - struct cvmx_npi_dma_lowp_counts_s cn31xx; - struct cvmx_npi_dma_lowp_counts_s cn38xx; - struct cvmx_npi_dma_lowp_counts_s cn38xxp2; - struct cvmx_npi_dma_lowp_counts_s cn50xx; - struct cvmx_npi_dma_lowp_counts_s cn58xx; - struct cvmx_npi_dma_lowp_counts_s cn58xxp1; }; union cvmx_npi_dma_lowp_naddr { @@ -646,13 +577,6 @@ union cvmx_npi_dma_lowp_naddr { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_npi_dma_lowp_naddr_s cn30xx; - struct cvmx_npi_dma_lowp_naddr_s cn31xx; - struct cvmx_npi_dma_lowp_naddr_s cn38xx; - struct cvmx_npi_dma_lowp_naddr_s cn38xxp2; - struct cvmx_npi_dma_lowp_naddr_s cn50xx; - struct cvmx_npi_dma_lowp_naddr_s cn58xx; - struct cvmx_npi_dma_lowp_naddr_s cn58xxp1; }; union cvmx_npi_highp_dbell { @@ -666,13 +590,6 @@ union cvmx_npi_highp_dbell { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npi_highp_dbell_s cn30xx; - struct cvmx_npi_highp_dbell_s cn31xx; - struct cvmx_npi_highp_dbell_s cn38xx; - struct cvmx_npi_highp_dbell_s cn38xxp2; - struct cvmx_npi_highp_dbell_s cn50xx; - struct cvmx_npi_highp_dbell_s cn58xx; - struct cvmx_npi_highp_dbell_s cn58xxp1; }; union cvmx_npi_highp_ibuff_saddr { @@ -686,13 +603,6 @@ union cvmx_npi_highp_ibuff_saddr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npi_highp_ibuff_saddr_s cn30xx; - struct cvmx_npi_highp_ibuff_saddr_s cn31xx; - struct cvmx_npi_highp_ibuff_saddr_s cn38xx; - struct cvmx_npi_highp_ibuff_saddr_s cn38xxp2; - struct cvmx_npi_highp_ibuff_saddr_s cn50xx; - struct cvmx_npi_highp_ibuff_saddr_s cn58xx; - struct cvmx_npi_highp_ibuff_saddr_s cn58xxp1; }; union cvmx_npi_input_control { @@ -745,12 +655,6 @@ union cvmx_npi_input_control { uint64_t reserved_22_63:42; #endif } cn30xx; - struct cvmx_npi_input_control_cn30xx cn31xx; - struct cvmx_npi_input_control_s cn38xx; - struct cvmx_npi_input_control_cn30xx cn38xxp2; - struct cvmx_npi_input_control_s cn50xx; - struct cvmx_npi_input_control_s cn58xx; - struct cvmx_npi_input_control_s cn58xxp1; }; union cvmx_npi_int_enb { @@ -1094,7 +998,6 @@ union cvmx_npi_int_enb { uint64_t reserved_62_63:2; #endif } cn31xx; - struct cvmx_npi_int_enb_s cn38xx; struct cvmx_npi_int_enb_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -1186,9 +1089,6 @@ union cvmx_npi_int_enb { uint64_t reserved_42_63:22; #endif } cn38xxp2; - struct cvmx_npi_int_enb_cn31xx cn50xx; - struct cvmx_npi_int_enb_s cn58xx; - struct cvmx_npi_int_enb_s cn58xxp1; }; union cvmx_npi_int_sum { @@ -1532,7 +1432,6 @@ union cvmx_npi_int_sum { uint64_t reserved_62_63:2; #endif } cn31xx; - struct cvmx_npi_int_sum_s cn38xx; struct cvmx_npi_int_sum_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -1624,9 +1523,6 @@ union cvmx_npi_int_sum { uint64_t reserved_42_63:22; #endif } cn38xxp2; - struct cvmx_npi_int_sum_cn31xx cn50xx; - struct cvmx_npi_int_sum_s cn58xx; - struct cvmx_npi_int_sum_s cn58xxp1; }; union cvmx_npi_lowp_dbell { @@ -1640,13 +1536,6 @@ union cvmx_npi_lowp_dbell { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_npi_lowp_dbell_s cn30xx; - struct cvmx_npi_lowp_dbell_s cn31xx; - struct cvmx_npi_lowp_dbell_s cn38xx; - struct cvmx_npi_lowp_dbell_s cn38xxp2; - struct cvmx_npi_lowp_dbell_s cn50xx; - struct cvmx_npi_lowp_dbell_s cn58xx; - struct cvmx_npi_lowp_dbell_s cn58xxp1; }; union cvmx_npi_lowp_ibuff_saddr { @@ -1660,13 +1549,6 @@ union cvmx_npi_lowp_ibuff_saddr { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_npi_lowp_ibuff_saddr_s cn30xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn31xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn38xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn38xxp2; - struct cvmx_npi_lowp_ibuff_saddr_s cn50xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn58xx; - struct cvmx_npi_lowp_ibuff_saddr_s cn58xxp1; }; union cvmx_npi_mem_access_subidx { @@ -1696,7 +1578,6 @@ union cvmx_npi_mem_access_subidx { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_npi_mem_access_subidx_s cn30xx; struct cvmx_npi_mem_access_subidx_cn31xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1718,11 +1599,6 @@ union cvmx_npi_mem_access_subidx { uint64_t reserved_36_63:28; #endif } cn31xx; - struct cvmx_npi_mem_access_subidx_s cn38xx; - struct cvmx_npi_mem_access_subidx_cn31xx cn38xxp2; - struct cvmx_npi_mem_access_subidx_s cn50xx; - struct cvmx_npi_mem_access_subidx_s cn58xx; - struct cvmx_npi_mem_access_subidx_s cn58xxp1; }; union cvmx_npi_msi_rcv { @@ -1734,13 +1610,6 @@ union cvmx_npi_msi_rcv { uint64_t int_vec:64; #endif } s; - struct cvmx_npi_msi_rcv_s cn30xx; - struct cvmx_npi_msi_rcv_s cn31xx; - struct cvmx_npi_msi_rcv_s cn38xx; - struct cvmx_npi_msi_rcv_s cn38xxp2; - struct cvmx_npi_msi_rcv_s cn50xx; - struct cvmx_npi_msi_rcv_s cn58xx; - struct cvmx_npi_msi_rcv_s cn58xxp1; }; union cvmx_npi_num_desc_outputx { @@ -1754,13 +1623,6 @@ union cvmx_npi_num_desc_outputx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npi_num_desc_outputx_s cn30xx; - struct cvmx_npi_num_desc_outputx_s cn31xx; - struct cvmx_npi_num_desc_outputx_s cn38xx; - struct cvmx_npi_num_desc_outputx_s cn38xxp2; - struct cvmx_npi_num_desc_outputx_s cn50xx; - struct cvmx_npi_num_desc_outputx_s cn58xx; - struct cvmx_npi_num_desc_outputx_s cn58xxp1; }; union cvmx_npi_output_control { @@ -1932,7 +1794,6 @@ union cvmx_npi_output_control { uint64_t reserved_46_63:18; #endif } cn31xx; - struct cvmx_npi_output_control_s cn38xx; struct cvmx_npi_output_control_cn38xxp2 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -2069,8 +1930,6 @@ union cvmx_npi_output_control { uint64_t reserved_49_63:15; #endif } cn50xx; - struct cvmx_npi_output_control_s cn58xx; - struct cvmx_npi_output_control_s cn58xxp1; }; union cvmx_npi_px_dbpair_addr { @@ -2086,13 +1945,6 @@ union cvmx_npi_px_dbpair_addr { uint64_t reserved_63_63:1; #endif } s; - struct cvmx_npi_px_dbpair_addr_s cn30xx; - struct cvmx_npi_px_dbpair_addr_s cn31xx; - struct cvmx_npi_px_dbpair_addr_s cn38xx; - struct cvmx_npi_px_dbpair_addr_s cn38xxp2; - struct cvmx_npi_px_dbpair_addr_s cn50xx; - struct cvmx_npi_px_dbpair_addr_s cn58xx; - struct cvmx_npi_px_dbpair_addr_s cn58xxp1; }; union cvmx_npi_px_instr_addr { @@ -2106,13 +1958,6 @@ union cvmx_npi_px_instr_addr { uint64_t state:3; #endif } s; - struct cvmx_npi_px_instr_addr_s cn30xx; - struct cvmx_npi_px_instr_addr_s cn31xx; - struct cvmx_npi_px_instr_addr_s cn38xx; - struct cvmx_npi_px_instr_addr_s cn38xxp2; - struct cvmx_npi_px_instr_addr_s cn50xx; - struct cvmx_npi_px_instr_addr_s cn58xx; - struct cvmx_npi_px_instr_addr_s cn58xxp1; }; union cvmx_npi_px_instr_cnts { @@ -2128,13 +1973,6 @@ union cvmx_npi_px_instr_cnts { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_npi_px_instr_cnts_s cn30xx; - struct cvmx_npi_px_instr_cnts_s cn31xx; - struct cvmx_npi_px_instr_cnts_s cn38xx; - struct cvmx_npi_px_instr_cnts_s cn38xxp2; - struct cvmx_npi_px_instr_cnts_s cn50xx; - struct cvmx_npi_px_instr_cnts_s cn58xx; - struct cvmx_npi_px_instr_cnts_s cn58xxp1; }; union cvmx_npi_px_pair_cnts { @@ -2150,13 +1988,6 @@ union cvmx_npi_px_pair_cnts { uint64_t reserved_37_63:27; #endif } s; - struct cvmx_npi_px_pair_cnts_s cn30xx; - struct cvmx_npi_px_pair_cnts_s cn31xx; - struct cvmx_npi_px_pair_cnts_s cn38xx; - struct cvmx_npi_px_pair_cnts_s cn38xxp2; - struct cvmx_npi_px_pair_cnts_s cn50xx; - struct cvmx_npi_px_pair_cnts_s cn58xx; - struct cvmx_npi_px_pair_cnts_s cn58xxp1; }; union cvmx_npi_pci_burst_size { @@ -2172,13 +2003,6 @@ union cvmx_npi_pci_burst_size { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_npi_pci_burst_size_s cn30xx; - struct cvmx_npi_pci_burst_size_s cn31xx; - struct cvmx_npi_pci_burst_size_s cn38xx; - struct cvmx_npi_pci_burst_size_s cn38xxp2; - struct cvmx_npi_pci_burst_size_s cn50xx; - struct cvmx_npi_pci_burst_size_s cn58xx; - struct cvmx_npi_pci_burst_size_s cn58xxp1; }; union cvmx_npi_pci_int_arb_cfg { @@ -2215,12 +2039,6 @@ union cvmx_npi_pci_int_arb_cfg { uint64_t reserved_5_63:59; #endif } cn30xx; - struct cvmx_npi_pci_int_arb_cfg_cn30xx cn31xx; - struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xx; - struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xxp2; - struct cvmx_npi_pci_int_arb_cfg_s cn50xx; - struct cvmx_npi_pci_int_arb_cfg_s cn58xx; - struct cvmx_npi_pci_int_arb_cfg_s cn58xxp1; }; union cvmx_npi_pci_read_cmd { @@ -2234,13 +2052,6 @@ union cvmx_npi_pci_read_cmd { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_npi_pci_read_cmd_s cn30xx; - struct cvmx_npi_pci_read_cmd_s cn31xx; - struct cvmx_npi_pci_read_cmd_s cn38xx; - struct cvmx_npi_pci_read_cmd_s cn38xxp2; - struct cvmx_npi_pci_read_cmd_s cn50xx; - struct cvmx_npi_pci_read_cmd_s cn58xx; - struct cvmx_npi_pci_read_cmd_s cn58xxp1; }; union cvmx_npi_port32_instr_hdr { @@ -2276,13 +2087,6 @@ union cvmx_npi_port32_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port32_instr_hdr_s cn30xx; - struct cvmx_npi_port32_instr_hdr_s cn31xx; - struct cvmx_npi_port32_instr_hdr_s cn38xx; - struct cvmx_npi_port32_instr_hdr_s cn38xxp2; - struct cvmx_npi_port32_instr_hdr_s cn50xx; - struct cvmx_npi_port32_instr_hdr_s cn58xx; - struct cvmx_npi_port32_instr_hdr_s cn58xxp1; }; union cvmx_npi_port33_instr_hdr { @@ -2318,12 +2122,6 @@ union cvmx_npi_port33_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port33_instr_hdr_s cn31xx; - struct cvmx_npi_port33_instr_hdr_s cn38xx; - struct cvmx_npi_port33_instr_hdr_s cn38xxp2; - struct cvmx_npi_port33_instr_hdr_s cn50xx; - struct cvmx_npi_port33_instr_hdr_s cn58xx; - struct cvmx_npi_port33_instr_hdr_s cn58xxp1; }; union cvmx_npi_port34_instr_hdr { @@ -2359,10 +2157,6 @@ union cvmx_npi_port34_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port34_instr_hdr_s cn38xx; - struct cvmx_npi_port34_instr_hdr_s cn38xxp2; - struct cvmx_npi_port34_instr_hdr_s cn58xx; - struct cvmx_npi_port34_instr_hdr_s cn58xxp1; }; union cvmx_npi_port35_instr_hdr { @@ -2398,10 +2192,6 @@ union cvmx_npi_port35_instr_hdr { uint64_t reserved_44_63:20; #endif } s; - struct cvmx_npi_port35_instr_hdr_s cn38xx; - struct cvmx_npi_port35_instr_hdr_s cn38xxp2; - struct cvmx_npi_port35_instr_hdr_s cn58xx; - struct cvmx_npi_port35_instr_hdr_s cn58xxp1; }; union cvmx_npi_port_bp_control { @@ -2417,13 +2207,6 @@ union cvmx_npi_port_bp_control { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_npi_port_bp_control_s cn30xx; - struct cvmx_npi_port_bp_control_s cn31xx; - struct cvmx_npi_port_bp_control_s cn38xx; - struct cvmx_npi_port_bp_control_s cn38xxp2; - struct cvmx_npi_port_bp_control_s cn50xx; - struct cvmx_npi_port_bp_control_s cn58xx; - struct cvmx_npi_port_bp_control_s cn58xxp1; }; union cvmx_npi_rsl_int_blocks { @@ -2566,7 +2349,6 @@ union cvmx_npi_rsl_int_blocks { uint64_t reserved_32_63:32; #endif } cn30xx; - struct cvmx_npi_rsl_int_blocks_cn30xx cn31xx; struct cvmx_npi_rsl_int_blocks_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63:32; @@ -2638,7 +2420,6 @@ union cvmx_npi_rsl_int_blocks { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_npi_rsl_int_blocks_cn38xx cn38xxp2; struct cvmx_npi_rsl_int_blocks_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_31_63:33; @@ -2702,8 +2483,6 @@ union cvmx_npi_rsl_int_blocks { uint64_t reserved_31_63:33; #endif } cn50xx; - struct cvmx_npi_rsl_int_blocks_cn38xx cn58xx; - struct cvmx_npi_rsl_int_blocks_cn38xx cn58xxp1; }; union cvmx_npi_size_inputx { @@ -2717,13 +2496,6 @@ union cvmx_npi_size_inputx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npi_size_inputx_s cn30xx; - struct cvmx_npi_size_inputx_s cn31xx; - struct cvmx_npi_size_inputx_s cn38xx; - struct cvmx_npi_size_inputx_s cn38xxp2; - struct cvmx_npi_size_inputx_s cn50xx; - struct cvmx_npi_size_inputx_s cn58xx; - struct cvmx_npi_size_inputx_s cn58xxp1; }; union cvmx_npi_win_read_to { @@ -2737,13 +2509,6 @@ union cvmx_npi_win_read_to { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_npi_win_read_to_s cn30xx; - struct cvmx_npi_win_read_to_s cn31xx; - struct cvmx_npi_win_read_to_s cn38xx; - struct cvmx_npi_win_read_to_s cn38xxp2; - struct cvmx_npi_win_read_to_s cn50xx; - struct cvmx_npi_win_read_to_s cn58xx; - struct cvmx_npi_win_read_to_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pci-defs.h b/arch/mips/include/asm/octeon/cvmx-pci-defs.h index 25d603f18298..be56b693b53b 100644 --- a/arch/mips/include/asm/octeon/cvmx-pci-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pci-defs.h @@ -131,13 +131,6 @@ union cvmx_pci_bar1_indexx { uint32_t reserved_18_31:14; #endif } s; - struct cvmx_pci_bar1_indexx_s cn30xx; - struct cvmx_pci_bar1_indexx_s cn31xx; - struct cvmx_pci_bar1_indexx_s cn38xx; - struct cvmx_pci_bar1_indexx_s cn38xxp2; - struct cvmx_pci_bar1_indexx_s cn50xx; - struct cvmx_pci_bar1_indexx_s cn58xx; - struct cvmx_pci_bar1_indexx_s cn58xxp1; }; union cvmx_pci_bist_reg { @@ -169,7 +162,6 @@ union cvmx_pci_bist_reg { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pci_bist_reg_s cn50xx; }; union cvmx_pci_cfg00 { @@ -183,13 +175,6 @@ union cvmx_pci_cfg00 { uint32_t devid:16; #endif } s; - struct cvmx_pci_cfg00_s cn30xx; - struct cvmx_pci_cfg00_s cn31xx; - struct cvmx_pci_cfg00_s cn38xx; - struct cvmx_pci_cfg00_s cn38xxp2; - struct cvmx_pci_cfg00_s cn50xx; - struct cvmx_pci_cfg00_s cn58xx; - struct cvmx_pci_cfg00_s cn58xxp1; }; union cvmx_pci_cfg01 { @@ -247,13 +232,6 @@ union cvmx_pci_cfg01 { uint32_t dpe:1; #endif } s; - struct cvmx_pci_cfg01_s cn30xx; - struct cvmx_pci_cfg01_s cn31xx; - struct cvmx_pci_cfg01_s cn38xx; - struct cvmx_pci_cfg01_s cn38xxp2; - struct cvmx_pci_cfg01_s cn50xx; - struct cvmx_pci_cfg01_s cn58xx; - struct cvmx_pci_cfg01_s cn58xxp1; }; union cvmx_pci_cfg02 { @@ -267,13 +245,6 @@ union cvmx_pci_cfg02 { uint32_t cc:24; #endif } s; - struct cvmx_pci_cfg02_s cn30xx; - struct cvmx_pci_cfg02_s cn31xx; - struct cvmx_pci_cfg02_s cn38xx; - struct cvmx_pci_cfg02_s cn38xxp2; - struct cvmx_pci_cfg02_s cn50xx; - struct cvmx_pci_cfg02_s cn58xx; - struct cvmx_pci_cfg02_s cn58xxp1; }; union cvmx_pci_cfg03 { @@ -297,13 +268,6 @@ union cvmx_pci_cfg03 { uint32_t bcap:1; #endif } s; - struct cvmx_pci_cfg03_s cn30xx; - struct cvmx_pci_cfg03_s cn31xx; - struct cvmx_pci_cfg03_s cn38xx; - struct cvmx_pci_cfg03_s cn38xxp2; - struct cvmx_pci_cfg03_s cn50xx; - struct cvmx_pci_cfg03_s cn58xx; - struct cvmx_pci_cfg03_s cn58xxp1; }; union cvmx_pci_cfg04 { @@ -323,13 +287,6 @@ union cvmx_pci_cfg04 { uint32_t lbase:20; #endif } s; - struct cvmx_pci_cfg04_s cn30xx; - struct cvmx_pci_cfg04_s cn31xx; - struct cvmx_pci_cfg04_s cn38xx; - struct cvmx_pci_cfg04_s cn38xxp2; - struct cvmx_pci_cfg04_s cn50xx; - struct cvmx_pci_cfg04_s cn58xx; - struct cvmx_pci_cfg04_s cn58xxp1; }; union cvmx_pci_cfg05 { @@ -341,13 +298,6 @@ union cvmx_pci_cfg05 { uint32_t hbase:32; #endif } s; - struct cvmx_pci_cfg05_s cn30xx; - struct cvmx_pci_cfg05_s cn31xx; - struct cvmx_pci_cfg05_s cn38xx; - struct cvmx_pci_cfg05_s cn38xxp2; - struct cvmx_pci_cfg05_s cn50xx; - struct cvmx_pci_cfg05_s cn58xx; - struct cvmx_pci_cfg05_s cn58xxp1; }; union cvmx_pci_cfg06 { @@ -367,13 +317,6 @@ union cvmx_pci_cfg06 { uint32_t lbase:5; #endif } s; - struct cvmx_pci_cfg06_s cn30xx; - struct cvmx_pci_cfg06_s cn31xx; - struct cvmx_pci_cfg06_s cn38xx; - struct cvmx_pci_cfg06_s cn38xxp2; - struct cvmx_pci_cfg06_s cn50xx; - struct cvmx_pci_cfg06_s cn58xx; - struct cvmx_pci_cfg06_s cn58xxp1; }; union cvmx_pci_cfg07 { @@ -385,13 +328,6 @@ union cvmx_pci_cfg07 { uint32_t hbase:32; #endif } s; - struct cvmx_pci_cfg07_s cn30xx; - struct cvmx_pci_cfg07_s cn31xx; - struct cvmx_pci_cfg07_s cn38xx; - struct cvmx_pci_cfg07_s cn38xxp2; - struct cvmx_pci_cfg07_s cn50xx; - struct cvmx_pci_cfg07_s cn58xx; - struct cvmx_pci_cfg07_s cn58xxp1; }; union cvmx_pci_cfg08 { @@ -409,13 +345,6 @@ union cvmx_pci_cfg08 { uint32_t lbasez:28; #endif } s; - struct cvmx_pci_cfg08_s cn30xx; - struct cvmx_pci_cfg08_s cn31xx; - struct cvmx_pci_cfg08_s cn38xx; - struct cvmx_pci_cfg08_s cn38xxp2; - struct cvmx_pci_cfg08_s cn50xx; - struct cvmx_pci_cfg08_s cn58xx; - struct cvmx_pci_cfg08_s cn58xxp1; }; union cvmx_pci_cfg09 { @@ -429,13 +358,6 @@ union cvmx_pci_cfg09 { uint32_t hbase:25; #endif } s; - struct cvmx_pci_cfg09_s cn30xx; - struct cvmx_pci_cfg09_s cn31xx; - struct cvmx_pci_cfg09_s cn38xx; - struct cvmx_pci_cfg09_s cn38xxp2; - struct cvmx_pci_cfg09_s cn50xx; - struct cvmx_pci_cfg09_s cn58xx; - struct cvmx_pci_cfg09_s cn58xxp1; }; union cvmx_pci_cfg10 { @@ -447,13 +369,6 @@ union cvmx_pci_cfg10 { uint32_t cisp:32; #endif } s; - struct cvmx_pci_cfg10_s cn30xx; - struct cvmx_pci_cfg10_s cn31xx; - struct cvmx_pci_cfg10_s cn38xx; - struct cvmx_pci_cfg10_s cn38xxp2; - struct cvmx_pci_cfg10_s cn50xx; - struct cvmx_pci_cfg10_s cn58xx; - struct cvmx_pci_cfg10_s cn58xxp1; }; union cvmx_pci_cfg11 { @@ -467,13 +382,6 @@ union cvmx_pci_cfg11 { uint32_t ssid:16; #endif } s; - struct cvmx_pci_cfg11_s cn30xx; - struct cvmx_pci_cfg11_s cn31xx; - struct cvmx_pci_cfg11_s cn38xx; - struct cvmx_pci_cfg11_s cn38xxp2; - struct cvmx_pci_cfg11_s cn50xx; - struct cvmx_pci_cfg11_s cn58xx; - struct cvmx_pci_cfg11_s cn58xxp1; }; union cvmx_pci_cfg12 { @@ -491,13 +399,6 @@ union cvmx_pci_cfg12 { uint32_t erbar:16; #endif } s; - struct cvmx_pci_cfg12_s cn30xx; - struct cvmx_pci_cfg12_s cn31xx; - struct cvmx_pci_cfg12_s cn38xx; - struct cvmx_pci_cfg12_s cn38xxp2; - struct cvmx_pci_cfg12_s cn50xx; - struct cvmx_pci_cfg12_s cn58xx; - struct cvmx_pci_cfg12_s cn58xxp1; }; union cvmx_pci_cfg13 { @@ -511,13 +412,6 @@ union cvmx_pci_cfg13 { uint32_t reserved_8_31:24; #endif } s; - struct cvmx_pci_cfg13_s cn30xx; - struct cvmx_pci_cfg13_s cn31xx; - struct cvmx_pci_cfg13_s cn38xx; - struct cvmx_pci_cfg13_s cn38xxp2; - struct cvmx_pci_cfg13_s cn50xx; - struct cvmx_pci_cfg13_s cn58xx; - struct cvmx_pci_cfg13_s cn58xxp1; }; union cvmx_pci_cfg15 { @@ -535,13 +429,6 @@ union cvmx_pci_cfg15 { uint32_t ml:8; #endif } s; - struct cvmx_pci_cfg15_s cn30xx; - struct cvmx_pci_cfg15_s cn31xx; - struct cvmx_pci_cfg15_s cn38xx; - struct cvmx_pci_cfg15_s cn38xxp2; - struct cvmx_pci_cfg15_s cn50xx; - struct cvmx_pci_cfg15_s cn58xx; - struct cvmx_pci_cfg15_s cn58xxp1; }; union cvmx_pci_cfg16 { @@ -583,13 +470,6 @@ union cvmx_pci_cfg16 { uint32_t trdnpr:1; #endif } s; - struct cvmx_pci_cfg16_s cn30xx; - struct cvmx_pci_cfg16_s cn31xx; - struct cvmx_pci_cfg16_s cn38xx; - struct cvmx_pci_cfg16_s cn38xxp2; - struct cvmx_pci_cfg16_s cn50xx; - struct cvmx_pci_cfg16_s cn58xx; - struct cvmx_pci_cfg16_s cn58xxp1; }; union cvmx_pci_cfg17 { @@ -601,13 +481,6 @@ union cvmx_pci_cfg17 { uint32_t tscme:32; #endif } s; - struct cvmx_pci_cfg17_s cn30xx; - struct cvmx_pci_cfg17_s cn31xx; - struct cvmx_pci_cfg17_s cn38xx; - struct cvmx_pci_cfg17_s cn38xxp2; - struct cvmx_pci_cfg17_s cn50xx; - struct cvmx_pci_cfg17_s cn58xx; - struct cvmx_pci_cfg17_s cn58xxp1; }; union cvmx_pci_cfg18 { @@ -619,13 +492,6 @@ union cvmx_pci_cfg18 { uint32_t tdsrps:32; #endif } s; - struct cvmx_pci_cfg18_s cn30xx; - struct cvmx_pci_cfg18_s cn31xx; - struct cvmx_pci_cfg18_s cn38xx; - struct cvmx_pci_cfg18_s cn38xxp2; - struct cvmx_pci_cfg18_s cn50xx; - struct cvmx_pci_cfg18_s cn58xx; - struct cvmx_pci_cfg18_s cn58xxp1; }; union cvmx_pci_cfg19 { @@ -671,13 +537,6 @@ union cvmx_pci_cfg19 { uint32_t mrbcm:1; #endif } s; - struct cvmx_pci_cfg19_s cn30xx; - struct cvmx_pci_cfg19_s cn31xx; - struct cvmx_pci_cfg19_s cn38xx; - struct cvmx_pci_cfg19_s cn38xxp2; - struct cvmx_pci_cfg19_s cn50xx; - struct cvmx_pci_cfg19_s cn58xx; - struct cvmx_pci_cfg19_s cn58xxp1; }; union cvmx_pci_cfg20 { @@ -689,13 +548,6 @@ union cvmx_pci_cfg20 { uint32_t mdsp:32; #endif } s; - struct cvmx_pci_cfg20_s cn30xx; - struct cvmx_pci_cfg20_s cn31xx; - struct cvmx_pci_cfg20_s cn38xx; - struct cvmx_pci_cfg20_s cn38xxp2; - struct cvmx_pci_cfg20_s cn50xx; - struct cvmx_pci_cfg20_s cn58xx; - struct cvmx_pci_cfg20_s cn58xxp1; }; union cvmx_pci_cfg21 { @@ -707,13 +559,6 @@ union cvmx_pci_cfg21 { uint32_t scmre:32; #endif } s; - struct cvmx_pci_cfg21_s cn30xx; - struct cvmx_pci_cfg21_s cn31xx; - struct cvmx_pci_cfg21_s cn38xx; - struct cvmx_pci_cfg21_s cn38xxp2; - struct cvmx_pci_cfg21_s cn50xx; - struct cvmx_pci_cfg21_s cn58xx; - struct cvmx_pci_cfg21_s cn58xxp1; }; union cvmx_pci_cfg22 { @@ -737,13 +582,6 @@ union cvmx_pci_cfg22 { uint32_t mac:7; #endif } s; - struct cvmx_pci_cfg22_s cn30xx; - struct cvmx_pci_cfg22_s cn31xx; - struct cvmx_pci_cfg22_s cn38xx; - struct cvmx_pci_cfg22_s cn38xxp2; - struct cvmx_pci_cfg22_s cn50xx; - struct cvmx_pci_cfg22_s cn58xx; - struct cvmx_pci_cfg22_s cn58xxp1; }; union cvmx_pci_cfg56 { @@ -767,13 +605,6 @@ union cvmx_pci_cfg56 { uint32_t reserved_23_31:9; #endif } s; - struct cvmx_pci_cfg56_s cn30xx; - struct cvmx_pci_cfg56_s cn31xx; - struct cvmx_pci_cfg56_s cn38xx; - struct cvmx_pci_cfg56_s cn38xxp2; - struct cvmx_pci_cfg56_s cn50xx; - struct cvmx_pci_cfg56_s cn58xx; - struct cvmx_pci_cfg56_s cn58xxp1; }; union cvmx_pci_cfg57 { @@ -809,13 +640,6 @@ union cvmx_pci_cfg57 { uint32_t reserved_30_31:2; #endif } s; - struct cvmx_pci_cfg57_s cn30xx; - struct cvmx_pci_cfg57_s cn31xx; - struct cvmx_pci_cfg57_s cn38xx; - struct cvmx_pci_cfg57_s cn38xxp2; - struct cvmx_pci_cfg57_s cn50xx; - struct cvmx_pci_cfg57_s cn58xx; - struct cvmx_pci_cfg57_s cn58xxp1; }; union cvmx_pci_cfg58 { @@ -845,13 +669,6 @@ union cvmx_pci_cfg58 { uint32_t pmes:5; #endif } s; - struct cvmx_pci_cfg58_s cn30xx; - struct cvmx_pci_cfg58_s cn31xx; - struct cvmx_pci_cfg58_s cn38xx; - struct cvmx_pci_cfg58_s cn38xxp2; - struct cvmx_pci_cfg58_s cn50xx; - struct cvmx_pci_cfg58_s cn58xx; - struct cvmx_pci_cfg58_s cn58xxp1; }; union cvmx_pci_cfg59 { @@ -881,13 +698,6 @@ union cvmx_pci_cfg59 { uint32_t pmdia:8; #endif } s; - struct cvmx_pci_cfg59_s cn30xx; - struct cvmx_pci_cfg59_s cn31xx; - struct cvmx_pci_cfg59_s cn38xx; - struct cvmx_pci_cfg59_s cn38xxp2; - struct cvmx_pci_cfg59_s cn50xx; - struct cvmx_pci_cfg59_s cn58xx; - struct cvmx_pci_cfg59_s cn58xxp1; }; union cvmx_pci_cfg60 { @@ -911,13 +721,6 @@ union cvmx_pci_cfg60 { uint32_t reserved_24_31:8; #endif } s; - struct cvmx_pci_cfg60_s cn30xx; - struct cvmx_pci_cfg60_s cn31xx; - struct cvmx_pci_cfg60_s cn38xx; - struct cvmx_pci_cfg60_s cn38xxp2; - struct cvmx_pci_cfg60_s cn50xx; - struct cvmx_pci_cfg60_s cn58xx; - struct cvmx_pci_cfg60_s cn58xxp1; }; union cvmx_pci_cfg61 { @@ -931,13 +734,6 @@ union cvmx_pci_cfg61 { uint32_t msi31t2:30; #endif } s; - struct cvmx_pci_cfg61_s cn30xx; - struct cvmx_pci_cfg61_s cn31xx; - struct cvmx_pci_cfg61_s cn38xx; - struct cvmx_pci_cfg61_s cn38xxp2; - struct cvmx_pci_cfg61_s cn50xx; - struct cvmx_pci_cfg61_s cn58xx; - struct cvmx_pci_cfg61_s cn58xxp1; }; union cvmx_pci_cfg62 { @@ -949,13 +745,6 @@ union cvmx_pci_cfg62 { uint32_t msi:32; #endif } s; - struct cvmx_pci_cfg62_s cn30xx; - struct cvmx_pci_cfg62_s cn31xx; - struct cvmx_pci_cfg62_s cn38xx; - struct cvmx_pci_cfg62_s cn38xxp2; - struct cvmx_pci_cfg62_s cn50xx; - struct cvmx_pci_cfg62_s cn58xx; - struct cvmx_pci_cfg62_s cn58xxp1; }; union cvmx_pci_cfg63 { @@ -969,13 +758,6 @@ union cvmx_pci_cfg63 { uint32_t reserved_16_31:16; #endif } s; - struct cvmx_pci_cfg63_s cn30xx; - struct cvmx_pci_cfg63_s cn31xx; - struct cvmx_pci_cfg63_s cn38xx; - struct cvmx_pci_cfg63_s cn38xxp2; - struct cvmx_pci_cfg63_s cn50xx; - struct cvmx_pci_cfg63_s cn58xx; - struct cvmx_pci_cfg63_s cn58xxp1; }; union cvmx_pci_cnt_reg { @@ -997,9 +779,6 @@ union cvmx_pci_cnt_reg { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_pci_cnt_reg_s cn50xx; - struct cvmx_pci_cnt_reg_s cn58xx; - struct cvmx_pci_cnt_reg_s cn58xxp1; }; union cvmx_pci_ctl_status_2 { @@ -1053,7 +832,6 @@ union cvmx_pci_ctl_status_2 { uint32_t reserved_29_31:3; #endif } s; - struct cvmx_pci_ctl_status_2_s cn30xx; struct cvmx_pci_ctl_status_2_cn31xx { #ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_20_31:12; @@ -1091,11 +869,6 @@ union cvmx_pci_ctl_status_2 { uint32_t reserved_20_31:12; #endif } cn31xx; - struct cvmx_pci_ctl_status_2_s cn38xx; - struct cvmx_pci_ctl_status_2_cn31xx cn38xxp2; - struct cvmx_pci_ctl_status_2_s cn50xx; - struct cvmx_pci_ctl_status_2_s cn58xx; - struct cvmx_pci_ctl_status_2_s cn58xxp1; }; union cvmx_pci_dbellx { @@ -1109,13 +882,6 @@ union cvmx_pci_dbellx { uint32_t reserved_16_31:16; #endif } s; - struct cvmx_pci_dbellx_s cn30xx; - struct cvmx_pci_dbellx_s cn31xx; - struct cvmx_pci_dbellx_s cn38xx; - struct cvmx_pci_dbellx_s cn38xxp2; - struct cvmx_pci_dbellx_s cn50xx; - struct cvmx_pci_dbellx_s cn58xx; - struct cvmx_pci_dbellx_s cn58xxp1; }; union cvmx_pci_dma_cntx { @@ -1127,13 +893,6 @@ union cvmx_pci_dma_cntx { uint32_t dma_cnt:32; #endif } s; - struct cvmx_pci_dma_cntx_s cn30xx; - struct cvmx_pci_dma_cntx_s cn31xx; - struct cvmx_pci_dma_cntx_s cn38xx; - struct cvmx_pci_dma_cntx_s cn38xxp2; - struct cvmx_pci_dma_cntx_s cn50xx; - struct cvmx_pci_dma_cntx_s cn58xx; - struct cvmx_pci_dma_cntx_s cn58xxp1; }; union cvmx_pci_dma_int_levx { @@ -1145,13 +904,6 @@ union cvmx_pci_dma_int_levx { uint32_t pkt_cnt:32; #endif } s; - struct cvmx_pci_dma_int_levx_s cn30xx; - struct cvmx_pci_dma_int_levx_s cn31xx; - struct cvmx_pci_dma_int_levx_s cn38xx; - struct cvmx_pci_dma_int_levx_s cn38xxp2; - struct cvmx_pci_dma_int_levx_s cn50xx; - struct cvmx_pci_dma_int_levx_s cn58xx; - struct cvmx_pci_dma_int_levx_s cn58xxp1; }; union cvmx_pci_dma_timex { @@ -1163,13 +915,6 @@ union cvmx_pci_dma_timex { uint32_t dma_time:32; #endif } s; - struct cvmx_pci_dma_timex_s cn30xx; - struct cvmx_pci_dma_timex_s cn31xx; - struct cvmx_pci_dma_timex_s cn38xx; - struct cvmx_pci_dma_timex_s cn38xxp2; - struct cvmx_pci_dma_timex_s cn50xx; - struct cvmx_pci_dma_timex_s cn58xx; - struct cvmx_pci_dma_timex_s cn58xxp1; }; union cvmx_pci_instr_countx { @@ -1181,13 +926,6 @@ union cvmx_pci_instr_countx { uint32_t icnt:32; #endif } s; - struct cvmx_pci_instr_countx_s cn30xx; - struct cvmx_pci_instr_countx_s cn31xx; - struct cvmx_pci_instr_countx_s cn38xx; - struct cvmx_pci_instr_countx_s cn38xxp2; - struct cvmx_pci_instr_countx_s cn50xx; - struct cvmx_pci_instr_countx_s cn58xx; - struct cvmx_pci_instr_countx_s cn58xxp1; }; union cvmx_pci_int_enb { @@ -1405,11 +1143,6 @@ union cvmx_pci_int_enb { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_enb_s cn38xx; - struct cvmx_pci_int_enb_s cn38xxp2; - struct cvmx_pci_int_enb_cn31xx cn50xx; - struct cvmx_pci_int_enb_s cn58xx; - struct cvmx_pci_int_enb_s cn58xxp1; }; union cvmx_pci_int_enb2 { @@ -1627,11 +1360,6 @@ union cvmx_pci_int_enb2 { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_enb2_s cn38xx; - struct cvmx_pci_int_enb2_s cn38xxp2; - struct cvmx_pci_int_enb2_cn31xx cn50xx; - struct cvmx_pci_int_enb2_s cn58xx; - struct cvmx_pci_int_enb2_s cn58xxp1; }; union cvmx_pci_int_sum { @@ -1849,11 +1577,6 @@ union cvmx_pci_int_sum { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_sum_s cn38xx; - struct cvmx_pci_int_sum_s cn38xxp2; - struct cvmx_pci_int_sum_cn31xx cn50xx; - struct cvmx_pci_int_sum_s cn58xx; - struct cvmx_pci_int_sum_s cn58xxp1; }; union cvmx_pci_int_sum2 { @@ -2071,11 +1794,6 @@ union cvmx_pci_int_sum2 { uint64_t reserved_34_63:30; #endif } cn31xx; - struct cvmx_pci_int_sum2_s cn38xx; - struct cvmx_pci_int_sum2_s cn38xxp2; - struct cvmx_pci_int_sum2_cn31xx cn50xx; - struct cvmx_pci_int_sum2_s cn58xx; - struct cvmx_pci_int_sum2_s cn58xxp1; }; union cvmx_pci_msi_rcv { @@ -2089,13 +1807,6 @@ union cvmx_pci_msi_rcv { uint32_t reserved_6_31:26; #endif } s; - struct cvmx_pci_msi_rcv_s cn30xx; - struct cvmx_pci_msi_rcv_s cn31xx; - struct cvmx_pci_msi_rcv_s cn38xx; - struct cvmx_pci_msi_rcv_s cn38xxp2; - struct cvmx_pci_msi_rcv_s cn50xx; - struct cvmx_pci_msi_rcv_s cn58xx; - struct cvmx_pci_msi_rcv_s cn58xxp1; }; union cvmx_pci_pkt_creditsx { @@ -2109,13 +1820,6 @@ union cvmx_pci_pkt_creditsx { uint32_t pkt_cnt:16; #endif } s; - struct cvmx_pci_pkt_creditsx_s cn30xx; - struct cvmx_pci_pkt_creditsx_s cn31xx; - struct cvmx_pci_pkt_creditsx_s cn38xx; - struct cvmx_pci_pkt_creditsx_s cn38xxp2; - struct cvmx_pci_pkt_creditsx_s cn50xx; - struct cvmx_pci_pkt_creditsx_s cn58xx; - struct cvmx_pci_pkt_creditsx_s cn58xxp1; }; union cvmx_pci_pkts_sentx { @@ -2127,13 +1831,6 @@ union cvmx_pci_pkts_sentx { uint32_t pkt_cnt:32; #endif } s; - struct cvmx_pci_pkts_sentx_s cn30xx; - struct cvmx_pci_pkts_sentx_s cn31xx; - struct cvmx_pci_pkts_sentx_s cn38xx; - struct cvmx_pci_pkts_sentx_s cn38xxp2; - struct cvmx_pci_pkts_sentx_s cn50xx; - struct cvmx_pci_pkts_sentx_s cn58xx; - struct cvmx_pci_pkts_sentx_s cn58xxp1; }; union cvmx_pci_pkts_sent_int_levx { @@ -2145,13 +1842,6 @@ union cvmx_pci_pkts_sent_int_levx { uint32_t pkt_cnt:32; #endif } s; - struct cvmx_pci_pkts_sent_int_levx_s cn30xx; - struct cvmx_pci_pkts_sent_int_levx_s cn31xx; - struct cvmx_pci_pkts_sent_int_levx_s cn38xx; - struct cvmx_pci_pkts_sent_int_levx_s cn38xxp2; - struct cvmx_pci_pkts_sent_int_levx_s cn50xx; - struct cvmx_pci_pkts_sent_int_levx_s cn58xx; - struct cvmx_pci_pkts_sent_int_levx_s cn58xxp1; }; union cvmx_pci_pkts_sent_timex { @@ -2163,13 +1853,6 @@ union cvmx_pci_pkts_sent_timex { uint32_t pkt_time:32; #endif } s; - struct cvmx_pci_pkts_sent_timex_s cn30xx; - struct cvmx_pci_pkts_sent_timex_s cn31xx; - struct cvmx_pci_pkts_sent_timex_s cn38xx; - struct cvmx_pci_pkts_sent_timex_s cn38xxp2; - struct cvmx_pci_pkts_sent_timex_s cn50xx; - struct cvmx_pci_pkts_sent_timex_s cn58xx; - struct cvmx_pci_pkts_sent_timex_s cn58xxp1; }; union cvmx_pci_read_cmd_6 { @@ -2185,13 +1868,6 @@ union cvmx_pci_read_cmd_6 { uint32_t reserved_9_31:23; #endif } s; - struct cvmx_pci_read_cmd_6_s cn30xx; - struct cvmx_pci_read_cmd_6_s cn31xx; - struct cvmx_pci_read_cmd_6_s cn38xx; - struct cvmx_pci_read_cmd_6_s cn38xxp2; - struct cvmx_pci_read_cmd_6_s cn50xx; - struct cvmx_pci_read_cmd_6_s cn58xx; - struct cvmx_pci_read_cmd_6_s cn58xxp1; }; union cvmx_pci_read_cmd_c { @@ -2207,13 +1883,6 @@ union cvmx_pci_read_cmd_c { uint32_t reserved_9_31:23; #endif } s; - struct cvmx_pci_read_cmd_c_s cn30xx; - struct cvmx_pci_read_cmd_c_s cn31xx; - struct cvmx_pci_read_cmd_c_s cn38xx; - struct cvmx_pci_read_cmd_c_s cn38xxp2; - struct cvmx_pci_read_cmd_c_s cn50xx; - struct cvmx_pci_read_cmd_c_s cn58xx; - struct cvmx_pci_read_cmd_c_s cn58xxp1; }; union cvmx_pci_read_cmd_e { @@ -2229,13 +1898,6 @@ union cvmx_pci_read_cmd_e { uint32_t reserved_9_31:23; #endif } s; - struct cvmx_pci_read_cmd_e_s cn30xx; - struct cvmx_pci_read_cmd_e_s cn31xx; - struct cvmx_pci_read_cmd_e_s cn38xx; - struct cvmx_pci_read_cmd_e_s cn38xxp2; - struct cvmx_pci_read_cmd_e_s cn50xx; - struct cvmx_pci_read_cmd_e_s cn58xx; - struct cvmx_pci_read_cmd_e_s cn58xxp1; }; union cvmx_pci_read_timeout { @@ -2251,13 +1913,6 @@ union cvmx_pci_read_timeout { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pci_read_timeout_s cn30xx; - struct cvmx_pci_read_timeout_s cn31xx; - struct cvmx_pci_read_timeout_s cn38xx; - struct cvmx_pci_read_timeout_s cn38xxp2; - struct cvmx_pci_read_timeout_s cn50xx; - struct cvmx_pci_read_timeout_s cn58xx; - struct cvmx_pci_read_timeout_s cn58xxp1; }; union cvmx_pci_scm_reg { @@ -2271,13 +1926,6 @@ union cvmx_pci_scm_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pci_scm_reg_s cn30xx; - struct cvmx_pci_scm_reg_s cn31xx; - struct cvmx_pci_scm_reg_s cn38xx; - struct cvmx_pci_scm_reg_s cn38xxp2; - struct cvmx_pci_scm_reg_s cn50xx; - struct cvmx_pci_scm_reg_s cn58xx; - struct cvmx_pci_scm_reg_s cn58xxp1; }; union cvmx_pci_tsr_reg { @@ -2291,13 +1939,6 @@ union cvmx_pci_tsr_reg { uint64_t reserved_36_63:28; #endif } s; - struct cvmx_pci_tsr_reg_s cn30xx; - struct cvmx_pci_tsr_reg_s cn31xx; - struct cvmx_pci_tsr_reg_s cn38xx; - struct cvmx_pci_tsr_reg_s cn38xxp2; - struct cvmx_pci_tsr_reg_s cn50xx; - struct cvmx_pci_tsr_reg_s cn58xx; - struct cvmx_pci_tsr_reg_s cn58xxp1; }; union cvmx_pci_win_rd_addr { @@ -2326,7 +1967,6 @@ union cvmx_pci_win_rd_addr { uint64_t reserved_49_63:15; #endif } cn30xx; - struct cvmx_pci_win_rd_addr_cn30xx cn31xx; struct cvmx_pci_win_rd_addr_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_49_63:15; @@ -2340,10 +1980,6 @@ union cvmx_pci_win_rd_addr { uint64_t reserved_49_63:15; #endif } cn38xx; - struct cvmx_pci_win_rd_addr_cn38xx cn38xxp2; - struct cvmx_pci_win_rd_addr_cn30xx cn50xx; - struct cvmx_pci_win_rd_addr_cn38xx cn58xx; - struct cvmx_pci_win_rd_addr_cn38xx cn58xxp1; }; union cvmx_pci_win_rd_data { @@ -2355,13 +1991,6 @@ union cvmx_pci_win_rd_data { uint64_t rd_data:64; #endif } s; - struct cvmx_pci_win_rd_data_s cn30xx; - struct cvmx_pci_win_rd_data_s cn31xx; - struct cvmx_pci_win_rd_data_s cn38xx; - struct cvmx_pci_win_rd_data_s cn38xxp2; - struct cvmx_pci_win_rd_data_s cn50xx; - struct cvmx_pci_win_rd_data_s cn58xx; - struct cvmx_pci_win_rd_data_s cn58xxp1; }; union cvmx_pci_win_wr_addr { @@ -2379,13 +2008,6 @@ union cvmx_pci_win_wr_addr { uint64_t reserved_49_63:15; #endif } s; - struct cvmx_pci_win_wr_addr_s cn30xx; - struct cvmx_pci_win_wr_addr_s cn31xx; - struct cvmx_pci_win_wr_addr_s cn38xx; - struct cvmx_pci_win_wr_addr_s cn38xxp2; - struct cvmx_pci_win_wr_addr_s cn50xx; - struct cvmx_pci_win_wr_addr_s cn58xx; - struct cvmx_pci_win_wr_addr_s cn58xxp1; }; union cvmx_pci_win_wr_data { @@ -2397,13 +2019,6 @@ union cvmx_pci_win_wr_data { uint64_t wr_data:64; #endif } s; - struct cvmx_pci_win_wr_data_s cn30xx; - struct cvmx_pci_win_wr_data_s cn31xx; - struct cvmx_pci_win_wr_data_s cn38xx; - struct cvmx_pci_win_wr_data_s cn38xxp2; - struct cvmx_pci_win_wr_data_s cn50xx; - struct cvmx_pci_win_wr_data_s cn58xx; - struct cvmx_pci_win_wr_data_s cn58xxp1; }; union cvmx_pci_win_wr_mask { @@ -2417,13 +2032,6 @@ union cvmx_pci_win_wr_mask { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pci_win_wr_mask_s cn30xx; - struct cvmx_pci_win_wr_mask_s cn31xx; - struct cvmx_pci_win_wr_mask_s cn38xx; - struct cvmx_pci_win_wr_mask_s cn38xxp2; - struct cvmx_pci_win_wr_mask_s cn50xx; - struct cvmx_pci_win_wr_mask_s cn58xx; - struct cvmx_pci_win_wr_mask_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h b/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h index 39da7f9d7b3f..5f013269a89d 100644 --- a/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h @@ -361,17 +361,6 @@ union cvmx_pcsx_anx_adv_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_anx_adv_reg_s cn52xx; - struct cvmx_pcsx_anx_adv_reg_s cn52xxp1; - struct cvmx_pcsx_anx_adv_reg_s cn56xx; - struct cvmx_pcsx_anx_adv_reg_s cn56xxp1; - struct cvmx_pcsx_anx_adv_reg_s cn61xx; - struct cvmx_pcsx_anx_adv_reg_s cn63xx; - struct cvmx_pcsx_anx_adv_reg_s cn63xxp1; - struct cvmx_pcsx_anx_adv_reg_s cn66xx; - struct cvmx_pcsx_anx_adv_reg_s cn68xx; - struct cvmx_pcsx_anx_adv_reg_s cn68xxp1; - struct cvmx_pcsx_anx_adv_reg_s cnf71xx; }; union cvmx_pcsx_anx_ext_st_reg { @@ -393,17 +382,6 @@ union cvmx_pcsx_anx_ext_st_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_anx_ext_st_reg_s cn52xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn52xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cn56xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn56xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cn61xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn63xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn63xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cn66xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn68xx; - struct cvmx_pcsx_anx_ext_st_reg_s cn68xxp1; - struct cvmx_pcsx_anx_ext_st_reg_s cnf71xx; }; union cvmx_pcsx_anx_lp_abil_reg { @@ -431,17 +409,6 @@ union cvmx_pcsx_anx_lp_abil_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_anx_lp_abil_reg_s cn52xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn52xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cn56xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn56xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cn61xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn63xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn63xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cn66xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn68xx; - struct cvmx_pcsx_anx_lp_abil_reg_s cn68xxp1; - struct cvmx_pcsx_anx_lp_abil_reg_s cnf71xx; }; union cvmx_pcsx_anx_results_reg { @@ -463,17 +430,6 @@ union cvmx_pcsx_anx_results_reg { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pcsx_anx_results_reg_s cn52xx; - struct cvmx_pcsx_anx_results_reg_s cn52xxp1; - struct cvmx_pcsx_anx_results_reg_s cn56xx; - struct cvmx_pcsx_anx_results_reg_s cn56xxp1; - struct cvmx_pcsx_anx_results_reg_s cn61xx; - struct cvmx_pcsx_anx_results_reg_s cn63xx; - struct cvmx_pcsx_anx_results_reg_s cn63xxp1; - struct cvmx_pcsx_anx_results_reg_s cn66xx; - struct cvmx_pcsx_anx_results_reg_s cn68xx; - struct cvmx_pcsx_anx_results_reg_s cn68xxp1; - struct cvmx_pcsx_anx_results_reg_s cnf71xx; }; union cvmx_pcsx_intx_en_reg { @@ -542,16 +498,6 @@ union cvmx_pcsx_intx_en_reg { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_pcsx_intx_en_reg_cn52xx cn52xxp1; - struct cvmx_pcsx_intx_en_reg_cn52xx cn56xx; - struct cvmx_pcsx_intx_en_reg_cn52xx cn56xxp1; - struct cvmx_pcsx_intx_en_reg_s cn61xx; - struct cvmx_pcsx_intx_en_reg_s cn63xx; - struct cvmx_pcsx_intx_en_reg_s cn63xxp1; - struct cvmx_pcsx_intx_en_reg_s cn66xx; - struct cvmx_pcsx_intx_en_reg_s cn68xx; - struct cvmx_pcsx_intx_en_reg_s cn68xxp1; - struct cvmx_pcsx_intx_en_reg_s cnf71xx; }; union cvmx_pcsx_intx_reg { @@ -620,16 +566,6 @@ union cvmx_pcsx_intx_reg { uint64_t reserved_12_63:52; #endif } cn52xx; - struct cvmx_pcsx_intx_reg_cn52xx cn52xxp1; - struct cvmx_pcsx_intx_reg_cn52xx cn56xx; - struct cvmx_pcsx_intx_reg_cn52xx cn56xxp1; - struct cvmx_pcsx_intx_reg_s cn61xx; - struct cvmx_pcsx_intx_reg_s cn63xx; - struct cvmx_pcsx_intx_reg_s cn63xxp1; - struct cvmx_pcsx_intx_reg_s cn66xx; - struct cvmx_pcsx_intx_reg_s cn68xx; - struct cvmx_pcsx_intx_reg_s cn68xxp1; - struct cvmx_pcsx_intx_reg_s cnf71xx; }; union cvmx_pcsx_linkx_timer_count_reg { @@ -643,17 +579,6 @@ union cvmx_pcsx_linkx_timer_count_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_linkx_timer_count_reg_s cn52xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn52xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cn56xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn56xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cn61xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn63xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn63xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cn66xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn68xx; - struct cvmx_pcsx_linkx_timer_count_reg_s cn68xxp1; - struct cvmx_pcsx_linkx_timer_count_reg_s cnf71xx; }; union cvmx_pcsx_log_anlx_reg { @@ -671,17 +596,6 @@ union cvmx_pcsx_log_anlx_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsx_log_anlx_reg_s cn52xx; - struct cvmx_pcsx_log_anlx_reg_s cn52xxp1; - struct cvmx_pcsx_log_anlx_reg_s cn56xx; - struct cvmx_pcsx_log_anlx_reg_s cn56xxp1; - struct cvmx_pcsx_log_anlx_reg_s cn61xx; - struct cvmx_pcsx_log_anlx_reg_s cn63xx; - struct cvmx_pcsx_log_anlx_reg_s cn63xxp1; - struct cvmx_pcsx_log_anlx_reg_s cn66xx; - struct cvmx_pcsx_log_anlx_reg_s cn68xx; - struct cvmx_pcsx_log_anlx_reg_s cn68xxp1; - struct cvmx_pcsx_log_anlx_reg_s cnf71xx; }; union cvmx_pcsx_miscx_ctl_reg { @@ -707,17 +621,6 @@ union cvmx_pcsx_miscx_ctl_reg { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pcsx_miscx_ctl_reg_s cn52xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn52xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cn56xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn56xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cn61xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn63xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn63xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cn66xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn68xx; - struct cvmx_pcsx_miscx_ctl_reg_s cn68xxp1; - struct cvmx_pcsx_miscx_ctl_reg_s cnf71xx; }; union cvmx_pcsx_mrx_control_reg { @@ -753,17 +656,6 @@ union cvmx_pcsx_mrx_control_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_mrx_control_reg_s cn52xx; - struct cvmx_pcsx_mrx_control_reg_s cn52xxp1; - struct cvmx_pcsx_mrx_control_reg_s cn56xx; - struct cvmx_pcsx_mrx_control_reg_s cn56xxp1; - struct cvmx_pcsx_mrx_control_reg_s cn61xx; - struct cvmx_pcsx_mrx_control_reg_s cn63xx; - struct cvmx_pcsx_mrx_control_reg_s cn63xxp1; - struct cvmx_pcsx_mrx_control_reg_s cn66xx; - struct cvmx_pcsx_mrx_control_reg_s cn68xx; - struct cvmx_pcsx_mrx_control_reg_s cn68xxp1; - struct cvmx_pcsx_mrx_control_reg_s cnf71xx; }; union cvmx_pcsx_mrx_status_reg { @@ -807,17 +699,6 @@ union cvmx_pcsx_mrx_status_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_mrx_status_reg_s cn52xx; - struct cvmx_pcsx_mrx_status_reg_s cn52xxp1; - struct cvmx_pcsx_mrx_status_reg_s cn56xx; - struct cvmx_pcsx_mrx_status_reg_s cn56xxp1; - struct cvmx_pcsx_mrx_status_reg_s cn61xx; - struct cvmx_pcsx_mrx_status_reg_s cn63xx; - struct cvmx_pcsx_mrx_status_reg_s cn63xxp1; - struct cvmx_pcsx_mrx_status_reg_s cn66xx; - struct cvmx_pcsx_mrx_status_reg_s cn68xx; - struct cvmx_pcsx_mrx_status_reg_s cn68xxp1; - struct cvmx_pcsx_mrx_status_reg_s cnf71xx; }; union cvmx_pcsx_rxx_states_reg { @@ -841,17 +722,6 @@ union cvmx_pcsx_rxx_states_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_rxx_states_reg_s cn52xx; - struct cvmx_pcsx_rxx_states_reg_s cn52xxp1; - struct cvmx_pcsx_rxx_states_reg_s cn56xx; - struct cvmx_pcsx_rxx_states_reg_s cn56xxp1; - struct cvmx_pcsx_rxx_states_reg_s cn61xx; - struct cvmx_pcsx_rxx_states_reg_s cn63xx; - struct cvmx_pcsx_rxx_states_reg_s cn63xxp1; - struct cvmx_pcsx_rxx_states_reg_s cn66xx; - struct cvmx_pcsx_rxx_states_reg_s cn68xx; - struct cvmx_pcsx_rxx_states_reg_s cn68xxp1; - struct cvmx_pcsx_rxx_states_reg_s cnf71xx; }; union cvmx_pcsx_rxx_sync_reg { @@ -867,17 +737,6 @@ union cvmx_pcsx_rxx_sync_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pcsx_rxx_sync_reg_s cn52xx; - struct cvmx_pcsx_rxx_sync_reg_s cn52xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cn56xx; - struct cvmx_pcsx_rxx_sync_reg_s cn56xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cn61xx; - struct cvmx_pcsx_rxx_sync_reg_s cn63xx; - struct cvmx_pcsx_rxx_sync_reg_s cn63xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cn66xx; - struct cvmx_pcsx_rxx_sync_reg_s cn68xx; - struct cvmx_pcsx_rxx_sync_reg_s cn68xxp1; - struct cvmx_pcsx_rxx_sync_reg_s cnf71xx; }; union cvmx_pcsx_sgmx_an_adv_reg { @@ -903,17 +762,6 @@ union cvmx_pcsx_sgmx_an_adv_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn61xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn66xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xx; - struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xxp1; - struct cvmx_pcsx_sgmx_an_adv_reg_s cnf71xx; }; union cvmx_pcsx_sgmx_lp_adv_reg { @@ -937,17 +785,6 @@ union cvmx_pcsx_sgmx_lp_adv_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn61xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn66xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xx; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xxp1; - struct cvmx_pcsx_sgmx_lp_adv_reg_s cnf71xx; }; union cvmx_pcsx_txx_states_reg { @@ -965,17 +802,6 @@ union cvmx_pcsx_txx_states_reg { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pcsx_txx_states_reg_s cn52xx; - struct cvmx_pcsx_txx_states_reg_s cn52xxp1; - struct cvmx_pcsx_txx_states_reg_s cn56xx; - struct cvmx_pcsx_txx_states_reg_s cn56xxp1; - struct cvmx_pcsx_txx_states_reg_s cn61xx; - struct cvmx_pcsx_txx_states_reg_s cn63xx; - struct cvmx_pcsx_txx_states_reg_s cn63xxp1; - struct cvmx_pcsx_txx_states_reg_s cn66xx; - struct cvmx_pcsx_txx_states_reg_s cn68xx; - struct cvmx_pcsx_txx_states_reg_s cn68xxp1; - struct cvmx_pcsx_txx_states_reg_s cnf71xx; }; union cvmx_pcsx_tx_rxx_polarity_reg { @@ -995,17 +821,6 @@ union cvmx_pcsx_tx_rxx_polarity_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn61xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn66xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xx; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xxp1; - struct cvmx_pcsx_tx_rxx_polarity_reg_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h b/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h index 847dd9dca6ea..b353775eeeb6 100644 --- a/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h @@ -293,16 +293,6 @@ union cvmx_pcsxx_10gbx_status_reg { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pcsxx_10gbx_status_reg_s cn52xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn52xxp1; - struct cvmx_pcsxx_10gbx_status_reg_s cn56xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn56xxp1; - struct cvmx_pcsxx_10gbx_status_reg_s cn61xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn63xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn63xxp1; - struct cvmx_pcsxx_10gbx_status_reg_s cn66xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn68xx; - struct cvmx_pcsxx_10gbx_status_reg_s cn68xxp1; }; union cvmx_pcsxx_bist_status_reg { @@ -316,16 +306,6 @@ union cvmx_pcsxx_bist_status_reg { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_pcsxx_bist_status_reg_s cn52xx; - struct cvmx_pcsxx_bist_status_reg_s cn52xxp1; - struct cvmx_pcsxx_bist_status_reg_s cn56xx; - struct cvmx_pcsxx_bist_status_reg_s cn56xxp1; - struct cvmx_pcsxx_bist_status_reg_s cn61xx; - struct cvmx_pcsxx_bist_status_reg_s cn63xx; - struct cvmx_pcsxx_bist_status_reg_s cn63xxp1; - struct cvmx_pcsxx_bist_status_reg_s cn66xx; - struct cvmx_pcsxx_bist_status_reg_s cn68xx; - struct cvmx_pcsxx_bist_status_reg_s cn68xxp1; }; union cvmx_pcsxx_bit_lock_status_reg { @@ -345,16 +325,6 @@ union cvmx_pcsxx_bit_lock_status_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsxx_bit_lock_status_reg_s cn52xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn52xxp1; - struct cvmx_pcsxx_bit_lock_status_reg_s cn56xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn56xxp1; - struct cvmx_pcsxx_bit_lock_status_reg_s cn61xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn63xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn63xxp1; - struct cvmx_pcsxx_bit_lock_status_reg_s cn66xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn68xx; - struct cvmx_pcsxx_bit_lock_status_reg_s cn68xxp1; }; union cvmx_pcsxx_control1_reg { @@ -384,16 +354,6 @@ union cvmx_pcsxx_control1_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsxx_control1_reg_s cn52xx; - struct cvmx_pcsxx_control1_reg_s cn52xxp1; - struct cvmx_pcsxx_control1_reg_s cn56xx; - struct cvmx_pcsxx_control1_reg_s cn56xxp1; - struct cvmx_pcsxx_control1_reg_s cn61xx; - struct cvmx_pcsxx_control1_reg_s cn63xx; - struct cvmx_pcsxx_control1_reg_s cn63xxp1; - struct cvmx_pcsxx_control1_reg_s cn66xx; - struct cvmx_pcsxx_control1_reg_s cn68xx; - struct cvmx_pcsxx_control1_reg_s cn68xxp1; }; union cvmx_pcsxx_control2_reg { @@ -407,16 +367,6 @@ union cvmx_pcsxx_control2_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pcsxx_control2_reg_s cn52xx; - struct cvmx_pcsxx_control2_reg_s cn52xxp1; - struct cvmx_pcsxx_control2_reg_s cn56xx; - struct cvmx_pcsxx_control2_reg_s cn56xxp1; - struct cvmx_pcsxx_control2_reg_s cn61xx; - struct cvmx_pcsxx_control2_reg_s cn63xx; - struct cvmx_pcsxx_control2_reg_s cn63xxp1; - struct cvmx_pcsxx_control2_reg_s cn66xx; - struct cvmx_pcsxx_control2_reg_s cn68xx; - struct cvmx_pcsxx_control2_reg_s cn68xxp1; }; union cvmx_pcsxx_int_en_reg { @@ -461,15 +411,6 @@ union cvmx_pcsxx_int_en_reg { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_pcsxx_int_en_reg_cn52xx cn52xxp1; - struct cvmx_pcsxx_int_en_reg_cn52xx cn56xx; - struct cvmx_pcsxx_int_en_reg_cn52xx cn56xxp1; - struct cvmx_pcsxx_int_en_reg_s cn61xx; - struct cvmx_pcsxx_int_en_reg_s cn63xx; - struct cvmx_pcsxx_int_en_reg_s cn63xxp1; - struct cvmx_pcsxx_int_en_reg_s cn66xx; - struct cvmx_pcsxx_int_en_reg_s cn68xx; - struct cvmx_pcsxx_int_en_reg_s cn68xxp1; }; union cvmx_pcsxx_int_reg { @@ -514,15 +455,6 @@ union cvmx_pcsxx_int_reg { uint64_t reserved_6_63:58; #endif } cn52xx; - struct cvmx_pcsxx_int_reg_cn52xx cn52xxp1; - struct cvmx_pcsxx_int_reg_cn52xx cn56xx; - struct cvmx_pcsxx_int_reg_cn52xx cn56xxp1; - struct cvmx_pcsxx_int_reg_s cn61xx; - struct cvmx_pcsxx_int_reg_s cn63xx; - struct cvmx_pcsxx_int_reg_s cn63xxp1; - struct cvmx_pcsxx_int_reg_s cn66xx; - struct cvmx_pcsxx_int_reg_s cn68xx; - struct cvmx_pcsxx_int_reg_s cn68xxp1; }; union cvmx_pcsxx_log_anl_reg { @@ -544,16 +476,6 @@ union cvmx_pcsxx_log_anl_reg { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pcsxx_log_anl_reg_s cn52xx; - struct cvmx_pcsxx_log_anl_reg_s cn52xxp1; - struct cvmx_pcsxx_log_anl_reg_s cn56xx; - struct cvmx_pcsxx_log_anl_reg_s cn56xxp1; - struct cvmx_pcsxx_log_anl_reg_s cn61xx; - struct cvmx_pcsxx_log_anl_reg_s cn63xx; - struct cvmx_pcsxx_log_anl_reg_s cn63xxp1; - struct cvmx_pcsxx_log_anl_reg_s cn66xx; - struct cvmx_pcsxx_log_anl_reg_s cn68xx; - struct cvmx_pcsxx_log_anl_reg_s cn68xxp1; }; union cvmx_pcsxx_misc_ctl_reg { @@ -573,16 +495,6 @@ union cvmx_pcsxx_misc_ctl_reg { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pcsxx_misc_ctl_reg_s cn52xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn52xxp1; - struct cvmx_pcsxx_misc_ctl_reg_s cn56xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn56xxp1; - struct cvmx_pcsxx_misc_ctl_reg_s cn61xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn63xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn63xxp1; - struct cvmx_pcsxx_misc_ctl_reg_s cn66xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn68xx; - struct cvmx_pcsxx_misc_ctl_reg_s cn68xxp1; }; union cvmx_pcsxx_rx_sync_states_reg { @@ -602,16 +514,6 @@ union cvmx_pcsxx_rx_sync_states_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsxx_rx_sync_states_reg_s cn52xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn52xxp1; - struct cvmx_pcsxx_rx_sync_states_reg_s cn56xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn56xxp1; - struct cvmx_pcsxx_rx_sync_states_reg_s cn61xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn63xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn63xxp1; - struct cvmx_pcsxx_rx_sync_states_reg_s cn66xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn68xx; - struct cvmx_pcsxx_rx_sync_states_reg_s cn68xxp1; }; union cvmx_pcsxx_spd_abil_reg { @@ -627,16 +529,6 @@ union cvmx_pcsxx_spd_abil_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pcsxx_spd_abil_reg_s cn52xx; - struct cvmx_pcsxx_spd_abil_reg_s cn52xxp1; - struct cvmx_pcsxx_spd_abil_reg_s cn56xx; - struct cvmx_pcsxx_spd_abil_reg_s cn56xxp1; - struct cvmx_pcsxx_spd_abil_reg_s cn61xx; - struct cvmx_pcsxx_spd_abil_reg_s cn63xx; - struct cvmx_pcsxx_spd_abil_reg_s cn63xxp1; - struct cvmx_pcsxx_spd_abil_reg_s cn66xx; - struct cvmx_pcsxx_spd_abil_reg_s cn68xx; - struct cvmx_pcsxx_spd_abil_reg_s cn68xxp1; }; union cvmx_pcsxx_status1_reg { @@ -658,16 +550,6 @@ union cvmx_pcsxx_status1_reg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pcsxx_status1_reg_s cn52xx; - struct cvmx_pcsxx_status1_reg_s cn52xxp1; - struct cvmx_pcsxx_status1_reg_s cn56xx; - struct cvmx_pcsxx_status1_reg_s cn56xxp1; - struct cvmx_pcsxx_status1_reg_s cn61xx; - struct cvmx_pcsxx_status1_reg_s cn63xx; - struct cvmx_pcsxx_status1_reg_s cn63xxp1; - struct cvmx_pcsxx_status1_reg_s cn66xx; - struct cvmx_pcsxx_status1_reg_s cn68xx; - struct cvmx_pcsxx_status1_reg_s cn68xxp1; }; union cvmx_pcsxx_status2_reg { @@ -695,16 +577,6 @@ union cvmx_pcsxx_status2_reg { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pcsxx_status2_reg_s cn52xx; - struct cvmx_pcsxx_status2_reg_s cn52xxp1; - struct cvmx_pcsxx_status2_reg_s cn56xx; - struct cvmx_pcsxx_status2_reg_s cn56xxp1; - struct cvmx_pcsxx_status2_reg_s cn61xx; - struct cvmx_pcsxx_status2_reg_s cn63xx; - struct cvmx_pcsxx_status2_reg_s cn63xxp1; - struct cvmx_pcsxx_status2_reg_s cn66xx; - struct cvmx_pcsxx_status2_reg_s cn68xx; - struct cvmx_pcsxx_status2_reg_s cn68xxp1; }; union cvmx_pcsxx_tx_rx_polarity_reg { @@ -724,7 +596,6 @@ union cvmx_pcsxx_tx_rx_polarity_reg { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn52xx; struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_2_63:62; @@ -736,14 +607,6 @@ union cvmx_pcsxx_tx_rx_polarity_reg { uint64_t reserved_2_63:62; #endif } cn52xxp1; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn56xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 cn56xxp1; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn61xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xxp1; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn66xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xx; - struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xxp1; }; union cvmx_pcsxx_tx_rx_states_reg { @@ -773,7 +636,6 @@ union cvmx_pcsxx_tx_rx_states_reg { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pcsxx_tx_rx_states_reg_s cn52xx; struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_13_63:51; @@ -797,14 +659,6 @@ union cvmx_pcsxx_tx_rx_states_reg { uint64_t reserved_13_63:51; #endif } cn52xxp1; - struct cvmx_pcsxx_tx_rx_states_reg_s cn56xx; - struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 cn56xxp1; - struct cvmx_pcsxx_tx_rx_states_reg_s cn61xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn63xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn63xxp1; - struct cvmx_pcsxx_tx_rx_states_reg_s cn66xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn68xx; - struct cvmx_pcsxx_tx_rx_states_reg_s cn68xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pemx-defs.h b/arch/mips/include/asm/octeon/cvmx-pemx-defs.h index 50a916f892fa..d2d6dba938e9 100644 --- a/arch/mips/include/asm/octeon/cvmx-pemx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pemx-defs.h @@ -68,13 +68,6 @@ union cvmx_pemx_bar1_indexx { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_pemx_bar1_indexx_s cn61xx; - struct cvmx_pemx_bar1_indexx_s cn63xx; - struct cvmx_pemx_bar1_indexx_s cn63xxp1; - struct cvmx_pemx_bar1_indexx_s cn66xx; - struct cvmx_pemx_bar1_indexx_s cn68xx; - struct cvmx_pemx_bar1_indexx_s cn68xxp1; - struct cvmx_pemx_bar1_indexx_s cnf71xx; }; union cvmx_pemx_bar2_mask { @@ -90,11 +83,6 @@ union cvmx_pemx_bar2_mask { uint64_t reserved_38_63:26; #endif } s; - struct cvmx_pemx_bar2_mask_s cn61xx; - struct cvmx_pemx_bar2_mask_s cn66xx; - struct cvmx_pemx_bar2_mask_s cn68xx; - struct cvmx_pemx_bar2_mask_s cn68xxp1; - struct cvmx_pemx_bar2_mask_s cnf71xx; }; union cvmx_pemx_bar_ctl { @@ -114,13 +102,6 @@ union cvmx_pemx_bar_ctl { uint64_t reserved_7_63:57; #endif } s; - struct cvmx_pemx_bar_ctl_s cn61xx; - struct cvmx_pemx_bar_ctl_s cn63xx; - struct cvmx_pemx_bar_ctl_s cn63xxp1; - struct cvmx_pemx_bar_ctl_s cn66xx; - struct cvmx_pemx_bar_ctl_s cn68xx; - struct cvmx_pemx_bar_ctl_s cn68xxp1; - struct cvmx_pemx_bar_ctl_s cnf71xx; }; union cvmx_pemx_bist_status { @@ -148,13 +129,6 @@ union cvmx_pemx_bist_status { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pemx_bist_status_s cn61xx; - struct cvmx_pemx_bist_status_s cn63xx; - struct cvmx_pemx_bist_status_s cn63xxp1; - struct cvmx_pemx_bist_status_s cn66xx; - struct cvmx_pemx_bist_status_s cn68xx; - struct cvmx_pemx_bist_status_s cn68xxp1; - struct cvmx_pemx_bist_status_s cnf71xx; }; union cvmx_pemx_bist_status2 { @@ -186,13 +160,6 @@ union cvmx_pemx_bist_status2 { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pemx_bist_status2_s cn61xx; - struct cvmx_pemx_bist_status2_s cn63xx; - struct cvmx_pemx_bist_status2_s cn63xxp1; - struct cvmx_pemx_bist_status2_s cn66xx; - struct cvmx_pemx_bist_status2_s cn68xx; - struct cvmx_pemx_bist_status2_s cn68xxp1; - struct cvmx_pemx_bist_status2_s cnf71xx; }; union cvmx_pemx_cfg_rd { @@ -206,13 +173,6 @@ union cvmx_pemx_cfg_rd { uint64_t data:32; #endif } s; - struct cvmx_pemx_cfg_rd_s cn61xx; - struct cvmx_pemx_cfg_rd_s cn63xx; - struct cvmx_pemx_cfg_rd_s cn63xxp1; - struct cvmx_pemx_cfg_rd_s cn66xx; - struct cvmx_pemx_cfg_rd_s cn68xx; - struct cvmx_pemx_cfg_rd_s cn68xxp1; - struct cvmx_pemx_cfg_rd_s cnf71xx; }; union cvmx_pemx_cfg_wr { @@ -226,13 +186,6 @@ union cvmx_pemx_cfg_wr { uint64_t data:32; #endif } s; - struct cvmx_pemx_cfg_wr_s cn61xx; - struct cvmx_pemx_cfg_wr_s cn63xx; - struct cvmx_pemx_cfg_wr_s cn63xxp1; - struct cvmx_pemx_cfg_wr_s cn66xx; - struct cvmx_pemx_cfg_wr_s cn68xx; - struct cvmx_pemx_cfg_wr_s cn68xxp1; - struct cvmx_pemx_cfg_wr_s cnf71xx; }; union cvmx_pemx_cpl_lut_valid { @@ -246,13 +199,6 @@ union cvmx_pemx_cpl_lut_valid { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pemx_cpl_lut_valid_s cn61xx; - struct cvmx_pemx_cpl_lut_valid_s cn63xx; - struct cvmx_pemx_cpl_lut_valid_s cn63xxp1; - struct cvmx_pemx_cpl_lut_valid_s cn66xx; - struct cvmx_pemx_cpl_lut_valid_s cn68xx; - struct cvmx_pemx_cpl_lut_valid_s cn68xxp1; - struct cvmx_pemx_cpl_lut_valid_s cnf71xx; }; union cvmx_pemx_ctl_status { @@ -298,13 +244,6 @@ union cvmx_pemx_ctl_status { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pemx_ctl_status_s cn61xx; - struct cvmx_pemx_ctl_status_s cn63xx; - struct cvmx_pemx_ctl_status_s cn63xxp1; - struct cvmx_pemx_ctl_status_s cn66xx; - struct cvmx_pemx_ctl_status_s cn68xx; - struct cvmx_pemx_ctl_status_s cn68xxp1; - struct cvmx_pemx_ctl_status_s cnf71xx; }; union cvmx_pemx_dbg_info { @@ -378,13 +317,6 @@ union cvmx_pemx_dbg_info { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pemx_dbg_info_s cn61xx; - struct cvmx_pemx_dbg_info_s cn63xx; - struct cvmx_pemx_dbg_info_s cn63xxp1; - struct cvmx_pemx_dbg_info_s cn66xx; - struct cvmx_pemx_dbg_info_s cn68xx; - struct cvmx_pemx_dbg_info_s cn68xxp1; - struct cvmx_pemx_dbg_info_s cnf71xx; }; union cvmx_pemx_dbg_info_en { @@ -458,13 +390,6 @@ union cvmx_pemx_dbg_info_en { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pemx_dbg_info_en_s cn61xx; - struct cvmx_pemx_dbg_info_en_s cn63xx; - struct cvmx_pemx_dbg_info_en_s cn63xxp1; - struct cvmx_pemx_dbg_info_en_s cn66xx; - struct cvmx_pemx_dbg_info_en_s cn68xx; - struct cvmx_pemx_dbg_info_en_s cn68xxp1; - struct cvmx_pemx_dbg_info_en_s cnf71xx; }; union cvmx_pemx_diag_status { @@ -484,13 +409,6 @@ union cvmx_pemx_diag_status { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pemx_diag_status_s cn61xx; - struct cvmx_pemx_diag_status_s cn63xx; - struct cvmx_pemx_diag_status_s cn63xxp1; - struct cvmx_pemx_diag_status_s cn66xx; - struct cvmx_pemx_diag_status_s cn68xx; - struct cvmx_pemx_diag_status_s cn68xxp1; - struct cvmx_pemx_diag_status_s cnf71xx; }; union cvmx_pemx_inb_read_credits { @@ -504,10 +422,6 @@ union cvmx_pemx_inb_read_credits { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_pemx_inb_read_credits_s cn61xx; - struct cvmx_pemx_inb_read_credits_s cn66xx; - struct cvmx_pemx_inb_read_credits_s cn68xx; - struct cvmx_pemx_inb_read_credits_s cnf71xx; }; union cvmx_pemx_int_enb { @@ -547,13 +461,6 @@ union cvmx_pemx_int_enb { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pemx_int_enb_s cn61xx; - struct cvmx_pemx_int_enb_s cn63xx; - struct cvmx_pemx_int_enb_s cn63xxp1; - struct cvmx_pemx_int_enb_s cn66xx; - struct cvmx_pemx_int_enb_s cn68xx; - struct cvmx_pemx_int_enb_s cn68xxp1; - struct cvmx_pemx_int_enb_s cnf71xx; }; union cvmx_pemx_int_enb_int { @@ -593,13 +500,6 @@ union cvmx_pemx_int_enb_int { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pemx_int_enb_int_s cn61xx; - struct cvmx_pemx_int_enb_int_s cn63xx; - struct cvmx_pemx_int_enb_int_s cn63xxp1; - struct cvmx_pemx_int_enb_int_s cn66xx; - struct cvmx_pemx_int_enb_int_s cn68xx; - struct cvmx_pemx_int_enb_int_s cn68xxp1; - struct cvmx_pemx_int_enb_int_s cnf71xx; }; union cvmx_pemx_int_sum { @@ -639,13 +539,6 @@ union cvmx_pemx_int_sum { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pemx_int_sum_s cn61xx; - struct cvmx_pemx_int_sum_s cn63xx; - struct cvmx_pemx_int_sum_s cn63xxp1; - struct cvmx_pemx_int_sum_s cn66xx; - struct cvmx_pemx_int_sum_s cn68xx; - struct cvmx_pemx_int_sum_s cn68xxp1; - struct cvmx_pemx_int_sum_s cnf71xx; }; union cvmx_pemx_p2n_bar0_start { @@ -659,13 +552,6 @@ union cvmx_pemx_p2n_bar0_start { uint64_t addr:50; #endif } s; - struct cvmx_pemx_p2n_bar0_start_s cn61xx; - struct cvmx_pemx_p2n_bar0_start_s cn63xx; - struct cvmx_pemx_p2n_bar0_start_s cn63xxp1; - struct cvmx_pemx_p2n_bar0_start_s cn66xx; - struct cvmx_pemx_p2n_bar0_start_s cn68xx; - struct cvmx_pemx_p2n_bar0_start_s cn68xxp1; - struct cvmx_pemx_p2n_bar0_start_s cnf71xx; }; union cvmx_pemx_p2n_bar1_start { @@ -679,13 +565,6 @@ union cvmx_pemx_p2n_bar1_start { uint64_t addr:38; #endif } s; - struct cvmx_pemx_p2n_bar1_start_s cn61xx; - struct cvmx_pemx_p2n_bar1_start_s cn63xx; - struct cvmx_pemx_p2n_bar1_start_s cn63xxp1; - struct cvmx_pemx_p2n_bar1_start_s cn66xx; - struct cvmx_pemx_p2n_bar1_start_s cn68xx; - struct cvmx_pemx_p2n_bar1_start_s cn68xxp1; - struct cvmx_pemx_p2n_bar1_start_s cnf71xx; }; union cvmx_pemx_p2n_bar2_start { @@ -699,13 +578,6 @@ union cvmx_pemx_p2n_bar2_start { uint64_t addr:23; #endif } s; - struct cvmx_pemx_p2n_bar2_start_s cn61xx; - struct cvmx_pemx_p2n_bar2_start_s cn63xx; - struct cvmx_pemx_p2n_bar2_start_s cn63xxp1; - struct cvmx_pemx_p2n_bar2_start_s cn66xx; - struct cvmx_pemx_p2n_bar2_start_s cn68xx; - struct cvmx_pemx_p2n_bar2_start_s cn68xxp1; - struct cvmx_pemx_p2n_bar2_start_s cnf71xx; }; union cvmx_pemx_p2p_barx_end { @@ -719,11 +591,6 @@ union cvmx_pemx_p2p_barx_end { uint64_t addr:52; #endif } s; - struct cvmx_pemx_p2p_barx_end_s cn63xx; - struct cvmx_pemx_p2p_barx_end_s cn63xxp1; - struct cvmx_pemx_p2p_barx_end_s cn66xx; - struct cvmx_pemx_p2p_barx_end_s cn68xx; - struct cvmx_pemx_p2p_barx_end_s cn68xxp1; }; union cvmx_pemx_p2p_barx_start { @@ -737,11 +604,6 @@ union cvmx_pemx_p2p_barx_start { uint64_t addr:52; #endif } s; - struct cvmx_pemx_p2p_barx_start_s cn63xx; - struct cvmx_pemx_p2p_barx_start_s cn63xxp1; - struct cvmx_pemx_p2p_barx_start_s cn66xx; - struct cvmx_pemx_p2p_barx_start_s cn68xx; - struct cvmx_pemx_p2p_barx_start_s cn68xxp1; }; union cvmx_pemx_tlp_credits { @@ -784,12 +646,6 @@ union cvmx_pemx_tlp_credits { uint64_t reserved_56_63:8; #endif } cn61xx; - struct cvmx_pemx_tlp_credits_s cn63xx; - struct cvmx_pemx_tlp_credits_s cn63xxp1; - struct cvmx_pemx_tlp_credits_s cn66xx; - struct cvmx_pemx_tlp_credits_s cn68xx; - struct cvmx_pemx_tlp_credits_s cn68xxp1; - struct cvmx_pemx_tlp_credits_cn61xx cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h index 59b3dc565442..66561082529e 100644 --- a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h @@ -80,7 +80,6 @@ union cvmx_pescx_bist_status { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pescx_bist_status_s cn52xx; struct cvmx_pescx_bist_status_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -112,8 +111,6 @@ union cvmx_pescx_bist_status { uint64_t reserved_12_63:52; #endif } cn52xxp1; - struct cvmx_pescx_bist_status_s cn56xx; - struct cvmx_pescx_bist_status_cn52xxp1 cn56xxp1; }; union cvmx_pescx_bist_status2 { @@ -153,10 +150,6 @@ union cvmx_pescx_bist_status2 { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_pescx_bist_status2_s cn52xx; - struct cvmx_pescx_bist_status2_s cn52xxp1; - struct cvmx_pescx_bist_status2_s cn56xx; - struct cvmx_pescx_bist_status2_s cn56xxp1; }; union cvmx_pescx_cfg_rd { @@ -170,10 +163,6 @@ union cvmx_pescx_cfg_rd { uint64_t data:32; #endif } s; - struct cvmx_pescx_cfg_rd_s cn52xx; - struct cvmx_pescx_cfg_rd_s cn52xxp1; - struct cvmx_pescx_cfg_rd_s cn56xx; - struct cvmx_pescx_cfg_rd_s cn56xxp1; }; union cvmx_pescx_cfg_wr { @@ -187,10 +176,6 @@ union cvmx_pescx_cfg_wr { uint64_t data:32; #endif } s; - struct cvmx_pescx_cfg_wr_s cn52xx; - struct cvmx_pescx_cfg_wr_s cn52xxp1; - struct cvmx_pescx_cfg_wr_s cn56xx; - struct cvmx_pescx_cfg_wr_s cn56xxp1; }; union cvmx_pescx_cpl_lut_valid { @@ -204,10 +189,6 @@ union cvmx_pescx_cpl_lut_valid { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pescx_cpl_lut_valid_s cn52xx; - struct cvmx_pescx_cpl_lut_valid_s cn52xxp1; - struct cvmx_pescx_cpl_lut_valid_s cn56xx; - struct cvmx_pescx_cpl_lut_valid_s cn56xxp1; }; union cvmx_pescx_ctl_status { @@ -249,8 +230,6 @@ union cvmx_pescx_ctl_status { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_pescx_ctl_status_s cn52xx; - struct cvmx_pescx_ctl_status_s cn52xxp1; struct cvmx_pescx_ctl_status_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -288,7 +267,6 @@ union cvmx_pescx_ctl_status { uint64_t reserved_28_63:36; #endif } cn56xx; - struct cvmx_pescx_ctl_status_cn56xx cn56xxp1; }; union cvmx_pescx_ctl_status2 { @@ -304,7 +282,6 @@ union cvmx_pescx_ctl_status2 { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pescx_ctl_status2_s cn52xx; struct cvmx_pescx_ctl_status2_cn52xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63:63; @@ -314,8 +291,6 @@ union cvmx_pescx_ctl_status2 { uint64_t reserved_1_63:63; #endif } cn52xxp1; - struct cvmx_pescx_ctl_status2_s cn56xx; - struct cvmx_pescx_ctl_status2_cn52xxp1 cn56xxp1; }; union cvmx_pescx_dbg_info { @@ -389,10 +364,6 @@ union cvmx_pescx_dbg_info { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pescx_dbg_info_s cn52xx; - struct cvmx_pescx_dbg_info_s cn52xxp1; - struct cvmx_pescx_dbg_info_s cn56xx; - struct cvmx_pescx_dbg_info_s cn56xxp1; }; union cvmx_pescx_dbg_info_en { @@ -466,10 +437,6 @@ union cvmx_pescx_dbg_info_en { uint64_t reserved_31_63:33; #endif } s; - struct cvmx_pescx_dbg_info_en_s cn52xx; - struct cvmx_pescx_dbg_info_en_s cn52xxp1; - struct cvmx_pescx_dbg_info_en_s cn56xx; - struct cvmx_pescx_dbg_info_en_s cn56xxp1; }; union cvmx_pescx_diag_status { @@ -489,10 +456,6 @@ union cvmx_pescx_diag_status { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pescx_diag_status_s cn52xx; - struct cvmx_pescx_diag_status_s cn52xxp1; - struct cvmx_pescx_diag_status_s cn56xx; - struct cvmx_pescx_diag_status_s cn56xxp1; }; union cvmx_pescx_p2n_bar0_start { @@ -506,10 +469,6 @@ union cvmx_pescx_p2n_bar0_start { uint64_t addr:50; #endif } s; - struct cvmx_pescx_p2n_bar0_start_s cn52xx; - struct cvmx_pescx_p2n_bar0_start_s cn52xxp1; - struct cvmx_pescx_p2n_bar0_start_s cn56xx; - struct cvmx_pescx_p2n_bar0_start_s cn56xxp1; }; union cvmx_pescx_p2n_bar1_start { @@ -523,10 +482,6 @@ union cvmx_pescx_p2n_bar1_start { uint64_t addr:38; #endif } s; - struct cvmx_pescx_p2n_bar1_start_s cn52xx; - struct cvmx_pescx_p2n_bar1_start_s cn52xxp1; - struct cvmx_pescx_p2n_bar1_start_s cn56xx; - struct cvmx_pescx_p2n_bar1_start_s cn56xxp1; }; union cvmx_pescx_p2n_bar2_start { @@ -540,10 +495,6 @@ union cvmx_pescx_p2n_bar2_start { uint64_t addr:25; #endif } s; - struct cvmx_pescx_p2n_bar2_start_s cn52xx; - struct cvmx_pescx_p2n_bar2_start_s cn52xxp1; - struct cvmx_pescx_p2n_bar2_start_s cn56xx; - struct cvmx_pescx_p2n_bar2_start_s cn56xxp1; }; union cvmx_pescx_p2p_barx_end { @@ -557,10 +508,6 @@ union cvmx_pescx_p2p_barx_end { uint64_t addr:52; #endif } s; - struct cvmx_pescx_p2p_barx_end_s cn52xx; - struct cvmx_pescx_p2p_barx_end_s cn52xxp1; - struct cvmx_pescx_p2p_barx_end_s cn56xx; - struct cvmx_pescx_p2p_barx_end_s cn56xxp1; }; union cvmx_pescx_p2p_barx_start { @@ -574,10 +521,6 @@ union cvmx_pescx_p2p_barx_start { uint64_t addr:52; #endif } s; - struct cvmx_pescx_p2p_barx_start_s cn52xx; - struct cvmx_pescx_p2p_barx_start_s cn52xxp1; - struct cvmx_pescx_p2p_barx_start_s cn56xx; - struct cvmx_pescx_p2p_barx_start_s cn56xxp1; }; union cvmx_pescx_tlp_credits { @@ -631,8 +574,6 @@ union cvmx_pescx_tlp_credits { uint64_t reserved_38_63:26; #endif } cn52xxp1; - struct cvmx_pescx_tlp_credits_cn52xx cn56xx; - struct cvmx_pescx_tlp_credits_cn52xxp1 cn56xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pip-defs.h b/arch/mips/include/asm/octeon/cvmx-pip-defs.h index e975c7d2e485..e42f411bd2de 100644 --- a/arch/mips/include/asm/octeon/cvmx-pip-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pip-defs.h @@ -160,10 +160,6 @@ union cvmx_pip_alt_skip_cfgx { uint64_t reserved_57_63:7; #endif } s; - struct cvmx_pip_alt_skip_cfgx_s cn61xx; - struct cvmx_pip_alt_skip_cfgx_s cn66xx; - struct cvmx_pip_alt_skip_cfgx_s cn68xx; - struct cvmx_pip_alt_skip_cfgx_s cnf71xx; }; union cvmx_pip_bck_prs { @@ -183,19 +179,6 @@ union cvmx_pip_bck_prs { uint64_t bckprs:1; #endif } s; - struct cvmx_pip_bck_prs_s cn38xx; - struct cvmx_pip_bck_prs_s cn38xxp2; - struct cvmx_pip_bck_prs_s cn56xx; - struct cvmx_pip_bck_prs_s cn56xxp1; - struct cvmx_pip_bck_prs_s cn58xx; - struct cvmx_pip_bck_prs_s cn58xxp1; - struct cvmx_pip_bck_prs_s cn61xx; - struct cvmx_pip_bck_prs_s cn63xx; - struct cvmx_pip_bck_prs_s cn63xxp1; - struct cvmx_pip_bck_prs_s cn66xx; - struct cvmx_pip_bck_prs_s cn68xx; - struct cvmx_pip_bck_prs_s cn68xxp1; - struct cvmx_pip_bck_prs_s cnf71xx; }; union cvmx_pip_bist_status { @@ -218,9 +201,6 @@ union cvmx_pip_bist_status { uint64_t reserved_18_63:46; #endif } cn30xx; - struct cvmx_pip_bist_status_cn30xx cn31xx; - struct cvmx_pip_bist_status_cn30xx cn38xx; - struct cvmx_pip_bist_status_cn30xx cn38xxp2; struct cvmx_pip_bist_status_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_17_63:47; @@ -230,12 +210,6 @@ union cvmx_pip_bist_status { uint64_t reserved_17_63:47; #endif } cn50xx; - struct cvmx_pip_bist_status_cn30xx cn52xx; - struct cvmx_pip_bist_status_cn30xx cn52xxp1; - struct cvmx_pip_bist_status_cn30xx cn56xx; - struct cvmx_pip_bist_status_cn30xx cn56xxp1; - struct cvmx_pip_bist_status_cn30xx cn58xx; - struct cvmx_pip_bist_status_cn30xx cn58xxp1; struct cvmx_pip_bist_status_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -245,12 +219,6 @@ union cvmx_pip_bist_status { uint64_t reserved_20_63:44; #endif } cn61xx; - struct cvmx_pip_bist_status_cn30xx cn63xx; - struct cvmx_pip_bist_status_cn30xx cn63xxp1; - struct cvmx_pip_bist_status_cn61xx cn66xx; - struct cvmx_pip_bist_status_s cn68xx; - struct cvmx_pip_bist_status_cn61xx cn68xxp1; - struct cvmx_pip_bist_status_cn61xx cnf71xx; }; union cvmx_pip_bsel_ext_cfgx { @@ -274,9 +242,6 @@ union cvmx_pip_bsel_ext_cfgx { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_pip_bsel_ext_cfgx_s cn61xx; - struct cvmx_pip_bsel_ext_cfgx_s cn68xx; - struct cvmx_pip_bsel_ext_cfgx_s cnf71xx; }; union cvmx_pip_bsel_ext_posx { @@ -318,9 +283,6 @@ union cvmx_pip_bsel_ext_posx { uint64_t pos7_val:1; #endif } s; - struct cvmx_pip_bsel_ext_posx_s cn61xx; - struct cvmx_pip_bsel_ext_posx_s cn68xx; - struct cvmx_pip_bsel_ext_posx_s cnf71xx; }; union cvmx_pip_bsel_tbl_entx { @@ -383,8 +345,6 @@ union cvmx_pip_bsel_tbl_entx { uint64_t tag_en:1; #endif } cn61xx; - struct cvmx_pip_bsel_tbl_entx_s cn68xx; - struct cvmx_pip_bsel_tbl_entx_cn61xx cnf71xx; }; union cvmx_pip_clken { @@ -398,13 +358,6 @@ union cvmx_pip_clken { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_pip_clken_s cn61xx; - struct cvmx_pip_clken_s cn63xx; - struct cvmx_pip_clken_s cn63xxp1; - struct cvmx_pip_clken_s cn66xx; - struct cvmx_pip_clken_s cn68xx; - struct cvmx_pip_clken_s cn68xxp1; - struct cvmx_pip_clken_s cnf71xx; }; union cvmx_pip_crc_ctlx { @@ -420,10 +373,6 @@ union cvmx_pip_crc_ctlx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pip_crc_ctlx_s cn38xx; - struct cvmx_pip_crc_ctlx_s cn38xxp2; - struct cvmx_pip_crc_ctlx_s cn58xx; - struct cvmx_pip_crc_ctlx_s cn58xxp1; }; union cvmx_pip_crc_ivx { @@ -437,10 +386,6 @@ union cvmx_pip_crc_ivx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_crc_ivx_s cn38xx; - struct cvmx_pip_crc_ivx_s cn38xxp2; - struct cvmx_pip_crc_ivx_s cn58xx; - struct cvmx_pip_crc_ivx_s cn58xxp1; }; union cvmx_pip_dec_ipsecx { @@ -458,24 +403,6 @@ union cvmx_pip_dec_ipsecx { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_pip_dec_ipsecx_s cn30xx; - struct cvmx_pip_dec_ipsecx_s cn31xx; - struct cvmx_pip_dec_ipsecx_s cn38xx; - struct cvmx_pip_dec_ipsecx_s cn38xxp2; - struct cvmx_pip_dec_ipsecx_s cn50xx; - struct cvmx_pip_dec_ipsecx_s cn52xx; - struct cvmx_pip_dec_ipsecx_s cn52xxp1; - struct cvmx_pip_dec_ipsecx_s cn56xx; - struct cvmx_pip_dec_ipsecx_s cn56xxp1; - struct cvmx_pip_dec_ipsecx_s cn58xx; - struct cvmx_pip_dec_ipsecx_s cn58xxp1; - struct cvmx_pip_dec_ipsecx_s cn61xx; - struct cvmx_pip_dec_ipsecx_s cn63xx; - struct cvmx_pip_dec_ipsecx_s cn63xxp1; - struct cvmx_pip_dec_ipsecx_s cn66xx; - struct cvmx_pip_dec_ipsecx_s cn68xx; - struct cvmx_pip_dec_ipsecx_s cn68xxp1; - struct cvmx_pip_dec_ipsecx_s cnf71xx; }; union cvmx_pip_dsa_src_grp { @@ -517,16 +444,6 @@ union cvmx_pip_dsa_src_grp { uint64_t map15:4; #endif } s; - struct cvmx_pip_dsa_src_grp_s cn52xx; - struct cvmx_pip_dsa_src_grp_s cn52xxp1; - struct cvmx_pip_dsa_src_grp_s cn56xx; - struct cvmx_pip_dsa_src_grp_s cn61xx; - struct cvmx_pip_dsa_src_grp_s cn63xx; - struct cvmx_pip_dsa_src_grp_s cn63xxp1; - struct cvmx_pip_dsa_src_grp_s cn66xx; - struct cvmx_pip_dsa_src_grp_s cn68xx; - struct cvmx_pip_dsa_src_grp_s cn68xxp1; - struct cvmx_pip_dsa_src_grp_s cnf71xx; }; union cvmx_pip_dsa_vid_grp { @@ -568,16 +485,6 @@ union cvmx_pip_dsa_vid_grp { uint64_t map15:4; #endif } s; - struct cvmx_pip_dsa_vid_grp_s cn52xx; - struct cvmx_pip_dsa_vid_grp_s cn52xxp1; - struct cvmx_pip_dsa_vid_grp_s cn56xx; - struct cvmx_pip_dsa_vid_grp_s cn61xx; - struct cvmx_pip_dsa_vid_grp_s cn63xx; - struct cvmx_pip_dsa_vid_grp_s cn63xxp1; - struct cvmx_pip_dsa_vid_grp_s cn66xx; - struct cvmx_pip_dsa_vid_grp_s cn68xx; - struct cvmx_pip_dsa_vid_grp_s cn68xxp1; - struct cvmx_pip_dsa_vid_grp_s cnf71xx; }; union cvmx_pip_frm_len_chkx { @@ -593,18 +500,6 @@ union cvmx_pip_frm_len_chkx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_frm_len_chkx_s cn50xx; - struct cvmx_pip_frm_len_chkx_s cn52xx; - struct cvmx_pip_frm_len_chkx_s cn52xxp1; - struct cvmx_pip_frm_len_chkx_s cn56xx; - struct cvmx_pip_frm_len_chkx_s cn56xxp1; - struct cvmx_pip_frm_len_chkx_s cn61xx; - struct cvmx_pip_frm_len_chkx_s cn63xx; - struct cvmx_pip_frm_len_chkx_s cn63xxp1; - struct cvmx_pip_frm_len_chkx_s cn66xx; - struct cvmx_pip_frm_len_chkx_s cn68xx; - struct cvmx_pip_frm_len_chkx_s cn68xxp1; - struct cvmx_pip_frm_len_chkx_s cnf71xx; }; union cvmx_pip_gbl_cfg { @@ -630,24 +525,6 @@ union cvmx_pip_gbl_cfg { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_pip_gbl_cfg_s cn30xx; - struct cvmx_pip_gbl_cfg_s cn31xx; - struct cvmx_pip_gbl_cfg_s cn38xx; - struct cvmx_pip_gbl_cfg_s cn38xxp2; - struct cvmx_pip_gbl_cfg_s cn50xx; - struct cvmx_pip_gbl_cfg_s cn52xx; - struct cvmx_pip_gbl_cfg_s cn52xxp1; - struct cvmx_pip_gbl_cfg_s cn56xx; - struct cvmx_pip_gbl_cfg_s cn56xxp1; - struct cvmx_pip_gbl_cfg_s cn58xx; - struct cvmx_pip_gbl_cfg_s cn58xxp1; - struct cvmx_pip_gbl_cfg_s cn61xx; - struct cvmx_pip_gbl_cfg_s cn63xx; - struct cvmx_pip_gbl_cfg_s cn63xxp1; - struct cvmx_pip_gbl_cfg_s cn66xx; - struct cvmx_pip_gbl_cfg_s cn68xx; - struct cvmx_pip_gbl_cfg_s cn68xxp1; - struct cvmx_pip_gbl_cfg_s cnf71xx; }; union cvmx_pip_gbl_ctl { @@ -742,10 +619,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_pip_gbl_ctl_cn30xx cn31xx; - struct cvmx_pip_gbl_ctl_cn30xx cn38xx; - struct cvmx_pip_gbl_ctl_cn30xx cn38xxp2; - struct cvmx_pip_gbl_ctl_cn30xx cn50xx; struct cvmx_pip_gbl_ctl_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_27_63:37; @@ -795,8 +668,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_27_63:37; #endif } cn52xx; - struct cvmx_pip_gbl_ctl_cn52xx cn52xxp1; - struct cvmx_pip_gbl_ctl_cn52xx cn56xx; struct cvmx_pip_gbl_ctl_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_21_63:43; @@ -838,8 +709,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_21_63:43; #endif } cn56xxp1; - struct cvmx_pip_gbl_ctl_cn30xx cn58xx; - struct cvmx_pip_gbl_ctl_cn30xx cn58xxp1; struct cvmx_pip_gbl_ctl_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -891,9 +760,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_28_63:36; #endif } cn61xx; - struct cvmx_pip_gbl_ctl_cn61xx cn63xx; - struct cvmx_pip_gbl_ctl_cn61xx cn63xxp1; - struct cvmx_pip_gbl_ctl_cn61xx cn66xx; struct cvmx_pip_gbl_ctl_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -990,7 +856,6 @@ union cvmx_pip_gbl_ctl { uint64_t reserved_28_63:36; #endif } cn68xxp1; - struct cvmx_pip_gbl_ctl_cn61xx cnf71xx; }; union cvmx_pip_hg_pri_qos { @@ -1012,14 +877,6 @@ union cvmx_pip_hg_pri_qos { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_pip_hg_pri_qos_s cn52xx; - struct cvmx_pip_hg_pri_qos_s cn52xxp1; - struct cvmx_pip_hg_pri_qos_s cn56xx; - struct cvmx_pip_hg_pri_qos_s cn61xx; - struct cvmx_pip_hg_pri_qos_s cn63xx; - struct cvmx_pip_hg_pri_qos_s cn63xxp1; - struct cvmx_pip_hg_pri_qos_s cn66xx; - struct cvmx_pip_hg_pri_qos_s cnf71xx; }; union cvmx_pip_int_en { @@ -1082,9 +939,6 @@ union cvmx_pip_int_en { uint64_t reserved_9_63:55; #endif } cn30xx; - struct cvmx_pip_int_en_cn30xx cn31xx; - struct cvmx_pip_int_en_cn30xx cn38xx; - struct cvmx_pip_int_en_cn30xx cn38xxp2; struct cvmx_pip_int_en_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1149,8 +1003,6 @@ union cvmx_pip_int_en { uint64_t reserved_13_63:51; #endif } cn52xx; - struct cvmx_pip_int_en_cn52xx cn52xxp1; - struct cvmx_pip_int_en_s cn56xx; struct cvmx_pip_int_en_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1211,14 +1063,6 @@ union cvmx_pip_int_en { uint64_t reserved_13_63:51; #endif } cn58xx; - struct cvmx_pip_int_en_cn30xx cn58xxp1; - struct cvmx_pip_int_en_s cn61xx; - struct cvmx_pip_int_en_s cn63xx; - struct cvmx_pip_int_en_s cn63xxp1; - struct cvmx_pip_int_en_s cn66xx; - struct cvmx_pip_int_en_s cn68xx; - struct cvmx_pip_int_en_s cn68xxp1; - struct cvmx_pip_int_en_s cnf71xx; }; union cvmx_pip_int_reg { @@ -1281,9 +1125,6 @@ union cvmx_pip_int_reg { uint64_t reserved_9_63:55; #endif } cn30xx; - struct cvmx_pip_int_reg_cn30xx cn31xx; - struct cvmx_pip_int_reg_cn30xx cn38xx; - struct cvmx_pip_int_reg_cn30xx cn38xxp2; struct cvmx_pip_int_reg_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1348,8 +1189,6 @@ union cvmx_pip_int_reg { uint64_t reserved_13_63:51; #endif } cn52xx; - struct cvmx_pip_int_reg_cn52xx cn52xxp1; - struct cvmx_pip_int_reg_s cn56xx; struct cvmx_pip_int_reg_cn56xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_12_63:52; @@ -1410,14 +1249,6 @@ union cvmx_pip_int_reg { uint64_t reserved_13_63:51; #endif } cn58xx; - struct cvmx_pip_int_reg_cn30xx cn58xxp1; - struct cvmx_pip_int_reg_s cn61xx; - struct cvmx_pip_int_reg_s cn63xx; - struct cvmx_pip_int_reg_s cn63xxp1; - struct cvmx_pip_int_reg_s cn66xx; - struct cvmx_pip_int_reg_s cn68xx; - struct cvmx_pip_int_reg_s cn68xxp1; - struct cvmx_pip_int_reg_s cnf71xx; }; union cvmx_pip_ip_offset { @@ -1431,24 +1262,6 @@ union cvmx_pip_ip_offset { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_pip_ip_offset_s cn30xx; - struct cvmx_pip_ip_offset_s cn31xx; - struct cvmx_pip_ip_offset_s cn38xx; - struct cvmx_pip_ip_offset_s cn38xxp2; - struct cvmx_pip_ip_offset_s cn50xx; - struct cvmx_pip_ip_offset_s cn52xx; - struct cvmx_pip_ip_offset_s cn52xxp1; - struct cvmx_pip_ip_offset_s cn56xx; - struct cvmx_pip_ip_offset_s cn56xxp1; - struct cvmx_pip_ip_offset_s cn58xx; - struct cvmx_pip_ip_offset_s cn58xxp1; - struct cvmx_pip_ip_offset_s cn61xx; - struct cvmx_pip_ip_offset_s cn63xx; - struct cvmx_pip_ip_offset_s cn63xxp1; - struct cvmx_pip_ip_offset_s cn66xx; - struct cvmx_pip_ip_offset_s cn68xx; - struct cvmx_pip_ip_offset_s cn68xxp1; - struct cvmx_pip_ip_offset_s cnf71xx; }; union cvmx_pip_pri_tblx { @@ -1488,8 +1301,6 @@ union cvmx_pip_pri_tblx { uint64_t diff2_padd:8; #endif } s; - struct cvmx_pip_pri_tblx_s cn68xx; - struct cvmx_pip_pri_tblx_s cn68xxp1; }; union cvmx_pip_prt_cfgx { @@ -1596,7 +1407,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_37_63:27; #endif } cn30xx; - struct cvmx_pip_prt_cfgx_cn30xx cn31xx; struct cvmx_pip_prt_cfgx_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_37_63:27; @@ -1638,7 +1448,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_37_63:27; #endif } cn38xx; - struct cvmx_pip_prt_cfgx_cn38xx cn38xxp2; struct cvmx_pip_prt_cfgx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_53_63:11; @@ -1759,9 +1568,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_53_63:11; #endif } cn52xx; - struct cvmx_pip_prt_cfgx_cn52xx cn52xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cn56xx; - struct cvmx_pip_prt_cfgx_cn50xx cn56xxp1; struct cvmx_pip_prt_cfgx_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_37_63:27; @@ -1805,11 +1611,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_37_63:27; #endif } cn58xx; - struct cvmx_pip_prt_cfgx_cn58xx cn58xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cn61xx; - struct cvmx_pip_prt_cfgx_cn52xx cn63xx; - struct cvmx_pip_prt_cfgx_cn52xx cn63xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cn66xx; struct cvmx_pip_prt_cfgx_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_55_63:9; @@ -1875,8 +1676,6 @@ union cvmx_pip_prt_cfgx { uint64_t reserved_55_63:9; #endif } cn68xx; - struct cvmx_pip_prt_cfgx_cn68xx cn68xxp1; - struct cvmx_pip_prt_cfgx_cn52xx cnf71xx; }; union cvmx_pip_prt_cfgbx { @@ -1938,7 +1737,6 @@ union cvmx_pip_prt_cfgbx { uint64_t reserved_39_63:25; #endif } cn66xx; - struct cvmx_pip_prt_cfgbx_s cn68xx; struct cvmx_pip_prt_cfgbx_cn68xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -1952,7 +1750,6 @@ union cvmx_pip_prt_cfgbx { uint64_t reserved_24_63:40; #endif } cn68xxp1; - struct cvmx_pip_prt_cfgbx_cn61xx cnf71xx; }; union cvmx_pip_prt_tagx { @@ -2083,9 +1880,6 @@ union cvmx_pip_prt_tagx { uint64_t reserved_40_63:24; #endif } cn30xx; - struct cvmx_pip_prt_tagx_cn30xx cn31xx; - struct cvmx_pip_prt_tagx_cn30xx cn38xx; - struct cvmx_pip_prt_tagx_cn30xx cn38xxp2; struct cvmx_pip_prt_tagx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_40_63:24; @@ -2141,19 +1935,6 @@ union cvmx_pip_prt_tagx { uint64_t reserved_40_63:24; #endif } cn50xx; - struct cvmx_pip_prt_tagx_cn50xx cn52xx; - struct cvmx_pip_prt_tagx_cn50xx cn52xxp1; - struct cvmx_pip_prt_tagx_cn50xx cn56xx; - struct cvmx_pip_prt_tagx_cn50xx cn56xxp1; - struct cvmx_pip_prt_tagx_cn30xx cn58xx; - struct cvmx_pip_prt_tagx_cn30xx cn58xxp1; - struct cvmx_pip_prt_tagx_cn50xx cn61xx; - struct cvmx_pip_prt_tagx_cn50xx cn63xx; - struct cvmx_pip_prt_tagx_cn50xx cn63xxp1; - struct cvmx_pip_prt_tagx_cn50xx cn66xx; - struct cvmx_pip_prt_tagx_s cn68xx; - struct cvmx_pip_prt_tagx_s cn68xxp1; - struct cvmx_pip_prt_tagx_cn50xx cnf71xx; }; union cvmx_pip_qos_diffx { @@ -2167,22 +1948,6 @@ union cvmx_pip_qos_diffx { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_pip_qos_diffx_s cn30xx; - struct cvmx_pip_qos_diffx_s cn31xx; - struct cvmx_pip_qos_diffx_s cn38xx; - struct cvmx_pip_qos_diffx_s cn38xxp2; - struct cvmx_pip_qos_diffx_s cn50xx; - struct cvmx_pip_qos_diffx_s cn52xx; - struct cvmx_pip_qos_diffx_s cn52xxp1; - struct cvmx_pip_qos_diffx_s cn56xx; - struct cvmx_pip_qos_diffx_s cn56xxp1; - struct cvmx_pip_qos_diffx_s cn58xx; - struct cvmx_pip_qos_diffx_s cn58xxp1; - struct cvmx_pip_qos_diffx_s cn61xx; - struct cvmx_pip_qos_diffx_s cn63xx; - struct cvmx_pip_qos_diffx_s cn63xxp1; - struct cvmx_pip_qos_diffx_s cn66xx; - struct cvmx_pip_qos_diffx_s cnf71xx; }; union cvmx_pip_qos_vlanx { @@ -2209,21 +1974,6 @@ union cvmx_pip_qos_vlanx { uint64_t reserved_3_63:61; #endif } cn30xx; - struct cvmx_pip_qos_vlanx_cn30xx cn31xx; - struct cvmx_pip_qos_vlanx_cn30xx cn38xx; - struct cvmx_pip_qos_vlanx_cn30xx cn38xxp2; - struct cvmx_pip_qos_vlanx_cn30xx cn50xx; - struct cvmx_pip_qos_vlanx_s cn52xx; - struct cvmx_pip_qos_vlanx_s cn52xxp1; - struct cvmx_pip_qos_vlanx_s cn56xx; - struct cvmx_pip_qos_vlanx_cn30xx cn56xxp1; - struct cvmx_pip_qos_vlanx_cn30xx cn58xx; - struct cvmx_pip_qos_vlanx_cn30xx cn58xxp1; - struct cvmx_pip_qos_vlanx_s cn61xx; - struct cvmx_pip_qos_vlanx_s cn63xx; - struct cvmx_pip_qos_vlanx_s cn63xxp1; - struct cvmx_pip_qos_vlanx_s cn66xx; - struct cvmx_pip_qos_vlanx_s cnf71xx; }; union cvmx_pip_qos_watchx { @@ -2274,9 +2024,6 @@ union cvmx_pip_qos_watchx { uint64_t reserved_48_63:16; #endif } cn30xx; - struct cvmx_pip_qos_watchx_cn30xx cn31xx; - struct cvmx_pip_qos_watchx_cn30xx cn38xx; - struct cvmx_pip_qos_watchx_cn30xx cn38xxp2; struct cvmx_pip_qos_watchx_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_48_63:16; @@ -2300,19 +2047,6 @@ union cvmx_pip_qos_watchx { uint64_t reserved_48_63:16; #endif } cn50xx; - struct cvmx_pip_qos_watchx_cn50xx cn52xx; - struct cvmx_pip_qos_watchx_cn50xx cn52xxp1; - struct cvmx_pip_qos_watchx_cn50xx cn56xx; - struct cvmx_pip_qos_watchx_cn50xx cn56xxp1; - struct cvmx_pip_qos_watchx_cn30xx cn58xx; - struct cvmx_pip_qos_watchx_cn30xx cn58xxp1; - struct cvmx_pip_qos_watchx_cn50xx cn61xx; - struct cvmx_pip_qos_watchx_cn50xx cn63xx; - struct cvmx_pip_qos_watchx_cn50xx cn63xxp1; - struct cvmx_pip_qos_watchx_cn50xx cn66xx; - struct cvmx_pip_qos_watchx_s cn68xx; - struct cvmx_pip_qos_watchx_s cn68xxp1; - struct cvmx_pip_qos_watchx_cn50xx cnf71xx; }; union cvmx_pip_raw_word { @@ -2326,24 +2060,6 @@ union cvmx_pip_raw_word { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_pip_raw_word_s cn30xx; - struct cvmx_pip_raw_word_s cn31xx; - struct cvmx_pip_raw_word_s cn38xx; - struct cvmx_pip_raw_word_s cn38xxp2; - struct cvmx_pip_raw_word_s cn50xx; - struct cvmx_pip_raw_word_s cn52xx; - struct cvmx_pip_raw_word_s cn52xxp1; - struct cvmx_pip_raw_word_s cn56xx; - struct cvmx_pip_raw_word_s cn56xxp1; - struct cvmx_pip_raw_word_s cn58xx; - struct cvmx_pip_raw_word_s cn58xxp1; - struct cvmx_pip_raw_word_s cn61xx; - struct cvmx_pip_raw_word_s cn63xx; - struct cvmx_pip_raw_word_s cn63xxp1; - struct cvmx_pip_raw_word_s cn66xx; - struct cvmx_pip_raw_word_s cn68xx; - struct cvmx_pip_raw_word_s cn68xxp1; - struct cvmx_pip_raw_word_s cnf71xx; }; union cvmx_pip_sft_rst { @@ -2357,23 +2073,6 @@ union cvmx_pip_sft_rst { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_pip_sft_rst_s cn30xx; - struct cvmx_pip_sft_rst_s cn31xx; - struct cvmx_pip_sft_rst_s cn38xx; - struct cvmx_pip_sft_rst_s cn50xx; - struct cvmx_pip_sft_rst_s cn52xx; - struct cvmx_pip_sft_rst_s cn52xxp1; - struct cvmx_pip_sft_rst_s cn56xx; - struct cvmx_pip_sft_rst_s cn56xxp1; - struct cvmx_pip_sft_rst_s cn58xx; - struct cvmx_pip_sft_rst_s cn58xxp1; - struct cvmx_pip_sft_rst_s cn61xx; - struct cvmx_pip_sft_rst_s cn63xx; - struct cvmx_pip_sft_rst_s cn63xxp1; - struct cvmx_pip_sft_rst_s cn66xx; - struct cvmx_pip_sft_rst_s cn68xx; - struct cvmx_pip_sft_rst_s cn68xxp1; - struct cvmx_pip_sft_rst_s cnf71xx; }; union cvmx_pip_stat0_x { @@ -2387,8 +2086,6 @@ union cvmx_pip_stat0_x { uint64_t drp_pkts:32; #endif } s; - struct cvmx_pip_stat0_x_s cn68xx; - struct cvmx_pip_stat0_x_s cn68xxp1; }; union cvmx_pip_stat0_prtx { @@ -2402,22 +2099,6 @@ union cvmx_pip_stat0_prtx { uint64_t drp_pkts:32; #endif } s; - struct cvmx_pip_stat0_prtx_s cn30xx; - struct cvmx_pip_stat0_prtx_s cn31xx; - struct cvmx_pip_stat0_prtx_s cn38xx; - struct cvmx_pip_stat0_prtx_s cn38xxp2; - struct cvmx_pip_stat0_prtx_s cn50xx; - struct cvmx_pip_stat0_prtx_s cn52xx; - struct cvmx_pip_stat0_prtx_s cn52xxp1; - struct cvmx_pip_stat0_prtx_s cn56xx; - struct cvmx_pip_stat0_prtx_s cn56xxp1; - struct cvmx_pip_stat0_prtx_s cn58xx; - struct cvmx_pip_stat0_prtx_s cn58xxp1; - struct cvmx_pip_stat0_prtx_s cn61xx; - struct cvmx_pip_stat0_prtx_s cn63xx; - struct cvmx_pip_stat0_prtx_s cn63xxp1; - struct cvmx_pip_stat0_prtx_s cn66xx; - struct cvmx_pip_stat0_prtx_s cnf71xx; }; union cvmx_pip_stat10_x { @@ -2431,8 +2112,6 @@ union cvmx_pip_stat10_x { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat10_x_s cn68xx; - struct cvmx_pip_stat10_x_s cn68xxp1; }; union cvmx_pip_stat10_prtx { @@ -2446,15 +2125,6 @@ union cvmx_pip_stat10_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat10_prtx_s cn52xx; - struct cvmx_pip_stat10_prtx_s cn52xxp1; - struct cvmx_pip_stat10_prtx_s cn56xx; - struct cvmx_pip_stat10_prtx_s cn56xxp1; - struct cvmx_pip_stat10_prtx_s cn61xx; - struct cvmx_pip_stat10_prtx_s cn63xx; - struct cvmx_pip_stat10_prtx_s cn63xxp1; - struct cvmx_pip_stat10_prtx_s cn66xx; - struct cvmx_pip_stat10_prtx_s cnf71xx; }; union cvmx_pip_stat11_x { @@ -2468,8 +2138,6 @@ union cvmx_pip_stat11_x { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat11_x_s cn68xx; - struct cvmx_pip_stat11_x_s cn68xxp1; }; union cvmx_pip_stat11_prtx { @@ -2483,15 +2151,6 @@ union cvmx_pip_stat11_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_stat11_prtx_s cn52xx; - struct cvmx_pip_stat11_prtx_s cn52xxp1; - struct cvmx_pip_stat11_prtx_s cn56xx; - struct cvmx_pip_stat11_prtx_s cn56xxp1; - struct cvmx_pip_stat11_prtx_s cn61xx; - struct cvmx_pip_stat11_prtx_s cn63xx; - struct cvmx_pip_stat11_prtx_s cn63xxp1; - struct cvmx_pip_stat11_prtx_s cn66xx; - struct cvmx_pip_stat11_prtx_s cnf71xx; }; union cvmx_pip_stat1_x { @@ -2505,8 +2164,6 @@ union cvmx_pip_stat1_x { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat1_x_s cn68xx; - struct cvmx_pip_stat1_x_s cn68xxp1; }; union cvmx_pip_stat1_prtx { @@ -2520,22 +2177,6 @@ union cvmx_pip_stat1_prtx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat1_prtx_s cn30xx; - struct cvmx_pip_stat1_prtx_s cn31xx; - struct cvmx_pip_stat1_prtx_s cn38xx; - struct cvmx_pip_stat1_prtx_s cn38xxp2; - struct cvmx_pip_stat1_prtx_s cn50xx; - struct cvmx_pip_stat1_prtx_s cn52xx; - struct cvmx_pip_stat1_prtx_s cn52xxp1; - struct cvmx_pip_stat1_prtx_s cn56xx; - struct cvmx_pip_stat1_prtx_s cn56xxp1; - struct cvmx_pip_stat1_prtx_s cn58xx; - struct cvmx_pip_stat1_prtx_s cn58xxp1; - struct cvmx_pip_stat1_prtx_s cn61xx; - struct cvmx_pip_stat1_prtx_s cn63xx; - struct cvmx_pip_stat1_prtx_s cn63xxp1; - struct cvmx_pip_stat1_prtx_s cn66xx; - struct cvmx_pip_stat1_prtx_s cnf71xx; }; union cvmx_pip_stat2_x { @@ -2549,8 +2190,6 @@ union cvmx_pip_stat2_x { uint64_t pkts:32; #endif } s; - struct cvmx_pip_stat2_x_s cn68xx; - struct cvmx_pip_stat2_x_s cn68xxp1; }; union cvmx_pip_stat2_prtx { @@ -2564,22 +2203,6 @@ union cvmx_pip_stat2_prtx { uint64_t pkts:32; #endif } s; - struct cvmx_pip_stat2_prtx_s cn30xx; - struct cvmx_pip_stat2_prtx_s cn31xx; - struct cvmx_pip_stat2_prtx_s cn38xx; - struct cvmx_pip_stat2_prtx_s cn38xxp2; - struct cvmx_pip_stat2_prtx_s cn50xx; - struct cvmx_pip_stat2_prtx_s cn52xx; - struct cvmx_pip_stat2_prtx_s cn52xxp1; - struct cvmx_pip_stat2_prtx_s cn56xx; - struct cvmx_pip_stat2_prtx_s cn56xxp1; - struct cvmx_pip_stat2_prtx_s cn58xx; - struct cvmx_pip_stat2_prtx_s cn58xxp1; - struct cvmx_pip_stat2_prtx_s cn61xx; - struct cvmx_pip_stat2_prtx_s cn63xx; - struct cvmx_pip_stat2_prtx_s cn63xxp1; - struct cvmx_pip_stat2_prtx_s cn66xx; - struct cvmx_pip_stat2_prtx_s cnf71xx; }; union cvmx_pip_stat3_x { @@ -2593,8 +2216,6 @@ union cvmx_pip_stat3_x { uint64_t bcst:32; #endif } s; - struct cvmx_pip_stat3_x_s cn68xx; - struct cvmx_pip_stat3_x_s cn68xxp1; }; union cvmx_pip_stat3_prtx { @@ -2608,22 +2229,6 @@ union cvmx_pip_stat3_prtx { uint64_t bcst:32; #endif } s; - struct cvmx_pip_stat3_prtx_s cn30xx; - struct cvmx_pip_stat3_prtx_s cn31xx; - struct cvmx_pip_stat3_prtx_s cn38xx; - struct cvmx_pip_stat3_prtx_s cn38xxp2; - struct cvmx_pip_stat3_prtx_s cn50xx; - struct cvmx_pip_stat3_prtx_s cn52xx; - struct cvmx_pip_stat3_prtx_s cn52xxp1; - struct cvmx_pip_stat3_prtx_s cn56xx; - struct cvmx_pip_stat3_prtx_s cn56xxp1; - struct cvmx_pip_stat3_prtx_s cn58xx; - struct cvmx_pip_stat3_prtx_s cn58xxp1; - struct cvmx_pip_stat3_prtx_s cn61xx; - struct cvmx_pip_stat3_prtx_s cn63xx; - struct cvmx_pip_stat3_prtx_s cn63xxp1; - struct cvmx_pip_stat3_prtx_s cn66xx; - struct cvmx_pip_stat3_prtx_s cnf71xx; }; union cvmx_pip_stat4_x { @@ -2637,8 +2242,6 @@ union cvmx_pip_stat4_x { uint64_t h65to127:32; #endif } s; - struct cvmx_pip_stat4_x_s cn68xx; - struct cvmx_pip_stat4_x_s cn68xxp1; }; union cvmx_pip_stat4_prtx { @@ -2652,22 +2255,6 @@ union cvmx_pip_stat4_prtx { uint64_t h65to127:32; #endif } s; - struct cvmx_pip_stat4_prtx_s cn30xx; - struct cvmx_pip_stat4_prtx_s cn31xx; - struct cvmx_pip_stat4_prtx_s cn38xx; - struct cvmx_pip_stat4_prtx_s cn38xxp2; - struct cvmx_pip_stat4_prtx_s cn50xx; - struct cvmx_pip_stat4_prtx_s cn52xx; - struct cvmx_pip_stat4_prtx_s cn52xxp1; - struct cvmx_pip_stat4_prtx_s cn56xx; - struct cvmx_pip_stat4_prtx_s cn56xxp1; - struct cvmx_pip_stat4_prtx_s cn58xx; - struct cvmx_pip_stat4_prtx_s cn58xxp1; - struct cvmx_pip_stat4_prtx_s cn61xx; - struct cvmx_pip_stat4_prtx_s cn63xx; - struct cvmx_pip_stat4_prtx_s cn63xxp1; - struct cvmx_pip_stat4_prtx_s cn66xx; - struct cvmx_pip_stat4_prtx_s cnf71xx; }; union cvmx_pip_stat5_x { @@ -2681,8 +2268,6 @@ union cvmx_pip_stat5_x { uint64_t h256to511:32; #endif } s; - struct cvmx_pip_stat5_x_s cn68xx; - struct cvmx_pip_stat5_x_s cn68xxp1; }; union cvmx_pip_stat5_prtx { @@ -2696,22 +2281,6 @@ union cvmx_pip_stat5_prtx { uint64_t h256to511:32; #endif } s; - struct cvmx_pip_stat5_prtx_s cn30xx; - struct cvmx_pip_stat5_prtx_s cn31xx; - struct cvmx_pip_stat5_prtx_s cn38xx; - struct cvmx_pip_stat5_prtx_s cn38xxp2; - struct cvmx_pip_stat5_prtx_s cn50xx; - struct cvmx_pip_stat5_prtx_s cn52xx; - struct cvmx_pip_stat5_prtx_s cn52xxp1; - struct cvmx_pip_stat5_prtx_s cn56xx; - struct cvmx_pip_stat5_prtx_s cn56xxp1; - struct cvmx_pip_stat5_prtx_s cn58xx; - struct cvmx_pip_stat5_prtx_s cn58xxp1; - struct cvmx_pip_stat5_prtx_s cn61xx; - struct cvmx_pip_stat5_prtx_s cn63xx; - struct cvmx_pip_stat5_prtx_s cn63xxp1; - struct cvmx_pip_stat5_prtx_s cn66xx; - struct cvmx_pip_stat5_prtx_s cnf71xx; }; union cvmx_pip_stat6_x { @@ -2725,8 +2294,6 @@ union cvmx_pip_stat6_x { uint64_t h1024to1518:32; #endif } s; - struct cvmx_pip_stat6_x_s cn68xx; - struct cvmx_pip_stat6_x_s cn68xxp1; }; union cvmx_pip_stat6_prtx { @@ -2740,22 +2307,6 @@ union cvmx_pip_stat6_prtx { uint64_t h1024to1518:32; #endif } s; - struct cvmx_pip_stat6_prtx_s cn30xx; - struct cvmx_pip_stat6_prtx_s cn31xx; - struct cvmx_pip_stat6_prtx_s cn38xx; - struct cvmx_pip_stat6_prtx_s cn38xxp2; - struct cvmx_pip_stat6_prtx_s cn50xx; - struct cvmx_pip_stat6_prtx_s cn52xx; - struct cvmx_pip_stat6_prtx_s cn52xxp1; - struct cvmx_pip_stat6_prtx_s cn56xx; - struct cvmx_pip_stat6_prtx_s cn56xxp1; - struct cvmx_pip_stat6_prtx_s cn58xx; - struct cvmx_pip_stat6_prtx_s cn58xxp1; - struct cvmx_pip_stat6_prtx_s cn61xx; - struct cvmx_pip_stat6_prtx_s cn63xx; - struct cvmx_pip_stat6_prtx_s cn63xxp1; - struct cvmx_pip_stat6_prtx_s cn66xx; - struct cvmx_pip_stat6_prtx_s cnf71xx; }; union cvmx_pip_stat7_x { @@ -2769,8 +2320,6 @@ union cvmx_pip_stat7_x { uint64_t fcs:32; #endif } s; - struct cvmx_pip_stat7_x_s cn68xx; - struct cvmx_pip_stat7_x_s cn68xxp1; }; union cvmx_pip_stat7_prtx { @@ -2784,22 +2333,6 @@ union cvmx_pip_stat7_prtx { uint64_t fcs:32; #endif } s; - struct cvmx_pip_stat7_prtx_s cn30xx; - struct cvmx_pip_stat7_prtx_s cn31xx; - struct cvmx_pip_stat7_prtx_s cn38xx; - struct cvmx_pip_stat7_prtx_s cn38xxp2; - struct cvmx_pip_stat7_prtx_s cn50xx; - struct cvmx_pip_stat7_prtx_s cn52xx; - struct cvmx_pip_stat7_prtx_s cn52xxp1; - struct cvmx_pip_stat7_prtx_s cn56xx; - struct cvmx_pip_stat7_prtx_s cn56xxp1; - struct cvmx_pip_stat7_prtx_s cn58xx; - struct cvmx_pip_stat7_prtx_s cn58xxp1; - struct cvmx_pip_stat7_prtx_s cn61xx; - struct cvmx_pip_stat7_prtx_s cn63xx; - struct cvmx_pip_stat7_prtx_s cn63xxp1; - struct cvmx_pip_stat7_prtx_s cn66xx; - struct cvmx_pip_stat7_prtx_s cnf71xx; }; union cvmx_pip_stat8_x { @@ -2813,8 +2346,6 @@ union cvmx_pip_stat8_x { uint64_t frag:32; #endif } s; - struct cvmx_pip_stat8_x_s cn68xx; - struct cvmx_pip_stat8_x_s cn68xxp1; }; union cvmx_pip_stat8_prtx { @@ -2828,22 +2359,6 @@ union cvmx_pip_stat8_prtx { uint64_t frag:32; #endif } s; - struct cvmx_pip_stat8_prtx_s cn30xx; - struct cvmx_pip_stat8_prtx_s cn31xx; - struct cvmx_pip_stat8_prtx_s cn38xx; - struct cvmx_pip_stat8_prtx_s cn38xxp2; - struct cvmx_pip_stat8_prtx_s cn50xx; - struct cvmx_pip_stat8_prtx_s cn52xx; - struct cvmx_pip_stat8_prtx_s cn52xxp1; - struct cvmx_pip_stat8_prtx_s cn56xx; - struct cvmx_pip_stat8_prtx_s cn56xxp1; - struct cvmx_pip_stat8_prtx_s cn58xx; - struct cvmx_pip_stat8_prtx_s cn58xxp1; - struct cvmx_pip_stat8_prtx_s cn61xx; - struct cvmx_pip_stat8_prtx_s cn63xx; - struct cvmx_pip_stat8_prtx_s cn63xxp1; - struct cvmx_pip_stat8_prtx_s cn66xx; - struct cvmx_pip_stat8_prtx_s cnf71xx; }; union cvmx_pip_stat9_x { @@ -2857,8 +2372,6 @@ union cvmx_pip_stat9_x { uint64_t jabber:32; #endif } s; - struct cvmx_pip_stat9_x_s cn68xx; - struct cvmx_pip_stat9_x_s cn68xxp1; }; union cvmx_pip_stat9_prtx { @@ -2872,22 +2385,6 @@ union cvmx_pip_stat9_prtx { uint64_t jabber:32; #endif } s; - struct cvmx_pip_stat9_prtx_s cn30xx; - struct cvmx_pip_stat9_prtx_s cn31xx; - struct cvmx_pip_stat9_prtx_s cn38xx; - struct cvmx_pip_stat9_prtx_s cn38xxp2; - struct cvmx_pip_stat9_prtx_s cn50xx; - struct cvmx_pip_stat9_prtx_s cn52xx; - struct cvmx_pip_stat9_prtx_s cn52xxp1; - struct cvmx_pip_stat9_prtx_s cn56xx; - struct cvmx_pip_stat9_prtx_s cn56xxp1; - struct cvmx_pip_stat9_prtx_s cn58xx; - struct cvmx_pip_stat9_prtx_s cn58xxp1; - struct cvmx_pip_stat9_prtx_s cn61xx; - struct cvmx_pip_stat9_prtx_s cn63xx; - struct cvmx_pip_stat9_prtx_s cn63xxp1; - struct cvmx_pip_stat9_prtx_s cn66xx; - struct cvmx_pip_stat9_prtx_s cnf71xx; }; union cvmx_pip_stat_ctl { @@ -2914,23 +2411,6 @@ union cvmx_pip_stat_ctl { uint64_t reserved_1_63:63; #endif } cn30xx; - struct cvmx_pip_stat_ctl_cn30xx cn31xx; - struct cvmx_pip_stat_ctl_cn30xx cn38xx; - struct cvmx_pip_stat_ctl_cn30xx cn38xxp2; - struct cvmx_pip_stat_ctl_cn30xx cn50xx; - struct cvmx_pip_stat_ctl_cn30xx cn52xx; - struct cvmx_pip_stat_ctl_cn30xx cn52xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn56xx; - struct cvmx_pip_stat_ctl_cn30xx cn56xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn58xx; - struct cvmx_pip_stat_ctl_cn30xx cn58xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn61xx; - struct cvmx_pip_stat_ctl_cn30xx cn63xx; - struct cvmx_pip_stat_ctl_cn30xx cn63xxp1; - struct cvmx_pip_stat_ctl_cn30xx cn66xx; - struct cvmx_pip_stat_ctl_s cn68xx; - struct cvmx_pip_stat_ctl_s cn68xxp1; - struct cvmx_pip_stat_ctl_cn30xx cnf71xx; }; union cvmx_pip_stat_inb_errsx { @@ -2944,22 +2424,6 @@ union cvmx_pip_stat_inb_errsx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pip_stat_inb_errsx_s cn30xx; - struct cvmx_pip_stat_inb_errsx_s cn31xx; - struct cvmx_pip_stat_inb_errsx_s cn38xx; - struct cvmx_pip_stat_inb_errsx_s cn38xxp2; - struct cvmx_pip_stat_inb_errsx_s cn50xx; - struct cvmx_pip_stat_inb_errsx_s cn52xx; - struct cvmx_pip_stat_inb_errsx_s cn52xxp1; - struct cvmx_pip_stat_inb_errsx_s cn56xx; - struct cvmx_pip_stat_inb_errsx_s cn56xxp1; - struct cvmx_pip_stat_inb_errsx_s cn58xx; - struct cvmx_pip_stat_inb_errsx_s cn58xxp1; - struct cvmx_pip_stat_inb_errsx_s cn61xx; - struct cvmx_pip_stat_inb_errsx_s cn63xx; - struct cvmx_pip_stat_inb_errsx_s cn63xxp1; - struct cvmx_pip_stat_inb_errsx_s cn66xx; - struct cvmx_pip_stat_inb_errsx_s cnf71xx; }; union cvmx_pip_stat_inb_errs_pkndx { @@ -2973,8 +2437,6 @@ union cvmx_pip_stat_inb_errs_pkndx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pip_stat_inb_errs_pkndx_s cn68xx; - struct cvmx_pip_stat_inb_errs_pkndx_s cn68xxp1; }; union cvmx_pip_stat_inb_octsx { @@ -2988,22 +2450,6 @@ union cvmx_pip_stat_inb_octsx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat_inb_octsx_s cn30xx; - struct cvmx_pip_stat_inb_octsx_s cn31xx; - struct cvmx_pip_stat_inb_octsx_s cn38xx; - struct cvmx_pip_stat_inb_octsx_s cn38xxp2; - struct cvmx_pip_stat_inb_octsx_s cn50xx; - struct cvmx_pip_stat_inb_octsx_s cn52xx; - struct cvmx_pip_stat_inb_octsx_s cn52xxp1; - struct cvmx_pip_stat_inb_octsx_s cn56xx; - struct cvmx_pip_stat_inb_octsx_s cn56xxp1; - struct cvmx_pip_stat_inb_octsx_s cn58xx; - struct cvmx_pip_stat_inb_octsx_s cn58xxp1; - struct cvmx_pip_stat_inb_octsx_s cn61xx; - struct cvmx_pip_stat_inb_octsx_s cn63xx; - struct cvmx_pip_stat_inb_octsx_s cn63xxp1; - struct cvmx_pip_stat_inb_octsx_s cn66xx; - struct cvmx_pip_stat_inb_octsx_s cnf71xx; }; union cvmx_pip_stat_inb_octs_pkndx { @@ -3017,8 +2463,6 @@ union cvmx_pip_stat_inb_octs_pkndx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_stat_inb_octs_pkndx_s cn68xx; - struct cvmx_pip_stat_inb_octs_pkndx_s cn68xxp1; }; union cvmx_pip_stat_inb_pktsx { @@ -3032,22 +2476,6 @@ union cvmx_pip_stat_inb_pktsx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_stat_inb_pktsx_s cn30xx; - struct cvmx_pip_stat_inb_pktsx_s cn31xx; - struct cvmx_pip_stat_inb_pktsx_s cn38xx; - struct cvmx_pip_stat_inb_pktsx_s cn38xxp2; - struct cvmx_pip_stat_inb_pktsx_s cn50xx; - struct cvmx_pip_stat_inb_pktsx_s cn52xx; - struct cvmx_pip_stat_inb_pktsx_s cn52xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn56xx; - struct cvmx_pip_stat_inb_pktsx_s cn56xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn58xx; - struct cvmx_pip_stat_inb_pktsx_s cn58xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn61xx; - struct cvmx_pip_stat_inb_pktsx_s cn63xx; - struct cvmx_pip_stat_inb_pktsx_s cn63xxp1; - struct cvmx_pip_stat_inb_pktsx_s cn66xx; - struct cvmx_pip_stat_inb_pktsx_s cnf71xx; }; union cvmx_pip_stat_inb_pkts_pkndx { @@ -3061,8 +2489,6 @@ union cvmx_pip_stat_inb_pkts_pkndx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xx; - struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xxp1; }; union cvmx_pip_sub_pkind_fcsx { @@ -3074,8 +2500,6 @@ union cvmx_pip_sub_pkind_fcsx { uint64_t port_bit:64; #endif } s; - struct cvmx_pip_sub_pkind_fcsx_s cn68xx; - struct cvmx_pip_sub_pkind_fcsx_s cn68xxp1; }; union cvmx_pip_tag_incx { @@ -3089,24 +2513,6 @@ union cvmx_pip_tag_incx { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pip_tag_incx_s cn30xx; - struct cvmx_pip_tag_incx_s cn31xx; - struct cvmx_pip_tag_incx_s cn38xx; - struct cvmx_pip_tag_incx_s cn38xxp2; - struct cvmx_pip_tag_incx_s cn50xx; - struct cvmx_pip_tag_incx_s cn52xx; - struct cvmx_pip_tag_incx_s cn52xxp1; - struct cvmx_pip_tag_incx_s cn56xx; - struct cvmx_pip_tag_incx_s cn56xxp1; - struct cvmx_pip_tag_incx_s cn58xx; - struct cvmx_pip_tag_incx_s cn58xxp1; - struct cvmx_pip_tag_incx_s cn61xx; - struct cvmx_pip_tag_incx_s cn63xx; - struct cvmx_pip_tag_incx_s cn63xxp1; - struct cvmx_pip_tag_incx_s cn66xx; - struct cvmx_pip_tag_incx_s cn68xx; - struct cvmx_pip_tag_incx_s cn68xxp1; - struct cvmx_pip_tag_incx_s cnf71xx; }; union cvmx_pip_tag_mask { @@ -3120,24 +2526,6 @@ union cvmx_pip_tag_mask { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pip_tag_mask_s cn30xx; - struct cvmx_pip_tag_mask_s cn31xx; - struct cvmx_pip_tag_mask_s cn38xx; - struct cvmx_pip_tag_mask_s cn38xxp2; - struct cvmx_pip_tag_mask_s cn50xx; - struct cvmx_pip_tag_mask_s cn52xx; - struct cvmx_pip_tag_mask_s cn52xxp1; - struct cvmx_pip_tag_mask_s cn56xx; - struct cvmx_pip_tag_mask_s cn56xxp1; - struct cvmx_pip_tag_mask_s cn58xx; - struct cvmx_pip_tag_mask_s cn58xxp1; - struct cvmx_pip_tag_mask_s cn61xx; - struct cvmx_pip_tag_mask_s cn63xx; - struct cvmx_pip_tag_mask_s cn63xxp1; - struct cvmx_pip_tag_mask_s cn66xx; - struct cvmx_pip_tag_mask_s cn68xx; - struct cvmx_pip_tag_mask_s cn68xxp1; - struct cvmx_pip_tag_mask_s cnf71xx; }; union cvmx_pip_tag_secret { @@ -3153,24 +2541,6 @@ union cvmx_pip_tag_secret { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pip_tag_secret_s cn30xx; - struct cvmx_pip_tag_secret_s cn31xx; - struct cvmx_pip_tag_secret_s cn38xx; - struct cvmx_pip_tag_secret_s cn38xxp2; - struct cvmx_pip_tag_secret_s cn50xx; - struct cvmx_pip_tag_secret_s cn52xx; - struct cvmx_pip_tag_secret_s cn52xxp1; - struct cvmx_pip_tag_secret_s cn56xx; - struct cvmx_pip_tag_secret_s cn56xxp1; - struct cvmx_pip_tag_secret_s cn58xx; - struct cvmx_pip_tag_secret_s cn58xxp1; - struct cvmx_pip_tag_secret_s cn61xx; - struct cvmx_pip_tag_secret_s cn63xx; - struct cvmx_pip_tag_secret_s cn63xxp1; - struct cvmx_pip_tag_secret_s cn66xx; - struct cvmx_pip_tag_secret_s cn68xx; - struct cvmx_pip_tag_secret_s cn68xxp1; - struct cvmx_pip_tag_secret_s cnf71xx; }; union cvmx_pip_todo_entry { @@ -3186,24 +2556,6 @@ union cvmx_pip_todo_entry { uint64_t val:1; #endif } s; - struct cvmx_pip_todo_entry_s cn30xx; - struct cvmx_pip_todo_entry_s cn31xx; - struct cvmx_pip_todo_entry_s cn38xx; - struct cvmx_pip_todo_entry_s cn38xxp2; - struct cvmx_pip_todo_entry_s cn50xx; - struct cvmx_pip_todo_entry_s cn52xx; - struct cvmx_pip_todo_entry_s cn52xxp1; - struct cvmx_pip_todo_entry_s cn56xx; - struct cvmx_pip_todo_entry_s cn56xxp1; - struct cvmx_pip_todo_entry_s cn58xx; - struct cvmx_pip_todo_entry_s cn58xxp1; - struct cvmx_pip_todo_entry_s cn61xx; - struct cvmx_pip_todo_entry_s cn63xx; - struct cvmx_pip_todo_entry_s cn63xxp1; - struct cvmx_pip_todo_entry_s cn66xx; - struct cvmx_pip_todo_entry_s cn68xx; - struct cvmx_pip_todo_entry_s cn68xxp1; - struct cvmx_pip_todo_entry_s cnf71xx; }; union cvmx_pip_vlan_etypesx { @@ -3221,10 +2573,6 @@ union cvmx_pip_vlan_etypesx { uint64_t type3:16; #endif } s; - struct cvmx_pip_vlan_etypesx_s cn61xx; - struct cvmx_pip_vlan_etypesx_s cn66xx; - struct cvmx_pip_vlan_etypesx_s cn68xx; - struct cvmx_pip_vlan_etypesx_s cnf71xx; }; union cvmx_pip_xstat0_prtx { @@ -3238,9 +2586,6 @@ union cvmx_pip_xstat0_prtx { uint64_t drp_pkts:32; #endif } s; - struct cvmx_pip_xstat0_prtx_s cn63xx; - struct cvmx_pip_xstat0_prtx_s cn63xxp1; - struct cvmx_pip_xstat0_prtx_s cn66xx; }; union cvmx_pip_xstat10_prtx { @@ -3254,9 +2599,6 @@ union cvmx_pip_xstat10_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_xstat10_prtx_s cn63xx; - struct cvmx_pip_xstat10_prtx_s cn63xxp1; - struct cvmx_pip_xstat10_prtx_s cn66xx; }; union cvmx_pip_xstat11_prtx { @@ -3270,9 +2612,6 @@ union cvmx_pip_xstat11_prtx { uint64_t bcast:32; #endif } s; - struct cvmx_pip_xstat11_prtx_s cn63xx; - struct cvmx_pip_xstat11_prtx_s cn63xxp1; - struct cvmx_pip_xstat11_prtx_s cn66xx; }; union cvmx_pip_xstat1_prtx { @@ -3286,9 +2625,6 @@ union cvmx_pip_xstat1_prtx { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pip_xstat1_prtx_s cn63xx; - struct cvmx_pip_xstat1_prtx_s cn63xxp1; - struct cvmx_pip_xstat1_prtx_s cn66xx; }; union cvmx_pip_xstat2_prtx { @@ -3302,9 +2638,6 @@ union cvmx_pip_xstat2_prtx { uint64_t pkts:32; #endif } s; - struct cvmx_pip_xstat2_prtx_s cn63xx; - struct cvmx_pip_xstat2_prtx_s cn63xxp1; - struct cvmx_pip_xstat2_prtx_s cn66xx; }; union cvmx_pip_xstat3_prtx { @@ -3318,9 +2651,6 @@ union cvmx_pip_xstat3_prtx { uint64_t bcst:32; #endif } s; - struct cvmx_pip_xstat3_prtx_s cn63xx; - struct cvmx_pip_xstat3_prtx_s cn63xxp1; - struct cvmx_pip_xstat3_prtx_s cn66xx; }; union cvmx_pip_xstat4_prtx { @@ -3334,9 +2664,6 @@ union cvmx_pip_xstat4_prtx { uint64_t h65to127:32; #endif } s; - struct cvmx_pip_xstat4_prtx_s cn63xx; - struct cvmx_pip_xstat4_prtx_s cn63xxp1; - struct cvmx_pip_xstat4_prtx_s cn66xx; }; union cvmx_pip_xstat5_prtx { @@ -3350,9 +2677,6 @@ union cvmx_pip_xstat5_prtx { uint64_t h256to511:32; #endif } s; - struct cvmx_pip_xstat5_prtx_s cn63xx; - struct cvmx_pip_xstat5_prtx_s cn63xxp1; - struct cvmx_pip_xstat5_prtx_s cn66xx; }; union cvmx_pip_xstat6_prtx { @@ -3366,9 +2690,6 @@ union cvmx_pip_xstat6_prtx { uint64_t h1024to1518:32; #endif } s; - struct cvmx_pip_xstat6_prtx_s cn63xx; - struct cvmx_pip_xstat6_prtx_s cn63xxp1; - struct cvmx_pip_xstat6_prtx_s cn66xx; }; union cvmx_pip_xstat7_prtx { @@ -3382,9 +2703,6 @@ union cvmx_pip_xstat7_prtx { uint64_t fcs:32; #endif } s; - struct cvmx_pip_xstat7_prtx_s cn63xx; - struct cvmx_pip_xstat7_prtx_s cn63xxp1; - struct cvmx_pip_xstat7_prtx_s cn66xx; }; union cvmx_pip_xstat8_prtx { @@ -3398,9 +2716,6 @@ union cvmx_pip_xstat8_prtx { uint64_t frag:32; #endif } s; - struct cvmx_pip_xstat8_prtx_s cn63xx; - struct cvmx_pip_xstat8_prtx_s cn63xxp1; - struct cvmx_pip_xstat8_prtx_s cn66xx; }; union cvmx_pip_xstat9_prtx { @@ -3414,9 +2729,6 @@ union cvmx_pip_xstat9_prtx { uint64_t jabber:32; #endif } s; - struct cvmx_pip_xstat9_prtx_s cn63xx; - struct cvmx_pip_xstat9_prtx_s cn63xxp1; - struct cvmx_pip_xstat9_prtx_s cn66xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pko-defs.h b/arch/mips/include/asm/octeon/cvmx-pko-defs.h index 87c3b970cad4..7e14c0d328f1 100644 --- a/arch/mips/include/asm/octeon/cvmx-pko-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pko-defs.h @@ -97,24 +97,6 @@ union cvmx_pko_mem_count0 { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_mem_count0_s cn30xx; - struct cvmx_pko_mem_count0_s cn31xx; - struct cvmx_pko_mem_count0_s cn38xx; - struct cvmx_pko_mem_count0_s cn38xxp2; - struct cvmx_pko_mem_count0_s cn50xx; - struct cvmx_pko_mem_count0_s cn52xx; - struct cvmx_pko_mem_count0_s cn52xxp1; - struct cvmx_pko_mem_count0_s cn56xx; - struct cvmx_pko_mem_count0_s cn56xxp1; - struct cvmx_pko_mem_count0_s cn58xx; - struct cvmx_pko_mem_count0_s cn58xxp1; - struct cvmx_pko_mem_count0_s cn61xx; - struct cvmx_pko_mem_count0_s cn63xx; - struct cvmx_pko_mem_count0_s cn63xxp1; - struct cvmx_pko_mem_count0_s cn66xx; - struct cvmx_pko_mem_count0_s cn68xx; - struct cvmx_pko_mem_count0_s cn68xxp1; - struct cvmx_pko_mem_count0_s cnf71xx; }; union cvmx_pko_mem_count1 { @@ -128,24 +110,6 @@ union cvmx_pko_mem_count1 { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_pko_mem_count1_s cn30xx; - struct cvmx_pko_mem_count1_s cn31xx; - struct cvmx_pko_mem_count1_s cn38xx; - struct cvmx_pko_mem_count1_s cn38xxp2; - struct cvmx_pko_mem_count1_s cn50xx; - struct cvmx_pko_mem_count1_s cn52xx; - struct cvmx_pko_mem_count1_s cn52xxp1; - struct cvmx_pko_mem_count1_s cn56xx; - struct cvmx_pko_mem_count1_s cn56xxp1; - struct cvmx_pko_mem_count1_s cn58xx; - struct cvmx_pko_mem_count1_s cn58xxp1; - struct cvmx_pko_mem_count1_s cn61xx; - struct cvmx_pko_mem_count1_s cn63xx; - struct cvmx_pko_mem_count1_s cn63xxp1; - struct cvmx_pko_mem_count1_s cn66xx; - struct cvmx_pko_mem_count1_s cn68xx; - struct cvmx_pko_mem_count1_s cn68xxp1; - struct cvmx_pko_mem_count1_s cnf71xx; }; union cvmx_pko_mem_debug0 { @@ -163,24 +127,6 @@ union cvmx_pko_mem_debug0 { uint64_t fau:28; #endif } s; - struct cvmx_pko_mem_debug0_s cn30xx; - struct cvmx_pko_mem_debug0_s cn31xx; - struct cvmx_pko_mem_debug0_s cn38xx; - struct cvmx_pko_mem_debug0_s cn38xxp2; - struct cvmx_pko_mem_debug0_s cn50xx; - struct cvmx_pko_mem_debug0_s cn52xx; - struct cvmx_pko_mem_debug0_s cn52xxp1; - struct cvmx_pko_mem_debug0_s cn56xx; - struct cvmx_pko_mem_debug0_s cn56xxp1; - struct cvmx_pko_mem_debug0_s cn58xx; - struct cvmx_pko_mem_debug0_s cn58xxp1; - struct cvmx_pko_mem_debug0_s cn61xx; - struct cvmx_pko_mem_debug0_s cn63xx; - struct cvmx_pko_mem_debug0_s cn63xxp1; - struct cvmx_pko_mem_debug0_s cn66xx; - struct cvmx_pko_mem_debug0_s cn68xx; - struct cvmx_pko_mem_debug0_s cn68xxp1; - struct cvmx_pko_mem_debug0_s cnf71xx; }; union cvmx_pko_mem_debug1 { @@ -200,24 +146,6 @@ union cvmx_pko_mem_debug1 { uint64_t i:1; #endif } s; - struct cvmx_pko_mem_debug1_s cn30xx; - struct cvmx_pko_mem_debug1_s cn31xx; - struct cvmx_pko_mem_debug1_s cn38xx; - struct cvmx_pko_mem_debug1_s cn38xxp2; - struct cvmx_pko_mem_debug1_s cn50xx; - struct cvmx_pko_mem_debug1_s cn52xx; - struct cvmx_pko_mem_debug1_s cn52xxp1; - struct cvmx_pko_mem_debug1_s cn56xx; - struct cvmx_pko_mem_debug1_s cn56xxp1; - struct cvmx_pko_mem_debug1_s cn58xx; - struct cvmx_pko_mem_debug1_s cn58xxp1; - struct cvmx_pko_mem_debug1_s cn61xx; - struct cvmx_pko_mem_debug1_s cn63xx; - struct cvmx_pko_mem_debug1_s cn63xxp1; - struct cvmx_pko_mem_debug1_s cn66xx; - struct cvmx_pko_mem_debug1_s cn68xx; - struct cvmx_pko_mem_debug1_s cn68xxp1; - struct cvmx_pko_mem_debug1_s cnf71xx; }; union cvmx_pko_mem_debug10 { @@ -242,9 +170,6 @@ union cvmx_pko_mem_debug10 { uint64_t fau:28; #endif } cn30xx; - struct cvmx_pko_mem_debug10_cn30xx cn31xx; - struct cvmx_pko_mem_debug10_cn30xx cn38xx; - struct cvmx_pko_mem_debug10_cn30xx cn38xxp2; struct cvmx_pko_mem_debug10_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_49_63:15; @@ -258,19 +183,6 @@ union cvmx_pko_mem_debug10 { uint64_t reserved_49_63:15; #endif } cn50xx; - struct cvmx_pko_mem_debug10_cn50xx cn52xx; - struct cvmx_pko_mem_debug10_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn56xx; - struct cvmx_pko_mem_debug10_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn58xx; - struct cvmx_pko_mem_debug10_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn61xx; - struct cvmx_pko_mem_debug10_cn50xx cn63xx; - struct cvmx_pko_mem_debug10_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug10_cn50xx cn66xx; - struct cvmx_pko_mem_debug10_cn50xx cn68xx; - struct cvmx_pko_mem_debug10_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug10_cn50xx cnf71xx; }; union cvmx_pko_mem_debug11 { @@ -305,9 +217,6 @@ union cvmx_pko_mem_debug11 { uint64_t i:1; #endif } cn30xx; - struct cvmx_pko_mem_debug11_cn30xx cn31xx; - struct cvmx_pko_mem_debug11_cn30xx cn38xx; - struct cvmx_pko_mem_debug11_cn30xx cn38xxp2; struct cvmx_pko_mem_debug11_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_23_63:41; @@ -329,19 +238,6 @@ union cvmx_pko_mem_debug11 { uint64_t reserved_23_63:41; #endif } cn50xx; - struct cvmx_pko_mem_debug11_cn50xx cn52xx; - struct cvmx_pko_mem_debug11_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn56xx; - struct cvmx_pko_mem_debug11_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn58xx; - struct cvmx_pko_mem_debug11_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn61xx; - struct cvmx_pko_mem_debug11_cn50xx cn63xx; - struct cvmx_pko_mem_debug11_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug11_cn50xx cn66xx; - struct cvmx_pko_mem_debug11_cn50xx cn68xx; - struct cvmx_pko_mem_debug11_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug11_cn50xx cnf71xx; }; union cvmx_pko_mem_debug12 { @@ -360,9 +256,6 @@ union cvmx_pko_mem_debug12 { uint64_t data:64; #endif } cn30xx; - struct cvmx_pko_mem_debug12_cn30xx cn31xx; - struct cvmx_pko_mem_debug12_cn30xx cn38xx; - struct cvmx_pko_mem_debug12_cn30xx cn38xxp2; struct cvmx_pko_mem_debug12_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t fau:28; @@ -376,16 +269,6 @@ union cvmx_pko_mem_debug12 { uint64_t fau:28; #endif } cn50xx; - struct cvmx_pko_mem_debug12_cn50xx cn52xx; - struct cvmx_pko_mem_debug12_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn56xx; - struct cvmx_pko_mem_debug12_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn58xx; - struct cvmx_pko_mem_debug12_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn61xx; - struct cvmx_pko_mem_debug12_cn50xx cn63xx; - struct cvmx_pko_mem_debug12_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug12_cn50xx cn66xx; struct cvmx_pko_mem_debug12_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t state:64; @@ -393,8 +276,6 @@ union cvmx_pko_mem_debug12 { uint64_t state:64; #endif } cn68xx; - struct cvmx_pko_mem_debug12_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug12_cn50xx cnf71xx; }; union cvmx_pko_mem_debug13 { @@ -419,9 +300,6 @@ union cvmx_pko_mem_debug13 { uint64_t reserved_51_63:13; #endif } cn30xx; - struct cvmx_pko_mem_debug13_cn30xx cn31xx; - struct cvmx_pko_mem_debug13_cn30xx cn38xx; - struct cvmx_pko_mem_debug13_cn30xx cn38xxp2; struct cvmx_pko_mem_debug13_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t i:1; @@ -437,16 +315,6 @@ union cvmx_pko_mem_debug13 { uint64_t i:1; #endif } cn50xx; - struct cvmx_pko_mem_debug13_cn50xx cn52xx; - struct cvmx_pko_mem_debug13_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn56xx; - struct cvmx_pko_mem_debug13_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn58xx; - struct cvmx_pko_mem_debug13_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn61xx; - struct cvmx_pko_mem_debug13_cn50xx cn63xx; - struct cvmx_pko_mem_debug13_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug13_cn50xx cn66xx; struct cvmx_pko_mem_debug13_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t state:64; @@ -454,8 +322,6 @@ union cvmx_pko_mem_debug13 { uint64_t state:64; #endif } cn68xx; - struct cvmx_pko_mem_debug13_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug13_cn50xx cnf71xx; }; union cvmx_pko_mem_debug14 { @@ -476,9 +342,6 @@ union cvmx_pko_mem_debug14 { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_pko_mem_debug14_cn30xx cn31xx; - struct cvmx_pko_mem_debug14_cn30xx cn38xx; - struct cvmx_pko_mem_debug14_cn30xx cn38xxp2; struct cvmx_pko_mem_debug14_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t data:64; @@ -486,14 +349,6 @@ union cvmx_pko_mem_debug14 { uint64_t data:64; #endif } cn52xx; - struct cvmx_pko_mem_debug14_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug14_cn52xx cn56xx; - struct cvmx_pko_mem_debug14_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug14_cn52xx cn61xx; - struct cvmx_pko_mem_debug14_cn52xx cn63xx; - struct cvmx_pko_mem_debug14_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug14_cn52xx cn66xx; - struct cvmx_pko_mem_debug14_cn52xx cnf71xx; }; union cvmx_pko_mem_debug2 { @@ -513,24 +368,6 @@ union cvmx_pko_mem_debug2 { uint64_t i:1; #endif } s; - struct cvmx_pko_mem_debug2_s cn30xx; - struct cvmx_pko_mem_debug2_s cn31xx; - struct cvmx_pko_mem_debug2_s cn38xx; - struct cvmx_pko_mem_debug2_s cn38xxp2; - struct cvmx_pko_mem_debug2_s cn50xx; - struct cvmx_pko_mem_debug2_s cn52xx; - struct cvmx_pko_mem_debug2_s cn52xxp1; - struct cvmx_pko_mem_debug2_s cn56xx; - struct cvmx_pko_mem_debug2_s cn56xxp1; - struct cvmx_pko_mem_debug2_s cn58xx; - struct cvmx_pko_mem_debug2_s cn58xxp1; - struct cvmx_pko_mem_debug2_s cn61xx; - struct cvmx_pko_mem_debug2_s cn63xx; - struct cvmx_pko_mem_debug2_s cn63xxp1; - struct cvmx_pko_mem_debug2_s cn66xx; - struct cvmx_pko_mem_debug2_s cn68xx; - struct cvmx_pko_mem_debug2_s cn68xxp1; - struct cvmx_pko_mem_debug2_s cnf71xx; }; union cvmx_pko_mem_debug3 { @@ -557,9 +394,6 @@ union cvmx_pko_mem_debug3 { uint64_t i:1; #endif } cn30xx; - struct cvmx_pko_mem_debug3_cn30xx cn31xx; - struct cvmx_pko_mem_debug3_cn30xx cn38xx; - struct cvmx_pko_mem_debug3_cn30xx cn38xxp2; struct cvmx_pko_mem_debug3_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t data:64; @@ -567,19 +401,6 @@ union cvmx_pko_mem_debug3 { uint64_t data:64; #endif } cn50xx; - struct cvmx_pko_mem_debug3_cn50xx cn52xx; - struct cvmx_pko_mem_debug3_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn56xx; - struct cvmx_pko_mem_debug3_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn58xx; - struct cvmx_pko_mem_debug3_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn61xx; - struct cvmx_pko_mem_debug3_cn50xx cn63xx; - struct cvmx_pko_mem_debug3_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug3_cn50xx cn66xx; - struct cvmx_pko_mem_debug3_cn50xx cn68xx; - struct cvmx_pko_mem_debug3_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug3_cn50xx cnf71xx; }; union cvmx_pko_mem_debug4 { @@ -598,9 +419,6 @@ union cvmx_pko_mem_debug4 { uint64_t data:64; #endif } cn30xx; - struct cvmx_pko_mem_debug4_cn30xx cn31xx; - struct cvmx_pko_mem_debug4_cn30xx cn38xx; - struct cvmx_pko_mem_debug4_cn30xx cn38xxp2; struct cvmx_pko_mem_debug4_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t cmnd_segs:3; @@ -673,18 +491,6 @@ union cvmx_pko_mem_debug4 { uint64_t curr_siz:8; #endif } cn52xx; - struct cvmx_pko_mem_debug4_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug4_cn52xx cn56xx; - struct cvmx_pko_mem_debug4_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug4_cn50xx cn58xx; - struct cvmx_pko_mem_debug4_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug4_cn52xx cn61xx; - struct cvmx_pko_mem_debug4_cn52xx cn63xx; - struct cvmx_pko_mem_debug4_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug4_cn52xx cn66xx; - struct cvmx_pko_mem_debug4_cn52xx cn68xx; - struct cvmx_pko_mem_debug4_cn52xx cn68xxp1; - struct cvmx_pko_mem_debug4_cn52xx cnf71xx; }; union cvmx_pko_mem_debug5 { @@ -739,9 +545,6 @@ union cvmx_pko_mem_debug5 { uint64_t dwri_mod:1; #endif } cn30xx; - struct cvmx_pko_mem_debug5_cn30xx cn31xx; - struct cvmx_pko_mem_debug5_cn30xx cn38xx; - struct cvmx_pko_mem_debug5_cn30xx cn38xxp2; struct cvmx_pko_mem_debug5_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t curr_ptr:29; @@ -768,11 +571,6 @@ union cvmx_pko_mem_debug5 { uint64_t reserved_54_63:10; #endif } cn52xx; - struct cvmx_pko_mem_debug5_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug5_cn52xx cn56xx; - struct cvmx_pko_mem_debug5_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug5_cn50xx cn58xx; - struct cvmx_pko_mem_debug5_cn50xx cn58xxp1; struct cvmx_pko_mem_debug5_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_56_63:8; @@ -790,9 +588,6 @@ union cvmx_pko_mem_debug5 { uint64_t reserved_56_63:8; #endif } cn61xx; - struct cvmx_pko_mem_debug5_cn61xx cn63xx; - struct cvmx_pko_mem_debug5_cn61xx cn63xxp1; - struct cvmx_pko_mem_debug5_cn61xx cn66xx; struct cvmx_pko_mem_debug5_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_57_63:7; @@ -812,8 +607,6 @@ union cvmx_pko_mem_debug5 { uint64_t reserved_57_63:7; #endif } cn68xx; - struct cvmx_pko_mem_debug5_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug5_cn61xx cnf71xx; }; union cvmx_pko_mem_debug6 { @@ -866,9 +659,6 @@ union cvmx_pko_mem_debug6 { uint64_t reserved_11_63:53; #endif } cn30xx; - struct cvmx_pko_mem_debug6_cn30xx cn31xx; - struct cvmx_pko_mem_debug6_cn30xx cn38xx; - struct cvmx_pko_mem_debug6_cn30xx cn38xxp2; struct cvmx_pko_mem_debug6_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -909,18 +699,6 @@ union cvmx_pko_mem_debug6 { uint64_t reserved_37_63:27; #endif } cn52xx; - struct cvmx_pko_mem_debug6_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug6_cn52xx cn56xx; - struct cvmx_pko_mem_debug6_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug6_cn50xx cn58xx; - struct cvmx_pko_mem_debug6_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug6_cn52xx cn61xx; - struct cvmx_pko_mem_debug6_cn52xx cn63xx; - struct cvmx_pko_mem_debug6_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug6_cn52xx cn66xx; - struct cvmx_pko_mem_debug6_cn52xx cn68xx; - struct cvmx_pko_mem_debug6_cn52xx cn68xxp1; - struct cvmx_pko_mem_debug6_cn52xx cnf71xx; }; union cvmx_pko_mem_debug7 { @@ -945,9 +723,6 @@ union cvmx_pko_mem_debug7 { uint64_t reserved_58_63:6; #endif } cn30xx; - struct cvmx_pko_mem_debug7_cn30xx cn31xx; - struct cvmx_pko_mem_debug7_cn30xx cn38xx; - struct cvmx_pko_mem_debug7_cn30xx cn38xxp2; struct cvmx_pko_mem_debug7_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t qos:5; @@ -965,16 +740,6 @@ union cvmx_pko_mem_debug7 { uint64_t qos:5; #endif } cn50xx; - struct cvmx_pko_mem_debug7_cn50xx cn52xx; - struct cvmx_pko_mem_debug7_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn56xx; - struct cvmx_pko_mem_debug7_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn58xx; - struct cvmx_pko_mem_debug7_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn61xx; - struct cvmx_pko_mem_debug7_cn50xx cn63xx; - struct cvmx_pko_mem_debug7_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug7_cn50xx cn66xx; struct cvmx_pko_mem_debug7_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t qos:3; @@ -992,8 +757,6 @@ union cvmx_pko_mem_debug7 { uint64_t qos:3; #endif } cn68xx; - struct cvmx_pko_mem_debug7_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug7_cn50xx cnf71xx; }; union cvmx_pko_mem_debug8 { @@ -1028,9 +791,6 @@ union cvmx_pko_mem_debug8 { uint64_t qos:5; #endif } cn30xx; - struct cvmx_pko_mem_debug8_cn30xx cn31xx; - struct cvmx_pko_mem_debug8_cn30xx cn38xx; - struct cvmx_pko_mem_debug8_cn30xx cn38xxp2; struct cvmx_pko_mem_debug8_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1073,11 +833,6 @@ union cvmx_pko_mem_debug8 { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_pko_mem_debug8_cn52xx cn52xxp1; - struct cvmx_pko_mem_debug8_cn52xx cn56xx; - struct cvmx_pko_mem_debug8_cn52xx cn56xxp1; - struct cvmx_pko_mem_debug8_cn50xx cn58xx; - struct cvmx_pko_mem_debug8_cn50xx cn58xxp1; struct cvmx_pko_mem_debug8_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_42_63:22; @@ -1107,9 +862,6 @@ union cvmx_pko_mem_debug8 { uint64_t reserved_42_63:22; #endif } cn61xx; - struct cvmx_pko_mem_debug8_cn52xx cn63xx; - struct cvmx_pko_mem_debug8_cn52xx cn63xxp1; - struct cvmx_pko_mem_debug8_cn61xx cn66xx; struct cvmx_pko_mem_debug8_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_37_63:27; @@ -1133,8 +885,6 @@ union cvmx_pko_mem_debug8 { uint64_t reserved_37_63:27; #endif } cn68xx; - struct cvmx_pko_mem_debug8_cn68xx cn68xxp1; - struct cvmx_pko_mem_debug8_cn61xx cnf71xx; }; union cvmx_pko_mem_debug9 { @@ -1167,7 +917,6 @@ union cvmx_pko_mem_debug9 { uint64_t reserved_28_63:36; #endif } cn30xx; - struct cvmx_pko_mem_debug9_cn30xx cn31xx; struct cvmx_pko_mem_debug9_cn38xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1187,7 +936,6 @@ union cvmx_pko_mem_debug9 { uint64_t reserved_28_63:36; #endif } cn38xx; - struct cvmx_pko_mem_debug9_cn38xx cn38xxp2; struct cvmx_pko_mem_debug9_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_49_63:15; @@ -1201,19 +949,6 @@ union cvmx_pko_mem_debug9 { uint64_t reserved_49_63:15; #endif } cn50xx; - struct cvmx_pko_mem_debug9_cn50xx cn52xx; - struct cvmx_pko_mem_debug9_cn50xx cn52xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn56xx; - struct cvmx_pko_mem_debug9_cn50xx cn56xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn58xx; - struct cvmx_pko_mem_debug9_cn50xx cn58xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn61xx; - struct cvmx_pko_mem_debug9_cn50xx cn63xx; - struct cvmx_pko_mem_debug9_cn50xx cn63xxp1; - struct cvmx_pko_mem_debug9_cn50xx cn66xx; - struct cvmx_pko_mem_debug9_cn50xx cn68xx; - struct cvmx_pko_mem_debug9_cn50xx cn68xxp1; - struct cvmx_pko_mem_debug9_cn50xx cnf71xx; }; union cvmx_pko_mem_iport_ptrs { @@ -1249,8 +984,6 @@ union cvmx_pko_mem_iport_ptrs { uint64_t reserved_63_63:1; #endif } s; - struct cvmx_pko_mem_iport_ptrs_s cn68xx; - struct cvmx_pko_mem_iport_ptrs_s cn68xxp1; }; union cvmx_pko_mem_iport_qos { @@ -1272,8 +1005,6 @@ union cvmx_pko_mem_iport_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_iport_qos_s cn68xx; - struct cvmx_pko_mem_iport_qos_s cn68xxp1; }; union cvmx_pko_mem_iqueue_ptrs { @@ -1303,8 +1034,6 @@ union cvmx_pko_mem_iqueue_ptrs { uint64_t s_tail:1; #endif } s; - struct cvmx_pko_mem_iqueue_ptrs_s cn68xx; - struct cvmx_pko_mem_iqueue_ptrs_s cn68xxp1; }; union cvmx_pko_mem_iqueue_qos { @@ -1324,8 +1053,6 @@ union cvmx_pko_mem_iqueue_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_iqueue_qos_s cn68xx; - struct cvmx_pko_mem_iqueue_qos_s cn68xxp1; }; union cvmx_pko_mem_port_ptrs { @@ -1349,15 +1076,6 @@ union cvmx_pko_mem_port_ptrs { uint64_t reserved_62_63:2; #endif } s; - struct cvmx_pko_mem_port_ptrs_s cn52xx; - struct cvmx_pko_mem_port_ptrs_s cn52xxp1; - struct cvmx_pko_mem_port_ptrs_s cn56xx; - struct cvmx_pko_mem_port_ptrs_s cn56xxp1; - struct cvmx_pko_mem_port_ptrs_s cn61xx; - struct cvmx_pko_mem_port_ptrs_s cn63xx; - struct cvmx_pko_mem_port_ptrs_s cn63xxp1; - struct cvmx_pko_mem_port_ptrs_s cn66xx; - struct cvmx_pko_mem_port_ptrs_s cnf71xx; }; union cvmx_pko_mem_port_qos { @@ -1377,15 +1095,6 @@ union cvmx_pko_mem_port_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_port_qos_s cn52xx; - struct cvmx_pko_mem_port_qos_s cn52xxp1; - struct cvmx_pko_mem_port_qos_s cn56xx; - struct cvmx_pko_mem_port_qos_s cn56xxp1; - struct cvmx_pko_mem_port_qos_s cn61xx; - struct cvmx_pko_mem_port_qos_s cn63xx; - struct cvmx_pko_mem_port_qos_s cn63xxp1; - struct cvmx_pko_mem_port_qos_s cn66xx; - struct cvmx_pko_mem_port_qos_s cnf71xx; }; union cvmx_pko_mem_port_rate0 { @@ -1420,16 +1129,6 @@ union cvmx_pko_mem_port_rate0 { uint64_t reserved_51_63:13; #endif } cn52xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn52xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cn56xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn56xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cn61xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn63xx; - struct cvmx_pko_mem_port_rate0_cn52xx cn63xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cn66xx; - struct cvmx_pko_mem_port_rate0_s cn68xx; - struct cvmx_pko_mem_port_rate0_s cn68xxp1; - struct cvmx_pko_mem_port_rate0_cn52xx cnf71xx; }; union cvmx_pko_mem_port_rate1 { @@ -1460,16 +1159,6 @@ union cvmx_pko_mem_port_rate1 { uint64_t reserved_32_63:32; #endif } cn52xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn52xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cn56xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn56xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cn61xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn63xx; - struct cvmx_pko_mem_port_rate1_cn52xx cn63xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cn66xx; - struct cvmx_pko_mem_port_rate1_s cn68xx; - struct cvmx_pko_mem_port_rate1_s cn68xxp1; - struct cvmx_pko_mem_port_rate1_cn52xx cnf71xx; }; union cvmx_pko_mem_queue_ptrs { @@ -1497,22 +1186,6 @@ union cvmx_pko_mem_queue_ptrs { uint64_t s_tail:1; #endif } s; - struct cvmx_pko_mem_queue_ptrs_s cn30xx; - struct cvmx_pko_mem_queue_ptrs_s cn31xx; - struct cvmx_pko_mem_queue_ptrs_s cn38xx; - struct cvmx_pko_mem_queue_ptrs_s cn38xxp2; - struct cvmx_pko_mem_queue_ptrs_s cn50xx; - struct cvmx_pko_mem_queue_ptrs_s cn52xx; - struct cvmx_pko_mem_queue_ptrs_s cn52xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn56xx; - struct cvmx_pko_mem_queue_ptrs_s cn56xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn58xx; - struct cvmx_pko_mem_queue_ptrs_s cn58xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn61xx; - struct cvmx_pko_mem_queue_ptrs_s cn63xx; - struct cvmx_pko_mem_queue_ptrs_s cn63xxp1; - struct cvmx_pko_mem_queue_ptrs_s cn66xx; - struct cvmx_pko_mem_queue_ptrs_s cnf71xx; }; union cvmx_pko_mem_queue_qos { @@ -1532,22 +1205,6 @@ union cvmx_pko_mem_queue_qos { uint64_t reserved_61_63:3; #endif } s; - struct cvmx_pko_mem_queue_qos_s cn30xx; - struct cvmx_pko_mem_queue_qos_s cn31xx; - struct cvmx_pko_mem_queue_qos_s cn38xx; - struct cvmx_pko_mem_queue_qos_s cn38xxp2; - struct cvmx_pko_mem_queue_qos_s cn50xx; - struct cvmx_pko_mem_queue_qos_s cn52xx; - struct cvmx_pko_mem_queue_qos_s cn52xxp1; - struct cvmx_pko_mem_queue_qos_s cn56xx; - struct cvmx_pko_mem_queue_qos_s cn56xxp1; - struct cvmx_pko_mem_queue_qos_s cn58xx; - struct cvmx_pko_mem_queue_qos_s cn58xxp1; - struct cvmx_pko_mem_queue_qos_s cn61xx; - struct cvmx_pko_mem_queue_qos_s cn63xx; - struct cvmx_pko_mem_queue_qos_s cn63xxp1; - struct cvmx_pko_mem_queue_qos_s cn66xx; - struct cvmx_pko_mem_queue_qos_s cnf71xx; }; union cvmx_pko_mem_throttle_int { @@ -1569,8 +1226,6 @@ union cvmx_pko_mem_throttle_int { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_pko_mem_throttle_int_s cn68xx; - struct cvmx_pko_mem_throttle_int_s cn68xxp1; }; union cvmx_pko_mem_throttle_pipe { @@ -1592,8 +1247,6 @@ union cvmx_pko_mem_throttle_pipe { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_pko_mem_throttle_pipe_s cn68xx; - struct cvmx_pko_mem_throttle_pipe_s cn68xxp1; }; union cvmx_pko_reg_bist_result { @@ -1636,9 +1289,6 @@ union cvmx_pko_reg_bist_result { uint64_t reserved_27_63:37; #endif } cn30xx; - struct cvmx_pko_reg_bist_result_cn30xx cn31xx; - struct cvmx_pko_reg_bist_result_cn30xx cn38xx; - struct cvmx_pko_reg_bist_result_cn30xx cn38xxp2; struct cvmx_pko_reg_bist_result_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_33_63:31; @@ -1711,15 +1361,6 @@ union cvmx_pko_reg_bist_result { uint64_t reserved_35_63:29; #endif } cn52xx; - struct cvmx_pko_reg_bist_result_cn52xx cn52xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cn56xx; - struct cvmx_pko_reg_bist_result_cn52xx cn56xxp1; - struct cvmx_pko_reg_bist_result_cn50xx cn58xx; - struct cvmx_pko_reg_bist_result_cn50xx cn58xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cn61xx; - struct cvmx_pko_reg_bist_result_cn52xx cn63xx; - struct cvmx_pko_reg_bist_result_cn52xx cn63xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cn66xx; struct cvmx_pko_reg_bist_result_cn68xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_36_63:28; @@ -1808,7 +1449,6 @@ union cvmx_pko_reg_bist_result { uint64_t reserved_35_63:29; #endif } cn68xxp1; - struct cvmx_pko_reg_bist_result_cn52xx cnf71xx; }; union cvmx_pko_reg_cmd_buf { @@ -1826,24 +1466,6 @@ union cvmx_pko_reg_cmd_buf { uint64_t reserved_23_63:41; #endif } s; - struct cvmx_pko_reg_cmd_buf_s cn30xx; - struct cvmx_pko_reg_cmd_buf_s cn31xx; - struct cvmx_pko_reg_cmd_buf_s cn38xx; - struct cvmx_pko_reg_cmd_buf_s cn38xxp2; - struct cvmx_pko_reg_cmd_buf_s cn50xx; - struct cvmx_pko_reg_cmd_buf_s cn52xx; - struct cvmx_pko_reg_cmd_buf_s cn52xxp1; - struct cvmx_pko_reg_cmd_buf_s cn56xx; - struct cvmx_pko_reg_cmd_buf_s cn56xxp1; - struct cvmx_pko_reg_cmd_buf_s cn58xx; - struct cvmx_pko_reg_cmd_buf_s cn58xxp1; - struct cvmx_pko_reg_cmd_buf_s cn61xx; - struct cvmx_pko_reg_cmd_buf_s cn63xx; - struct cvmx_pko_reg_cmd_buf_s cn63xxp1; - struct cvmx_pko_reg_cmd_buf_s cn66xx; - struct cvmx_pko_reg_cmd_buf_s cn68xx; - struct cvmx_pko_reg_cmd_buf_s cn68xxp1; - struct cvmx_pko_reg_cmd_buf_s cnf71xx; }; union cvmx_pko_reg_crc_ctlx { @@ -1859,10 +1481,6 @@ union cvmx_pko_reg_crc_ctlx { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_crc_ctlx_s cn38xx; - struct cvmx_pko_reg_crc_ctlx_s cn38xxp2; - struct cvmx_pko_reg_crc_ctlx_s cn58xx; - struct cvmx_pko_reg_crc_ctlx_s cn58xxp1; }; union cvmx_pko_reg_crc_enable { @@ -1876,10 +1494,6 @@ union cvmx_pko_reg_crc_enable { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_reg_crc_enable_s cn38xx; - struct cvmx_pko_reg_crc_enable_s cn38xxp2; - struct cvmx_pko_reg_crc_enable_s cn58xx; - struct cvmx_pko_reg_crc_enable_s cn58xxp1; }; union cvmx_pko_reg_crc_ivx { @@ -1893,10 +1507,6 @@ union cvmx_pko_reg_crc_ivx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_reg_crc_ivx_s cn38xx; - struct cvmx_pko_reg_crc_ivx_s cn38xxp2; - struct cvmx_pko_reg_crc_ivx_s cn58xx; - struct cvmx_pko_reg_crc_ivx_s cn58xxp1; }; union cvmx_pko_reg_debug0 { @@ -1917,23 +1527,6 @@ union cvmx_pko_reg_debug0 { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_pko_reg_debug0_cn30xx cn31xx; - struct cvmx_pko_reg_debug0_cn30xx cn38xx; - struct cvmx_pko_reg_debug0_cn30xx cn38xxp2; - struct cvmx_pko_reg_debug0_s cn50xx; - struct cvmx_pko_reg_debug0_s cn52xx; - struct cvmx_pko_reg_debug0_s cn52xxp1; - struct cvmx_pko_reg_debug0_s cn56xx; - struct cvmx_pko_reg_debug0_s cn56xxp1; - struct cvmx_pko_reg_debug0_s cn58xx; - struct cvmx_pko_reg_debug0_s cn58xxp1; - struct cvmx_pko_reg_debug0_s cn61xx; - struct cvmx_pko_reg_debug0_s cn63xx; - struct cvmx_pko_reg_debug0_s cn63xxp1; - struct cvmx_pko_reg_debug0_s cn66xx; - struct cvmx_pko_reg_debug0_s cn68xx; - struct cvmx_pko_reg_debug0_s cn68xxp1; - struct cvmx_pko_reg_debug0_s cnf71xx; }; union cvmx_pko_reg_debug1 { @@ -1945,20 +1538,6 @@ union cvmx_pko_reg_debug1 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug1_s cn50xx; - struct cvmx_pko_reg_debug1_s cn52xx; - struct cvmx_pko_reg_debug1_s cn52xxp1; - struct cvmx_pko_reg_debug1_s cn56xx; - struct cvmx_pko_reg_debug1_s cn56xxp1; - struct cvmx_pko_reg_debug1_s cn58xx; - struct cvmx_pko_reg_debug1_s cn58xxp1; - struct cvmx_pko_reg_debug1_s cn61xx; - struct cvmx_pko_reg_debug1_s cn63xx; - struct cvmx_pko_reg_debug1_s cn63xxp1; - struct cvmx_pko_reg_debug1_s cn66xx; - struct cvmx_pko_reg_debug1_s cn68xx; - struct cvmx_pko_reg_debug1_s cn68xxp1; - struct cvmx_pko_reg_debug1_s cnf71xx; }; union cvmx_pko_reg_debug2 { @@ -1970,20 +1549,6 @@ union cvmx_pko_reg_debug2 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug2_s cn50xx; - struct cvmx_pko_reg_debug2_s cn52xx; - struct cvmx_pko_reg_debug2_s cn52xxp1; - struct cvmx_pko_reg_debug2_s cn56xx; - struct cvmx_pko_reg_debug2_s cn56xxp1; - struct cvmx_pko_reg_debug2_s cn58xx; - struct cvmx_pko_reg_debug2_s cn58xxp1; - struct cvmx_pko_reg_debug2_s cn61xx; - struct cvmx_pko_reg_debug2_s cn63xx; - struct cvmx_pko_reg_debug2_s cn63xxp1; - struct cvmx_pko_reg_debug2_s cn66xx; - struct cvmx_pko_reg_debug2_s cn68xx; - struct cvmx_pko_reg_debug2_s cn68xxp1; - struct cvmx_pko_reg_debug2_s cnf71xx; }; union cvmx_pko_reg_debug3 { @@ -1995,20 +1560,6 @@ union cvmx_pko_reg_debug3 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug3_s cn50xx; - struct cvmx_pko_reg_debug3_s cn52xx; - struct cvmx_pko_reg_debug3_s cn52xxp1; - struct cvmx_pko_reg_debug3_s cn56xx; - struct cvmx_pko_reg_debug3_s cn56xxp1; - struct cvmx_pko_reg_debug3_s cn58xx; - struct cvmx_pko_reg_debug3_s cn58xxp1; - struct cvmx_pko_reg_debug3_s cn61xx; - struct cvmx_pko_reg_debug3_s cn63xx; - struct cvmx_pko_reg_debug3_s cn63xxp1; - struct cvmx_pko_reg_debug3_s cn66xx; - struct cvmx_pko_reg_debug3_s cn68xx; - struct cvmx_pko_reg_debug3_s cn68xxp1; - struct cvmx_pko_reg_debug3_s cnf71xx; }; union cvmx_pko_reg_debug4 { @@ -2020,8 +1571,6 @@ union cvmx_pko_reg_debug4 { uint64_t asserts:64; #endif } s; - struct cvmx_pko_reg_debug4_s cn68xx; - struct cvmx_pko_reg_debug4_s cn68xxp1; }; union cvmx_pko_reg_engine_inflight { @@ -2090,9 +1639,6 @@ union cvmx_pko_reg_engine_inflight { uint64_t reserved_40_63:24; #endif } cn52xx; - struct cvmx_pko_reg_engine_inflight_cn52xx cn52xxp1; - struct cvmx_pko_reg_engine_inflight_cn52xx cn56xx; - struct cvmx_pko_reg_engine_inflight_cn52xx cn56xxp1; struct cvmx_pko_reg_engine_inflight_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_56_63:8; @@ -2159,11 +1705,6 @@ union cvmx_pko_reg_engine_inflight { uint64_t reserved_48_63:16; #endif } cn63xx; - struct cvmx_pko_reg_engine_inflight_cn63xx cn63xxp1; - struct cvmx_pko_reg_engine_inflight_cn61xx cn66xx; - struct cvmx_pko_reg_engine_inflight_s cn68xx; - struct cvmx_pko_reg_engine_inflight_s cn68xxp1; - struct cvmx_pko_reg_engine_inflight_cn61xx cnf71xx; }; union cvmx_pko_reg_engine_inflight1 { @@ -2183,8 +1724,6 @@ union cvmx_pko_reg_engine_inflight1 { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pko_reg_engine_inflight1_s cn68xx; - struct cvmx_pko_reg_engine_inflight1_s cn68xxp1; }; union cvmx_pko_reg_engine_storagex { @@ -2226,8 +1765,6 @@ union cvmx_pko_reg_engine_storagex { uint64_t engine15:4; #endif } s; - struct cvmx_pko_reg_engine_storagex_s cn68xx; - struct cvmx_pko_reg_engine_storagex_s cn68xxp1; }; union cvmx_pko_reg_engine_thresh { @@ -2250,9 +1787,6 @@ union cvmx_pko_reg_engine_thresh { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_pko_reg_engine_thresh_cn52xx cn52xxp1; - struct cvmx_pko_reg_engine_thresh_cn52xx cn56xx; - struct cvmx_pko_reg_engine_thresh_cn52xx cn56xxp1; struct cvmx_pko_reg_engine_thresh_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -2271,11 +1805,6 @@ union cvmx_pko_reg_engine_thresh { uint64_t reserved_12_63:52; #endif } cn63xx; - struct cvmx_pko_reg_engine_thresh_cn63xx cn63xxp1; - struct cvmx_pko_reg_engine_thresh_cn61xx cn66xx; - struct cvmx_pko_reg_engine_thresh_s cn68xx; - struct cvmx_pko_reg_engine_thresh_s cn68xxp1; - struct cvmx_pko_reg_engine_thresh_cn61xx cnf71xx; }; union cvmx_pko_reg_error { @@ -2306,9 +1835,6 @@ union cvmx_pko_reg_error { uint64_t reserved_2_63:62; #endif } cn30xx; - struct cvmx_pko_reg_error_cn30xx cn31xx; - struct cvmx_pko_reg_error_cn30xx cn38xx; - struct cvmx_pko_reg_error_cn30xx cn38xxp2; struct cvmx_pko_reg_error_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_3_63:61; @@ -2322,19 +1848,6 @@ union cvmx_pko_reg_error { uint64_t reserved_3_63:61; #endif } cn50xx; - struct cvmx_pko_reg_error_cn50xx cn52xx; - struct cvmx_pko_reg_error_cn50xx cn52xxp1; - struct cvmx_pko_reg_error_cn50xx cn56xx; - struct cvmx_pko_reg_error_cn50xx cn56xxp1; - struct cvmx_pko_reg_error_cn50xx cn58xx; - struct cvmx_pko_reg_error_cn50xx cn58xxp1; - struct cvmx_pko_reg_error_cn50xx cn61xx; - struct cvmx_pko_reg_error_cn50xx cn63xx; - struct cvmx_pko_reg_error_cn50xx cn63xxp1; - struct cvmx_pko_reg_error_cn50xx cn66xx; - struct cvmx_pko_reg_error_s cn68xx; - struct cvmx_pko_reg_error_s cn68xxp1; - struct cvmx_pko_reg_error_cn50xx cnf71xx; }; union cvmx_pko_reg_flags { @@ -2379,16 +1892,6 @@ union cvmx_pko_reg_flags { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_pko_reg_flags_cn30xx cn31xx; - struct cvmx_pko_reg_flags_cn30xx cn38xx; - struct cvmx_pko_reg_flags_cn30xx cn38xxp2; - struct cvmx_pko_reg_flags_cn30xx cn50xx; - struct cvmx_pko_reg_flags_cn30xx cn52xx; - struct cvmx_pko_reg_flags_cn30xx cn52xxp1; - struct cvmx_pko_reg_flags_cn30xx cn56xx; - struct cvmx_pko_reg_flags_cn30xx cn56xxp1; - struct cvmx_pko_reg_flags_cn30xx cn58xx; - struct cvmx_pko_reg_flags_cn30xx cn58xxp1; struct cvmx_pko_reg_flags_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -2410,10 +1913,6 @@ union cvmx_pko_reg_flags { uint64_t reserved_9_63:55; #endif } cn61xx; - struct cvmx_pko_reg_flags_cn30xx cn63xx; - struct cvmx_pko_reg_flags_cn30xx cn63xxp1; - struct cvmx_pko_reg_flags_cn61xx cn66xx; - struct cvmx_pko_reg_flags_s cn68xx; struct cvmx_pko_reg_flags_cn68xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_7_63:57; @@ -2435,7 +1934,6 @@ union cvmx_pko_reg_flags { uint64_t reserved_7_63:57; #endif } cn68xxp1; - struct cvmx_pko_reg_flags_cn61xx cnf71xx; }; union cvmx_pko_reg_gmx_port_mode { @@ -2451,22 +1949,6 @@ union cvmx_pko_reg_gmx_port_mode { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_pko_reg_gmx_port_mode_s cn30xx; - struct cvmx_pko_reg_gmx_port_mode_s cn31xx; - struct cvmx_pko_reg_gmx_port_mode_s cn38xx; - struct cvmx_pko_reg_gmx_port_mode_s cn38xxp2; - struct cvmx_pko_reg_gmx_port_mode_s cn50xx; - struct cvmx_pko_reg_gmx_port_mode_s cn52xx; - struct cvmx_pko_reg_gmx_port_mode_s cn52xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn56xx; - struct cvmx_pko_reg_gmx_port_mode_s cn56xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn58xx; - struct cvmx_pko_reg_gmx_port_mode_s cn58xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn61xx; - struct cvmx_pko_reg_gmx_port_mode_s cn63xx; - struct cvmx_pko_reg_gmx_port_mode_s cn63xxp1; - struct cvmx_pko_reg_gmx_port_mode_s cn66xx; - struct cvmx_pko_reg_gmx_port_mode_s cnf71xx; }; union cvmx_pko_reg_int_mask { @@ -2497,9 +1979,6 @@ union cvmx_pko_reg_int_mask { uint64_t reserved_2_63:62; #endif } cn30xx; - struct cvmx_pko_reg_int_mask_cn30xx cn31xx; - struct cvmx_pko_reg_int_mask_cn30xx cn38xx; - struct cvmx_pko_reg_int_mask_cn30xx cn38xxp2; struct cvmx_pko_reg_int_mask_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_3_63:61; @@ -2513,19 +1992,6 @@ union cvmx_pko_reg_int_mask { uint64_t reserved_3_63:61; #endif } cn50xx; - struct cvmx_pko_reg_int_mask_cn50xx cn52xx; - struct cvmx_pko_reg_int_mask_cn50xx cn52xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn56xx; - struct cvmx_pko_reg_int_mask_cn50xx cn56xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn58xx; - struct cvmx_pko_reg_int_mask_cn50xx cn58xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn61xx; - struct cvmx_pko_reg_int_mask_cn50xx cn63xx; - struct cvmx_pko_reg_int_mask_cn50xx cn63xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cn66xx; - struct cvmx_pko_reg_int_mask_s cn68xx; - struct cvmx_pko_reg_int_mask_s cn68xxp1; - struct cvmx_pko_reg_int_mask_cn50xx cnf71xx; }; union cvmx_pko_reg_loopback_bpid { @@ -2569,8 +2035,6 @@ union cvmx_pko_reg_loopback_bpid { uint64_t reserved_59_63:5; #endif } s; - struct cvmx_pko_reg_loopback_bpid_s cn68xx; - struct cvmx_pko_reg_loopback_bpid_s cn68xxp1; }; union cvmx_pko_reg_loopback_pkind { @@ -2614,8 +2078,6 @@ union cvmx_pko_reg_loopback_pkind { uint64_t reserved_59_63:5; #endif } s; - struct cvmx_pko_reg_loopback_pkind_s cn68xx; - struct cvmx_pko_reg_loopback_pkind_s cn68xxp1; }; union cvmx_pko_reg_min_pkt { @@ -2641,8 +2103,6 @@ union cvmx_pko_reg_min_pkt { uint64_t size7:8; #endif } s; - struct cvmx_pko_reg_min_pkt_s cn68xx; - struct cvmx_pko_reg_min_pkt_s cn68xxp1; }; union cvmx_pko_reg_preempt { @@ -2656,17 +2116,6 @@ union cvmx_pko_reg_preempt { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pko_reg_preempt_s cn52xx; - struct cvmx_pko_reg_preempt_s cn52xxp1; - struct cvmx_pko_reg_preempt_s cn56xx; - struct cvmx_pko_reg_preempt_s cn56xxp1; - struct cvmx_pko_reg_preempt_s cn61xx; - struct cvmx_pko_reg_preempt_s cn63xx; - struct cvmx_pko_reg_preempt_s cn63xxp1; - struct cvmx_pko_reg_preempt_s cn66xx; - struct cvmx_pko_reg_preempt_s cn68xx; - struct cvmx_pko_reg_preempt_s cn68xxp1; - struct cvmx_pko_reg_preempt_s cnf71xx; }; union cvmx_pko_reg_queue_mode { @@ -2680,24 +2129,6 @@ union cvmx_pko_reg_queue_mode { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_queue_mode_s cn30xx; - struct cvmx_pko_reg_queue_mode_s cn31xx; - struct cvmx_pko_reg_queue_mode_s cn38xx; - struct cvmx_pko_reg_queue_mode_s cn38xxp2; - struct cvmx_pko_reg_queue_mode_s cn50xx; - struct cvmx_pko_reg_queue_mode_s cn52xx; - struct cvmx_pko_reg_queue_mode_s cn52xxp1; - struct cvmx_pko_reg_queue_mode_s cn56xx; - struct cvmx_pko_reg_queue_mode_s cn56xxp1; - struct cvmx_pko_reg_queue_mode_s cn58xx; - struct cvmx_pko_reg_queue_mode_s cn58xxp1; - struct cvmx_pko_reg_queue_mode_s cn61xx; - struct cvmx_pko_reg_queue_mode_s cn63xx; - struct cvmx_pko_reg_queue_mode_s cn63xxp1; - struct cvmx_pko_reg_queue_mode_s cn66xx; - struct cvmx_pko_reg_queue_mode_s cn68xx; - struct cvmx_pko_reg_queue_mode_s cn68xxp1; - struct cvmx_pko_reg_queue_mode_s cnf71xx; }; union cvmx_pko_reg_queue_preempt { @@ -2713,17 +2144,6 @@ union cvmx_pko_reg_queue_preempt { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_queue_preempt_s cn52xx; - struct cvmx_pko_reg_queue_preempt_s cn52xxp1; - struct cvmx_pko_reg_queue_preempt_s cn56xx; - struct cvmx_pko_reg_queue_preempt_s cn56xxp1; - struct cvmx_pko_reg_queue_preempt_s cn61xx; - struct cvmx_pko_reg_queue_preempt_s cn63xx; - struct cvmx_pko_reg_queue_preempt_s cn63xxp1; - struct cvmx_pko_reg_queue_preempt_s cn66xx; - struct cvmx_pko_reg_queue_preempt_s cn68xx; - struct cvmx_pko_reg_queue_preempt_s cn68xxp1; - struct cvmx_pko_reg_queue_preempt_s cnf71xx; }; union cvmx_pko_reg_queue_ptrs1 { @@ -2739,18 +2159,6 @@ union cvmx_pko_reg_queue_ptrs1 { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_pko_reg_queue_ptrs1_s cn50xx; - struct cvmx_pko_reg_queue_ptrs1_s cn52xx; - struct cvmx_pko_reg_queue_ptrs1_s cn52xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn56xx; - struct cvmx_pko_reg_queue_ptrs1_s cn56xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn58xx; - struct cvmx_pko_reg_queue_ptrs1_s cn58xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn61xx; - struct cvmx_pko_reg_queue_ptrs1_s cn63xx; - struct cvmx_pko_reg_queue_ptrs1_s cn63xxp1; - struct cvmx_pko_reg_queue_ptrs1_s cn66xx; - struct cvmx_pko_reg_queue_ptrs1_s cnf71xx; }; union cvmx_pko_reg_read_idx { @@ -2766,24 +2174,6 @@ union cvmx_pko_reg_read_idx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_pko_reg_read_idx_s cn30xx; - struct cvmx_pko_reg_read_idx_s cn31xx; - struct cvmx_pko_reg_read_idx_s cn38xx; - struct cvmx_pko_reg_read_idx_s cn38xxp2; - struct cvmx_pko_reg_read_idx_s cn50xx; - struct cvmx_pko_reg_read_idx_s cn52xx; - struct cvmx_pko_reg_read_idx_s cn52xxp1; - struct cvmx_pko_reg_read_idx_s cn56xx; - struct cvmx_pko_reg_read_idx_s cn56xxp1; - struct cvmx_pko_reg_read_idx_s cn58xx; - struct cvmx_pko_reg_read_idx_s cn58xxp1; - struct cvmx_pko_reg_read_idx_s cn61xx; - struct cvmx_pko_reg_read_idx_s cn63xx; - struct cvmx_pko_reg_read_idx_s cn63xxp1; - struct cvmx_pko_reg_read_idx_s cn66xx; - struct cvmx_pko_reg_read_idx_s cn68xx; - struct cvmx_pko_reg_read_idx_s cn68xxp1; - struct cvmx_pko_reg_read_idx_s cnf71xx; }; union cvmx_pko_reg_throttle { @@ -2797,8 +2187,6 @@ union cvmx_pko_reg_throttle { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pko_reg_throttle_s cn68xx; - struct cvmx_pko_reg_throttle_s cn68xxp1; }; union cvmx_pko_reg_timestamp { @@ -2812,13 +2200,6 @@ union cvmx_pko_reg_timestamp { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_pko_reg_timestamp_s cn61xx; - struct cvmx_pko_reg_timestamp_s cn63xx; - struct cvmx_pko_reg_timestamp_s cn63xxp1; - struct cvmx_pko_reg_timestamp_s cn66xx; - struct cvmx_pko_reg_timestamp_s cn68xx; - struct cvmx_pko_reg_timestamp_s cn68xxp1; - struct cvmx_pko_reg_timestamp_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-pko.h b/arch/mips/include/asm/octeon/cvmx-pko.h index 5f47f76ed510..20eb9c46a75a 100644 --- a/arch/mips/include/asm/octeon/cvmx-pko.h +++ b/arch/mips/include/asm/octeon/cvmx-pko.h @@ -611,7 +611,7 @@ static inline void cvmx_pko_get_port_status(uint64_t port_num, uint64_t clear, pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(port_num); cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64); debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8); - status->doorbell = debug8.cn58xx.doorbell; + status->doorbell = debug8.cn50xx.doorbell; } } diff --git a/arch/mips/include/asm/octeon/cvmx-pow-defs.h b/arch/mips/include/asm/octeon/cvmx-pow-defs.h index 6a3db4b068ff..474dd544314b 100644 --- a/arch/mips/include/asm/octeon/cvmx-pow-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pow-defs.h @@ -160,8 +160,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_32_63:32; #endif } cn38xx; - struct cvmx_pow_bist_stat_cn38xx cn38xxp2; - struct cvmx_pow_bist_stat_cn31xx cn50xx; struct cvmx_pow_bist_stat_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -191,7 +189,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_20_63:44; #endif } cn52xx; - struct cvmx_pow_bist_stat_cn52xx cn52xxp1; struct cvmx_pow_bist_stat_cn56xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -223,9 +220,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_28_63:36; #endif } cn56xx; - struct cvmx_pow_bist_stat_cn56xx cn56xxp1; - struct cvmx_pow_bist_stat_cn38xx cn58xx; - struct cvmx_pow_bist_stat_cn38xx cn58xxp1; struct cvmx_pow_bist_stat_cn61xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_20_63:44; @@ -276,7 +270,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_22_63:42; #endif } cn63xx; - struct cvmx_pow_bist_stat_cn63xx cn63xxp1; struct cvmx_pow_bist_stat_cn66xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_26_63:38; @@ -302,7 +295,6 @@ union cvmx_pow_bist_stat { uint64_t reserved_26_63:38; #endif } cn66xx; - struct cvmx_pow_bist_stat_cn61xx cnf71xx; }; union cvmx_pow_ds_pc { @@ -316,22 +308,6 @@ union cvmx_pow_ds_pc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_ds_pc_s cn30xx; - struct cvmx_pow_ds_pc_s cn31xx; - struct cvmx_pow_ds_pc_s cn38xx; - struct cvmx_pow_ds_pc_s cn38xxp2; - struct cvmx_pow_ds_pc_s cn50xx; - struct cvmx_pow_ds_pc_s cn52xx; - struct cvmx_pow_ds_pc_s cn52xxp1; - struct cvmx_pow_ds_pc_s cn56xx; - struct cvmx_pow_ds_pc_s cn56xxp1; - struct cvmx_pow_ds_pc_s cn58xx; - struct cvmx_pow_ds_pc_s cn58xxp1; - struct cvmx_pow_ds_pc_s cn61xx; - struct cvmx_pow_ds_pc_s cn63xx; - struct cvmx_pow_ds_pc_s cn63xxp1; - struct cvmx_pow_ds_pc_s cn66xx; - struct cvmx_pow_ds_pc_s cnf71xx; }; union cvmx_pow_ecc_err { @@ -367,7 +343,6 @@ union cvmx_pow_ecc_err { uint64_t reserved_45_63:19; #endif } s; - struct cvmx_pow_ecc_err_s cn30xx; struct cvmx_pow_ecc_err_cn31xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63:50; @@ -391,20 +366,6 @@ union cvmx_pow_ecc_err { uint64_t reserved_14_63:50; #endif } cn31xx; - struct cvmx_pow_ecc_err_s cn38xx; - struct cvmx_pow_ecc_err_cn31xx cn38xxp2; - struct cvmx_pow_ecc_err_s cn50xx; - struct cvmx_pow_ecc_err_s cn52xx; - struct cvmx_pow_ecc_err_s cn52xxp1; - struct cvmx_pow_ecc_err_s cn56xx; - struct cvmx_pow_ecc_err_s cn56xxp1; - struct cvmx_pow_ecc_err_s cn58xx; - struct cvmx_pow_ecc_err_s cn58xxp1; - struct cvmx_pow_ecc_err_s cn61xx; - struct cvmx_pow_ecc_err_s cn63xx; - struct cvmx_pow_ecc_err_s cn63xxp1; - struct cvmx_pow_ecc_err_s cn66xx; - struct cvmx_pow_ecc_err_s cnf71xx; }; union cvmx_pow_int_ctl { @@ -420,22 +381,6 @@ union cvmx_pow_int_ctl { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_pow_int_ctl_s cn30xx; - struct cvmx_pow_int_ctl_s cn31xx; - struct cvmx_pow_int_ctl_s cn38xx; - struct cvmx_pow_int_ctl_s cn38xxp2; - struct cvmx_pow_int_ctl_s cn50xx; - struct cvmx_pow_int_ctl_s cn52xx; - struct cvmx_pow_int_ctl_s cn52xxp1; - struct cvmx_pow_int_ctl_s cn56xx; - struct cvmx_pow_int_ctl_s cn56xxp1; - struct cvmx_pow_int_ctl_s cn58xx; - struct cvmx_pow_int_ctl_s cn58xxp1; - struct cvmx_pow_int_ctl_s cn61xx; - struct cvmx_pow_int_ctl_s cn63xx; - struct cvmx_pow_int_ctl_s cn63xxp1; - struct cvmx_pow_int_ctl_s cn66xx; - struct cvmx_pow_int_ctl_s cnf71xx; }; union cvmx_pow_iq_cntx { @@ -449,22 +394,6 @@ union cvmx_pow_iq_cntx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_iq_cntx_s cn30xx; - struct cvmx_pow_iq_cntx_s cn31xx; - struct cvmx_pow_iq_cntx_s cn38xx; - struct cvmx_pow_iq_cntx_s cn38xxp2; - struct cvmx_pow_iq_cntx_s cn50xx; - struct cvmx_pow_iq_cntx_s cn52xx; - struct cvmx_pow_iq_cntx_s cn52xxp1; - struct cvmx_pow_iq_cntx_s cn56xx; - struct cvmx_pow_iq_cntx_s cn56xxp1; - struct cvmx_pow_iq_cntx_s cn58xx; - struct cvmx_pow_iq_cntx_s cn58xxp1; - struct cvmx_pow_iq_cntx_s cn61xx; - struct cvmx_pow_iq_cntx_s cn63xx; - struct cvmx_pow_iq_cntx_s cn63xxp1; - struct cvmx_pow_iq_cntx_s cn66xx; - struct cvmx_pow_iq_cntx_s cnf71xx; }; union cvmx_pow_iq_com_cnt { @@ -478,22 +407,6 @@ union cvmx_pow_iq_com_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_iq_com_cnt_s cn30xx; - struct cvmx_pow_iq_com_cnt_s cn31xx; - struct cvmx_pow_iq_com_cnt_s cn38xx; - struct cvmx_pow_iq_com_cnt_s cn38xxp2; - struct cvmx_pow_iq_com_cnt_s cn50xx; - struct cvmx_pow_iq_com_cnt_s cn52xx; - struct cvmx_pow_iq_com_cnt_s cn52xxp1; - struct cvmx_pow_iq_com_cnt_s cn56xx; - struct cvmx_pow_iq_com_cnt_s cn56xxp1; - struct cvmx_pow_iq_com_cnt_s cn58xx; - struct cvmx_pow_iq_com_cnt_s cn58xxp1; - struct cvmx_pow_iq_com_cnt_s cn61xx; - struct cvmx_pow_iq_com_cnt_s cn63xx; - struct cvmx_pow_iq_com_cnt_s cn63xxp1; - struct cvmx_pow_iq_com_cnt_s cn66xx; - struct cvmx_pow_iq_com_cnt_s cnf71xx; }; union cvmx_pow_iq_int { @@ -507,15 +420,6 @@ union cvmx_pow_iq_int { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pow_iq_int_s cn52xx; - struct cvmx_pow_iq_int_s cn52xxp1; - struct cvmx_pow_iq_int_s cn56xx; - struct cvmx_pow_iq_int_s cn56xxp1; - struct cvmx_pow_iq_int_s cn61xx; - struct cvmx_pow_iq_int_s cn63xx; - struct cvmx_pow_iq_int_s cn63xxp1; - struct cvmx_pow_iq_int_s cn66xx; - struct cvmx_pow_iq_int_s cnf71xx; }; union cvmx_pow_iq_int_en { @@ -529,15 +433,6 @@ union cvmx_pow_iq_int_en { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pow_iq_int_en_s cn52xx; - struct cvmx_pow_iq_int_en_s cn52xxp1; - struct cvmx_pow_iq_int_en_s cn56xx; - struct cvmx_pow_iq_int_en_s cn56xxp1; - struct cvmx_pow_iq_int_en_s cn61xx; - struct cvmx_pow_iq_int_en_s cn63xx; - struct cvmx_pow_iq_int_en_s cn63xxp1; - struct cvmx_pow_iq_int_en_s cn66xx; - struct cvmx_pow_iq_int_en_s cnf71xx; }; union cvmx_pow_iq_thrx { @@ -551,15 +446,6 @@ union cvmx_pow_iq_thrx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_iq_thrx_s cn52xx; - struct cvmx_pow_iq_thrx_s cn52xxp1; - struct cvmx_pow_iq_thrx_s cn56xx; - struct cvmx_pow_iq_thrx_s cn56xxp1; - struct cvmx_pow_iq_thrx_s cn61xx; - struct cvmx_pow_iq_thrx_s cn63xx; - struct cvmx_pow_iq_thrx_s cn63xxp1; - struct cvmx_pow_iq_thrx_s cn66xx; - struct cvmx_pow_iq_thrx_s cnf71xx; }; union cvmx_pow_nos_cnt { @@ -591,9 +477,6 @@ union cvmx_pow_nos_cnt { uint64_t reserved_9_63:55; #endif } cn31xx; - struct cvmx_pow_nos_cnt_s cn38xx; - struct cvmx_pow_nos_cnt_s cn38xxp2; - struct cvmx_pow_nos_cnt_cn31xx cn50xx; struct cvmx_pow_nos_cnt_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_10_63:54; @@ -603,12 +486,6 @@ union cvmx_pow_nos_cnt { uint64_t reserved_10_63:54; #endif } cn52xx; - struct cvmx_pow_nos_cnt_cn52xx cn52xxp1; - struct cvmx_pow_nos_cnt_s cn56xx; - struct cvmx_pow_nos_cnt_s cn56xxp1; - struct cvmx_pow_nos_cnt_s cn58xx; - struct cvmx_pow_nos_cnt_s cn58xxp1; - struct cvmx_pow_nos_cnt_cn52xx cn61xx; struct cvmx_pow_nos_cnt_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -618,9 +495,6 @@ union cvmx_pow_nos_cnt { uint64_t reserved_11_63:53; #endif } cn63xx; - struct cvmx_pow_nos_cnt_cn63xx cn63xxp1; - struct cvmx_pow_nos_cnt_cn63xx cn66xx; - struct cvmx_pow_nos_cnt_cn52xx cnf71xx; }; union cvmx_pow_nw_tim { @@ -634,22 +508,6 @@ union cvmx_pow_nw_tim { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_pow_nw_tim_s cn30xx; - struct cvmx_pow_nw_tim_s cn31xx; - struct cvmx_pow_nw_tim_s cn38xx; - struct cvmx_pow_nw_tim_s cn38xxp2; - struct cvmx_pow_nw_tim_s cn50xx; - struct cvmx_pow_nw_tim_s cn52xx; - struct cvmx_pow_nw_tim_s cn52xxp1; - struct cvmx_pow_nw_tim_s cn56xx; - struct cvmx_pow_nw_tim_s cn56xxp1; - struct cvmx_pow_nw_tim_s cn58xx; - struct cvmx_pow_nw_tim_s cn58xxp1; - struct cvmx_pow_nw_tim_s cn61xx; - struct cvmx_pow_nw_tim_s cn63xx; - struct cvmx_pow_nw_tim_s cn63xxp1; - struct cvmx_pow_nw_tim_s cn66xx; - struct cvmx_pow_nw_tim_s cnf71xx; }; union cvmx_pow_pf_rst_msk { @@ -663,18 +521,6 @@ union cvmx_pow_pf_rst_msk { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_pow_pf_rst_msk_s cn50xx; - struct cvmx_pow_pf_rst_msk_s cn52xx; - struct cvmx_pow_pf_rst_msk_s cn52xxp1; - struct cvmx_pow_pf_rst_msk_s cn56xx; - struct cvmx_pow_pf_rst_msk_s cn56xxp1; - struct cvmx_pow_pf_rst_msk_s cn58xx; - struct cvmx_pow_pf_rst_msk_s cn58xxp1; - struct cvmx_pow_pf_rst_msk_s cn61xx; - struct cvmx_pow_pf_rst_msk_s cn63xx; - struct cvmx_pow_pf_rst_msk_s cn63xxp1; - struct cvmx_pow_pf_rst_msk_s cn66xx; - struct cvmx_pow_pf_rst_msk_s cnf71xx; }; union cvmx_pow_pp_grp_mskx { @@ -713,21 +559,6 @@ union cvmx_pow_pp_grp_mskx { uint64_t reserved_16_63:48; #endif } cn30xx; - struct cvmx_pow_pp_grp_mskx_cn30xx cn31xx; - struct cvmx_pow_pp_grp_mskx_cn30xx cn38xx; - struct cvmx_pow_pp_grp_mskx_cn30xx cn38xxp2; - struct cvmx_pow_pp_grp_mskx_s cn50xx; - struct cvmx_pow_pp_grp_mskx_s cn52xx; - struct cvmx_pow_pp_grp_mskx_s cn52xxp1; - struct cvmx_pow_pp_grp_mskx_s cn56xx; - struct cvmx_pow_pp_grp_mskx_s cn56xxp1; - struct cvmx_pow_pp_grp_mskx_s cn58xx; - struct cvmx_pow_pp_grp_mskx_s cn58xxp1; - struct cvmx_pow_pp_grp_mskx_s cn61xx; - struct cvmx_pow_pp_grp_mskx_s cn63xx; - struct cvmx_pow_pp_grp_mskx_s cn63xxp1; - struct cvmx_pow_pp_grp_mskx_s cn66xx; - struct cvmx_pow_pp_grp_mskx_s cnf71xx; }; union cvmx_pow_qos_rndx { @@ -747,22 +578,6 @@ union cvmx_pow_qos_rndx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_qos_rndx_s cn30xx; - struct cvmx_pow_qos_rndx_s cn31xx; - struct cvmx_pow_qos_rndx_s cn38xx; - struct cvmx_pow_qos_rndx_s cn38xxp2; - struct cvmx_pow_qos_rndx_s cn50xx; - struct cvmx_pow_qos_rndx_s cn52xx; - struct cvmx_pow_qos_rndx_s cn52xxp1; - struct cvmx_pow_qos_rndx_s cn56xx; - struct cvmx_pow_qos_rndx_s cn56xxp1; - struct cvmx_pow_qos_rndx_s cn58xx; - struct cvmx_pow_qos_rndx_s cn58xxp1; - struct cvmx_pow_qos_rndx_s cn61xx; - struct cvmx_pow_qos_rndx_s cn63xx; - struct cvmx_pow_qos_rndx_s cn63xxp1; - struct cvmx_pow_qos_rndx_s cn66xx; - struct cvmx_pow_qos_rndx_s cnf71xx; }; union cvmx_pow_qos_thrx { @@ -838,9 +653,6 @@ union cvmx_pow_qos_thrx { uint64_t reserved_57_63:7; #endif } cn31xx; - struct cvmx_pow_qos_thrx_s cn38xx; - struct cvmx_pow_qos_thrx_s cn38xxp2; - struct cvmx_pow_qos_thrx_cn31xx cn50xx; struct cvmx_pow_qos_thrx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_58_63:6; @@ -866,12 +678,6 @@ union cvmx_pow_qos_thrx { uint64_t reserved_58_63:6; #endif } cn52xx; - struct cvmx_pow_qos_thrx_cn52xx cn52xxp1; - struct cvmx_pow_qos_thrx_s cn56xx; - struct cvmx_pow_qos_thrx_s cn56xxp1; - struct cvmx_pow_qos_thrx_s cn58xx; - struct cvmx_pow_qos_thrx_s cn58xxp1; - struct cvmx_pow_qos_thrx_cn52xx cn61xx; struct cvmx_pow_qos_thrx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_59_63:5; @@ -897,9 +703,6 @@ union cvmx_pow_qos_thrx { uint64_t reserved_59_63:5; #endif } cn63xx; - struct cvmx_pow_qos_thrx_cn63xx cn63xxp1; - struct cvmx_pow_qos_thrx_cn63xx cn66xx; - struct cvmx_pow_qos_thrx_cn52xx cnf71xx; }; union cvmx_pow_ts_pc { @@ -913,22 +716,6 @@ union cvmx_pow_ts_pc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_ts_pc_s cn30xx; - struct cvmx_pow_ts_pc_s cn31xx; - struct cvmx_pow_ts_pc_s cn38xx; - struct cvmx_pow_ts_pc_s cn38xxp2; - struct cvmx_pow_ts_pc_s cn50xx; - struct cvmx_pow_ts_pc_s cn52xx; - struct cvmx_pow_ts_pc_s cn52xxp1; - struct cvmx_pow_ts_pc_s cn56xx; - struct cvmx_pow_ts_pc_s cn56xxp1; - struct cvmx_pow_ts_pc_s cn58xx; - struct cvmx_pow_ts_pc_s cn58xxp1; - struct cvmx_pow_ts_pc_s cn61xx; - struct cvmx_pow_ts_pc_s cn63xx; - struct cvmx_pow_ts_pc_s cn63xxp1; - struct cvmx_pow_ts_pc_s cn66xx; - struct cvmx_pow_ts_pc_s cnf71xx; }; union cvmx_pow_wa_com_pc { @@ -942,22 +729,6 @@ union cvmx_pow_wa_com_pc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_wa_com_pc_s cn30xx; - struct cvmx_pow_wa_com_pc_s cn31xx; - struct cvmx_pow_wa_com_pc_s cn38xx; - struct cvmx_pow_wa_com_pc_s cn38xxp2; - struct cvmx_pow_wa_com_pc_s cn50xx; - struct cvmx_pow_wa_com_pc_s cn52xx; - struct cvmx_pow_wa_com_pc_s cn52xxp1; - struct cvmx_pow_wa_com_pc_s cn56xx; - struct cvmx_pow_wa_com_pc_s cn56xxp1; - struct cvmx_pow_wa_com_pc_s cn58xx; - struct cvmx_pow_wa_com_pc_s cn58xxp1; - struct cvmx_pow_wa_com_pc_s cn61xx; - struct cvmx_pow_wa_com_pc_s cn63xx; - struct cvmx_pow_wa_com_pc_s cn63xxp1; - struct cvmx_pow_wa_com_pc_s cn66xx; - struct cvmx_pow_wa_com_pc_s cnf71xx; }; union cvmx_pow_wa_pcx { @@ -971,22 +742,6 @@ union cvmx_pow_wa_pcx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_wa_pcx_s cn30xx; - struct cvmx_pow_wa_pcx_s cn31xx; - struct cvmx_pow_wa_pcx_s cn38xx; - struct cvmx_pow_wa_pcx_s cn38xxp2; - struct cvmx_pow_wa_pcx_s cn50xx; - struct cvmx_pow_wa_pcx_s cn52xx; - struct cvmx_pow_wa_pcx_s cn52xxp1; - struct cvmx_pow_wa_pcx_s cn56xx; - struct cvmx_pow_wa_pcx_s cn56xxp1; - struct cvmx_pow_wa_pcx_s cn58xx; - struct cvmx_pow_wa_pcx_s cn58xxp1; - struct cvmx_pow_wa_pcx_s cn61xx; - struct cvmx_pow_wa_pcx_s cn63xx; - struct cvmx_pow_wa_pcx_s cn63xxp1; - struct cvmx_pow_wa_pcx_s cn66xx; - struct cvmx_pow_wa_pcx_s cnf71xx; }; union cvmx_pow_wq_int { @@ -1002,22 +757,6 @@ union cvmx_pow_wq_int { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_wq_int_s cn30xx; - struct cvmx_pow_wq_int_s cn31xx; - struct cvmx_pow_wq_int_s cn38xx; - struct cvmx_pow_wq_int_s cn38xxp2; - struct cvmx_pow_wq_int_s cn50xx; - struct cvmx_pow_wq_int_s cn52xx; - struct cvmx_pow_wq_int_s cn52xxp1; - struct cvmx_pow_wq_int_s cn56xx; - struct cvmx_pow_wq_int_s cn56xxp1; - struct cvmx_pow_wq_int_s cn58xx; - struct cvmx_pow_wq_int_s cn58xxp1; - struct cvmx_pow_wq_int_s cn61xx; - struct cvmx_pow_wq_int_s cn63xx; - struct cvmx_pow_wq_int_s cn63xxp1; - struct cvmx_pow_wq_int_s cn66xx; - struct cvmx_pow_wq_int_s cnf71xx; }; union cvmx_pow_wq_int_cntx { @@ -1069,9 +808,6 @@ union cvmx_pow_wq_int_cntx { uint64_t reserved_28_63:36; #endif } cn31xx; - struct cvmx_pow_wq_int_cntx_s cn38xx; - struct cvmx_pow_wq_int_cntx_s cn38xxp2; - struct cvmx_pow_wq_int_cntx_cn31xx cn50xx; struct cvmx_pow_wq_int_cntx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1089,12 +825,6 @@ union cvmx_pow_wq_int_cntx { uint64_t reserved_28_63:36; #endif } cn52xx; - struct cvmx_pow_wq_int_cntx_cn52xx cn52xxp1; - struct cvmx_pow_wq_int_cntx_s cn56xx; - struct cvmx_pow_wq_int_cntx_s cn56xxp1; - struct cvmx_pow_wq_int_cntx_s cn58xx; - struct cvmx_pow_wq_int_cntx_s cn58xxp1; - struct cvmx_pow_wq_int_cntx_cn52xx cn61xx; struct cvmx_pow_wq_int_cntx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_28_63:36; @@ -1112,9 +842,6 @@ union cvmx_pow_wq_int_cntx { uint64_t reserved_28_63:36; #endif } cn63xx; - struct cvmx_pow_wq_int_cntx_cn63xx cn63xxp1; - struct cvmx_pow_wq_int_cntx_cn63xx cn66xx; - struct cvmx_pow_wq_int_cntx_cn52xx cnf71xx; }; union cvmx_pow_wq_int_pc { @@ -1134,22 +861,6 @@ union cvmx_pow_wq_int_pc { uint64_t reserved_60_63:4; #endif } s; - struct cvmx_pow_wq_int_pc_s cn30xx; - struct cvmx_pow_wq_int_pc_s cn31xx; - struct cvmx_pow_wq_int_pc_s cn38xx; - struct cvmx_pow_wq_int_pc_s cn38xxp2; - struct cvmx_pow_wq_int_pc_s cn50xx; - struct cvmx_pow_wq_int_pc_s cn52xx; - struct cvmx_pow_wq_int_pc_s cn52xxp1; - struct cvmx_pow_wq_int_pc_s cn56xx; - struct cvmx_pow_wq_int_pc_s cn56xxp1; - struct cvmx_pow_wq_int_pc_s cn58xx; - struct cvmx_pow_wq_int_pc_s cn58xxp1; - struct cvmx_pow_wq_int_pc_s cn61xx; - struct cvmx_pow_wq_int_pc_s cn63xx; - struct cvmx_pow_wq_int_pc_s cn63xxp1; - struct cvmx_pow_wq_int_pc_s cn66xx; - struct cvmx_pow_wq_int_pc_s cnf71xx; }; union cvmx_pow_wq_int_thrx { @@ -1211,9 +922,6 @@ union cvmx_pow_wq_int_thrx { uint64_t reserved_29_63:35; #endif } cn31xx; - struct cvmx_pow_wq_int_thrx_s cn38xx; - struct cvmx_pow_wq_int_thrx_s cn38xxp2; - struct cvmx_pow_wq_int_thrx_cn31xx cn50xx; struct cvmx_pow_wq_int_thrx_cn52xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -1233,12 +941,6 @@ union cvmx_pow_wq_int_thrx { uint64_t reserved_29_63:35; #endif } cn52xx; - struct cvmx_pow_wq_int_thrx_cn52xx cn52xxp1; - struct cvmx_pow_wq_int_thrx_s cn56xx; - struct cvmx_pow_wq_int_thrx_s cn56xxp1; - struct cvmx_pow_wq_int_thrx_s cn58xx; - struct cvmx_pow_wq_int_thrx_s cn58xxp1; - struct cvmx_pow_wq_int_thrx_cn52xx cn61xx; struct cvmx_pow_wq_int_thrx_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_29_63:35; @@ -1258,9 +960,6 @@ union cvmx_pow_wq_int_thrx { uint64_t reserved_29_63:35; #endif } cn63xx; - struct cvmx_pow_wq_int_thrx_cn63xx cn63xxp1; - struct cvmx_pow_wq_int_thrx_cn63xx cn66xx; - struct cvmx_pow_wq_int_thrx_cn52xx cnf71xx; }; union cvmx_pow_ws_pcx { @@ -1274,22 +973,6 @@ union cvmx_pow_ws_pcx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_pow_ws_pcx_s cn30xx; - struct cvmx_pow_ws_pcx_s cn31xx; - struct cvmx_pow_ws_pcx_s cn38xx; - struct cvmx_pow_ws_pcx_s cn38xxp2; - struct cvmx_pow_ws_pcx_s cn50xx; - struct cvmx_pow_ws_pcx_s cn52xx; - struct cvmx_pow_ws_pcx_s cn52xxp1; - struct cvmx_pow_ws_pcx_s cn56xx; - struct cvmx_pow_ws_pcx_s cn56xxp1; - struct cvmx_pow_ws_pcx_s cn58xx; - struct cvmx_pow_ws_pcx_s cn58xxp1; - struct cvmx_pow_ws_pcx_s cn61xx; - struct cvmx_pow_ws_pcx_s cn63xx; - struct cvmx_pow_ws_pcx_s cn63xxp1; - struct cvmx_pow_ws_pcx_s cn66xx; - struct cvmx_pow_ws_pcx_s cnf71xx; }; union cvmx_sso_wq_int_thrx { diff --git a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h index 87d6f92a548a..94295d2fe22e 100644 --- a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h @@ -47,24 +47,6 @@ union cvmx_rnm_bist_status { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_rnm_bist_status_s cn30xx; - struct cvmx_rnm_bist_status_s cn31xx; - struct cvmx_rnm_bist_status_s cn38xx; - struct cvmx_rnm_bist_status_s cn38xxp2; - struct cvmx_rnm_bist_status_s cn50xx; - struct cvmx_rnm_bist_status_s cn52xx; - struct cvmx_rnm_bist_status_s cn52xxp1; - struct cvmx_rnm_bist_status_s cn56xx; - struct cvmx_rnm_bist_status_s cn56xxp1; - struct cvmx_rnm_bist_status_s cn58xx; - struct cvmx_rnm_bist_status_s cn58xxp1; - struct cvmx_rnm_bist_status_s cn61xx; - struct cvmx_rnm_bist_status_s cn63xx; - struct cvmx_rnm_bist_status_s cn63xxp1; - struct cvmx_rnm_bist_status_s cn66xx; - struct cvmx_rnm_bist_status_s cn68xx; - struct cvmx_rnm_bist_status_s cn68xxp1; - struct cvmx_rnm_bist_status_s cnf71xx; }; union cvmx_rnm_ctl_status { @@ -109,9 +91,6 @@ union cvmx_rnm_ctl_status { uint64_t reserved_4_63:60; #endif } cn30xx; - struct cvmx_rnm_ctl_status_cn30xx cn31xx; - struct cvmx_rnm_ctl_status_cn30xx cn38xx; - struct cvmx_rnm_ctl_status_cn30xx cn38xxp2; struct cvmx_rnm_ctl_status_cn50xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_9_63:55; @@ -131,13 +110,6 @@ union cvmx_rnm_ctl_status { uint64_t reserved_9_63:55; #endif } cn50xx; - struct cvmx_rnm_ctl_status_cn50xx cn52xx; - struct cvmx_rnm_ctl_status_cn50xx cn52xxp1; - struct cvmx_rnm_ctl_status_cn50xx cn56xx; - struct cvmx_rnm_ctl_status_cn50xx cn56xxp1; - struct cvmx_rnm_ctl_status_cn50xx cn58xx; - struct cvmx_rnm_ctl_status_cn50xx cn58xxp1; - struct cvmx_rnm_ctl_status_s cn61xx; struct cvmx_rnm_ctl_status_cn63xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_11_63:53; @@ -161,11 +133,6 @@ union cvmx_rnm_ctl_status { uint64_t reserved_11_63:53; #endif } cn63xx; - struct cvmx_rnm_ctl_status_cn63xx cn63xxp1; - struct cvmx_rnm_ctl_status_s cn66xx; - struct cvmx_rnm_ctl_status_cn63xx cn68xx; - struct cvmx_rnm_ctl_status_cn63xx cn68xxp1; - struct cvmx_rnm_ctl_status_s cnf71xx; }; union cvmx_rnm_eer_dbg { @@ -177,13 +144,6 @@ union cvmx_rnm_eer_dbg { uint64_t dat:64; #endif } s; - struct cvmx_rnm_eer_dbg_s cn61xx; - struct cvmx_rnm_eer_dbg_s cn63xx; - struct cvmx_rnm_eer_dbg_s cn63xxp1; - struct cvmx_rnm_eer_dbg_s cn66xx; - struct cvmx_rnm_eer_dbg_s cn68xx; - struct cvmx_rnm_eer_dbg_s cn68xxp1; - struct cvmx_rnm_eer_dbg_s cnf71xx; }; union cvmx_rnm_eer_key { @@ -195,13 +155,6 @@ union cvmx_rnm_eer_key { uint64_t key:64; #endif } s; - struct cvmx_rnm_eer_key_s cn61xx; - struct cvmx_rnm_eer_key_s cn63xx; - struct cvmx_rnm_eer_key_s cn63xxp1; - struct cvmx_rnm_eer_key_s cn66xx; - struct cvmx_rnm_eer_key_s cn68xx; - struct cvmx_rnm_eer_key_s cn68xxp1; - struct cvmx_rnm_eer_key_s cnf71xx; }; union cvmx_rnm_serial_num { @@ -213,12 +166,6 @@ union cvmx_rnm_serial_num { uint64_t dat:64; #endif } s; - struct cvmx_rnm_serial_num_s cn61xx; - struct cvmx_rnm_serial_num_s cn63xx; - struct cvmx_rnm_serial_num_s cn66xx; - struct cvmx_rnm_serial_num_s cn68xx; - struct cvmx_rnm_serial_num_s cn68xxp1; - struct cvmx_rnm_serial_num_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-rst-defs.h b/arch/mips/include/asm/octeon/cvmx-rst-defs.h index 0c9c3e74d4ae..accc9977d9cd 100644 --- a/arch/mips/include/asm/octeon/cvmx-rst-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-rst-defs.h @@ -80,9 +80,6 @@ union cvmx_rst_boot { uint64_t chipkill:1; #endif } s; - struct cvmx_rst_boot_s cn70xx; - struct cvmx_rst_boot_s cn70xxp1; - struct cvmx_rst_boot_s cn78xx; }; union cvmx_rst_cfg { @@ -102,9 +99,6 @@ union cvmx_rst_cfg { uint64_t bist_delay:58; #endif } s; - struct cvmx_rst_cfg_s cn70xx; - struct cvmx_rst_cfg_s cn70xxp1; - struct cvmx_rst_cfg_s cn78xx; }; union cvmx_rst_ckill { @@ -118,9 +112,6 @@ union cvmx_rst_ckill { uint64_t reserved_47_63:17; #endif } s; - struct cvmx_rst_ckill_s cn70xx; - struct cvmx_rst_ckill_s cn70xxp1; - struct cvmx_rst_ckill_s cn78xx; }; union cvmx_rst_ctlx { @@ -150,9 +141,6 @@ union cvmx_rst_ctlx { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_rst_ctlx_s cn70xx; - struct cvmx_rst_ctlx_s cn70xxp1; - struct cvmx_rst_ctlx_s cn78xx; }; union cvmx_rst_delay { @@ -168,9 +156,6 @@ union cvmx_rst_delay { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_rst_delay_s cn70xx; - struct cvmx_rst_delay_s cn70xxp1; - struct cvmx_rst_delay_s cn78xx; }; union cvmx_rst_eco { @@ -184,7 +169,6 @@ union cvmx_rst_eco { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_rst_eco_s cn78xx; }; union cvmx_rst_int { @@ -215,8 +199,6 @@ union cvmx_rst_int { uint64_t reserved_11_63:53; #endif } cn70xx; - struct cvmx_rst_int_cn70xx cn70xxp1; - struct cvmx_rst_int_s cn78xx; }; union cvmx_rst_ocx { @@ -230,7 +212,6 @@ union cvmx_rst_ocx { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_rst_ocx_s cn78xx; }; union cvmx_rst_power_dbg { @@ -244,7 +225,6 @@ union cvmx_rst_power_dbg { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_rst_power_dbg_s cn78xx; }; union cvmx_rst_pp_power { @@ -267,8 +247,6 @@ union cvmx_rst_pp_power { uint64_t reserved_4_63:60; #endif } cn70xx; - struct cvmx_rst_pp_power_cn70xx cn70xxp1; - struct cvmx_rst_pp_power_s cn78xx; }; union cvmx_rst_soft_prstx { @@ -282,9 +260,6 @@ union cvmx_rst_soft_prstx { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_rst_soft_prstx_s cn70xx; - struct cvmx_rst_soft_prstx_s cn70xxp1; - struct cvmx_rst_soft_prstx_s cn78xx; }; union cvmx_rst_soft_rst { @@ -298,9 +273,6 @@ union cvmx_rst_soft_rst { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_rst_soft_rst_s cn70xx; - struct cvmx_rst_soft_rst_s cn70xxp1; - struct cvmx_rst_soft_rst_s cn78xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-smix-defs.h b/arch/mips/include/asm/octeon/cvmx-smix-defs.h index 8a278e6ddba9..7a928230b0c0 100644 --- a/arch/mips/include/asm/octeon/cvmx-smix-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-smix-defs.h @@ -186,23 +186,6 @@ union cvmx_smix_clk { uint64_t reserved_21_63:43; #endif } cn30xx; - struct cvmx_smix_clk_cn30xx cn31xx; - struct cvmx_smix_clk_cn30xx cn38xx; - struct cvmx_smix_clk_cn30xx cn38xxp2; - struct cvmx_smix_clk_s cn50xx; - struct cvmx_smix_clk_s cn52xx; - struct cvmx_smix_clk_s cn52xxp1; - struct cvmx_smix_clk_s cn56xx; - struct cvmx_smix_clk_s cn56xxp1; - struct cvmx_smix_clk_cn30xx cn58xx; - struct cvmx_smix_clk_cn30xx cn58xxp1; - struct cvmx_smix_clk_s cn61xx; - struct cvmx_smix_clk_s cn63xx; - struct cvmx_smix_clk_s cn63xxp1; - struct cvmx_smix_clk_s cn66xx; - struct cvmx_smix_clk_s cn68xx; - struct cvmx_smix_clk_s cn68xxp1; - struct cvmx_smix_clk_s cnf71xx; }; union cvmx_smix_cmd { @@ -241,23 +224,6 @@ union cvmx_smix_cmd { uint64_t reserved_17_63:47; #endif } cn30xx; - struct cvmx_smix_cmd_cn30xx cn31xx; - struct cvmx_smix_cmd_cn30xx cn38xx; - struct cvmx_smix_cmd_cn30xx cn38xxp2; - struct cvmx_smix_cmd_s cn50xx; - struct cvmx_smix_cmd_s cn52xx; - struct cvmx_smix_cmd_s cn52xxp1; - struct cvmx_smix_cmd_s cn56xx; - struct cvmx_smix_cmd_s cn56xxp1; - struct cvmx_smix_cmd_cn30xx cn58xx; - struct cvmx_smix_cmd_cn30xx cn58xxp1; - struct cvmx_smix_cmd_s cn61xx; - struct cvmx_smix_cmd_s cn63xx; - struct cvmx_smix_cmd_s cn63xxp1; - struct cvmx_smix_cmd_s cn66xx; - struct cvmx_smix_cmd_s cn68xx; - struct cvmx_smix_cmd_s cn68xxp1; - struct cvmx_smix_cmd_s cnf71xx; }; union cvmx_smix_en { @@ -271,24 +237,6 @@ union cvmx_smix_en { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_smix_en_s cn30xx; - struct cvmx_smix_en_s cn31xx; - struct cvmx_smix_en_s cn38xx; - struct cvmx_smix_en_s cn38xxp2; - struct cvmx_smix_en_s cn50xx; - struct cvmx_smix_en_s cn52xx; - struct cvmx_smix_en_s cn52xxp1; - struct cvmx_smix_en_s cn56xx; - struct cvmx_smix_en_s cn56xxp1; - struct cvmx_smix_en_s cn58xx; - struct cvmx_smix_en_s cn58xxp1; - struct cvmx_smix_en_s cn61xx; - struct cvmx_smix_en_s cn63xx; - struct cvmx_smix_en_s cn63xxp1; - struct cvmx_smix_en_s cn66xx; - struct cvmx_smix_en_s cn68xx; - struct cvmx_smix_en_s cn68xxp1; - struct cvmx_smix_en_s cnf71xx; }; union cvmx_smix_rd_dat { @@ -306,24 +254,6 @@ union cvmx_smix_rd_dat { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_smix_rd_dat_s cn30xx; - struct cvmx_smix_rd_dat_s cn31xx; - struct cvmx_smix_rd_dat_s cn38xx; - struct cvmx_smix_rd_dat_s cn38xxp2; - struct cvmx_smix_rd_dat_s cn50xx; - struct cvmx_smix_rd_dat_s cn52xx; - struct cvmx_smix_rd_dat_s cn52xxp1; - struct cvmx_smix_rd_dat_s cn56xx; - struct cvmx_smix_rd_dat_s cn56xxp1; - struct cvmx_smix_rd_dat_s cn58xx; - struct cvmx_smix_rd_dat_s cn58xxp1; - struct cvmx_smix_rd_dat_s cn61xx; - struct cvmx_smix_rd_dat_s cn63xx; - struct cvmx_smix_rd_dat_s cn63xxp1; - struct cvmx_smix_rd_dat_s cn66xx; - struct cvmx_smix_rd_dat_s cn68xx; - struct cvmx_smix_rd_dat_s cn68xxp1; - struct cvmx_smix_rd_dat_s cnf71xx; }; union cvmx_smix_wr_dat { @@ -341,24 +271,6 @@ union cvmx_smix_wr_dat { uint64_t reserved_18_63:46; #endif } s; - struct cvmx_smix_wr_dat_s cn30xx; - struct cvmx_smix_wr_dat_s cn31xx; - struct cvmx_smix_wr_dat_s cn38xx; - struct cvmx_smix_wr_dat_s cn38xxp2; - struct cvmx_smix_wr_dat_s cn50xx; - struct cvmx_smix_wr_dat_s cn52xx; - struct cvmx_smix_wr_dat_s cn52xxp1; - struct cvmx_smix_wr_dat_s cn56xx; - struct cvmx_smix_wr_dat_s cn56xxp1; - struct cvmx_smix_wr_dat_s cn58xx; - struct cvmx_smix_wr_dat_s cn58xxp1; - struct cvmx_smix_wr_dat_s cn61xx; - struct cvmx_smix_wr_dat_s cn63xx; - struct cvmx_smix_wr_dat_s cn63xxp1; - struct cvmx_smix_wr_dat_s cn66xx; - struct cvmx_smix_wr_dat_s cn68xx; - struct cvmx_smix_wr_dat_s cn68xxp1; - struct cvmx_smix_wr_dat_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-spxx-defs.h b/arch/mips/include/asm/octeon/cvmx-spxx-defs.h index f4c4e8051160..8471ed2dea51 100644 --- a/arch/mips/include/asm/octeon/cvmx-spxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-spxx-defs.h @@ -58,10 +58,6 @@ union cvmx_spxx_bckprs_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_bckprs_cnt_s cn38xx; - struct cvmx_spxx_bckprs_cnt_s cn38xxp2; - struct cvmx_spxx_bckprs_cnt_s cn58xx; - struct cvmx_spxx_bckprs_cnt_s cn58xxp1; }; union cvmx_spxx_bist_stat { @@ -79,10 +75,6 @@ union cvmx_spxx_bist_stat { uint64_t reserved_3_63:61; #endif } s; - struct cvmx_spxx_bist_stat_s cn38xx; - struct cvmx_spxx_bist_stat_s cn38xxp2; - struct cvmx_spxx_bist_stat_s cn58xx; - struct cvmx_spxx_bist_stat_s cn58xxp1; }; union cvmx_spxx_clk_ctl { @@ -114,10 +106,6 @@ union cvmx_spxx_clk_ctl { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_spxx_clk_ctl_s cn38xx; - struct cvmx_spxx_clk_ctl_s cn38xxp2; - struct cvmx_spxx_clk_ctl_s cn58xx; - struct cvmx_spxx_clk_ctl_s cn58xxp1; }; union cvmx_spxx_clk_stat { @@ -145,10 +133,6 @@ union cvmx_spxx_clk_stat { uint64_t reserved_11_63:53; #endif } s; - struct cvmx_spxx_clk_stat_s cn38xx; - struct cvmx_spxx_clk_stat_s cn38xxp2; - struct cvmx_spxx_clk_stat_s cn58xx; - struct cvmx_spxx_clk_stat_s cn58xxp1; }; union cvmx_spxx_dbg_deskew_ctl { @@ -190,10 +174,6 @@ union cvmx_spxx_dbg_deskew_ctl { uint64_t reserved_30_63:34; #endif } s; - struct cvmx_spxx_dbg_deskew_ctl_s cn38xx; - struct cvmx_spxx_dbg_deskew_ctl_s cn38xxp2; - struct cvmx_spxx_dbg_deskew_ctl_s cn58xx; - struct cvmx_spxx_dbg_deskew_ctl_s cn58xxp1; }; union cvmx_spxx_dbg_deskew_state { @@ -213,10 +193,6 @@ union cvmx_spxx_dbg_deskew_state { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_spxx_dbg_deskew_state_s cn38xx; - struct cvmx_spxx_dbg_deskew_state_s cn38xxp2; - struct cvmx_spxx_dbg_deskew_state_s cn58xx; - struct cvmx_spxx_dbg_deskew_state_s cn58xxp1; }; union cvmx_spxx_drv_ctl { @@ -241,7 +217,6 @@ union cvmx_spxx_drv_ctl { uint64_t reserved_16_63:48; #endif } cn38xx; - struct cvmx_spxx_drv_ctl_cn38xx cn38xxp2; struct cvmx_spxx_drv_ctl_cn58xx { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_24_63:40; @@ -257,7 +232,6 @@ union cvmx_spxx_drv_ctl { uint64_t reserved_24_63:40; #endif } cn58xx; - struct cvmx_spxx_drv_ctl_cn58xx cn58xxp1; }; union cvmx_spxx_err_ctl { @@ -279,10 +253,6 @@ union cvmx_spxx_err_ctl { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_spxx_err_ctl_s cn38xx; - struct cvmx_spxx_err_ctl_s cn38xxp2; - struct cvmx_spxx_err_ctl_s cn58xx; - struct cvmx_spxx_err_ctl_s cn58xxp1; }; union cvmx_spxx_int_dat { @@ -304,10 +274,6 @@ union cvmx_spxx_int_dat { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_int_dat_s cn38xx; - struct cvmx_spxx_int_dat_s cn38xxp2; - struct cvmx_spxx_int_dat_s cn58xx; - struct cvmx_spxx_int_dat_s cn58xxp1; }; union cvmx_spxx_int_msk { @@ -341,10 +307,6 @@ union cvmx_spxx_int_msk { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_spxx_int_msk_s cn38xx; - struct cvmx_spxx_int_msk_s cn38xxp2; - struct cvmx_spxx_int_msk_s cn58xx; - struct cvmx_spxx_int_msk_s cn58xxp1; }; union cvmx_spxx_int_reg { @@ -382,10 +344,6 @@ union cvmx_spxx_int_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_int_reg_s cn38xx; - struct cvmx_spxx_int_reg_s cn38xxp2; - struct cvmx_spxx_int_reg_s cn58xx; - struct cvmx_spxx_int_reg_s cn58xxp1; }; union cvmx_spxx_int_sync { @@ -419,10 +377,6 @@ union cvmx_spxx_int_sync { uint64_t reserved_12_63:52; #endif } s; - struct cvmx_spxx_int_sync_s cn38xx; - struct cvmx_spxx_int_sync_s cn38xxp2; - struct cvmx_spxx_int_sync_s cn58xx; - struct cvmx_spxx_int_sync_s cn58xxp1; }; union cvmx_spxx_tpa_acc { @@ -436,10 +390,6 @@ union cvmx_spxx_tpa_acc { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_tpa_acc_s cn38xx; - struct cvmx_spxx_tpa_acc_s cn38xxp2; - struct cvmx_spxx_tpa_acc_s cn58xx; - struct cvmx_spxx_tpa_acc_s cn58xxp1; }; union cvmx_spxx_tpa_max { @@ -453,10 +403,6 @@ union cvmx_spxx_tpa_max { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_spxx_tpa_max_s cn38xx; - struct cvmx_spxx_tpa_max_s cn38xxp2; - struct cvmx_spxx_tpa_max_s cn58xx; - struct cvmx_spxx_tpa_max_s cn58xxp1; }; union cvmx_spxx_tpa_sel { @@ -470,10 +416,6 @@ union cvmx_spxx_tpa_sel { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_spxx_tpa_sel_s cn38xx; - struct cvmx_spxx_tpa_sel_s cn38xxp2; - struct cvmx_spxx_tpa_sel_s cn58xx; - struct cvmx_spxx_tpa_sel_s cn58xxp1; }; union cvmx_spxx_trn4_ctl { @@ -499,10 +441,6 @@ union cvmx_spxx_trn4_ctl { uint64_t reserved_13_63:51; #endif } s; - struct cvmx_spxx_trn4_ctl_s cn38xx; - struct cvmx_spxx_trn4_ctl_s cn38xxp2; - struct cvmx_spxx_trn4_ctl_s cn58xx; - struct cvmx_spxx_trn4_ctl_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-sriox-defs.h b/arch/mips/include/asm/octeon/cvmx-sriox-defs.h index 5140f2d2ad1c..34d0fadb5eb3 100644 --- a/arch/mips/include/asm/octeon/cvmx-sriox-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-sriox-defs.h @@ -112,8 +112,6 @@ union cvmx_sriox_acc_ctrl { uint64_t reserved_3_63:61; #endif } cn63xx; - struct cvmx_sriox_acc_ctrl_cn63xx cn63xxp1; - struct cvmx_sriox_acc_ctrl_s cn66xx; }; union cvmx_sriox_asmbly_id { @@ -129,9 +127,6 @@ union cvmx_sriox_asmbly_id { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_asmbly_id_s cn63xx; - struct cvmx_sriox_asmbly_id_s cn63xxp1; - struct cvmx_sriox_asmbly_id_s cn66xx; }; union cvmx_sriox_asmbly_info { @@ -147,9 +142,6 @@ union cvmx_sriox_asmbly_info { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_asmbly_info_s cn63xx; - struct cvmx_sriox_asmbly_info_s cn63xxp1; - struct cvmx_sriox_asmbly_info_s cn66xx; }; union cvmx_sriox_bell_resp_ctrl { @@ -169,9 +161,6 @@ union cvmx_sriox_bell_resp_ctrl { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_sriox_bell_resp_ctrl_s cn63xx; - struct cvmx_sriox_bell_resp_ctrl_s cn63xxp1; - struct cvmx_sriox_bell_resp_ctrl_s cn66xx; }; union cvmx_sriox_bist_status { @@ -305,7 +294,6 @@ union cvmx_sriox_bist_status { uint64_t reserved_44_63:20; #endif } cn63xxp1; - struct cvmx_sriox_bist_status_s cn66xx; }; union cvmx_sriox_imsg_ctrl { @@ -343,9 +331,6 @@ union cvmx_sriox_imsg_ctrl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_imsg_ctrl_s cn63xx; - struct cvmx_sriox_imsg_ctrl_s cn63xxp1; - struct cvmx_sriox_imsg_ctrl_s cn66xx; }; union cvmx_sriox_imsg_inst_hdrx { @@ -383,9 +368,6 @@ union cvmx_sriox_imsg_inst_hdrx { uint64_t r:1; #endif } s; - struct cvmx_sriox_imsg_inst_hdrx_s cn63xx; - struct cvmx_sriox_imsg_inst_hdrx_s cn63xxp1; - struct cvmx_sriox_imsg_inst_hdrx_s cn66xx; }; union cvmx_sriox_imsg_qos_grpx { @@ -443,9 +425,6 @@ union cvmx_sriox_imsg_qos_grpx { uint64_t reserved_63_63:1; #endif } s; - struct cvmx_sriox_imsg_qos_grpx_s cn63xx; - struct cvmx_sriox_imsg_qos_grpx_s cn63xxp1; - struct cvmx_sriox_imsg_qos_grpx_s cn66xx; }; union cvmx_sriox_imsg_statusx { @@ -503,9 +482,6 @@ union cvmx_sriox_imsg_statusx { uint64_t val1:1; #endif } s; - struct cvmx_sriox_imsg_statusx_s cn63xx; - struct cvmx_sriox_imsg_statusx_s cn63xxp1; - struct cvmx_sriox_imsg_statusx_s cn66xx; }; union cvmx_sriox_imsg_vport_thr { @@ -541,9 +517,6 @@ union cvmx_sriox_imsg_vport_thr { uint64_t reserved_54_63:10; #endif } s; - struct cvmx_sriox_imsg_vport_thr_s cn63xx; - struct cvmx_sriox_imsg_vport_thr_s cn63xxp1; - struct cvmx_sriox_imsg_vport_thr_s cn66xx; }; union cvmx_sriox_imsg_vport_thr2 { @@ -563,7 +536,6 @@ union cvmx_sriox_imsg_vport_thr2 { uint64_t reserved_46_63:18; #endif } s; - struct cvmx_sriox_imsg_vport_thr2_s cn66xx; }; union cvmx_sriox_int2_enable { @@ -577,8 +549,6 @@ union cvmx_sriox_int2_enable { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_sriox_int2_enable_s cn63xx; - struct cvmx_sriox_int2_enable_s cn66xx; }; union cvmx_sriox_int2_reg { @@ -596,8 +566,6 @@ union cvmx_sriox_int2_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_int2_reg_s cn63xx; - struct cvmx_sriox_int2_reg_s cn66xx; }; union cvmx_sriox_int_enable { @@ -663,7 +631,6 @@ union cvmx_sriox_int_enable { uint64_t reserved_27_63:37; #endif } s; - struct cvmx_sriox_int_enable_s cn63xx; struct cvmx_sriox_int_enable_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_22_63:42; @@ -715,7 +682,6 @@ union cvmx_sriox_int_enable { uint64_t reserved_22_63:42; #endif } cn63xxp1; - struct cvmx_sriox_int_enable_s cn66xx; }; union cvmx_sriox_int_info0 { @@ -743,9 +709,6 @@ union cvmx_sriox_int_info0 { uint64_t cmd:4; #endif } s; - struct cvmx_sriox_int_info0_s cn63xx; - struct cvmx_sriox_int_info0_s cn63xxp1; - struct cvmx_sriox_int_info0_s cn66xx; }; union cvmx_sriox_int_info1 { @@ -757,9 +720,6 @@ union cvmx_sriox_int_info1 { uint64_t info1:64; #endif } s; - struct cvmx_sriox_int_info1_s cn63xx; - struct cvmx_sriox_int_info1_s cn63xxp1; - struct cvmx_sriox_int_info1_s cn66xx; }; union cvmx_sriox_int_info2 { @@ -791,9 +751,6 @@ union cvmx_sriox_int_info2 { uint64_t prio:2; #endif } s; - struct cvmx_sriox_int_info2_s cn63xx; - struct cvmx_sriox_int_info2_s cn63xxp1; - struct cvmx_sriox_int_info2_s cn66xx; }; union cvmx_sriox_int_info3 { @@ -813,9 +770,6 @@ union cvmx_sriox_int_info3 { uint64_t prio:2; #endif } s; - struct cvmx_sriox_int_info3_s cn63xx; - struct cvmx_sriox_int_info3_s cn63xxp1; - struct cvmx_sriox_int_info3_s cn66xx; }; union cvmx_sriox_int_reg { @@ -885,7 +839,6 @@ union cvmx_sriox_int_reg { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_int_reg_s cn63xx; struct cvmx_sriox_int_reg_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_22_63:42; @@ -937,7 +890,6 @@ union cvmx_sriox_int_reg { uint64_t reserved_22_63:42; #endif } cn63xxp1; - struct cvmx_sriox_int_reg_s cn66xx; }; union cvmx_sriox_ip_feature { @@ -990,8 +942,6 @@ union cvmx_sriox_ip_feature { uint64_t ops:32; #endif } cn63xx; - struct cvmx_sriox_ip_feature_cn63xx cn63xxp1; - struct cvmx_sriox_ip_feature_s cn66xx; }; union cvmx_sriox_mac_buffers { @@ -1021,8 +971,6 @@ union cvmx_sriox_mac_buffers { uint64_t reserved_56_63:8; #endif } s; - struct cvmx_sriox_mac_buffers_s cn63xx; - struct cvmx_sriox_mac_buffers_s cn66xx; }; union cvmx_sriox_maint_op { @@ -1044,9 +992,6 @@ union cvmx_sriox_maint_op { uint64_t wr_data:32; #endif } s; - struct cvmx_sriox_maint_op_s cn63xx; - struct cvmx_sriox_maint_op_s cn63xxp1; - struct cvmx_sriox_maint_op_s cn66xx; }; union cvmx_sriox_maint_rd_data { @@ -1062,9 +1007,6 @@ union cvmx_sriox_maint_rd_data { uint64_t reserved_33_63:31; #endif } s; - struct cvmx_sriox_maint_rd_data_s cn63xx; - struct cvmx_sriox_maint_rd_data_s cn63xxp1; - struct cvmx_sriox_maint_rd_data_s cn66xx; }; union cvmx_sriox_mce_tx_ctl { @@ -1078,9 +1020,6 @@ union cvmx_sriox_mce_tx_ctl { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_sriox_mce_tx_ctl_s cn63xx; - struct cvmx_sriox_mce_tx_ctl_s cn63xxp1; - struct cvmx_sriox_mce_tx_ctl_s cn66xx; }; union cvmx_sriox_mem_op_ctrl { @@ -1106,9 +1045,6 @@ union cvmx_sriox_mem_op_ctrl { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_sriox_mem_op_ctrl_s cn63xx; - struct cvmx_sriox_mem_op_ctrl_s cn63xxp1; - struct cvmx_sriox_mem_op_ctrl_s cn66xx; }; union cvmx_sriox_omsg_ctrlx { @@ -1140,7 +1076,6 @@ union cvmx_sriox_omsg_ctrlx { uint64_t testmode:1; #endif } s; - struct cvmx_sriox_omsg_ctrlx_s cn63xx; struct cvmx_sriox_omsg_ctrlx_cn63xxp1 { #ifdef __BIG_ENDIAN_BITFIELD uint64_t testmode:1; @@ -1166,7 +1101,6 @@ union cvmx_sriox_omsg_ctrlx { uint64_t testmode:1; #endif } cn63xxp1; - struct cvmx_sriox_omsg_ctrlx_s cn66xx; }; union cvmx_sriox_omsg_done_countsx { @@ -1182,8 +1116,6 @@ union cvmx_sriox_omsg_done_countsx { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_omsg_done_countsx_s cn63xx; - struct cvmx_sriox_omsg_done_countsx_s cn66xx; }; union cvmx_sriox_omsg_fmp_mrx { @@ -1225,9 +1157,6 @@ union cvmx_sriox_omsg_fmp_mrx { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_sriox_omsg_fmp_mrx_s cn63xx; - struct cvmx_sriox_omsg_fmp_mrx_s cn63xxp1; - struct cvmx_sriox_omsg_fmp_mrx_s cn66xx; }; union cvmx_sriox_omsg_nmp_mrx { @@ -1269,9 +1198,6 @@ union cvmx_sriox_omsg_nmp_mrx { uint64_t reserved_15_63:49; #endif } s; - struct cvmx_sriox_omsg_nmp_mrx_s cn63xx; - struct cvmx_sriox_omsg_nmp_mrx_s cn63xxp1; - struct cvmx_sriox_omsg_nmp_mrx_s cn66xx; }; union cvmx_sriox_omsg_portx { @@ -1302,8 +1228,6 @@ union cvmx_sriox_omsg_portx { uint64_t reserved_32_63:32; #endif } cn63xx; - struct cvmx_sriox_omsg_portx_cn63xx cn63xxp1; - struct cvmx_sriox_omsg_portx_s cn66xx; }; union cvmx_sriox_omsg_silo_thr { @@ -1317,8 +1241,6 @@ union cvmx_sriox_omsg_silo_thr { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_sriox_omsg_silo_thr_s cn63xx; - struct cvmx_sriox_omsg_silo_thr_s cn66xx; }; union cvmx_sriox_omsg_sp_mrx { @@ -1362,9 +1284,6 @@ union cvmx_sriox_omsg_sp_mrx { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_sriox_omsg_sp_mrx_s cn63xx; - struct cvmx_sriox_omsg_sp_mrx_s cn63xxp1; - struct cvmx_sriox_omsg_sp_mrx_s cn66xx; }; union cvmx_sriox_priox_in_use { @@ -1380,8 +1299,6 @@ union cvmx_sriox_priox_in_use { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_priox_in_use_s cn63xx; - struct cvmx_sriox_priox_in_use_s cn66xx; }; union cvmx_sriox_rx_bell { @@ -1409,9 +1326,6 @@ union cvmx_sriox_rx_bell { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_sriox_rx_bell_s cn63xx; - struct cvmx_sriox_rx_bell_s cn63xxp1; - struct cvmx_sriox_rx_bell_s cn66xx; }; union cvmx_sriox_rx_bell_seq { @@ -1427,9 +1341,6 @@ union cvmx_sriox_rx_bell_seq { uint64_t reserved_40_63:24; #endif } s; - struct cvmx_sriox_rx_bell_seq_s cn63xx; - struct cvmx_sriox_rx_bell_seq_s cn63xxp1; - struct cvmx_sriox_rx_bell_seq_s cn66xx; }; union cvmx_sriox_rx_status { @@ -1457,9 +1368,6 @@ union cvmx_sriox_rx_status { uint64_t rtn_pr3:8; #endif } s; - struct cvmx_sriox_rx_status_s cn63xx; - struct cvmx_sriox_rx_status_s cn63xxp1; - struct cvmx_sriox_rx_status_s cn66xx; }; union cvmx_sriox_s2m_typex { @@ -1491,9 +1399,6 @@ union cvmx_sriox_s2m_typex { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_sriox_s2m_typex_s cn63xx; - struct cvmx_sriox_s2m_typex_s cn63xxp1; - struct cvmx_sriox_s2m_typex_s cn66xx; }; union cvmx_sriox_seq { @@ -1507,9 +1412,6 @@ union cvmx_sriox_seq { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_seq_s cn63xx; - struct cvmx_sriox_seq_s cn63xxp1; - struct cvmx_sriox_seq_s cn66xx; }; union cvmx_sriox_status_reg { @@ -1525,9 +1427,6 @@ union cvmx_sriox_status_reg { uint64_t reserved_2_63:62; #endif } s; - struct cvmx_sriox_status_reg_s cn63xx; - struct cvmx_sriox_status_reg_s cn63xxp1; - struct cvmx_sriox_status_reg_s cn66xx; }; union cvmx_sriox_tag_ctrl { @@ -1549,9 +1448,6 @@ union cvmx_sriox_tag_ctrl { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_sriox_tag_ctrl_s cn63xx; - struct cvmx_sriox_tag_ctrl_s cn63xxp1; - struct cvmx_sriox_tag_ctrl_s cn66xx; }; union cvmx_sriox_tlp_credits { @@ -1573,9 +1469,6 @@ union cvmx_sriox_tlp_credits { uint64_t reserved_28_63:36; #endif } s; - struct cvmx_sriox_tlp_credits_s cn63xx; - struct cvmx_sriox_tlp_credits_s cn63xxp1; - struct cvmx_sriox_tlp_credits_s cn66xx; }; union cvmx_sriox_tx_bell { @@ -1605,9 +1498,6 @@ union cvmx_sriox_tx_bell { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_sriox_tx_bell_s cn63xx; - struct cvmx_sriox_tx_bell_s cn63xxp1; - struct cvmx_sriox_tx_bell_s cn66xx; }; union cvmx_sriox_tx_bell_info { @@ -1639,9 +1529,6 @@ union cvmx_sriox_tx_bell_info { uint64_t reserved_48_63:16; #endif } s; - struct cvmx_sriox_tx_bell_info_s cn63xx; - struct cvmx_sriox_tx_bell_info_s cn63xxp1; - struct cvmx_sriox_tx_bell_info_s cn66xx; }; union cvmx_sriox_tx_ctrl { @@ -1675,9 +1562,6 @@ union cvmx_sriox_tx_ctrl { uint64_t reserved_53_63:11; #endif } s; - struct cvmx_sriox_tx_ctrl_s cn63xx; - struct cvmx_sriox_tx_ctrl_s cn63xxp1; - struct cvmx_sriox_tx_ctrl_s cn66xx; }; union cvmx_sriox_tx_emphasis { @@ -1691,8 +1575,6 @@ union cvmx_sriox_tx_emphasis { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_sriox_tx_emphasis_s cn63xx; - struct cvmx_sriox_tx_emphasis_s cn66xx; }; union cvmx_sriox_tx_status { @@ -1712,9 +1594,6 @@ union cvmx_sriox_tx_status { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_tx_status_s cn63xx; - struct cvmx_sriox_tx_status_s cn63xxp1; - struct cvmx_sriox_tx_status_s cn66xx; }; union cvmx_sriox_wr_done_counts { @@ -1730,8 +1609,6 @@ union cvmx_sriox_wr_done_counts { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_sriox_wr_done_counts_s cn63xx; - struct cvmx_sriox_wr_done_counts_s cn66xx; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-srxx-defs.h b/arch/mips/include/asm/octeon/cvmx-srxx-defs.h index c98e625cd4ed..76b2a42f53aa 100644 --- a/arch/mips/include/asm/octeon/cvmx-srxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-srxx-defs.h @@ -52,10 +52,6 @@ union cvmx_srxx_com_ctl { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_srxx_com_ctl_s cn38xx; - struct cvmx_srxx_com_ctl_s cn38xxp2; - struct cvmx_srxx_com_ctl_s cn58xx; - struct cvmx_srxx_com_ctl_s cn58xxp1; }; union cvmx_srxx_ign_rx_full { @@ -69,10 +65,6 @@ union cvmx_srxx_ign_rx_full { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_srxx_ign_rx_full_s cn38xx; - struct cvmx_srxx_ign_rx_full_s cn38xxp2; - struct cvmx_srxx_ign_rx_full_s cn58xx; - struct cvmx_srxx_ign_rx_full_s cn58xxp1; }; union cvmx_srxx_spi4_calx { @@ -94,10 +86,6 @@ union cvmx_srxx_spi4_calx { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_srxx_spi4_calx_s cn38xx; - struct cvmx_srxx_spi4_calx_s cn38xxp2; - struct cvmx_srxx_spi4_calx_s cn58xx; - struct cvmx_srxx_spi4_calx_s cn58xxp1; }; union cvmx_srxx_spi4_stat { @@ -115,10 +103,6 @@ union cvmx_srxx_spi4_stat { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_srxx_spi4_stat_s cn38xx; - struct cvmx_srxx_spi4_stat_s cn38xxp2; - struct cvmx_srxx_spi4_stat_s cn58xx; - struct cvmx_srxx_spi4_stat_s cn58xxp1; }; union cvmx_srxx_sw_tick_ctl { @@ -140,9 +124,6 @@ union cvmx_srxx_sw_tick_ctl { uint64_t reserved_14_63:50; #endif } s; - struct cvmx_srxx_sw_tick_ctl_s cn38xx; - struct cvmx_srxx_sw_tick_ctl_s cn58xx; - struct cvmx_srxx_sw_tick_ctl_s cn58xxp1; }; union cvmx_srxx_sw_tick_dat { @@ -154,9 +135,6 @@ union cvmx_srxx_sw_tick_dat { uint64_t dat:64; #endif } s; - struct cvmx_srxx_sw_tick_dat_s cn38xx; - struct cvmx_srxx_sw_tick_dat_s cn58xx; - struct cvmx_srxx_sw_tick_dat_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-stxx-defs.h b/arch/mips/include/asm/octeon/cvmx-stxx-defs.h index 3c409a854d91..f49d82145c57 100644 --- a/arch/mips/include/asm/octeon/cvmx-stxx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-stxx-defs.h @@ -64,10 +64,6 @@ union cvmx_stxx_arb_ctl { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_stxx_arb_ctl_s cn38xx; - struct cvmx_stxx_arb_ctl_s cn38xxp2; - struct cvmx_stxx_arb_ctl_s cn58xx; - struct cvmx_stxx_arb_ctl_s cn58xxp1; }; union cvmx_stxx_bckprs_cnt { @@ -81,10 +77,6 @@ union cvmx_stxx_bckprs_cnt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_bckprs_cnt_s cn38xx; - struct cvmx_stxx_bckprs_cnt_s cn38xxp2; - struct cvmx_stxx_bckprs_cnt_s cn58xx; - struct cvmx_stxx_bckprs_cnt_s cn58xxp1; }; union cvmx_stxx_com_ctl { @@ -102,10 +94,6 @@ union cvmx_stxx_com_ctl { uint64_t reserved_4_63:60; #endif } s; - struct cvmx_stxx_com_ctl_s cn38xx; - struct cvmx_stxx_com_ctl_s cn38xxp2; - struct cvmx_stxx_com_ctl_s cn58xx; - struct cvmx_stxx_com_ctl_s cn58xxp1; }; union cvmx_stxx_dip_cnt { @@ -121,10 +109,6 @@ union cvmx_stxx_dip_cnt { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_stxx_dip_cnt_s cn38xx; - struct cvmx_stxx_dip_cnt_s cn38xxp2; - struct cvmx_stxx_dip_cnt_s cn58xx; - struct cvmx_stxx_dip_cnt_s cn58xxp1; }; union cvmx_stxx_ign_cal { @@ -138,10 +122,6 @@ union cvmx_stxx_ign_cal { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_stxx_ign_cal_s cn38xx; - struct cvmx_stxx_ign_cal_s cn38xxp2; - struct cvmx_stxx_ign_cal_s cn58xx; - struct cvmx_stxx_ign_cal_s cn58xxp1; }; union cvmx_stxx_int_msk { @@ -169,10 +149,6 @@ union cvmx_stxx_int_msk { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_stxx_int_msk_s cn38xx; - struct cvmx_stxx_int_msk_s cn38xxp2; - struct cvmx_stxx_int_msk_s cn58xx; - struct cvmx_stxx_int_msk_s cn58xxp1; }; union cvmx_stxx_int_reg { @@ -202,10 +178,6 @@ union cvmx_stxx_int_reg { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_stxx_int_reg_s cn38xx; - struct cvmx_stxx_int_reg_s cn38xxp2; - struct cvmx_stxx_int_reg_s cn58xx; - struct cvmx_stxx_int_reg_s cn58xxp1; }; union cvmx_stxx_int_sync { @@ -233,10 +205,6 @@ union cvmx_stxx_int_sync { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_stxx_int_sync_s cn38xx; - struct cvmx_stxx_int_sync_s cn38xxp2; - struct cvmx_stxx_int_sync_s cn58xx; - struct cvmx_stxx_int_sync_s cn58xxp1; }; union cvmx_stxx_min_bst { @@ -250,10 +218,6 @@ union cvmx_stxx_min_bst { uint64_t reserved_9_63:55; #endif } s; - struct cvmx_stxx_min_bst_s cn38xx; - struct cvmx_stxx_min_bst_s cn38xxp2; - struct cvmx_stxx_min_bst_s cn58xx; - struct cvmx_stxx_min_bst_s cn58xxp1; }; union cvmx_stxx_spi4_calx { @@ -275,10 +239,6 @@ union cvmx_stxx_spi4_calx { uint64_t reserved_17_63:47; #endif } s; - struct cvmx_stxx_spi4_calx_s cn38xx; - struct cvmx_stxx_spi4_calx_s cn38xxp2; - struct cvmx_stxx_spi4_calx_s cn58xx; - struct cvmx_stxx_spi4_calx_s cn58xxp1; }; union cvmx_stxx_spi4_dat { @@ -294,10 +254,6 @@ union cvmx_stxx_spi4_dat { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_spi4_dat_s cn38xx; - struct cvmx_stxx_spi4_dat_s cn38xxp2; - struct cvmx_stxx_spi4_dat_s cn58xx; - struct cvmx_stxx_spi4_dat_s cn58xxp1; }; union cvmx_stxx_spi4_stat { @@ -315,10 +271,6 @@ union cvmx_stxx_spi4_stat { uint64_t reserved_16_63:48; #endif } s; - struct cvmx_stxx_spi4_stat_s cn38xx; - struct cvmx_stxx_spi4_stat_s cn38xxp2; - struct cvmx_stxx_spi4_stat_s cn58xx; - struct cvmx_stxx_spi4_stat_s cn58xxp1; }; union cvmx_stxx_stat_bytes_hi { @@ -332,10 +284,6 @@ union cvmx_stxx_stat_bytes_hi { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_stat_bytes_hi_s cn38xx; - struct cvmx_stxx_stat_bytes_hi_s cn38xxp2; - struct cvmx_stxx_stat_bytes_hi_s cn58xx; - struct cvmx_stxx_stat_bytes_hi_s cn58xxp1; }; union cvmx_stxx_stat_bytes_lo { @@ -349,10 +297,6 @@ union cvmx_stxx_stat_bytes_lo { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_stat_bytes_lo_s cn38xx; - struct cvmx_stxx_stat_bytes_lo_s cn38xxp2; - struct cvmx_stxx_stat_bytes_lo_s cn58xx; - struct cvmx_stxx_stat_bytes_lo_s cn58xxp1; }; union cvmx_stxx_stat_ctl { @@ -368,10 +312,6 @@ union cvmx_stxx_stat_ctl { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_stxx_stat_ctl_s cn38xx; - struct cvmx_stxx_stat_ctl_s cn38xxp2; - struct cvmx_stxx_stat_ctl_s cn58xx; - struct cvmx_stxx_stat_ctl_s cn58xxp1; }; union cvmx_stxx_stat_pkt_xmt { @@ -385,10 +325,6 @@ union cvmx_stxx_stat_pkt_xmt { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_stxx_stat_pkt_xmt_s cn38xx; - struct cvmx_stxx_stat_pkt_xmt_s cn38xxp2; - struct cvmx_stxx_stat_pkt_xmt_s cn58xx; - struct cvmx_stxx_stat_pkt_xmt_s cn58xxp1; }; #endif diff --git a/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h b/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h index bc5b80c6bbe2..6cf2280166dd 100644 --- a/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h @@ -63,13 +63,6 @@ union cvmx_uctlx_bist_status { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_uctlx_bist_status_s cn61xx; - struct cvmx_uctlx_bist_status_s cn63xx; - struct cvmx_uctlx_bist_status_s cn63xxp1; - struct cvmx_uctlx_bist_status_s cn66xx; - struct cvmx_uctlx_bist_status_s cn68xx; - struct cvmx_uctlx_bist_status_s cn68xxp1; - struct cvmx_uctlx_bist_status_s cnf71xx; }; union cvmx_uctlx_clk_rst_ctl { @@ -121,13 +114,6 @@ union cvmx_uctlx_clk_rst_ctl { uint64_t reserved_25_63:39; #endif } s; - struct cvmx_uctlx_clk_rst_ctl_s cn61xx; - struct cvmx_uctlx_clk_rst_ctl_s cn63xx; - struct cvmx_uctlx_clk_rst_ctl_s cn63xxp1; - struct cvmx_uctlx_clk_rst_ctl_s cn66xx; - struct cvmx_uctlx_clk_rst_ctl_s cn68xx; - struct cvmx_uctlx_clk_rst_ctl_s cn68xxp1; - struct cvmx_uctlx_clk_rst_ctl_s cnf71xx; }; union cvmx_uctlx_ehci_ctl { @@ -161,13 +147,6 @@ union cvmx_uctlx_ehci_ctl { uint64_t reserved_20_63:44; #endif } s; - struct cvmx_uctlx_ehci_ctl_s cn61xx; - struct cvmx_uctlx_ehci_ctl_s cn63xx; - struct cvmx_uctlx_ehci_ctl_s cn63xxp1; - struct cvmx_uctlx_ehci_ctl_s cn66xx; - struct cvmx_uctlx_ehci_ctl_s cn68xx; - struct cvmx_uctlx_ehci_ctl_s cn68xxp1; - struct cvmx_uctlx_ehci_ctl_s cnf71xx; }; union cvmx_uctlx_ehci_fla { @@ -181,13 +160,6 @@ union cvmx_uctlx_ehci_fla { uint64_t reserved_6_63:58; #endif } s; - struct cvmx_uctlx_ehci_fla_s cn61xx; - struct cvmx_uctlx_ehci_fla_s cn63xx; - struct cvmx_uctlx_ehci_fla_s cn63xxp1; - struct cvmx_uctlx_ehci_fla_s cn66xx; - struct cvmx_uctlx_ehci_fla_s cn68xx; - struct cvmx_uctlx_ehci_fla_s cn68xxp1; - struct cvmx_uctlx_ehci_fla_s cnf71xx; }; union cvmx_uctlx_erto_ctl { @@ -203,13 +175,6 @@ union cvmx_uctlx_erto_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_uctlx_erto_ctl_s cn61xx; - struct cvmx_uctlx_erto_ctl_s cn63xx; - struct cvmx_uctlx_erto_ctl_s cn63xxp1; - struct cvmx_uctlx_erto_ctl_s cn66xx; - struct cvmx_uctlx_erto_ctl_s cn68xx; - struct cvmx_uctlx_erto_ctl_s cn68xxp1; - struct cvmx_uctlx_erto_ctl_s cnf71xx; }; union cvmx_uctlx_if_ena { @@ -223,13 +188,6 @@ union cvmx_uctlx_if_ena { uint64_t reserved_1_63:63; #endif } s; - struct cvmx_uctlx_if_ena_s cn61xx; - struct cvmx_uctlx_if_ena_s cn63xx; - struct cvmx_uctlx_if_ena_s cn63xxp1; - struct cvmx_uctlx_if_ena_s cn66xx; - struct cvmx_uctlx_if_ena_s cn68xx; - struct cvmx_uctlx_if_ena_s cn68xxp1; - struct cvmx_uctlx_if_ena_s cnf71xx; }; union cvmx_uctlx_int_ena { @@ -257,13 +215,6 @@ union cvmx_uctlx_int_ena { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_uctlx_int_ena_s cn61xx; - struct cvmx_uctlx_int_ena_s cn63xx; - struct cvmx_uctlx_int_ena_s cn63xxp1; - struct cvmx_uctlx_int_ena_s cn66xx; - struct cvmx_uctlx_int_ena_s cn68xx; - struct cvmx_uctlx_int_ena_s cn68xxp1; - struct cvmx_uctlx_int_ena_s cnf71xx; }; union cvmx_uctlx_int_reg { @@ -291,13 +242,6 @@ union cvmx_uctlx_int_reg { uint64_t reserved_8_63:56; #endif } s; - struct cvmx_uctlx_int_reg_s cn61xx; - struct cvmx_uctlx_int_reg_s cn63xx; - struct cvmx_uctlx_int_reg_s cn63xxp1; - struct cvmx_uctlx_int_reg_s cn66xx; - struct cvmx_uctlx_int_reg_s cn68xx; - struct cvmx_uctlx_int_reg_s cn68xxp1; - struct cvmx_uctlx_int_reg_s cnf71xx; }; union cvmx_uctlx_ohci_ctl { @@ -329,13 +273,6 @@ union cvmx_uctlx_ohci_ctl { uint64_t reserved_19_63:45; #endif } s; - struct cvmx_uctlx_ohci_ctl_s cn61xx; - struct cvmx_uctlx_ohci_ctl_s cn63xx; - struct cvmx_uctlx_ohci_ctl_s cn63xxp1; - struct cvmx_uctlx_ohci_ctl_s cn66xx; - struct cvmx_uctlx_ohci_ctl_s cn68xx; - struct cvmx_uctlx_ohci_ctl_s cn68xxp1; - struct cvmx_uctlx_ohci_ctl_s cnf71xx; }; union cvmx_uctlx_orto_ctl { @@ -351,13 +288,6 @@ union cvmx_uctlx_orto_ctl { uint64_t reserved_32_63:32; #endif } s; - struct cvmx_uctlx_orto_ctl_s cn61xx; - struct cvmx_uctlx_orto_ctl_s cn63xx; - struct cvmx_uctlx_orto_ctl_s cn63xxp1; - struct cvmx_uctlx_orto_ctl_s cn66xx; - struct cvmx_uctlx_orto_ctl_s cn68xx; - struct cvmx_uctlx_orto_ctl_s cn68xxp1; - struct cvmx_uctlx_orto_ctl_s cnf71xx; }; union cvmx_uctlx_ppaf_wm { @@ -371,11 +301,6 @@ union cvmx_uctlx_ppaf_wm { uint64_t reserved_5_63:59; #endif } s; - struct cvmx_uctlx_ppaf_wm_s cn61xx; - struct cvmx_uctlx_ppaf_wm_s cn63xx; - struct cvmx_uctlx_ppaf_wm_s cn63xxp1; - struct cvmx_uctlx_ppaf_wm_s cn66xx; - struct cvmx_uctlx_ppaf_wm_s cnf71xx; }; union cvmx_uctlx_uphy_ctl_status { @@ -407,13 +332,6 @@ union cvmx_uctlx_uphy_ctl_status { uint64_t reserved_10_63:54; #endif } s; - struct cvmx_uctlx_uphy_ctl_status_s cn61xx; - struct cvmx_uctlx_uphy_ctl_status_s cn63xx; - struct cvmx_uctlx_uphy_ctl_status_s cn63xxp1; - struct cvmx_uctlx_uphy_ctl_status_s cn66xx; - struct cvmx_uctlx_uphy_ctl_status_s cn68xx; - struct cvmx_uctlx_uphy_ctl_status_s cn68xxp1; - struct cvmx_uctlx_uphy_ctl_status_s cnf71xx; }; union cvmx_uctlx_uphy_portx_ctl_status { @@ -463,13 +381,6 @@ union cvmx_uctlx_uphy_portx_ctl_status { uint64_t reserved_43_63:21; #endif } s; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn61xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xxp1; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn66xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xx; - struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xxp1; - struct cvmx_uctlx_uphy_portx_ctl_status_s cnf71xx; }; #endif diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index e8cc328fce2d..6b31c93b5eaa 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -154,6 +154,7 @@ typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pgprot_val(x) ((x).pgprot) #define __pgprot(x) ((pgprot_t) { (x) } ) +#define pte_pgprot(x) __pgprot(pte_val(x) & ~_PFN_MASK) /* * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h index 0036ea0c7173..93a9dce31f25 100644 --- a/arch/mips/include/asm/pgtable-64.h +++ b/arch/mips/include/asm/pgtable-64.h @@ -265,6 +265,11 @@ static inline int pmd_bad(pmd_t pmd) static inline int pmd_present(pmd_t pmd) { +#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT + if (unlikely(pmd_val(pmd) & _PAGE_HUGE)) + return pmd_val(pmd) & _PAGE_PRESENT; +#endif + return pmd_val(pmd) != (unsigned long) invalid_pte_table; } diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index 129e0328367f..57933fc8fd98 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -214,8 +214,8 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) if (kernel_uses_llsc && R10000_LLSC_WAR) { __asm__ __volatile__ ( - " .set arch=r4000 \n" " .set push \n" + " .set arch=r4000 \n" " .set noreorder \n" "1:" __LL "%[tmp], %[buddy] \n" " bnez %[tmp], 2f \n" @@ -225,13 +225,12 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) " nop \n" "2: \n" " .set pop \n" - " .set mips0 \n" : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) : [global] "r" (page_global)); } else if (kernel_uses_llsc) { __asm__ __volatile__ ( - " .set "MIPS_ISA_ARCH_LEVEL" \n" " .set push \n" + " .set "MIPS_ISA_ARCH_LEVEL" \n" " .set noreorder \n" "1:" __LL "%[tmp], %[buddy] \n" " bnez %[tmp], 2f \n" @@ -241,7 +240,6 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) " nop \n" "2: \n" " .set pop \n" - " .set mips0 \n" : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp) : [global] "r" (page_global)); } diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index ce3ed4d17813..aca909bd7841 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -255,8 +255,10 @@ struct thread_struct { /* Saved cp0 stuff. */ unsigned long cp0_status; +#ifdef CONFIG_MIPS_FP_SUPPORT /* Saved fpu/fpu emulator stuff. */ struct mips_fpu_struct fpu FPU_ALIGN; +#endif /* Assigned branch delay slot 'emulation' frame */ atomic_t bd_emu_frame; /* PC of the branch from a branch delay slot 'emulation' */ @@ -299,6 +301,17 @@ struct thread_struct { #define FPAFF_INIT #endif /* CONFIG_MIPS_MT_FPAFF */ +#ifdef CONFIG_MIPS_FP_SUPPORT +# define FPU_INIT \ + .fpu = { \ + .fpr = {{{0,},},}, \ + .fcr31 = 0, \ + .msacsr = 0, \ + }, +#else +# define FPU_INIT +#endif + #define INIT_THREAD { \ /* \ * Saved main processor registers \ @@ -321,11 +334,7 @@ struct thread_struct { /* \ * Saved FPU/FPU emulator stuff \ */ \ - .fpu = { \ - .fpr = {{{0,},},}, \ - .fcr31 = 0, \ - .msacsr = 0, \ - }, \ + FPU_INIT \ /* \ * FPU affinity state (null if not FPAFF) \ */ \ diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h index d19b2d65336b..7f4a32d3345a 100644 --- a/arch/mips/include/asm/r4kcache.h +++ b/arch/mips/include/asm/r4kcache.h @@ -20,6 +20,7 @@ #include <asm/cpu-features.h> #include <asm/cpu-type.h> #include <asm/mipsmtregs.h> +#include <asm/mmzone.h> #include <linux/uaccess.h> /* for uaccess_kernel() */ extern void (*r4k_blast_dcache)(void); @@ -674,4 +675,25 @@ __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , ) __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , ) __BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , ) +/* Currently, this is very specific to Loongson-3 */ +#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \ +static inline void blast_##pfx##cache##lsize##_node(long node) \ +{ \ + unsigned long start = CAC_BASE | nid_to_addrbase(node); \ + unsigned long end = start + current_cpu_data.desc.waysize; \ + unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ + unsigned long ws_end = current_cpu_data.desc.ways << \ + current_cpu_data.desc.waybit; \ + unsigned long ws, addr; \ + \ + for (ws = 0; ws < ws_end; ws += ws_inc) \ + for (addr = start; addr < end; addr += lsize * 32) \ + cache##lsize##_unroll32(addr|ws, indexop); \ +} + +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) +__BUILD_BLAST_CACHE_NODE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) + #endif /* _ASM_R4KCACHE_H */ diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 2161357cc68f..4d6ad907ae54 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -427,9 +427,10 @@ #ifdef CONFIG_CPU_MIPSR6 eretnc #else + .set push .set arch=r4000 eret - .set mips0 + .set pop #endif .endm diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h index e610473d61b8..0f813bb753c6 100644 --- a/arch/mips/include/asm/switch_to.h +++ b/arch/mips/include/asm/switch_to.h @@ -84,7 +84,8 @@ do { \ * Check FCSR for any unmasked exceptions pending set with `ptrace', * clear them and send a signal. */ -#define __sanitize_fcr31(next) \ +#ifdef CONFIG_MIPS_FP_SUPPORT +# define __sanitize_fcr31(next) \ do { \ unsigned long fcr31 = mask_fcr31_x(next->thread.fpu.fcr31); \ void __user *pc; \ @@ -95,6 +96,9 @@ do { \ force_fcr31_sig(fcr31, pc, next); \ } \ } while (0) +#else +# define __sanitize_fcr31(next) +#endif /* * For newly created kernel threads switch_to() will return to diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index c68b8ae3efcb..b23d74a601b3 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h @@ -13,6 +13,9 @@ #define _ASM_UNISTD_H #include <uapi/asm/unistd.h> +#include <asm/unistd_nr_n32.h> +#include <asm/unistd_nr_n64.h> +#include <asm/unistd_nr_o32.h> #ifdef CONFIG_MIPS32_N32 #define NR_syscalls (__NR_N32_Linux + __NR_N32_Linux_syscalls) diff --git a/arch/mips/include/uapi/asm/Kbuild b/arch/mips/include/uapi/asm/Kbuild index 7a4becd8963a..ed4bd032f456 100644 --- a/arch/mips/include/uapi/asm/Kbuild +++ b/arch/mips/include/uapi/asm/Kbuild @@ -1,5 +1,11 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +generated-y += unistd_n32.h +generated-y += unistd_n64.h +generated-y += unistd_o32.h +generated-y += unistd_nr_n32.h +generated-y += unistd_nr_n64.h +generated-y += unistd_nr_o32.h generic-y += bpf_perf_event.h generic-y += ipcbuf.h diff --git a/arch/mips/include/uapi/asm/sgidefs.h b/arch/mips/include/uapi/asm/sgidefs.h index 26143e3b7c26..69c3de90c536 100644 --- a/arch/mips/include/uapi/asm/sgidefs.h +++ b/arch/mips/include/uapi/asm/sgidefs.h @@ -12,14 +12,6 @@ #define __ASM_SGIDEFS_H /* - * Using a Linux compiler for building Linux seems logic but not to - * everybody. - */ -#ifndef __linux__ -#error Use a Linux compiler or give up. -#endif - -/* * Definitions for the ISA levels * * With the introduction of MIPS32 / MIPS64 instruction sets definitions diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h index f25dd1d83fb7..4abe387549ad 100644 --- a/arch/mips/include/uapi/asm/unistd.h +++ b/arch/mips/include/uapi/asm/unistd.h @@ -17,1085 +17,23 @@ #if _MIPS_SIM == _MIPS_SIM_ABI32 -/* - * Linux o32 style syscalls are in the range from 4000 to 4999. - */ -#define __NR_Linux 4000 -#define __NR_syscall (__NR_Linux + 0) -#define __NR_exit (__NR_Linux + 1) -#define __NR_fork (__NR_Linux + 2) -#define __NR_read (__NR_Linux + 3) -#define __NR_write (__NR_Linux + 4) -#define __NR_open (__NR_Linux + 5) -#define __NR_close (__NR_Linux + 6) -#define __NR_waitpid (__NR_Linux + 7) -#define __NR_creat (__NR_Linux + 8) -#define __NR_link (__NR_Linux + 9) -#define __NR_unlink (__NR_Linux + 10) -#define __NR_execve (__NR_Linux + 11) -#define __NR_chdir (__NR_Linux + 12) -#define __NR_time (__NR_Linux + 13) -#define __NR_mknod (__NR_Linux + 14) -#define __NR_chmod (__NR_Linux + 15) -#define __NR_lchown (__NR_Linux + 16) -#define __NR_break (__NR_Linux + 17) -#define __NR_unused18 (__NR_Linux + 18) -#define __NR_lseek (__NR_Linux + 19) -#define __NR_getpid (__NR_Linux + 20) -#define __NR_mount (__NR_Linux + 21) -#define __NR_umount (__NR_Linux + 22) -#define __NR_setuid (__NR_Linux + 23) -#define __NR_getuid (__NR_Linux + 24) -#define __NR_stime (__NR_Linux + 25) -#define __NR_ptrace (__NR_Linux + 26) -#define __NR_alarm (__NR_Linux + 27) -#define __NR_unused28 (__NR_Linux + 28) -#define __NR_pause (__NR_Linux + 29) -#define __NR_utime (__NR_Linux + 30) -#define __NR_stty (__NR_Linux + 31) -#define __NR_gtty (__NR_Linux + 32) -#define __NR_access (__NR_Linux + 33) -#define __NR_nice (__NR_Linux + 34) -#define __NR_ftime (__NR_Linux + 35) -#define __NR_sync (__NR_Linux + 36) -#define __NR_kill (__NR_Linux + 37) -#define __NR_rename (__NR_Linux + 38) -#define __NR_mkdir (__NR_Linux + 39) -#define __NR_rmdir (__NR_Linux + 40) -#define __NR_dup (__NR_Linux + 41) -#define __NR_pipe (__NR_Linux + 42) -#define __NR_times (__NR_Linux + 43) -#define __NR_prof (__NR_Linux + 44) -#define __NR_brk (__NR_Linux + 45) -#define __NR_setgid (__NR_Linux + 46) -#define __NR_getgid (__NR_Linux + 47) -#define __NR_signal (__NR_Linux + 48) -#define __NR_geteuid (__NR_Linux + 49) -#define __NR_getegid (__NR_Linux + 50) -#define __NR_acct (__NR_Linux + 51) -#define __NR_umount2 (__NR_Linux + 52) -#define __NR_lock (__NR_Linux + 53) -#define __NR_ioctl (__NR_Linux + 54) -#define __NR_fcntl (__NR_Linux + 55) -#define __NR_mpx (__NR_Linux + 56) -#define __NR_setpgid (__NR_Linux + 57) -#define __NR_ulimit (__NR_Linux + 58) -#define __NR_unused59 (__NR_Linux + 59) -#define __NR_umask (__NR_Linux + 60) -#define __NR_chroot (__NR_Linux + 61) -#define __NR_ustat (__NR_Linux + 62) -#define __NR_dup2 (__NR_Linux + 63) -#define __NR_getppid (__NR_Linux + 64) -#define __NR_getpgrp (__NR_Linux + 65) -#define __NR_setsid (__NR_Linux + 66) -#define __NR_sigaction (__NR_Linux + 67) -#define __NR_sgetmask (__NR_Linux + 68) -#define __NR_ssetmask (__NR_Linux + 69) -#define __NR_setreuid (__NR_Linux + 70) -#define __NR_setregid (__NR_Linux + 71) -#define __NR_sigsuspend (__NR_Linux + 72) -#define __NR_sigpending (__NR_Linux + 73) -#define __NR_sethostname (__NR_Linux + 74) -#define __NR_setrlimit (__NR_Linux + 75) -#define __NR_getrlimit (__NR_Linux + 76) -#define __NR_getrusage (__NR_Linux + 77) -#define __NR_gettimeofday (__NR_Linux + 78) -#define __NR_settimeofday (__NR_Linux + 79) -#define __NR_getgroups (__NR_Linux + 80) -#define __NR_setgroups (__NR_Linux + 81) -#define __NR_reserved82 (__NR_Linux + 82) -#define __NR_symlink (__NR_Linux + 83) -#define __NR_unused84 (__NR_Linux + 84) -#define __NR_readlink (__NR_Linux + 85) -#define __NR_uselib (__NR_Linux + 86) -#define __NR_swapon (__NR_Linux + 87) -#define __NR_reboot (__NR_Linux + 88) -#define __NR_readdir (__NR_Linux + 89) -#define __NR_mmap (__NR_Linux + 90) -#define __NR_munmap (__NR_Linux + 91) -#define __NR_truncate (__NR_Linux + 92) -#define __NR_ftruncate (__NR_Linux + 93) -#define __NR_fchmod (__NR_Linux + 94) -#define __NR_fchown (__NR_Linux + 95) -#define __NR_getpriority (__NR_Linux + 96) -#define __NR_setpriority (__NR_Linux + 97) -#define __NR_profil (__NR_Linux + 98) -#define __NR_statfs (__NR_Linux + 99) -#define __NR_fstatfs (__NR_Linux + 100) -#define __NR_ioperm (__NR_Linux + 101) -#define __NR_socketcall (__NR_Linux + 102) -#define __NR_syslog (__NR_Linux + 103) -#define __NR_setitimer (__NR_Linux + 104) -#define __NR_getitimer (__NR_Linux + 105) -#define __NR_stat (__NR_Linux + 106) -#define __NR_lstat (__NR_Linux + 107) -#define __NR_fstat (__NR_Linux + 108) -#define __NR_unused109 (__NR_Linux + 109) -#define __NR_iopl (__NR_Linux + 110) -#define __NR_vhangup (__NR_Linux + 111) -#define __NR_idle (__NR_Linux + 112) -#define __NR_vm86 (__NR_Linux + 113) -#define __NR_wait4 (__NR_Linux + 114) -#define __NR_swapoff (__NR_Linux + 115) -#define __NR_sysinfo (__NR_Linux + 116) -#define __NR_ipc (__NR_Linux + 117) -#define __NR_fsync (__NR_Linux + 118) -#define __NR_sigreturn (__NR_Linux + 119) -#define __NR_clone (__NR_Linux + 120) -#define __NR_setdomainname (__NR_Linux + 121) -#define __NR_uname (__NR_Linux + 122) -#define __NR_modify_ldt (__NR_Linux + 123) -#define __NR_adjtimex (__NR_Linux + 124) -#define __NR_mprotect (__NR_Linux + 125) -#define __NR_sigprocmask (__NR_Linux + 126) -#define __NR_create_module (__NR_Linux + 127) -#define __NR_init_module (__NR_Linux + 128) -#define __NR_delete_module (__NR_Linux + 129) -#define __NR_get_kernel_syms (__NR_Linux + 130) -#define __NR_quotactl (__NR_Linux + 131) -#define __NR_getpgid (__NR_Linux + 132) -#define __NR_fchdir (__NR_Linux + 133) -#define __NR_bdflush (__NR_Linux + 134) -#define __NR_sysfs (__NR_Linux + 135) -#define __NR_personality (__NR_Linux + 136) -#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */ -#define __NR_setfsuid (__NR_Linux + 138) -#define __NR_setfsgid (__NR_Linux + 139) -#define __NR__llseek (__NR_Linux + 140) -#define __NR_getdents (__NR_Linux + 141) -#define __NR__newselect (__NR_Linux + 142) -#define __NR_flock (__NR_Linux + 143) -#define __NR_msync (__NR_Linux + 144) -#define __NR_readv (__NR_Linux + 145) -#define __NR_writev (__NR_Linux + 146) -#define __NR_cacheflush (__NR_Linux + 147) -#define __NR_cachectl (__NR_Linux + 148) -#define __NR_sysmips (__NR_Linux + 149) -#define __NR_unused150 (__NR_Linux + 150) -#define __NR_getsid (__NR_Linux + 151) -#define __NR_fdatasync (__NR_Linux + 152) -#define __NR__sysctl (__NR_Linux + 153) -#define __NR_mlock (__NR_Linux + 154) -#define __NR_munlock (__NR_Linux + 155) -#define __NR_mlockall (__NR_Linux + 156) -#define __NR_munlockall (__NR_Linux + 157) -#define __NR_sched_setparam (__NR_Linux + 158) -#define __NR_sched_getparam (__NR_Linux + 159) -#define __NR_sched_setscheduler (__NR_Linux + 160) -#define __NR_sched_getscheduler (__NR_Linux + 161) -#define __NR_sched_yield (__NR_Linux + 162) -#define __NR_sched_get_priority_max (__NR_Linux + 163) -#define __NR_sched_get_priority_min (__NR_Linux + 164) -#define __NR_sched_rr_get_interval (__NR_Linux + 165) -#define __NR_nanosleep (__NR_Linux + 166) -#define __NR_mremap (__NR_Linux + 167) -#define __NR_accept (__NR_Linux + 168) -#define __NR_bind (__NR_Linux + 169) -#define __NR_connect (__NR_Linux + 170) -#define __NR_getpeername (__NR_Linux + 171) -#define __NR_getsockname (__NR_Linux + 172) -#define __NR_getsockopt (__NR_Linux + 173) -#define __NR_listen (__NR_Linux + 174) -#define __NR_recv (__NR_Linux + 175) -#define __NR_recvfrom (__NR_Linux + 176) -#define __NR_recvmsg (__NR_Linux + 177) -#define __NR_send (__NR_Linux + 178) -#define __NR_sendmsg (__NR_Linux + 179) -#define __NR_sendto (__NR_Linux + 180) -#define __NR_setsockopt (__NR_Linux + 181) -#define __NR_shutdown (__NR_Linux + 182) -#define __NR_socket (__NR_Linux + 183) -#define __NR_socketpair (__NR_Linux + 184) -#define __NR_setresuid (__NR_Linux + 185) -#define __NR_getresuid (__NR_Linux + 186) -#define __NR_query_module (__NR_Linux + 187) -#define __NR_poll (__NR_Linux + 188) -#define __NR_nfsservctl (__NR_Linux + 189) -#define __NR_setresgid (__NR_Linux + 190) -#define __NR_getresgid (__NR_Linux + 191) -#define __NR_prctl (__NR_Linux + 192) -#define __NR_rt_sigreturn (__NR_Linux + 193) -#define __NR_rt_sigaction (__NR_Linux + 194) -#define __NR_rt_sigprocmask (__NR_Linux + 195) -#define __NR_rt_sigpending (__NR_Linux + 196) -#define __NR_rt_sigtimedwait (__NR_Linux + 197) -#define __NR_rt_sigqueueinfo (__NR_Linux + 198) -#define __NR_rt_sigsuspend (__NR_Linux + 199) -#define __NR_pread64 (__NR_Linux + 200) -#define __NR_pwrite64 (__NR_Linux + 201) -#define __NR_chown (__NR_Linux + 202) -#define __NR_getcwd (__NR_Linux + 203) -#define __NR_capget (__NR_Linux + 204) -#define __NR_capset (__NR_Linux + 205) -#define __NR_sigaltstack (__NR_Linux + 206) -#define __NR_sendfile (__NR_Linux + 207) -#define __NR_getpmsg (__NR_Linux + 208) -#define __NR_putpmsg (__NR_Linux + 209) -#define __NR_mmap2 (__NR_Linux + 210) -#define __NR_truncate64 (__NR_Linux + 211) -#define __NR_ftruncate64 (__NR_Linux + 212) -#define __NR_stat64 (__NR_Linux + 213) -#define __NR_lstat64 (__NR_Linux + 214) -#define __NR_fstat64 (__NR_Linux + 215) -#define __NR_pivot_root (__NR_Linux + 216) -#define __NR_mincore (__NR_Linux + 217) -#define __NR_madvise (__NR_Linux + 218) -#define __NR_getdents64 (__NR_Linux + 219) -#define __NR_fcntl64 (__NR_Linux + 220) -#define __NR_reserved221 (__NR_Linux + 221) -#define __NR_gettid (__NR_Linux + 222) -#define __NR_readahead (__NR_Linux + 223) -#define __NR_setxattr (__NR_Linux + 224) -#define __NR_lsetxattr (__NR_Linux + 225) -#define __NR_fsetxattr (__NR_Linux + 226) -#define __NR_getxattr (__NR_Linux + 227) -#define __NR_lgetxattr (__NR_Linux + 228) -#define __NR_fgetxattr (__NR_Linux + 229) -#define __NR_listxattr (__NR_Linux + 230) -#define __NR_llistxattr (__NR_Linux + 231) -#define __NR_flistxattr (__NR_Linux + 232) -#define __NR_removexattr (__NR_Linux + 233) -#define __NR_lremovexattr (__NR_Linux + 234) -#define __NR_fremovexattr (__NR_Linux + 235) -#define __NR_tkill (__NR_Linux + 236) -#define __NR_sendfile64 (__NR_Linux + 237) -#define __NR_futex (__NR_Linux + 238) -#define __NR_sched_setaffinity (__NR_Linux + 239) -#define __NR_sched_getaffinity (__NR_Linux + 240) -#define __NR_io_setup (__NR_Linux + 241) -#define __NR_io_destroy (__NR_Linux + 242) -#define __NR_io_getevents (__NR_Linux + 243) -#define __NR_io_submit (__NR_Linux + 244) -#define __NR_io_cancel (__NR_Linux + 245) -#define __NR_exit_group (__NR_Linux + 246) -#define __NR_lookup_dcookie (__NR_Linux + 247) -#define __NR_epoll_create (__NR_Linux + 248) -#define __NR_epoll_ctl (__NR_Linux + 249) -#define __NR_epoll_wait (__NR_Linux + 250) -#define __NR_remap_file_pages (__NR_Linux + 251) -#define __NR_set_tid_address (__NR_Linux + 252) -#define __NR_restart_syscall (__NR_Linux + 253) -#define __NR_fadvise64 (__NR_Linux + 254) -#define __NR_statfs64 (__NR_Linux + 255) -#define __NR_fstatfs64 (__NR_Linux + 256) -#define __NR_timer_create (__NR_Linux + 257) -#define __NR_timer_settime (__NR_Linux + 258) -#define __NR_timer_gettime (__NR_Linux + 259) -#define __NR_timer_getoverrun (__NR_Linux + 260) -#define __NR_timer_delete (__NR_Linux + 261) -#define __NR_clock_settime (__NR_Linux + 262) -#define __NR_clock_gettime (__NR_Linux + 263) -#define __NR_clock_getres (__NR_Linux + 264) -#define __NR_clock_nanosleep (__NR_Linux + 265) -#define __NR_tgkill (__NR_Linux + 266) -#define __NR_utimes (__NR_Linux + 267) -#define __NR_mbind (__NR_Linux + 268) -#define __NR_get_mempolicy (__NR_Linux + 269) -#define __NR_set_mempolicy (__NR_Linux + 270) -#define __NR_mq_open (__NR_Linux + 271) -#define __NR_mq_unlink (__NR_Linux + 272) -#define __NR_mq_timedsend (__NR_Linux + 273) -#define __NR_mq_timedreceive (__NR_Linux + 274) -#define __NR_mq_notify (__NR_Linux + 275) -#define __NR_mq_getsetattr (__NR_Linux + 276) -#define __NR_vserver (__NR_Linux + 277) -#define __NR_waitid (__NR_Linux + 278) -/* #define __NR_sys_setaltroot (__NR_Linux + 279) */ -#define __NR_add_key (__NR_Linux + 280) -#define __NR_request_key (__NR_Linux + 281) -#define __NR_keyctl (__NR_Linux + 282) -#define __NR_set_thread_area (__NR_Linux + 283) -#define __NR_inotify_init (__NR_Linux + 284) -#define __NR_inotify_add_watch (__NR_Linux + 285) -#define __NR_inotify_rm_watch (__NR_Linux + 286) -#define __NR_migrate_pages (__NR_Linux + 287) -#define __NR_openat (__NR_Linux + 288) -#define __NR_mkdirat (__NR_Linux + 289) -#define __NR_mknodat (__NR_Linux + 290) -#define __NR_fchownat (__NR_Linux + 291) -#define __NR_futimesat (__NR_Linux + 292) -#define __NR_fstatat64 (__NR_Linux + 293) -#define __NR_unlinkat (__NR_Linux + 294) -#define __NR_renameat (__NR_Linux + 295) -#define __NR_linkat (__NR_Linux + 296) -#define __NR_symlinkat (__NR_Linux + 297) -#define __NR_readlinkat (__NR_Linux + 298) -#define __NR_fchmodat (__NR_Linux + 299) -#define __NR_faccessat (__NR_Linux + 300) -#define __NR_pselect6 (__NR_Linux + 301) -#define __NR_ppoll (__NR_Linux + 302) -#define __NR_unshare (__NR_Linux + 303) -#define __NR_splice (__NR_Linux + 304) -#define __NR_sync_file_range (__NR_Linux + 305) -#define __NR_tee (__NR_Linux + 306) -#define __NR_vmsplice (__NR_Linux + 307) -#define __NR_move_pages (__NR_Linux + 308) -#define __NR_set_robust_list (__NR_Linux + 309) -#define __NR_get_robust_list (__NR_Linux + 310) -#define __NR_kexec_load (__NR_Linux + 311) -#define __NR_getcpu (__NR_Linux + 312) -#define __NR_epoll_pwait (__NR_Linux + 313) -#define __NR_ioprio_set (__NR_Linux + 314) -#define __NR_ioprio_get (__NR_Linux + 315) -#define __NR_utimensat (__NR_Linux + 316) -#define __NR_signalfd (__NR_Linux + 317) -#define __NR_timerfd (__NR_Linux + 318) -#define __NR_eventfd (__NR_Linux + 319) -#define __NR_fallocate (__NR_Linux + 320) -#define __NR_timerfd_create (__NR_Linux + 321) -#define __NR_timerfd_gettime (__NR_Linux + 322) -#define __NR_timerfd_settime (__NR_Linux + 323) -#define __NR_signalfd4 (__NR_Linux + 324) -#define __NR_eventfd2 (__NR_Linux + 325) -#define __NR_epoll_create1 (__NR_Linux + 326) -#define __NR_dup3 (__NR_Linux + 327) -#define __NR_pipe2 (__NR_Linux + 328) -#define __NR_inotify_init1 (__NR_Linux + 329) -#define __NR_preadv (__NR_Linux + 330) -#define __NR_pwritev (__NR_Linux + 331) -#define __NR_rt_tgsigqueueinfo (__NR_Linux + 332) -#define __NR_perf_event_open (__NR_Linux + 333) -#define __NR_accept4 (__NR_Linux + 334) -#define __NR_recvmmsg (__NR_Linux + 335) -#define __NR_fanotify_init (__NR_Linux + 336) -#define __NR_fanotify_mark (__NR_Linux + 337) -#define __NR_prlimit64 (__NR_Linux + 338) -#define __NR_name_to_handle_at (__NR_Linux + 339) -#define __NR_open_by_handle_at (__NR_Linux + 340) -#define __NR_clock_adjtime (__NR_Linux + 341) -#define __NR_syncfs (__NR_Linux + 342) -#define __NR_sendmmsg (__NR_Linux + 343) -#define __NR_setns (__NR_Linux + 344) -#define __NR_process_vm_readv (__NR_Linux + 345) -#define __NR_process_vm_writev (__NR_Linux + 346) -#define __NR_kcmp (__NR_Linux + 347) -#define __NR_finit_module (__NR_Linux + 348) -#define __NR_sched_setattr (__NR_Linux + 349) -#define __NR_sched_getattr (__NR_Linux + 350) -#define __NR_renameat2 (__NR_Linux + 351) -#define __NR_seccomp (__NR_Linux + 352) -#define __NR_getrandom (__NR_Linux + 353) -#define __NR_memfd_create (__NR_Linux + 354) -#define __NR_bpf (__NR_Linux + 355) -#define __NR_execveat (__NR_Linux + 356) -#define __NR_userfaultfd (__NR_Linux + 357) -#define __NR_membarrier (__NR_Linux + 358) -#define __NR_mlock2 (__NR_Linux + 359) -#define __NR_copy_file_range (__NR_Linux + 360) -#define __NR_preadv2 (__NR_Linux + 361) -#define __NR_pwritev2 (__NR_Linux + 362) -#define __NR_pkey_mprotect (__NR_Linux + 363) -#define __NR_pkey_alloc (__NR_Linux + 364) -#define __NR_pkey_free (__NR_Linux + 365) -#define __NR_statx (__NR_Linux + 366) -#define __NR_rseq (__NR_Linux + 367) -#define __NR_io_pgetevents (__NR_Linux + 368) - - -/* - * Offset of the last Linux o32 flavoured syscall - */ -#define __NR_Linux_syscalls 368 +#define __NR_Linux 4000 +#include <asm/unistd_o32.h> #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ -#define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 368 - #if _MIPS_SIM == _MIPS_SIM_ABI64 -/* - * Linux 64-bit syscalls are in the range from 5000 to 5999. - */ -#define __NR_Linux 5000 -#define __NR_read (__NR_Linux + 0) -#define __NR_write (__NR_Linux + 1) -#define __NR_open (__NR_Linux + 2) -#define __NR_close (__NR_Linux + 3) -#define __NR_stat (__NR_Linux + 4) -#define __NR_fstat (__NR_Linux + 5) -#define __NR_lstat (__NR_Linux + 6) -#define __NR_poll (__NR_Linux + 7) -#define __NR_lseek (__NR_Linux + 8) -#define __NR_mmap (__NR_Linux + 9) -#define __NR_mprotect (__NR_Linux + 10) -#define __NR_munmap (__NR_Linux + 11) -#define __NR_brk (__NR_Linux + 12) -#define __NR_rt_sigaction (__NR_Linux + 13) -#define __NR_rt_sigprocmask (__NR_Linux + 14) -#define __NR_ioctl (__NR_Linux + 15) -#define __NR_pread64 (__NR_Linux + 16) -#define __NR_pwrite64 (__NR_Linux + 17) -#define __NR_readv (__NR_Linux + 18) -#define __NR_writev (__NR_Linux + 19) -#define __NR_access (__NR_Linux + 20) -#define __NR_pipe (__NR_Linux + 21) -#define __NR__newselect (__NR_Linux + 22) -#define __NR_sched_yield (__NR_Linux + 23) -#define __NR_mremap (__NR_Linux + 24) -#define __NR_msync (__NR_Linux + 25) -#define __NR_mincore (__NR_Linux + 26) -#define __NR_madvise (__NR_Linux + 27) -#define __NR_shmget (__NR_Linux + 28) -#define __NR_shmat (__NR_Linux + 29) -#define __NR_shmctl (__NR_Linux + 30) -#define __NR_dup (__NR_Linux + 31) -#define __NR_dup2 (__NR_Linux + 32) -#define __NR_pause (__NR_Linux + 33) -#define __NR_nanosleep (__NR_Linux + 34) -#define __NR_getitimer (__NR_Linux + 35) -#define __NR_setitimer (__NR_Linux + 36) -#define __NR_alarm (__NR_Linux + 37) -#define __NR_getpid (__NR_Linux + 38) -#define __NR_sendfile (__NR_Linux + 39) -#define __NR_socket (__NR_Linux + 40) -#define __NR_connect (__NR_Linux + 41) -#define __NR_accept (__NR_Linux + 42) -#define __NR_sendto (__NR_Linux + 43) -#define __NR_recvfrom (__NR_Linux + 44) -#define __NR_sendmsg (__NR_Linux + 45) -#define __NR_recvmsg (__NR_Linux + 46) -#define __NR_shutdown (__NR_Linux + 47) -#define __NR_bind (__NR_Linux + 48) -#define __NR_listen (__NR_Linux + 49) -#define __NR_getsockname (__NR_Linux + 50) -#define __NR_getpeername (__NR_Linux + 51) -#define __NR_socketpair (__NR_Linux + 52) -#define __NR_setsockopt (__NR_Linux + 53) -#define __NR_getsockopt (__NR_Linux + 54) -#define __NR_clone (__NR_Linux + 55) -#define __NR_fork (__NR_Linux + 56) -#define __NR_execve (__NR_Linux + 57) -#define __NR_exit (__NR_Linux + 58) -#define __NR_wait4 (__NR_Linux + 59) -#define __NR_kill (__NR_Linux + 60) -#define __NR_uname (__NR_Linux + 61) -#define __NR_semget (__NR_Linux + 62) -#define __NR_semop (__NR_Linux + 63) -#define __NR_semctl (__NR_Linux + 64) -#define __NR_shmdt (__NR_Linux + 65) -#define __NR_msgget (__NR_Linux + 66) -#define __NR_msgsnd (__NR_Linux + 67) -#define __NR_msgrcv (__NR_Linux + 68) -#define __NR_msgctl (__NR_Linux + 69) -#define __NR_fcntl (__NR_Linux + 70) -#define __NR_flock (__NR_Linux + 71) -#define __NR_fsync (__NR_Linux + 72) -#define __NR_fdatasync (__NR_Linux + 73) -#define __NR_truncate (__NR_Linux + 74) -#define __NR_ftruncate (__NR_Linux + 75) -#define __NR_getdents (__NR_Linux + 76) -#define __NR_getcwd (__NR_Linux + 77) -#define __NR_chdir (__NR_Linux + 78) -#define __NR_fchdir (__NR_Linux + 79) -#define __NR_rename (__NR_Linux + 80) -#define __NR_mkdir (__NR_Linux + 81) -#define __NR_rmdir (__NR_Linux + 82) -#define __NR_creat (__NR_Linux + 83) -#define __NR_link (__NR_Linux + 84) -#define __NR_unlink (__NR_Linux + 85) -#define __NR_symlink (__NR_Linux + 86) -#define __NR_readlink (__NR_Linux + 87) -#define __NR_chmod (__NR_Linux + 88) -#define __NR_fchmod (__NR_Linux + 89) -#define __NR_chown (__NR_Linux + 90) -#define __NR_fchown (__NR_Linux + 91) -#define __NR_lchown (__NR_Linux + 92) -#define __NR_umask (__NR_Linux + 93) -#define __NR_gettimeofday (__NR_Linux + 94) -#define __NR_getrlimit (__NR_Linux + 95) -#define __NR_getrusage (__NR_Linux + 96) -#define __NR_sysinfo (__NR_Linux + 97) -#define __NR_times (__NR_Linux + 98) -#define __NR_ptrace (__NR_Linux + 99) -#define __NR_getuid (__NR_Linux + 100) -#define __NR_syslog (__NR_Linux + 101) -#define __NR_getgid (__NR_Linux + 102) -#define __NR_setuid (__NR_Linux + 103) -#define __NR_setgid (__NR_Linux + 104) -#define __NR_geteuid (__NR_Linux + 105) -#define __NR_getegid (__NR_Linux + 106) -#define __NR_setpgid (__NR_Linux + 107) -#define __NR_getppid (__NR_Linux + 108) -#define __NR_getpgrp (__NR_Linux + 109) -#define __NR_setsid (__NR_Linux + 110) -#define __NR_setreuid (__NR_Linux + 111) -#define __NR_setregid (__NR_Linux + 112) -#define __NR_getgroups (__NR_Linux + 113) -#define __NR_setgroups (__NR_Linux + 114) -#define __NR_setresuid (__NR_Linux + 115) -#define __NR_getresuid (__NR_Linux + 116) -#define __NR_setresgid (__NR_Linux + 117) -#define __NR_getresgid (__NR_Linux + 118) -#define __NR_getpgid (__NR_Linux + 119) -#define __NR_setfsuid (__NR_Linux + 120) -#define __NR_setfsgid (__NR_Linux + 121) -#define __NR_getsid (__NR_Linux + 122) -#define __NR_capget (__NR_Linux + 123) -#define __NR_capset (__NR_Linux + 124) -#define __NR_rt_sigpending (__NR_Linux + 125) -#define __NR_rt_sigtimedwait (__NR_Linux + 126) -#define __NR_rt_sigqueueinfo (__NR_Linux + 127) -#define __NR_rt_sigsuspend (__NR_Linux + 128) -#define __NR_sigaltstack (__NR_Linux + 129) -#define __NR_utime (__NR_Linux + 130) -#define __NR_mknod (__NR_Linux + 131) -#define __NR_personality (__NR_Linux + 132) -#define __NR_ustat (__NR_Linux + 133) -#define __NR_statfs (__NR_Linux + 134) -#define __NR_fstatfs (__NR_Linux + 135) -#define __NR_sysfs (__NR_Linux + 136) -#define __NR_getpriority (__NR_Linux + 137) -#define __NR_setpriority (__NR_Linux + 138) -#define __NR_sched_setparam (__NR_Linux + 139) -#define __NR_sched_getparam (__NR_Linux + 140) -#define __NR_sched_setscheduler (__NR_Linux + 141) -#define __NR_sched_getscheduler (__NR_Linux + 142) -#define __NR_sched_get_priority_max (__NR_Linux + 143) -#define __NR_sched_get_priority_min (__NR_Linux + 144) -#define __NR_sched_rr_get_interval (__NR_Linux + 145) -#define __NR_mlock (__NR_Linux + 146) -#define __NR_munlock (__NR_Linux + 147) -#define __NR_mlockall (__NR_Linux + 148) -#define __NR_munlockall (__NR_Linux + 149) -#define __NR_vhangup (__NR_Linux + 150) -#define __NR_pivot_root (__NR_Linux + 151) -#define __NR__sysctl (__NR_Linux + 152) -#define __NR_prctl (__NR_Linux + 153) -#define __NR_adjtimex (__NR_Linux + 154) -#define __NR_setrlimit (__NR_Linux + 155) -#define __NR_chroot (__NR_Linux + 156) -#define __NR_sync (__NR_Linux + 157) -#define __NR_acct (__NR_Linux + 158) -#define __NR_settimeofday (__NR_Linux + 159) -#define __NR_mount (__NR_Linux + 160) -#define __NR_umount2 (__NR_Linux + 161) -#define __NR_swapon (__NR_Linux + 162) -#define __NR_swapoff (__NR_Linux + 163) -#define __NR_reboot (__NR_Linux + 164) -#define __NR_sethostname (__NR_Linux + 165) -#define __NR_setdomainname (__NR_Linux + 166) -#define __NR_create_module (__NR_Linux + 167) -#define __NR_init_module (__NR_Linux + 168) -#define __NR_delete_module (__NR_Linux + 169) -#define __NR_get_kernel_syms (__NR_Linux + 170) -#define __NR_query_module (__NR_Linux + 171) -#define __NR_quotactl (__NR_Linux + 172) -#define __NR_nfsservctl (__NR_Linux + 173) -#define __NR_getpmsg (__NR_Linux + 174) -#define __NR_putpmsg (__NR_Linux + 175) -#define __NR_afs_syscall (__NR_Linux + 176) -#define __NR_reserved177 (__NR_Linux + 177) -#define __NR_gettid (__NR_Linux + 178) -#define __NR_readahead (__NR_Linux + 179) -#define __NR_setxattr (__NR_Linux + 180) -#define __NR_lsetxattr (__NR_Linux + 181) -#define __NR_fsetxattr (__NR_Linux + 182) -#define __NR_getxattr (__NR_Linux + 183) -#define __NR_lgetxattr (__NR_Linux + 184) -#define __NR_fgetxattr (__NR_Linux + 185) -#define __NR_listxattr (__NR_Linux + 186) -#define __NR_llistxattr (__NR_Linux + 187) -#define __NR_flistxattr (__NR_Linux + 188) -#define __NR_removexattr (__NR_Linux + 189) -#define __NR_lremovexattr (__NR_Linux + 190) -#define __NR_fremovexattr (__NR_Linux + 191) -#define __NR_tkill (__NR_Linux + 192) -#define __NR_reserved193 (__NR_Linux + 193) -#define __NR_futex (__NR_Linux + 194) -#define __NR_sched_setaffinity (__NR_Linux + 195) -#define __NR_sched_getaffinity (__NR_Linux + 196) -#define __NR_cacheflush (__NR_Linux + 197) -#define __NR_cachectl (__NR_Linux + 198) -#define __NR_sysmips (__NR_Linux + 199) -#define __NR_io_setup (__NR_Linux + 200) -#define __NR_io_destroy (__NR_Linux + 201) -#define __NR_io_getevents (__NR_Linux + 202) -#define __NR_io_submit (__NR_Linux + 203) -#define __NR_io_cancel (__NR_Linux + 204) -#define __NR_exit_group (__NR_Linux + 205) -#define __NR_lookup_dcookie (__NR_Linux + 206) -#define __NR_epoll_create (__NR_Linux + 207) -#define __NR_epoll_ctl (__NR_Linux + 208) -#define __NR_epoll_wait (__NR_Linux + 209) -#define __NR_remap_file_pages (__NR_Linux + 210) -#define __NR_rt_sigreturn (__NR_Linux + 211) -#define __NR_set_tid_address (__NR_Linux + 212) -#define __NR_restart_syscall (__NR_Linux + 213) -#define __NR_semtimedop (__NR_Linux + 214) -#define __NR_fadvise64 (__NR_Linux + 215) -#define __NR_timer_create (__NR_Linux + 216) -#define __NR_timer_settime (__NR_Linux + 217) -#define __NR_timer_gettime (__NR_Linux + 218) -#define __NR_timer_getoverrun (__NR_Linux + 219) -#define __NR_timer_delete (__NR_Linux + 220) -#define __NR_clock_settime (__NR_Linux + 221) -#define __NR_clock_gettime (__NR_Linux + 222) -#define __NR_clock_getres (__NR_Linux + 223) -#define __NR_clock_nanosleep (__NR_Linux + 224) -#define __NR_tgkill (__NR_Linux + 225) -#define __NR_utimes (__NR_Linux + 226) -#define __NR_mbind (__NR_Linux + 227) -#define __NR_get_mempolicy (__NR_Linux + 228) -#define __NR_set_mempolicy (__NR_Linux + 229) -#define __NR_mq_open (__NR_Linux + 230) -#define __NR_mq_unlink (__NR_Linux + 231) -#define __NR_mq_timedsend (__NR_Linux + 232) -#define __NR_mq_timedreceive (__NR_Linux + 233) -#define __NR_mq_notify (__NR_Linux + 234) -#define __NR_mq_getsetattr (__NR_Linux + 235) -#define __NR_vserver (__NR_Linux + 236) -#define __NR_waitid (__NR_Linux + 237) -/* #define __NR_sys_setaltroot (__NR_Linux + 238) */ -#define __NR_add_key (__NR_Linux + 239) -#define __NR_request_key (__NR_Linux + 240) -#define __NR_keyctl (__NR_Linux + 241) -#define __NR_set_thread_area (__NR_Linux + 242) -#define __NR_inotify_init (__NR_Linux + 243) -#define __NR_inotify_add_watch (__NR_Linux + 244) -#define __NR_inotify_rm_watch (__NR_Linux + 245) -#define __NR_migrate_pages (__NR_Linux + 246) -#define __NR_openat (__NR_Linux + 247) -#define __NR_mkdirat (__NR_Linux + 248) -#define __NR_mknodat (__NR_Linux + 249) -#define __NR_fchownat (__NR_Linux + 250) -#define __NR_futimesat (__NR_Linux + 251) -#define __NR_newfstatat (__NR_Linux + 252) -#define __NR_unlinkat (__NR_Linux + 253) -#define __NR_renameat (__NR_Linux + 254) -#define __NR_linkat (__NR_Linux + 255) -#define __NR_symlinkat (__NR_Linux + 256) -#define __NR_readlinkat (__NR_Linux + 257) -#define __NR_fchmodat (__NR_Linux + 258) -#define __NR_faccessat (__NR_Linux + 259) -#define __NR_pselect6 (__NR_Linux + 260) -#define __NR_ppoll (__NR_Linux + 261) -#define __NR_unshare (__NR_Linux + 262) -#define __NR_splice (__NR_Linux + 263) -#define __NR_sync_file_range (__NR_Linux + 264) -#define __NR_tee (__NR_Linux + 265) -#define __NR_vmsplice (__NR_Linux + 266) -#define __NR_move_pages (__NR_Linux + 267) -#define __NR_set_robust_list (__NR_Linux + 268) -#define __NR_get_robust_list (__NR_Linux + 269) -#define __NR_kexec_load (__NR_Linux + 270) -#define __NR_getcpu (__NR_Linux + 271) -#define __NR_epoll_pwait (__NR_Linux + 272) -#define __NR_ioprio_set (__NR_Linux + 273) -#define __NR_ioprio_get (__NR_Linux + 274) -#define __NR_utimensat (__NR_Linux + 275) -#define __NR_signalfd (__NR_Linux + 276) -#define __NR_timerfd (__NR_Linux + 277) -#define __NR_eventfd (__NR_Linux + 278) -#define __NR_fallocate (__NR_Linux + 279) -#define __NR_timerfd_create (__NR_Linux + 280) -#define __NR_timerfd_gettime (__NR_Linux + 281) -#define __NR_timerfd_settime (__NR_Linux + 282) -#define __NR_signalfd4 (__NR_Linux + 283) -#define __NR_eventfd2 (__NR_Linux + 284) -#define __NR_epoll_create1 (__NR_Linux + 285) -#define __NR_dup3 (__NR_Linux + 286) -#define __NR_pipe2 (__NR_Linux + 287) -#define __NR_inotify_init1 (__NR_Linux + 288) -#define __NR_preadv (__NR_Linux + 289) -#define __NR_pwritev (__NR_Linux + 290) -#define __NR_rt_tgsigqueueinfo (__NR_Linux + 291) -#define __NR_perf_event_open (__NR_Linux + 292) -#define __NR_accept4 (__NR_Linux + 293) -#define __NR_recvmmsg (__NR_Linux + 294) -#define __NR_fanotify_init (__NR_Linux + 295) -#define __NR_fanotify_mark (__NR_Linux + 296) -#define __NR_prlimit64 (__NR_Linux + 297) -#define __NR_name_to_handle_at (__NR_Linux + 298) -#define __NR_open_by_handle_at (__NR_Linux + 299) -#define __NR_clock_adjtime (__NR_Linux + 300) -#define __NR_syncfs (__NR_Linux + 301) -#define __NR_sendmmsg (__NR_Linux + 302) -#define __NR_setns (__NR_Linux + 303) -#define __NR_process_vm_readv (__NR_Linux + 304) -#define __NR_process_vm_writev (__NR_Linux + 305) -#define __NR_kcmp (__NR_Linux + 306) -#define __NR_finit_module (__NR_Linux + 307) -#define __NR_getdents64 (__NR_Linux + 308) -#define __NR_sched_setattr (__NR_Linux + 309) -#define __NR_sched_getattr (__NR_Linux + 310) -#define __NR_renameat2 (__NR_Linux + 311) -#define __NR_seccomp (__NR_Linux + 312) -#define __NR_getrandom (__NR_Linux + 313) -#define __NR_memfd_create (__NR_Linux + 314) -#define __NR_bpf (__NR_Linux + 315) -#define __NR_execveat (__NR_Linux + 316) -#define __NR_userfaultfd (__NR_Linux + 317) -#define __NR_membarrier (__NR_Linux + 318) -#define __NR_mlock2 (__NR_Linux + 319) -#define __NR_copy_file_range (__NR_Linux + 320) -#define __NR_preadv2 (__NR_Linux + 321) -#define __NR_pwritev2 (__NR_Linux + 322) -#define __NR_pkey_mprotect (__NR_Linux + 323) -#define __NR_pkey_alloc (__NR_Linux + 324) -#define __NR_pkey_free (__NR_Linux + 325) -#define __NR_statx (__NR_Linux + 326) -#define __NR_rseq (__NR_Linux + 327) -#define __NR_io_pgetevents (__NR_Linux + 328) - -/* - * Offset of the last Linux 64-bit flavoured syscall - */ -#define __NR_Linux_syscalls 328 +#define __NR_Linux 5000 +#include <asm/unistd_n64.h> #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ -#define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 328 - #if _MIPS_SIM == _MIPS_SIM_NABI32 -/* - * Linux N32 syscalls are in the range from 6000 to 6999. - */ -#define __NR_Linux 6000 -#define __NR_read (__NR_Linux + 0) -#define __NR_write (__NR_Linux + 1) -#define __NR_open (__NR_Linux + 2) -#define __NR_close (__NR_Linux + 3) -#define __NR_stat (__NR_Linux + 4) -#define __NR_fstat (__NR_Linux + 5) -#define __NR_lstat (__NR_Linux + 6) -#define __NR_poll (__NR_Linux + 7) -#define __NR_lseek (__NR_Linux + 8) -#define __NR_mmap (__NR_Linux + 9) -#define __NR_mprotect (__NR_Linux + 10) -#define __NR_munmap (__NR_Linux + 11) -#define __NR_brk (__NR_Linux + 12) -#define __NR_rt_sigaction (__NR_Linux + 13) -#define __NR_rt_sigprocmask (__NR_Linux + 14) -#define __NR_ioctl (__NR_Linux + 15) -#define __NR_pread64 (__NR_Linux + 16) -#define __NR_pwrite64 (__NR_Linux + 17) -#define __NR_readv (__NR_Linux + 18) -#define __NR_writev (__NR_Linux + 19) -#define __NR_access (__NR_Linux + 20) -#define __NR_pipe (__NR_Linux + 21) -#define __NR__newselect (__NR_Linux + 22) -#define __NR_sched_yield (__NR_Linux + 23) -#define __NR_mremap (__NR_Linux + 24) -#define __NR_msync (__NR_Linux + 25) -#define __NR_mincore (__NR_Linux + 26) -#define __NR_madvise (__NR_Linux + 27) -#define __NR_shmget (__NR_Linux + 28) -#define __NR_shmat (__NR_Linux + 29) -#define __NR_shmctl (__NR_Linux + 30) -#define __NR_dup (__NR_Linux + 31) -#define __NR_dup2 (__NR_Linux + 32) -#define __NR_pause (__NR_Linux + 33) -#define __NR_nanosleep (__NR_Linux + 34) -#define __NR_getitimer (__NR_Linux + 35) -#define __NR_setitimer (__NR_Linux + 36) -#define __NR_alarm (__NR_Linux + 37) -#define __NR_getpid (__NR_Linux + 38) -#define __NR_sendfile (__NR_Linux + 39) -#define __NR_socket (__NR_Linux + 40) -#define __NR_connect (__NR_Linux + 41) -#define __NR_accept (__NR_Linux + 42) -#define __NR_sendto (__NR_Linux + 43) -#define __NR_recvfrom (__NR_Linux + 44) -#define __NR_sendmsg (__NR_Linux + 45) -#define __NR_recvmsg (__NR_Linux + 46) -#define __NR_shutdown (__NR_Linux + 47) -#define __NR_bind (__NR_Linux + 48) -#define __NR_listen (__NR_Linux + 49) -#define __NR_getsockname (__NR_Linux + 50) -#define __NR_getpeername (__NR_Linux + 51) -#define __NR_socketpair (__NR_Linux + 52) -#define __NR_setsockopt (__NR_Linux + 53) -#define __NR_getsockopt (__NR_Linux + 54) -#define __NR_clone (__NR_Linux + 55) -#define __NR_fork (__NR_Linux + 56) -#define __NR_execve (__NR_Linux + 57) -#define __NR_exit (__NR_Linux + 58) -#define __NR_wait4 (__NR_Linux + 59) -#define __NR_kill (__NR_Linux + 60) -#define __NR_uname (__NR_Linux + 61) -#define __NR_semget (__NR_Linux + 62) -#define __NR_semop (__NR_Linux + 63) -#define __NR_semctl (__NR_Linux + 64) -#define __NR_shmdt (__NR_Linux + 65) -#define __NR_msgget (__NR_Linux + 66) -#define __NR_msgsnd (__NR_Linux + 67) -#define __NR_msgrcv (__NR_Linux + 68) -#define __NR_msgctl (__NR_Linux + 69) -#define __NR_fcntl (__NR_Linux + 70) -#define __NR_flock (__NR_Linux + 71) -#define __NR_fsync (__NR_Linux + 72) -#define __NR_fdatasync (__NR_Linux + 73) -#define __NR_truncate (__NR_Linux + 74) -#define __NR_ftruncate (__NR_Linux + 75) -#define __NR_getdents (__NR_Linux + 76) -#define __NR_getcwd (__NR_Linux + 77) -#define __NR_chdir (__NR_Linux + 78) -#define __NR_fchdir (__NR_Linux + 79) -#define __NR_rename (__NR_Linux + 80) -#define __NR_mkdir (__NR_Linux + 81) -#define __NR_rmdir (__NR_Linux + 82) -#define __NR_creat (__NR_Linux + 83) -#define __NR_link (__NR_Linux + 84) -#define __NR_unlink (__NR_Linux + 85) -#define __NR_symlink (__NR_Linux + 86) -#define __NR_readlink (__NR_Linux + 87) -#define __NR_chmod (__NR_Linux + 88) -#define __NR_fchmod (__NR_Linux + 89) -#define __NR_chown (__NR_Linux + 90) -#define __NR_fchown (__NR_Linux + 91) -#define __NR_lchown (__NR_Linux + 92) -#define __NR_umask (__NR_Linux + 93) -#define __NR_gettimeofday (__NR_Linux + 94) -#define __NR_getrlimit (__NR_Linux + 95) -#define __NR_getrusage (__NR_Linux + 96) -#define __NR_sysinfo (__NR_Linux + 97) -#define __NR_times (__NR_Linux + 98) -#define __NR_ptrace (__NR_Linux + 99) -#define __NR_getuid (__NR_Linux + 100) -#define __NR_syslog (__NR_Linux + 101) -#define __NR_getgid (__NR_Linux + 102) -#define __NR_setuid (__NR_Linux + 103) -#define __NR_setgid (__NR_Linux + 104) -#define __NR_geteuid (__NR_Linux + 105) -#define __NR_getegid (__NR_Linux + 106) -#define __NR_setpgid (__NR_Linux + 107) -#define __NR_getppid (__NR_Linux + 108) -#define __NR_getpgrp (__NR_Linux + 109) -#define __NR_setsid (__NR_Linux + 110) -#define __NR_setreuid (__NR_Linux + 111) -#define __NR_setregid (__NR_Linux + 112) -#define __NR_getgroups (__NR_Linux + 113) -#define __NR_setgroups (__NR_Linux + 114) -#define __NR_setresuid (__NR_Linux + 115) -#define __NR_getresuid (__NR_Linux + 116) -#define __NR_setresgid (__NR_Linux + 117) -#define __NR_getresgid (__NR_Linux + 118) -#define __NR_getpgid (__NR_Linux + 119) -#define __NR_setfsuid (__NR_Linux + 120) -#define __NR_setfsgid (__NR_Linux + 121) -#define __NR_getsid (__NR_Linux + 122) -#define __NR_capget (__NR_Linux + 123) -#define __NR_capset (__NR_Linux + 124) -#define __NR_rt_sigpending (__NR_Linux + 125) -#define __NR_rt_sigtimedwait (__NR_Linux + 126) -#define __NR_rt_sigqueueinfo (__NR_Linux + 127) -#define __NR_rt_sigsuspend (__NR_Linux + 128) -#define __NR_sigaltstack (__NR_Linux + 129) -#define __NR_utime (__NR_Linux + 130) -#define __NR_mknod (__NR_Linux + 131) -#define __NR_personality (__NR_Linux + 132) -#define __NR_ustat (__NR_Linux + 133) -#define __NR_statfs (__NR_Linux + 134) -#define __NR_fstatfs (__NR_Linux + 135) -#define __NR_sysfs (__NR_Linux + 136) -#define __NR_getpriority (__NR_Linux + 137) -#define __NR_setpriority (__NR_Linux + 138) -#define __NR_sched_setparam (__NR_Linux + 139) -#define __NR_sched_getparam (__NR_Linux + 140) -#define __NR_sched_setscheduler (__NR_Linux + 141) -#define __NR_sched_getscheduler (__NR_Linux + 142) -#define __NR_sched_get_priority_max (__NR_Linux + 143) -#define __NR_sched_get_priority_min (__NR_Linux + 144) -#define __NR_sched_rr_get_interval (__NR_Linux + 145) -#define __NR_mlock (__NR_Linux + 146) -#define __NR_munlock (__NR_Linux + 147) -#define __NR_mlockall (__NR_Linux + 148) -#define __NR_munlockall (__NR_Linux + 149) -#define __NR_vhangup (__NR_Linux + 150) -#define __NR_pivot_root (__NR_Linux + 151) -#define __NR__sysctl (__NR_Linux + 152) -#define __NR_prctl (__NR_Linux + 153) -#define __NR_adjtimex (__NR_Linux + 154) -#define __NR_setrlimit (__NR_Linux + 155) -#define __NR_chroot (__NR_Linux + 156) -#define __NR_sync (__NR_Linux + 157) -#define __NR_acct (__NR_Linux + 158) -#define __NR_settimeofday (__NR_Linux + 159) -#define __NR_mount (__NR_Linux + 160) -#define __NR_umount2 (__NR_Linux + 161) -#define __NR_swapon (__NR_Linux + 162) -#define __NR_swapoff (__NR_Linux + 163) -#define __NR_reboot (__NR_Linux + 164) -#define __NR_sethostname (__NR_Linux + 165) -#define __NR_setdomainname (__NR_Linux + 166) -#define __NR_create_module (__NR_Linux + 167) -#define __NR_init_module (__NR_Linux + 168) -#define __NR_delete_module (__NR_Linux + 169) -#define __NR_get_kernel_syms (__NR_Linux + 170) -#define __NR_query_module (__NR_Linux + 171) -#define __NR_quotactl (__NR_Linux + 172) -#define __NR_nfsservctl (__NR_Linux + 173) -#define __NR_getpmsg (__NR_Linux + 174) -#define __NR_putpmsg (__NR_Linux + 175) -#define __NR_afs_syscall (__NR_Linux + 176) -#define __NR_reserved177 (__NR_Linux + 177) -#define __NR_gettid (__NR_Linux + 178) -#define __NR_readahead (__NR_Linux + 179) -#define __NR_setxattr (__NR_Linux + 180) -#define __NR_lsetxattr (__NR_Linux + 181) -#define __NR_fsetxattr (__NR_Linux + 182) -#define __NR_getxattr (__NR_Linux + 183) -#define __NR_lgetxattr (__NR_Linux + 184) -#define __NR_fgetxattr (__NR_Linux + 185) -#define __NR_listxattr (__NR_Linux + 186) -#define __NR_llistxattr (__NR_Linux + 187) -#define __NR_flistxattr (__NR_Linux + 188) -#define __NR_removexattr (__NR_Linux + 189) -#define __NR_lremovexattr (__NR_Linux + 190) -#define __NR_fremovexattr (__NR_Linux + 191) -#define __NR_tkill (__NR_Linux + 192) -#define __NR_reserved193 (__NR_Linux + 193) -#define __NR_futex (__NR_Linux + 194) -#define __NR_sched_setaffinity (__NR_Linux + 195) -#define __NR_sched_getaffinity (__NR_Linux + 196) -#define __NR_cacheflush (__NR_Linux + 197) -#define __NR_cachectl (__NR_Linux + 198) -#define __NR_sysmips (__NR_Linux + 199) -#define __NR_io_setup (__NR_Linux + 200) -#define __NR_io_destroy (__NR_Linux + 201) -#define __NR_io_getevents (__NR_Linux + 202) -#define __NR_io_submit (__NR_Linux + 203) -#define __NR_io_cancel (__NR_Linux + 204) -#define __NR_exit_group (__NR_Linux + 205) -#define __NR_lookup_dcookie (__NR_Linux + 206) -#define __NR_epoll_create (__NR_Linux + 207) -#define __NR_epoll_ctl (__NR_Linux + 208) -#define __NR_epoll_wait (__NR_Linux + 209) -#define __NR_remap_file_pages (__NR_Linux + 210) -#define __NR_rt_sigreturn (__NR_Linux + 211) -#define __NR_fcntl64 (__NR_Linux + 212) -#define __NR_set_tid_address (__NR_Linux + 213) -#define __NR_restart_syscall (__NR_Linux + 214) -#define __NR_semtimedop (__NR_Linux + 215) -#define __NR_fadvise64 (__NR_Linux + 216) -#define __NR_statfs64 (__NR_Linux + 217) -#define __NR_fstatfs64 (__NR_Linux + 218) -#define __NR_sendfile64 (__NR_Linux + 219) -#define __NR_timer_create (__NR_Linux + 220) -#define __NR_timer_settime (__NR_Linux + 221) -#define __NR_timer_gettime (__NR_Linux + 222) -#define __NR_timer_getoverrun (__NR_Linux + 223) -#define __NR_timer_delete (__NR_Linux + 224) -#define __NR_clock_settime (__NR_Linux + 225) -#define __NR_clock_gettime (__NR_Linux + 226) -#define __NR_clock_getres (__NR_Linux + 227) -#define __NR_clock_nanosleep (__NR_Linux + 228) -#define __NR_tgkill (__NR_Linux + 229) -#define __NR_utimes (__NR_Linux + 230) -#define __NR_mbind (__NR_Linux + 231) -#define __NR_get_mempolicy (__NR_Linux + 232) -#define __NR_set_mempolicy (__NR_Linux + 233) -#define __NR_mq_open (__NR_Linux + 234) -#define __NR_mq_unlink (__NR_Linux + 235) -#define __NR_mq_timedsend (__NR_Linux + 236) -#define __NR_mq_timedreceive (__NR_Linux + 237) -#define __NR_mq_notify (__NR_Linux + 238) -#define __NR_mq_getsetattr (__NR_Linux + 239) -#define __NR_vserver (__NR_Linux + 240) -#define __NR_waitid (__NR_Linux + 241) -/* #define __NR_sys_setaltroot (__NR_Linux + 242) */ -#define __NR_add_key (__NR_Linux + 243) -#define __NR_request_key (__NR_Linux + 244) -#define __NR_keyctl (__NR_Linux + 245) -#define __NR_set_thread_area (__NR_Linux + 246) -#define __NR_inotify_init (__NR_Linux + 247) -#define __NR_inotify_add_watch (__NR_Linux + 248) -#define __NR_inotify_rm_watch (__NR_Linux + 249) -#define __NR_migrate_pages (__NR_Linux + 250) -#define __NR_openat (__NR_Linux + 251) -#define __NR_mkdirat (__NR_Linux + 252) -#define __NR_mknodat (__NR_Linux + 253) -#define __NR_fchownat (__NR_Linux + 254) -#define __NR_futimesat (__NR_Linux + 255) -#define __NR_newfstatat (__NR_Linux + 256) -#define __NR_unlinkat (__NR_Linux + 257) -#define __NR_renameat (__NR_Linux + 258) -#define __NR_linkat (__NR_Linux + 259) -#define __NR_symlinkat (__NR_Linux + 260) -#define __NR_readlinkat (__NR_Linux + 261) -#define __NR_fchmodat (__NR_Linux + 262) -#define __NR_faccessat (__NR_Linux + 263) -#define __NR_pselect6 (__NR_Linux + 264) -#define __NR_ppoll (__NR_Linux + 265) -#define __NR_unshare (__NR_Linux + 266) -#define __NR_splice (__NR_Linux + 267) -#define __NR_sync_file_range (__NR_Linux + 268) -#define __NR_tee (__NR_Linux + 269) -#define __NR_vmsplice (__NR_Linux + 270) -#define __NR_move_pages (__NR_Linux + 271) -#define __NR_set_robust_list (__NR_Linux + 272) -#define __NR_get_robust_list (__NR_Linux + 273) -#define __NR_kexec_load (__NR_Linux + 274) -#define __NR_getcpu (__NR_Linux + 275) -#define __NR_epoll_pwait (__NR_Linux + 276) -#define __NR_ioprio_set (__NR_Linux + 277) -#define __NR_ioprio_get (__NR_Linux + 278) -#define __NR_utimensat (__NR_Linux + 279) -#define __NR_signalfd (__NR_Linux + 280) -#define __NR_timerfd (__NR_Linux + 281) -#define __NR_eventfd (__NR_Linux + 282) -#define __NR_fallocate (__NR_Linux + 283) -#define __NR_timerfd_create (__NR_Linux + 284) -#define __NR_timerfd_gettime (__NR_Linux + 285) -#define __NR_timerfd_settime (__NR_Linux + 286) -#define __NR_signalfd4 (__NR_Linux + 287) -#define __NR_eventfd2 (__NR_Linux + 288) -#define __NR_epoll_create1 (__NR_Linux + 289) -#define __NR_dup3 (__NR_Linux + 290) -#define __NR_pipe2 (__NR_Linux + 291) -#define __NR_inotify_init1 (__NR_Linux + 292) -#define __NR_preadv (__NR_Linux + 293) -#define __NR_pwritev (__NR_Linux + 294) -#define __NR_rt_tgsigqueueinfo (__NR_Linux + 295) -#define __NR_perf_event_open (__NR_Linux + 296) -#define __NR_accept4 (__NR_Linux + 297) -#define __NR_recvmmsg (__NR_Linux + 298) -#define __NR_getdents64 (__NR_Linux + 299) -#define __NR_fanotify_init (__NR_Linux + 300) -#define __NR_fanotify_mark (__NR_Linux + 301) -#define __NR_prlimit64 (__NR_Linux + 302) -#define __NR_name_to_handle_at (__NR_Linux + 303) -#define __NR_open_by_handle_at (__NR_Linux + 304) -#define __NR_clock_adjtime (__NR_Linux + 305) -#define __NR_syncfs (__NR_Linux + 306) -#define __NR_sendmmsg (__NR_Linux + 307) -#define __NR_setns (__NR_Linux + 308) -#define __NR_process_vm_readv (__NR_Linux + 309) -#define __NR_process_vm_writev (__NR_Linux + 310) -#define __NR_kcmp (__NR_Linux + 311) -#define __NR_finit_module (__NR_Linux + 312) -#define __NR_sched_setattr (__NR_Linux + 313) -#define __NR_sched_getattr (__NR_Linux + 314) -#define __NR_renameat2 (__NR_Linux + 315) -#define __NR_seccomp (__NR_Linux + 316) -#define __NR_getrandom (__NR_Linux + 317) -#define __NR_memfd_create (__NR_Linux + 318) -#define __NR_bpf (__NR_Linux + 319) -#define __NR_execveat (__NR_Linux + 320) -#define __NR_userfaultfd (__NR_Linux + 321) -#define __NR_membarrier (__NR_Linux + 322) -#define __NR_mlock2 (__NR_Linux + 323) -#define __NR_copy_file_range (__NR_Linux + 324) -#define __NR_preadv2 (__NR_Linux + 325) -#define __NR_pwritev2 (__NR_Linux + 326) -#define __NR_pkey_mprotect (__NR_Linux + 327) -#define __NR_pkey_alloc (__NR_Linux + 328) -#define __NR_pkey_free (__NR_Linux + 329) -#define __NR_statx (__NR_Linux + 330) -#define __NR_rseq (__NR_Linux + 331) -#define __NR_io_pgetevents (__NR_Linux + 332) - -/* - * Offset of the last N32 flavoured syscall - */ -#define __NR_Linux_syscalls 332 +#define __NR_Linux 6000 +#include <asm/unistd_n32.h> #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ -#define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 332 - #endif /* _UAPI_ASM_UNISTD_H */ diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 210c2802cf4d..89b07ea8d249 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -42,9 +42,8 @@ sw-$(CONFIG_CPU_TX39XX) := r2300_switch.o sw-$(CONFIG_CPU_CAVIUM_OCTEON) := octeon_switch.o obj-y += $(sw-y) +obj-$(CONFIG_CPU_R2300_FPU) += r2300_fpu.o obj-$(CONFIG_CPU_R4K_FPU) += r4k_fpu.o -obj-$(CONFIG_CPU_R3000) += r2300_fpu.o -obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_SMP_UP) += smp-up.o @@ -72,7 +71,7 @@ obj-$(CONFIG_IRQ_GT641XX) += irq-gt641xx.o obj-$(CONFIG_KPROBES) += kprobes.o obj-$(CONFIG_32BIT) += scall32-o32.o -obj-$(CONFIG_64BIT) += scall64-64.o +obj-$(CONFIG_64BIT) += scall64-n64.o obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o signal_o32.o diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index cbe4742d2fff..aebfda81120a 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -123,7 +123,6 @@ void output_thread_defines(void) OFFSET(THREAD_REG31, task_struct, thread.reg31); OFFSET(THREAD_STATUS, task_struct, thread.cp0_status); - OFFSET(THREAD_FPU, task_struct, thread.fpu); OFFSET(THREAD_BVADDR, task_struct, \ thread.cp0_badvaddr); @@ -135,8 +134,11 @@ void output_thread_defines(void) BLANK(); } +#ifdef CONFIG_MIPS_FP_SUPPORT void output_thread_fpu_defines(void) { + OFFSET(THREAD_FPU, task_struct, thread.fpu); + OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]); OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]); OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]); @@ -174,6 +176,7 @@ void output_thread_fpu_defines(void) OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr); BLANK(); } +#endif void output_mm_defines(void) { @@ -341,6 +344,7 @@ void output_pm_defines(void) } #endif +#ifdef CONFIG_MIPS_FP_SUPPORT void output_kvm_defines(void) { COMMENT(" KVM/MIPS Specific offsets. "); @@ -382,6 +386,7 @@ void output_kvm_defines(void) OFFSET(VCPU_MSA_CSR, kvm_vcpu_arch, fpu.msacsr); BLANK(); } +#endif #ifdef CONFIG_MIPS_CPS void output_cps_defines(void) diff --git a/arch/mips/kernel/bmips_5xxx_init.S b/arch/mips/kernel/bmips_5xxx_init.S index adaa82e00f2b..9e422d186a17 100644 --- a/arch/mips/kernel/bmips_5xxx_init.S +++ b/arch/mips/kernel/bmips_5xxx_init.S @@ -632,12 +632,6 @@ core_init: bal set_zephyr nop -#if ENABLE_FPU==1 - /* initialize the Floating point unit (both TPs) */ - bal init_fpu - nop -#endif - /* set low latency memory bus */ li a0, 1 bal set_llmb diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c index e48f6c0a9e4a..180ad081afcf 100644 --- a/arch/mips/kernel/branch.c +++ b/arch/mips/kernel/branch.c @@ -58,9 +58,6 @@ int __mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, unsigned long *contpc) { union mips_instruction insn = (union mips_instruction)dec_insn.insn; - int bc_false = 0; - unsigned int fcr31; - unsigned int bit; if (!cpu_has_mmips) return 0; @@ -139,8 +136,13 @@ int __mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, dec_insn.pc_inc + dec_insn.next_pc_inc; return 1; +#ifdef CONFIG_MIPS_FP_SUPPORT case mm_bc2f_op: - case mm_bc1f_op: + case mm_bc1f_op: { + int bc_false = 0; + unsigned int fcr31; + unsigned int bit; + bc_false = 1; /* Fall through */ case mm_bc2t_op: @@ -167,6 +169,8 @@ int __mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, dec_insn.pc_inc + dec_insn.next_pc_inc; return 1; } +#endif /* CONFIG_MIPS_FP_SUPPORT */ + } break; case mm_pool16c_op: switch (insn.mm_i_format.rt) { @@ -416,8 +420,8 @@ int __MIPS16e_compute_return_epc(struct pt_regs *regs) int __compute_return_epc_for_insn(struct pt_regs *regs, union mips_instruction insn) { - unsigned int bit, fcr31, dspcontrol, reg; long epc = regs->cp0_epc; + unsigned int dspcontrol; int ret = 0; switch (insn.i_format.opcode) { @@ -447,6 +451,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case bltzl_op: if (NO_R6EMU) goto sigill_r2r6; + /* fall through */ case bltz_op: if ((long)regs->regs[insn.i_format.rs] < 0) { epc = epc + 4 + (insn.i_format.simmediate << 2); @@ -460,6 +465,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case bgezl_op: if (NO_R6EMU) goto sigill_r2r6; + /* fall through */ case bgez_op: if ((long)regs->regs[insn.i_format.rs] >= 0) { epc = epc + 4 + (insn.i_format.simmediate << 2); @@ -555,6 +561,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case jalx_op: case jal_op: regs->regs[31] = regs->cp0_epc + 8; + /* fall through */ case j_op: epc += 4; epc >>= 28; @@ -571,6 +578,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case beql_op: if (NO_R6EMU) goto sigill_r2r6; + /* fall through */ case beq_op: if (regs->regs[insn.i_format.rs] == regs->regs[insn.i_format.rt]) { @@ -585,6 +593,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case bnel_op: if (NO_R6EMU) goto sigill_r2r6; + /* fall through */ case bne_op: if (regs->regs[insn.i_format.rs] != regs->regs[insn.i_format.rt]) { @@ -599,6 +608,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case blezl_op: /* not really i_format */ if (!insn.i_format.rt && NO_R6EMU) goto sigill_r2r6; + /* fall through */ case blez_op: /* * Compact branches for R6 for the @@ -634,6 +644,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, case bgtzl_op: if (!insn.i_format.rt && NO_R6EMU) goto sigill_r2r6; + /* fall through */ case bgtz_op: /* * Compact branches for R6 for the @@ -667,23 +678,18 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, regs->cp0_epc = epc; break; +#ifdef CONFIG_MIPS_FP_SUPPORT /* * And now the FPA/cp1 branch instructions. */ - case cop1_op: + case cop1_op: { + unsigned int bit, fcr31, reg; + if (cpu_has_mips_r6 && ((insn.i_format.rs == bc1eqz_op) || (insn.i_format.rs == bc1nez_op))) { - if (!used_math()) { /* First time FPU user */ - ret = init_fpu(); - if (ret && NO_R6EMU) { - ret = -ret; - break; - } - ret = 0; - set_used_math(); - } - lose_fpu(1); /* Save FPU state for the emulator. */ + if (!init_fp_ctx(current)) + lose_fpu(1); reg = insn.i_format.rt; bit = get_fpr32(¤t->thread.fpu.fpr[reg], 0) & 0x1; if (insn.i_format.rs == bc1eqz_op) @@ -736,6 +742,9 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, } break; } + } +#endif /* CONFIG_MIPS_FP_SUPPORT */ + #ifdef CONFIG_CPU_CAVIUM_OCTEON case lwc2_op: /* This is bbit0 on Octeon */ if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index c9e8622b5a16..bada74af7641 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -39,7 +39,7 @@ static inline void align_mod(const int align, const int mod) ".endr\n\t" ".set pop" : - : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod)); + : "n"(align), "n"(mod)); } static inline void mult_sh_align_mod(long *v1, long *v2, long *w, @@ -92,7 +92,7 @@ static inline void mult_sh_align_mod(long *v1, long *v2, long *w, ".set pop" : "=&r" (lv1), "=r" (lw) : "r" (m1), "r" (m2), "r" (s), "I" (0) - : "hi", "lo", GCC_REG_ACCUM); + : "hi", "lo", "$0"); /* We have to use single integers for m1 and m2 and a double * one for p to be sure the mulsidi3 gcc's RTL multiplication * instruction has the workaround applied. Older versions of diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index d535fc706a8b..95b18a194f53 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -36,6 +36,8 @@ unsigned int elf_hwcap __read_mostly; EXPORT_SYMBOL_GPL(elf_hwcap); +#ifdef CONFIG_MIPS_FP_SUPPORT + /* * Get the FPU Implementation/Revision. */ @@ -58,19 +60,6 @@ static inline int __cpu_has_fpu(void) return (cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE; } -static inline unsigned long cpu_get_msa_id(void) -{ - unsigned long status, msa_id; - - status = read_c0_status(); - __enable_fpu(FPU_64BIT); - enable_msa(); - msa_id = read_msa_ir(); - disable_msa(); - write_c0_status(status); - return msa_id; -} - /* * Determine the FCSR mask for FPU hardware. */ @@ -326,6 +315,45 @@ static int __init fpu_disable(char *s) __setup("nofpu", fpu_disable); +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +#define mips_fpu_disabled 1 + +static inline unsigned long cpu_get_fpu_id(void) +{ + return FPIR_IMP_NONE; +} + +static inline int __cpu_has_fpu(void) +{ + return 0; +} + +static void cpu_set_fpu_opts(struct cpuinfo_mips *c) +{ + /* no-op */ +} + +static void cpu_set_nofpu_opts(struct cpuinfo_mips *c) +{ + /* no-op */ +} + +#endif /* CONFIG_MIPS_FP_SUPPORT */ + +static inline unsigned long cpu_get_msa_id(void) +{ + unsigned long status, msa_id; + + status = read_c0_status(); + __enable_fpu(FPU_64BIT); + enable_msa(); + msa_id = read_msa_ir(); + disable_msa(); + write_c0_status(status); + return msa_id; +} + static int mips_dsp_disabled; static int __init dsp_disable(char *s) @@ -489,12 +517,16 @@ static void set_isa(struct cpuinfo_mips *c, unsigned int isa) switch (isa) { case MIPS_CPU_ISA_M64R2: c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2; + /* fall through */ case MIPS_CPU_ISA_M64R1: c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1; + /* fall through */ case MIPS_CPU_ISA_V: c->isa_level |= MIPS_CPU_ISA_V; + /* fall through */ case MIPS_CPU_ISA_IV: c->isa_level |= MIPS_CPU_ISA_IV; + /* fall through */ case MIPS_CPU_ISA_III: c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III; break; @@ -502,14 +534,17 @@ static void set_isa(struct cpuinfo_mips *c, unsigned int isa) /* R6 incompatible with everything else */ case MIPS_CPU_ISA_M64R6: c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6; + /* fall through */ case MIPS_CPU_ISA_M32R6: c->isa_level |= MIPS_CPU_ISA_M32R6; /* Break here so we don't add incompatible ISAs */ break; case MIPS_CPU_ISA_M32R2: c->isa_level |= MIPS_CPU_ISA_M32R2; + /* fall through */ case MIPS_CPU_ISA_M32R1: c->isa_level |= MIPS_CPU_ISA_M32R1; + /* fall through */ case MIPS_CPU_ISA_II: c->isa_level |= MIPS_CPU_ISA_II; break; @@ -1843,7 +1878,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) switch (c->processor_id & PRID_IMP_MASK) { case PRID_IMP_LOONGSON_64: /* Loongson-2/3 */ switch (c->processor_id & PRID_REV_MASK) { - case PRID_REV_LOONGSON3A_R2: + case PRID_REV_LOONGSON3A_R2_0: + case PRID_REV_LOONGSON3A_R2_1: c->cputype = CPU_LOONGSON3; __cpu_name[cpu] = "ICT Loongson-3"; set_elf_platform(cpu, "loongson3a"); diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c index 731325a61a78..72056d54a2b8 100644 --- a/arch/mips/kernel/elf.c +++ b/arch/mips/kernel/elf.c @@ -16,6 +16,8 @@ #include <asm/cpu-features.h> #include <asm/cpu-info.h> +#ifdef CONFIG_MIPS_FP_SUPPORT + /* Whether to accept legacy-NaN and 2008-NaN user binaries. */ bool mips_use_nan_legacy; bool mips_use_nan_2008; @@ -326,6 +328,8 @@ void mips_set_personality_nan(struct arch_elf_state *state) } } +#endif /* CONFIG_MIPS_FP_SUPPORT */ + int mips_elf_read_implies_exec(void *elf_ex, int exstack) { if (exstack != EXSTACK_DISABLE_X) { diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index b122cbb4aad1..2ea0ec95efe9 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c @@ -400,13 +400,13 @@ unsigned long __init arch_syscall_addr(int nr) unsigned long __init arch_syscall_addr(int nr) { #ifdef CONFIG_MIPS32_N32 - if (nr >= __NR_N32_Linux && nr <= __NR_N32_Linux + __NR_N32_Linux_syscalls) + if (nr >= __NR_N32_Linux && nr < __NR_N32_Linux + __NR_N32_Linux_syscalls) return (unsigned long)sysn32_call_table[nr - __NR_N32_Linux]; #endif - if (nr >= __NR_64_Linux && nr <= __NR_64_Linux + __NR_64_Linux_syscalls) + if (nr >= __NR_64_Linux && nr < __NR_64_Linux + __NR_64_Linux_syscalls) return (unsigned long)sys_call_table[nr - __NR_64_Linux]; #ifdef CONFIG_MIPS32_O32 - if (nr >= __NR_O32_Linux && nr <= __NR_O32_Linux + __NR_O32_Linux_syscalls) + if (nr >= __NR_O32_Linux && nr < __NR_O32_Linux + __NR_O32_Linux_syscalls) return (unsigned long)sys32_call_table[nr - __NR_O32_Linux]; #endif diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 6c257b52f57f..398b905b027d 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -553,7 +553,9 @@ NESTED(nmi_handler, PT_SIZE, sp) BUILD_HANDLER ov ov sti silent /* #12 */ BUILD_HANDLER tr tr sti silent /* #13 */ BUILD_HANDLER msa_fpe msa_fpe msa_fpe silent /* #14 */ +#ifdef CONFIG_MIPS_FP_SUPPORT BUILD_HANDLER fpe fpe fpe silent /* #15 */ +#endif BUILD_HANDLER ftlb ftlb none silent /* #16 */ BUILD_HANDLER msa msa sti silent /* #21 */ BUILD_HANDLER mdmx mdmx sti silent /* #22 */ @@ -650,9 +652,10 @@ isrdhwr: ori k1, _THREAD_MASK xori k1, _THREAD_MASK LONG_L v1, TI_TP_VALUE(k1) + .set push .set arch=r4000 eret - .set mips0 + .set pop #endif .set pop END(handle_ri_rdhwr) diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c index 046846999efd..695f55477503 100644 --- a/arch/mips/kernel/idle.c +++ b/arch/mips/kernel/idle.c @@ -101,7 +101,8 @@ static void __cpuidle au1k_wait(void) unsigned long c0status = read_c0_status() | 1; /* irqs on */ __asm__( - " .set arch=r4000 \n" + " .set push \n" + " .set arch=r4000 \n" " cache 0x14, 0(%0) \n" " cache 0x14, 32(%0) \n" " sync \n" @@ -111,7 +112,7 @@ static void __cpuidle au1k_wait(void) " nop \n" " nop \n" " nop \n" - " .set mips0 \n" + " .set pop \n" : : "r" (au1k_wait), "r" (c0status)); } @@ -183,7 +184,7 @@ void __init check_wait(void) cpu_wait = r4k_wait; break; case CPU_LOONGSON3: - if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_LOONGSON3A_R2) + if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_LOONGSON3A_R2_0) cpu_wait = r4k_wait; break; diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c index 9f85b98d24ac..d5f7362e8c24 100644 --- a/arch/mips/kernel/mips-mt.c +++ b/arch/mips/kernel/mips-mt.c @@ -119,19 +119,11 @@ void mips_mt_regdump(unsigned long mvpctl) local_irq_restore(flags); } -static int mt_opt_norps; static int mt_opt_rpsctl = -1; static int mt_opt_nblsu = -1; static int mt_opt_forceconfig7; static int mt_opt_config7 = -1; -static int __init rps_disable(char *s) -{ - mt_opt_norps = 1; - return 1; -} -__setup("norps", rps_disable); - static int __init rpsctl_set(char *str) { get_option(&str, &mt_opt_rpsctl); @@ -169,9 +161,6 @@ void mips_mt_set_cpuoptions(void) unsigned int oconfig7 = read_c0_config7(); unsigned int nconfig7 = oconfig7; - if (mt_opt_norps) { - printk("\"norps\" option deprecated: use \"rpsctl=\"\n"); - } if (mt_opt_rpsctl >= 0) { printk("34K return prediction stack override set to %d.\n", mt_opt_rpsctl); diff --git a/arch/mips/kernel/mips-r2-to-r6-emul.c b/arch/mips/kernel/mips-r2-to-r6-emul.c index eb18b186e858..cb22a558431e 100644 --- a/arch/mips/kernel/mips-r2-to-r6-emul.c +++ b/arch/mips/kernel/mips-r2-to-r6-emul.c @@ -1174,13 +1174,6 @@ repeat: fpu_emul: regs->regs[31] = r31; regs->cp0_epc = epc; - if (!used_math()) { /* First time FPU user. */ - preempt_disable(); - err = init_fpu(); - preempt_enable(); - set_used_math(); - } - lose_fpu(1); /* Save FPU state for the emulator. */ err = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 0, &fault_addr); @@ -2242,7 +2235,7 @@ fpu_emul: #ifdef CONFIG_DEBUG_FS -static int mipsr2_stats_show(struct seq_file *s, void *unused) +static int mipsr2_emul_show(struct seq_file *s, void *unused) { seq_printf(s, "Instruction\tTotal\tBDslot\n------------------------------\n"); @@ -2308,9 +2301,9 @@ static int mipsr2_stats_show(struct seq_file *s, void *unused) return 0; } -static int mipsr2_stats_clear_show(struct seq_file *s, void *unused) +static int mipsr2_clear_show(struct seq_file *s, void *unused) { - mipsr2_stats_show(s, unused); + mipsr2_emul_show(s, unused); __this_cpu_write((mipsr2emustats).movs, 0); __this_cpu_write((mipsr2bdemustats).movs, 0); @@ -2353,30 +2346,8 @@ static int mipsr2_stats_clear_show(struct seq_file *s, void *unused) return 0; } -static int mipsr2_stats_open(struct inode *inode, struct file *file) -{ - return single_open(file, mipsr2_stats_show, inode->i_private); -} - -static int mipsr2_stats_clear_open(struct inode *inode, struct file *file) -{ - return single_open(file, mipsr2_stats_clear_show, inode->i_private); -} - -static const struct file_operations mipsr2_emul_fops = { - .open = mipsr2_stats_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations mipsr2_clear_fops = { - .open = mipsr2_stats_clear_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - +DEFINE_SHOW_ATTRIBUTE(mipsr2_emul); +DEFINE_SHOW_ATTRIBUTE(mipsr2_clear); static int __init mipsr2_init_debugfs(void) { diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index d4f7fd4550e1..6829a064aac8 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -737,10 +737,9 @@ static long prepare_for_fp_mode_switch(void *unused) /* * This is icky, but we use this to simply ensure that all CPUs have * context switched, regardless of whether they were previously running - * kernel or user code. This ensures that no CPU currently has its FPU - * enabled, or is about to attempt to enable it through any path other - * than enable_restore_fp_context() which will wait appropriately for - * fp_mode_switching to be zero. + * kernel or user code. This ensures that no CPU that a mode-switching + * program may execute on keeps its FPU enabled (& in the old mode) + * throughout the mode switch. */ return 0; } @@ -829,8 +828,6 @@ int mips_set_process_fp_mode(struct task_struct *task, unsigned int value) work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL); put_online_cpus(); - wake_up_var(&task->mm->context.fp_mode_switching); - return 0; } diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index e5ba56c01ee0..ea54575255ea 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -50,25 +50,6 @@ #define CREATE_TRACE_POINTS #include <trace/events/syscalls.h> -static void init_fp_ctx(struct task_struct *target) -{ - /* If FP has been used then the target already has context */ - if (tsk_used_math(target)) - return; - - /* Begin with data registers set to all 1s... */ - memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); - - /* FCSR has been preset by `mips_set_personality_nan'. */ - - /* - * Record that the target has "used" math, such that the context - * just initialised, and any modifications made by the caller, - * aren't discarded. - */ - set_stopped_child_used_math(target); -} - /* * Called by kernel/ptrace.c when detaching.. * @@ -81,21 +62,6 @@ void ptrace_disable(struct task_struct *child) } /* - * Poke at FCSR according to its mask. Set the Cause bits even - * if a corresponding Enable bit is set. This will be noticed at - * the time the thread is switched to and SIGFPE thrown accordingly. - */ -static void ptrace_setfcr31(struct task_struct *child, u32 value) -{ - u32 fcr31; - u32 mask; - - fcr31 = child->thread.fpu.fcr31; - mask = boot_cpu_data.fpu_msk31; - child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); -} - -/* * Read a general register set. We always use the 64-bit format, even * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. * Registers are sign extended to fill the available space. @@ -151,55 +117,6 @@ int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data) return 0; } -int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) -{ - int i; - - if (!access_ok(VERIFY_WRITE, data, 33 * 8)) - return -EIO; - - if (tsk_used_math(child)) { - union fpureg *fregs = get_fpu_regs(child); - for (i = 0; i < 32; i++) - __put_user(get_fpr64(&fregs[i], 0), - i + (__u64 __user *)data); - } else { - for (i = 0; i < 32; i++) - __put_user((__u64) -1, i + (__u64 __user *) data); - } - - __put_user(child->thread.fpu.fcr31, data + 64); - __put_user(boot_cpu_data.fpu_id, data + 65); - - return 0; -} - -int ptrace_setfpregs(struct task_struct *child, __u32 __user *data) -{ - union fpureg *fregs; - u64 fpr_val; - u32 value; - int i; - - if (!access_ok(VERIFY_READ, data, 33 * 8)) - return -EIO; - - init_fp_ctx(child); - fregs = get_fpu_regs(child); - - for (i = 0; i < 32; i++) { - __get_user(fpr_val, i + (__u64 __user *)data); - set_fpr64(&fregs[i], 0, fpr_val); - } - - __get_user(value, data + 64); - ptrace_setfcr31(child, value); - - /* FIR may not be written. */ - - return 0; -} - int ptrace_get_watch_regs(struct task_struct *child, struct pt_watch_regs __user *addr) { @@ -420,6 +337,73 @@ static int gpr64_set(struct task_struct *target, #endif /* CONFIG_64BIT */ + +#ifdef CONFIG_MIPS_FP_SUPPORT + +/* + * Poke at FCSR according to its mask. Set the Cause bits even + * if a corresponding Enable bit is set. This will be noticed at + * the time the thread is switched to and SIGFPE thrown accordingly. + */ +static void ptrace_setfcr31(struct task_struct *child, u32 value) +{ + u32 fcr31; + u32 mask; + + fcr31 = child->thread.fpu.fcr31; + mask = boot_cpu_data.fpu_msk31; + child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); +} + +int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) +{ + int i; + + if (!access_ok(VERIFY_WRITE, data, 33 * 8)) + return -EIO; + + if (tsk_used_math(child)) { + union fpureg *fregs = get_fpu_regs(child); + for (i = 0; i < 32; i++) + __put_user(get_fpr64(&fregs[i], 0), + i + (__u64 __user *)data); + } else { + for (i = 0; i < 32; i++) + __put_user((__u64) -1, i + (__u64 __user *) data); + } + + __put_user(child->thread.fpu.fcr31, data + 64); + __put_user(boot_cpu_data.fpu_id, data + 65); + + return 0; +} + +int ptrace_setfpregs(struct task_struct *child, __u32 __user *data) +{ + union fpureg *fregs; + u64 fpr_val; + u32 value; + int i; + + if (!access_ok(VERIFY_READ, data, 33 * 8)) + return -EIO; + + init_fp_ctx(child); + fregs = get_fpu_regs(child); + + for (i = 0; i < 32; i++) { + __get_user(fpr_val, i + (__u64 __user *)data); + set_fpr64(&fregs[i], 0, fpr_val); + } + + __get_user(value, data + 64); + ptrace_setfcr31(child, value); + + /* FIR may not be written. */ + + return 0; +} + /* * Copy the floating-point context to the supplied NT_PRFPREG buffer, * !CONFIG_CPU_HAS_MSA variant. FP context's general register slots @@ -590,6 +574,178 @@ static int fpr_set(struct task_struct *target, return err; } +/* Copy the FP mode setting to the supplied NT_MIPS_FP_MODE buffer. */ +static int fp_mode_get(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) +{ + int fp_mode; + + fp_mode = mips_get_process_fp_mode(target); + return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &fp_mode, 0, + sizeof(fp_mode)); +} + +/* + * Copy the supplied NT_MIPS_FP_MODE buffer to the FP mode setting. + * + * We optimize for the case where `count % sizeof(int) == 0', which + * is supposed to have been guaranteed by the kernel before calling + * us, e.g. in `ptrace_regset'. We enforce that requirement, so + * that we can safely avoid preinitializing temporaries for partial + * mode writes. + */ +static int fp_mode_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int fp_mode; + int err; + + BUG_ON(count % sizeof(int)); + + if (pos + count > sizeof(fp_mode)) + return -EIO; + + err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fp_mode, 0, + sizeof(fp_mode)); + if (err) + return err; + + if (count > 0) + err = mips_set_process_fp_mode(target, fp_mode); + + return err; +} + +#endif /* CONFIG_MIPS_FP_SUPPORT */ + +#ifdef CONFIG_CPU_HAS_MSA + +struct msa_control_regs { + unsigned int fir; + unsigned int fcsr; + unsigned int msair; + unsigned int msacsr; +}; + +static int copy_pad_fprs(struct task_struct *target, + const struct user_regset *regset, + unsigned int *ppos, unsigned int *pcount, + void **pkbuf, void __user **pubuf, + unsigned int live_sz) +{ + int i, j, start, start_pad, err; + unsigned long long fill = ~0ull; + unsigned int cp_sz, pad_sz; + + cp_sz = min(regset->size, live_sz); + pad_sz = regset->size - cp_sz; + WARN_ON(pad_sz % sizeof(fill)); + + i = start = err = 0; + for (; i < NUM_FPU_REGS; i++, start += regset->size) { + err |= user_regset_copyout(ppos, pcount, pkbuf, pubuf, + &target->thread.fpu.fpr[i], + start, start + cp_sz); + + start_pad = start + cp_sz; + for (j = 0; j < (pad_sz / sizeof(fill)); j++) { + err |= user_regset_copyout(ppos, pcount, pkbuf, pubuf, + &fill, start_pad, + start_pad + sizeof(fill)); + start_pad += sizeof(fill); + } + } + + return err; +} + +static int msa_get(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) +{ + const unsigned int wr_size = NUM_FPU_REGS * regset->size; + const struct msa_control_regs ctrl_regs = { + .fir = boot_cpu_data.fpu_id, + .fcsr = target->thread.fpu.fcr31, + .msair = boot_cpu_data.msa_id, + .msacsr = target->thread.fpu.msacsr, + }; + int err; + + if (!tsk_used_math(target)) { + /* The task hasn't used FP or MSA, fill with 0xff */ + err = copy_pad_fprs(target, regset, &pos, &count, + &kbuf, &ubuf, 0); + } else if (!test_tsk_thread_flag(target, TIF_MSA_CTX_LIVE)) { + /* Copy scalar FP context, fill the rest with 0xff */ + err = copy_pad_fprs(target, regset, &pos, &count, + &kbuf, &ubuf, 8); + } else if (sizeof(target->thread.fpu.fpr[0]) == regset->size) { + /* Trivially copy the vector registers */ + err = user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &target->thread.fpu.fpr, + 0, wr_size); + } else { + /* Copy as much context as possible, fill the rest with 0xff */ + err = copy_pad_fprs(target, regset, &pos, &count, + &kbuf, &ubuf, + sizeof(target->thread.fpu.fpr[0])); + } + + err |= user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &ctrl_regs, wr_size, + wr_size + sizeof(ctrl_regs)); + return err; +} + +static int msa_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + const unsigned int wr_size = NUM_FPU_REGS * regset->size; + struct msa_control_regs ctrl_regs; + unsigned int cp_sz; + int i, err, start; + + init_fp_ctx(target); + + if (sizeof(target->thread.fpu.fpr[0]) == regset->size) { + /* Trivially copy the vector registers */ + err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.fpu.fpr, + 0, wr_size); + } else { + /* Copy as much context as possible */ + cp_sz = min_t(unsigned int, regset->size, + sizeof(target->thread.fpu.fpr[0])); + + i = start = err = 0; + for (; i < NUM_FPU_REGS; i++, start += regset->size) { + err |= user_regset_copyin(&pos, &count, &kbuf, &ubuf, + &target->thread.fpu.fpr[i], + start, start + cp_sz); + } + } + + if (!err) + err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl_regs, + wr_size, wr_size + sizeof(ctrl_regs)); + if (!err) { + target->thread.fpu.fcr31 = ctrl_regs.fcsr & ~FPU_CSR_ALL_X; + target->thread.fpu.msacsr = ctrl_regs.msacsr & ~MSA_CSR_CAUSEF; + } + + return err; +} + +#endif /* CONFIG_CPU_HAS_MSA */ + #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) /* @@ -759,57 +915,16 @@ static int dsp_active(struct task_struct *target, return cpu_has_dsp ? NUM_DSP_REGS + 1 : -ENODEV; } -/* Copy the FP mode setting to the supplied NT_MIPS_FP_MODE buffer. */ -static int fp_mode_get(struct task_struct *target, - const struct user_regset *regset, - unsigned int pos, unsigned int count, - void *kbuf, void __user *ubuf) -{ - int fp_mode; - - fp_mode = mips_get_process_fp_mode(target); - return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &fp_mode, 0, - sizeof(fp_mode)); -} - -/* - * Copy the supplied NT_MIPS_FP_MODE buffer to the FP mode setting. - * - * We optimize for the case where `count % sizeof(int) == 0', which - * is supposed to have been guaranteed by the kernel before calling - * us, e.g. in `ptrace_regset'. We enforce that requirement, so - * that we can safely avoid preinitializing temporaries for partial - * mode writes. - */ -static int fp_mode_set(struct task_struct *target, - const struct user_regset *regset, - unsigned int pos, unsigned int count, - const void *kbuf, const void __user *ubuf) -{ - int fp_mode; - int err; - - BUG_ON(count % sizeof(int)); - - if (pos + count > sizeof(fp_mode)) - return -EIO; - - err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fp_mode, 0, - sizeof(fp_mode)); - if (err) - return err; - - if (count > 0) - err = mips_set_process_fp_mode(target, fp_mode); - - return err; -} - enum mips_regset { REGSET_GPR, - REGSET_FPR, REGSET_DSP, +#ifdef CONFIG_MIPS_FP_SUPPORT + REGSET_FPR, REGSET_FP_MODE, +#endif +#ifdef CONFIG_CPU_HAS_MSA + REGSET_MSA, +#endif }; struct pt_regs_offset { @@ -907,14 +1022,6 @@ static const struct user_regset mips_regsets[] = { .get = gpr32_get, .set = gpr32_set, }, - [REGSET_FPR] = { - .core_note_type = NT_PRFPREG, - .n = ELF_NFPREG, - .size = sizeof(elf_fpreg_t), - .align = sizeof(elf_fpreg_t), - .get = fpr_get, - .set = fpr_set, - }, [REGSET_DSP] = { .core_note_type = NT_MIPS_DSP, .n = NUM_DSP_REGS + 1, @@ -924,6 +1031,15 @@ static const struct user_regset mips_regsets[] = { .set = dsp32_set, .active = dsp_active, }, +#ifdef CONFIG_MIPS_FP_SUPPORT + [REGSET_FPR] = { + .core_note_type = NT_PRFPREG, + .n = ELF_NFPREG, + .size = sizeof(elf_fpreg_t), + .align = sizeof(elf_fpreg_t), + .get = fpr_get, + .set = fpr_set, + }, [REGSET_FP_MODE] = { .core_note_type = NT_MIPS_FP_MODE, .n = 1, @@ -932,6 +1048,17 @@ static const struct user_regset mips_regsets[] = { .get = fp_mode_get, .set = fp_mode_set, }, +#endif +#ifdef CONFIG_CPU_HAS_MSA + [REGSET_MSA] = { + .core_note_type = NT_MIPS_MSA, + .n = NUM_FPU_REGS + 1, + .size = 16, + .align = 16, + .get = msa_get, + .set = msa_set, + }, +#endif }; static const struct user_regset_view user_mips_view = { @@ -955,14 +1082,6 @@ static const struct user_regset mips64_regsets[] = { .get = gpr64_get, .set = gpr64_set, }, - [REGSET_FPR] = { - .core_note_type = NT_PRFPREG, - .n = ELF_NFPREG, - .size = sizeof(elf_fpreg_t), - .align = sizeof(elf_fpreg_t), - .get = fpr_get, - .set = fpr_set, - }, [REGSET_DSP] = { .core_note_type = NT_MIPS_DSP, .n = NUM_DSP_REGS + 1, @@ -972,6 +1091,7 @@ static const struct user_regset mips64_regsets[] = { .set = dsp64_set, .active = dsp_active, }, +#ifdef CONFIG_MIPS_FP_SUPPORT [REGSET_FP_MODE] = { .core_note_type = NT_MIPS_FP_MODE, .n = 1, @@ -980,6 +1100,25 @@ static const struct user_regset mips64_regsets[] = { .get = fp_mode_get, .set = fp_mode_set, }, + [REGSET_FPR] = { + .core_note_type = NT_PRFPREG, + .n = ELF_NFPREG, + .size = sizeof(elf_fpreg_t), + .align = sizeof(elf_fpreg_t), + .get = fpr_get, + .set = fpr_set, + }, +#endif +#ifdef CONFIG_CPU_HAS_MSA + [REGSET_MSA] = { + .core_note_type = NT_MIPS_MSA, + .n = NUM_FPU_REGS + 1, + .size = 16, + .align = 16, + .get = msa_get, + .set = msa_set, + }, +#endif }; static const struct user_regset_view user_mips64_view = { @@ -1040,7 +1179,6 @@ long arch_ptrace(struct task_struct *child, long request, /* Read the word at location addr in the USER area. */ case PTRACE_PEEKUSR: { struct pt_regs *regs; - union fpureg *fregs; unsigned long tmp = 0; regs = task_pt_regs(child); @@ -1050,7 +1188,10 @@ long arch_ptrace(struct task_struct *child, long request, case 0 ... 31: tmp = regs->regs[addr]; break; - case FPR_BASE ... FPR_BASE + 31: +#ifdef CONFIG_MIPS_FP_SUPPORT + case FPR_BASE ... FPR_BASE + 31: { + union fpureg *fregs; + if (!tsk_used_math(child)) { /* FP not yet used */ tmp = -1; @@ -1072,6 +1213,15 @@ long arch_ptrace(struct task_struct *child, long request, #endif tmp = get_fpr64(&fregs[addr - FPR_BASE], 0); break; + } + case FPC_CSR: + tmp = child->thread.fpu.fcr31; + break; + case FPC_EIR: + /* implementation / version register */ + tmp = boot_cpu_data.fpu_id; + break; +#endif case PC: tmp = regs->cp0_epc; break; @@ -1092,13 +1242,6 @@ long arch_ptrace(struct task_struct *child, long request, tmp = regs->acx; break; #endif - case FPC_CSR: - tmp = child->thread.fpu.fcr31; - break; - case FPC_EIR: - /* implementation / version register */ - tmp = boot_cpu_data.fpu_id; - break; case DSP_BASE ... DSP_BASE + 5: { dspreg_t *dregs; @@ -1149,6 +1292,7 @@ long arch_ptrace(struct task_struct *child, long request, mips_syscall_is_indirect(child, regs)) mips_syscall_update_nr(child, regs); break; +#ifdef CONFIG_MIPS_FP_SUPPORT case FPR_BASE ... FPR_BASE + 31: { union fpureg *fregs = get_fpu_regs(child); @@ -1168,6 +1312,11 @@ long arch_ptrace(struct task_struct *child, long request, set_fpr64(&fregs[addr - FPR_BASE], 0, data); break; } + case FPC_CSR: + init_fp_ctx(child); + ptrace_setfcr31(child, data); + break; +#endif case PC: regs->cp0_epc = data; break; @@ -1182,10 +1331,6 @@ long arch_ptrace(struct task_struct *child, long request, regs->acx = data; break; #endif - case FPC_CSR: - init_fp_ctx(child); - ptrace_setfcr31(child, data); - break; case DSP_BASE ... DSP_BASE + 5: { dspreg_t *dregs; @@ -1221,6 +1366,7 @@ long arch_ptrace(struct task_struct *child, long request, ret = ptrace_setregs(child, datavp); break; +#ifdef CONFIG_MIPS_FP_SUPPORT case PTRACE_GETFPREGS: ret = ptrace_getfpregs(child, datavp); break; @@ -1228,7 +1374,7 @@ long arch_ptrace(struct task_struct *child, long request, case PTRACE_SETFPREGS: ret = ptrace_setfpregs(child, datavp); break; - +#endif case PTRACE_GET_THREAD_AREA: ret = put_user(task_thread_info(child)->tp_value, datalp); break; diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index bc348d44d151..2525eca9c962 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -82,7 +82,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, /* Read the word at location addr in the USER area. */ case PTRACE_PEEKUSR: { struct pt_regs *regs; - union fpureg *fregs; unsigned int tmp; regs = task_pt_regs(child); @@ -92,7 +91,10 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, case 0 ... 31: tmp = regs->regs[addr]; break; - case FPR_BASE ... FPR_BASE + 31: +#ifdef CONFIG_MIPS_FP_SUPPORT + case FPR_BASE ... FPR_BASE + 31: { + union fpureg *fregs; + if (!tsk_used_math(child)) { /* FP not yet used */ tmp = -1; @@ -111,6 +113,15 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, } tmp = get_fpr64(&fregs[addr - FPR_BASE], 0); break; + } + case FPC_CSR: + tmp = child->thread.fpu.fcr31; + break; + case FPC_EIR: + /* implementation / version register */ + tmp = boot_cpu_data.fpu_id; + break; +#endif /* CONFIG_MIPS_FP_SUPPORT */ case PC: tmp = regs->cp0_epc; break; @@ -126,13 +137,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, case MMLO: tmp = regs->lo; break; - case FPC_CSR: - tmp = child->thread.fpu.fcr31; - break; - case FPC_EIR: - /* implementation / version register */ - tmp = boot_cpu_data.fpu_id; - break; case DSP_BASE ... DSP_BASE + 5: { dspreg_t *dregs; @@ -203,6 +207,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, mips_syscall_is_indirect(child, regs)) mips_syscall_update_nr(child, regs); break; +#ifdef CONFIG_MIPS_FP_SUPPORT case FPR_BASE ... FPR_BASE + 31: { union fpureg *fregs = get_fpu_regs(child); @@ -225,6 +230,10 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, set_fpr64(&fregs[addr - FPR_BASE], 0, data); break; } + case FPC_CSR: + child->thread.fpu.fcr31 = data; + break; +#endif /* CONFIG_MIPS_FP_SUPPORT */ case PC: regs->cp0_epc = data; break; @@ -234,9 +243,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, case MMLO: regs->lo = data; break; - case FPC_CSR: - child->thread.fpu.fcr31 = data; - break; case DSP_BASE ... DSP_BASE + 5: { dspreg_t *dregs; @@ -274,6 +280,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, (struct user_pt_regs __user *) (__u64) data); break; +#ifdef CONFIG_MIPS_FP_SUPPORT case PTRACE_GETFPREGS: ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data); break; @@ -281,7 +288,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, case PTRACE_SETFPREGS: ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data); break; - +#endif case PTRACE_GET_THREAD_AREA: ret = put_user(task_thread_info(child)->tp_value, (unsigned int __user *) (unsigned long) data); diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S index 3062ba66c563..12e58053544f 100644 --- a/arch/mips/kernel/r2300_fpu.S +++ b/arch/mips/kernel/r2300_fpu.S @@ -52,64 +52,6 @@ LEAF(_restore_fp) jr ra END(_restore_fp) -/* - * Load the FPU with signalling NANS. This bit pattern we're using has - * the property that no matter whether considered as single or as double - * precision represents signaling NANS. - * - * The value to initialize fcr31 to comes in $a0. - */ - - .set push - SET_HARDFLOAT - -LEAF(_init_fpu) - mfc0 t0, CP0_STATUS - li t1, ST0_CU1 - or t0, t1 - mtc0 t0, CP0_STATUS - - ctc1 a0, fcr31 - - li t0, -1 - - mtc1 t0, $f0 - mtc1 t0, $f1 - mtc1 t0, $f2 - mtc1 t0, $f3 - mtc1 t0, $f4 - mtc1 t0, $f5 - mtc1 t0, $f6 - mtc1 t0, $f7 - mtc1 t0, $f8 - mtc1 t0, $f9 - mtc1 t0, $f10 - mtc1 t0, $f11 - mtc1 t0, $f12 - mtc1 t0, $f13 - mtc1 t0, $f14 - mtc1 t0, $f15 - mtc1 t0, $f16 - mtc1 t0, $f17 - mtc1 t0, $f18 - mtc1 t0, $f19 - mtc1 t0, $f20 - mtc1 t0, $f21 - mtc1 t0, $f22 - mtc1 t0, $f23 - mtc1 t0, $f24 - mtc1 t0, $f25 - mtc1 t0, $f26 - mtc1 t0, $f27 - mtc1 t0, $f28 - mtc1 t0, $f29 - mtc1 t0, $f30 - mtc1 t0, $f31 - jr ra - END(_init_fpu) - - .set pop - .set noreorder /** diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 8e3a6020c613..59be5c812aa2 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S @@ -86,150 +86,6 @@ LEAF(_init_msa_upper) #endif -/* - * Load the FPU with signalling NANS. This bit pattern we're using has - * the property that no matter whether considered as single or as double - * precision represents signaling NANS. - * - * The value to initialize fcr31 to comes in $a0. - */ - - .set push - SET_HARDFLOAT - -LEAF(_init_fpu) - mfc0 t0, CP0_STATUS - li t1, ST0_CU1 - or t0, t1 - mtc0 t0, CP0_STATUS - enable_fpu_hazard - - ctc1 a0, fcr31 - - li t1, -1 # SNaN - -#ifdef CONFIG_64BIT - sll t0, t0, 5 - bgez t0, 1f # 16 / 32 register mode? - - dmtc1 t1, $f1 - dmtc1 t1, $f3 - dmtc1 t1, $f5 - dmtc1 t1, $f7 - dmtc1 t1, $f9 - dmtc1 t1, $f11 - dmtc1 t1, $f13 - dmtc1 t1, $f15 - dmtc1 t1, $f17 - dmtc1 t1, $f19 - dmtc1 t1, $f21 - dmtc1 t1, $f23 - dmtc1 t1, $f25 - dmtc1 t1, $f27 - dmtc1 t1, $f29 - dmtc1 t1, $f31 -1: -#endif - -#ifdef CONFIG_CPU_MIPS32 - mtc1 t1, $f0 - mtc1 t1, $f1 - mtc1 t1, $f2 - mtc1 t1, $f3 - mtc1 t1, $f4 - mtc1 t1, $f5 - mtc1 t1, $f6 - mtc1 t1, $f7 - mtc1 t1, $f8 - mtc1 t1, $f9 - mtc1 t1, $f10 - mtc1 t1, $f11 - mtc1 t1, $f12 - mtc1 t1, $f13 - mtc1 t1, $f14 - mtc1 t1, $f15 - mtc1 t1, $f16 - mtc1 t1, $f17 - mtc1 t1, $f18 - mtc1 t1, $f19 - mtc1 t1, $f20 - mtc1 t1, $f21 - mtc1 t1, $f22 - mtc1 t1, $f23 - mtc1 t1, $f24 - mtc1 t1, $f25 - mtc1 t1, $f26 - mtc1 t1, $f27 - mtc1 t1, $f28 - mtc1 t1, $f29 - mtc1 t1, $f30 - mtc1 t1, $f31 - -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS32_R6) - .set push - .set MIPS_ISA_LEVEL_RAW - .set fp=64 - sll t0, t0, 5 # is Status.FR set? - bgez t0, 1f # no: skip setting upper 32b - - mthc1 t1, $f0 - mthc1 t1, $f1 - mthc1 t1, $f2 - mthc1 t1, $f3 - mthc1 t1, $f4 - mthc1 t1, $f5 - mthc1 t1, $f6 - mthc1 t1, $f7 - mthc1 t1, $f8 - mthc1 t1, $f9 - mthc1 t1, $f10 - mthc1 t1, $f11 - mthc1 t1, $f12 - mthc1 t1, $f13 - mthc1 t1, $f14 - mthc1 t1, $f15 - mthc1 t1, $f16 - mthc1 t1, $f17 - mthc1 t1, $f18 - mthc1 t1, $f19 - mthc1 t1, $f20 - mthc1 t1, $f21 - mthc1 t1, $f22 - mthc1 t1, $f23 - mthc1 t1, $f24 - mthc1 t1, $f25 - mthc1 t1, $f26 - mthc1 t1, $f27 - mthc1 t1, $f28 - mthc1 t1, $f29 - mthc1 t1, $f30 - mthc1 t1, $f31 -1: .set pop -#endif /* CONFIG_CPU_MIPS32_R2 || CONFIG_CPU_MIPS32_R6 */ -#else - .set MIPS_ISA_ARCH_LEVEL_RAW - dmtc1 t1, $f0 - dmtc1 t1, $f2 - dmtc1 t1, $f4 - dmtc1 t1, $f6 - dmtc1 t1, $f8 - dmtc1 t1, $f10 - dmtc1 t1, $f12 - dmtc1 t1, $f14 - dmtc1 t1, $f16 - dmtc1 t1, $f18 - dmtc1 t1, $f20 - dmtc1 t1, $f22 - dmtc1 t1, $f24 - dmtc1 t1, $f26 - dmtc1 t1, $f28 - dmtc1 t1, $f30 -#endif - jr ra - END(_init_fpu) - - .set pop /* SET_HARDFLOAT */ - .set noreorder /** diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 91d3c8c46097..d9434cd0f568 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -22,9 +22,6 @@ #include <asm/war.h> #include <asm/asm-offsets.h> -/* Highest syscall used of any syscall flavour */ -#define MAX_SYSCALL_NO __NR_O32_Linux + __NR_O32_Linux_syscalls - .align 5 NESTED(handle_sys, PT_SIZE, sp) .set noat @@ -89,7 +86,7 @@ loads_done: bnez t0, syscall_trace_entry # -> yes syscall_common: subu v0, v0, __NR_O32_Linux # check syscall number - sltiu t0, v0, __NR_O32_Linux_syscalls + 1 + sltiu t0, v0, __NR_O32_Linux_syscalls beqz t0, illegal_syscall sll t0, v0, 2 @@ -185,7 +182,7 @@ illegal_syscall: LEAF(sys_syscall) subu t0, a0, __NR_O32_Linux # check syscall number - sltiu v0, t0, __NR_O32_Linux_syscalls + 1 + sltiu v0, t0, __NR_O32_Linux_syscalls beqz t0, einval # do not recurse sll t1, t0, 2 beqz v0, einval @@ -208,248 +205,6 @@ einval: li v0, -ENOSYS jr ra END(sys_syscall) - .align 2 - .type sys_call_table, @object -EXPORT(sys_call_table) - PTR sys_syscall /* 4000 */ - PTR sys_exit - PTR __sys_fork - PTR sys_read - PTR sys_write - PTR sys_open /* 4005 */ - PTR sys_close - PTR sys_waitpid - PTR sys_creat - PTR sys_link - PTR sys_unlink /* 4010 */ - PTR sys_execve - PTR sys_chdir - PTR sys_time - PTR sys_mknod - PTR sys_chmod /* 4015 */ - PTR sys_lchown - PTR sys_ni_syscall - PTR sys_ni_syscall /* was sys_stat */ - PTR sys_lseek - PTR sys_getpid /* 4020 */ - PTR sys_mount - PTR sys_oldumount - PTR sys_setuid - PTR sys_getuid - PTR sys_stime /* 4025 */ - PTR sys_ptrace - PTR sys_alarm - PTR sys_ni_syscall /* was sys_fstat */ - PTR sys_pause - PTR sys_utime /* 4030 */ - PTR sys_ni_syscall - PTR sys_ni_syscall - PTR sys_access - PTR sys_nice - PTR sys_ni_syscall /* 4035 */ - PTR sys_sync - PTR sys_kill - PTR sys_rename - PTR sys_mkdir - PTR sys_rmdir /* 4040 */ - PTR sys_dup - PTR sysm_pipe - PTR sys_times - PTR sys_ni_syscall - PTR sys_brk /* 4045 */ - PTR sys_setgid - PTR sys_getgid - PTR sys_ni_syscall /* was signal(2) */ - PTR sys_geteuid - PTR sys_getegid /* 4050 */ - PTR sys_acct - PTR sys_umount - PTR sys_ni_syscall - PTR sys_ioctl - PTR sys_fcntl /* 4055 */ - PTR sys_ni_syscall - PTR sys_setpgid - PTR sys_ni_syscall - PTR sys_olduname - PTR sys_umask /* 4060 */ - PTR sys_chroot - PTR sys_ustat - PTR sys_dup2 - PTR sys_getppid - PTR sys_getpgrp /* 4065 */ - PTR sys_setsid - PTR sys_sigaction - PTR sys_sgetmask - PTR sys_ssetmask - PTR sys_setreuid /* 4070 */ - PTR sys_setregid - PTR sys_sigsuspend - PTR sys_sigpending - PTR sys_sethostname - PTR sys_setrlimit /* 4075 */ - PTR sys_getrlimit - PTR sys_getrusage - PTR sys_gettimeofday - PTR sys_settimeofday - PTR sys_getgroups /* 4080 */ - PTR sys_setgroups - PTR sys_ni_syscall /* old_select */ - PTR sys_symlink - PTR sys_ni_syscall /* was sys_lstat */ - PTR sys_readlink /* 4085 */ - PTR sys_uselib - PTR sys_swapon - PTR sys_reboot - PTR sys_old_readdir - PTR sys_mips_mmap /* 4090 */ - PTR sys_munmap - PTR sys_truncate - PTR sys_ftruncate - PTR sys_fchmod - PTR sys_fchown /* 4095 */ - PTR sys_getpriority - PTR sys_setpriority - PTR sys_ni_syscall - PTR sys_statfs - PTR sys_fstatfs /* 4100 */ - PTR sys_ni_syscall /* was ioperm(2) */ - PTR sys_socketcall - PTR sys_syslog - PTR sys_setitimer - PTR sys_getitimer /* 4105 */ - PTR sys_newstat - PTR sys_newlstat - PTR sys_newfstat - PTR sys_uname - PTR sys_ni_syscall /* 4110 was iopl(2) */ - PTR sys_vhangup - PTR sys_ni_syscall /* was sys_idle() */ - PTR sys_ni_syscall /* was sys_vm86 */ - PTR sys_wait4 - PTR sys_swapoff /* 4115 */ - PTR sys_sysinfo - PTR sys_ipc - PTR sys_fsync - PTR sys_sigreturn - PTR __sys_clone /* 4120 */ - PTR sys_setdomainname - PTR sys_newuname - PTR sys_ni_syscall /* sys_modify_ldt */ - PTR sys_adjtimex - PTR sys_mprotect /* 4125 */ - PTR sys_sigprocmask - PTR sys_ni_syscall /* was create_module */ - PTR sys_init_module - PTR sys_delete_module - PTR sys_ni_syscall /* 4130 was get_kernel_syms */ - PTR sys_quotactl - PTR sys_getpgid - PTR sys_fchdir - PTR sys_bdflush - PTR sys_sysfs /* 4135 */ - PTR sys_personality - PTR sys_ni_syscall /* for afs_syscall */ - PTR sys_setfsuid - PTR sys_setfsgid - PTR sys_llseek /* 4140 */ - PTR sys_getdents - PTR sys_select - PTR sys_flock - PTR sys_msync - PTR sys_readv /* 4145 */ - PTR sys_writev - PTR sys_cacheflush - PTR sys_cachectl - PTR __sys_sysmips - PTR sys_ni_syscall /* 4150 */ - PTR sys_getsid - PTR sys_fdatasync - PTR sys_sysctl - PTR sys_mlock - PTR sys_munlock /* 4155 */ - PTR sys_mlockall - PTR sys_munlockall - PTR sys_sched_setparam - PTR sys_sched_getparam - PTR sys_sched_setscheduler /* 4160 */ - PTR sys_sched_getscheduler - PTR sys_sched_yield - PTR sys_sched_get_priority_max - PTR sys_sched_get_priority_min - PTR sys_sched_rr_get_interval /* 4165 */ - PTR sys_nanosleep - PTR sys_mremap - PTR sys_accept - PTR sys_bind - PTR sys_connect /* 4170 */ - PTR sys_getpeername - PTR sys_getsockname - PTR sys_getsockopt - PTR sys_listen - PTR sys_recv /* 4175 */ - PTR sys_recvfrom - PTR sys_recvmsg - PTR sys_send - PTR sys_sendmsg - PTR sys_sendto /* 4180 */ - PTR sys_setsockopt - PTR sys_shutdown - PTR sys_socket - PTR sys_socketpair - PTR sys_setresuid /* 4185 */ - PTR sys_getresuid - PTR sys_ni_syscall /* was sys_query_module */ - PTR sys_poll - PTR sys_ni_syscall /* was nfsservctl */ - PTR sys_setresgid /* 4190 */ - PTR sys_getresgid - PTR sys_prctl - PTR sys_rt_sigreturn - PTR sys_rt_sigaction - PTR sys_rt_sigprocmask /* 4195 */ - PTR sys_rt_sigpending - PTR sys_rt_sigtimedwait - PTR sys_rt_sigqueueinfo - PTR sys_rt_sigsuspend - PTR sys_pread64 /* 4200 */ - PTR sys_pwrite64 - PTR sys_chown - PTR sys_getcwd - PTR sys_capget - PTR sys_capset /* 4205 */ - PTR sys_sigaltstack - PTR sys_sendfile - PTR sys_ni_syscall - PTR sys_ni_syscall - PTR sys_mips_mmap2 /* 4210 */ - PTR sys_truncate64 - PTR sys_ftruncate64 - PTR sys_stat64 - PTR sys_lstat64 - PTR sys_fstat64 /* 4215 */ - PTR sys_pivot_root - PTR sys_mincore - PTR sys_madvise - PTR sys_getdents64 - PTR sys_fcntl64 /* 4220 */ - PTR sys_ni_syscall - PTR sys_gettid - PTR sys_readahead - PTR sys_setxattr - PTR sys_lsetxattr /* 4225 */ - PTR sys_fsetxattr - PTR sys_getxattr - PTR sys_lgetxattr - PTR sys_fgetxattr - PTR sys_listxattr /* 4230 */ - PTR sys_llistxattr - PTR sys_flistxattr - PTR sys_removexattr - PTR sys_lremovexattr - PTR sys_fremovexattr /* 4235 */ - PTR sys_tkill - PTR sys_sendfile64 - PTR sys_futex #ifdef CONFIG_MIPS_MT_FPAFF /* * For FPU affinity scheduling on MIPS MT processors, we need to @@ -458,137 +213,13 @@ EXPORT(sys_call_table) * these hooks for the 32-bit kernel - there is no MIPS64 MT processor * atm. */ - PTR mipsmt_sys_sched_setaffinity - PTR mipsmt_sys_sched_getaffinity -#else - PTR sys_sched_setaffinity - PTR sys_sched_getaffinity /* 4240 */ +#define sys_sched_setaffinity mipsmt_sys_sched_setaffinity +#define sys_sched_getaffinity mipsmt_sys_sched_getaffinity #endif /* CONFIG_MIPS_MT_FPAFF */ - PTR sys_io_setup - PTR sys_io_destroy - PTR sys_io_getevents - PTR sys_io_submit - PTR sys_io_cancel /* 4245 */ - PTR sys_exit_group - PTR sys_lookup_dcookie - PTR sys_epoll_create - PTR sys_epoll_ctl - PTR sys_epoll_wait /* 4250 */ - PTR sys_remap_file_pages - PTR sys_set_tid_address - PTR sys_restart_syscall - PTR sys_fadvise64_64 - PTR sys_statfs64 /* 4255 */ - PTR sys_fstatfs64 - PTR sys_timer_create - PTR sys_timer_settime - PTR sys_timer_gettime - PTR sys_timer_getoverrun /* 4260 */ - PTR sys_timer_delete - PTR sys_clock_settime - PTR sys_clock_gettime - PTR sys_clock_getres - PTR sys_clock_nanosleep /* 4265 */ - PTR sys_tgkill - PTR sys_utimes - PTR sys_mbind - PTR sys_get_mempolicy - PTR sys_set_mempolicy /* 4270 */ - PTR sys_mq_open - PTR sys_mq_unlink - PTR sys_mq_timedsend - PTR sys_mq_timedreceive - PTR sys_mq_notify /* 4275 */ - PTR sys_mq_getsetattr - PTR sys_ni_syscall /* sys_vserver */ - PTR sys_waitid - PTR sys_ni_syscall /* available, was setaltroot */ - PTR sys_add_key /* 4280 */ - PTR sys_request_key - PTR sys_keyctl - PTR sys_set_thread_area - PTR sys_inotify_init - PTR sys_inotify_add_watch /* 4285 */ - PTR sys_inotify_rm_watch - PTR sys_migrate_pages - PTR sys_openat - PTR sys_mkdirat - PTR sys_mknodat /* 4290 */ - PTR sys_fchownat - PTR sys_futimesat - PTR sys_fstatat64 - PTR sys_unlinkat - PTR sys_renameat /* 4295 */ - PTR sys_linkat - PTR sys_symlinkat - PTR sys_readlinkat - PTR sys_fchmodat - PTR sys_faccessat /* 4300 */ - PTR sys_pselect6 - PTR sys_ppoll - PTR sys_unshare - PTR sys_splice - PTR sys_sync_file_range /* 4305 */ - PTR sys_tee - PTR sys_vmsplice - PTR sys_move_pages - PTR sys_set_robust_list - PTR sys_get_robust_list /* 4310 */ - PTR sys_kexec_load - PTR sys_getcpu - PTR sys_epoll_pwait - PTR sys_ioprio_set - PTR sys_ioprio_get /* 4315 */ - PTR sys_utimensat - PTR sys_signalfd - PTR sys_ni_syscall /* was timerfd */ - PTR sys_eventfd - PTR sys_fallocate /* 4320 */ - PTR sys_timerfd_create - PTR sys_timerfd_gettime - PTR sys_timerfd_settime - PTR sys_signalfd4 - PTR sys_eventfd2 /* 4325 */ - PTR sys_epoll_create1 - PTR sys_dup3 - PTR sys_pipe2 - PTR sys_inotify_init1 - PTR sys_preadv /* 4330 */ - PTR sys_pwritev - PTR sys_rt_tgsigqueueinfo - PTR sys_perf_event_open - PTR sys_accept4 - PTR sys_recvmmsg /* 4335 */ - PTR sys_fanotify_init - PTR sys_fanotify_mark - PTR sys_prlimit64 - PTR sys_name_to_handle_at - PTR sys_open_by_handle_at /* 4340 */ - PTR sys_clock_adjtime - PTR sys_syncfs - PTR sys_sendmmsg - PTR sys_setns - PTR sys_process_vm_readv /* 4345 */ - PTR sys_process_vm_writev - PTR sys_kcmp - PTR sys_finit_module - PTR sys_sched_setattr - PTR sys_sched_getattr /* 4350 */ - PTR sys_renameat2 - PTR sys_seccomp - PTR sys_getrandom - PTR sys_memfd_create - PTR sys_bpf /* 4355 */ - PTR sys_execveat - PTR sys_userfaultfd - PTR sys_membarrier - PTR sys_mlock2 - PTR sys_copy_file_range /* 4360 */ - PTR sys_preadv2 - PTR sys_pwritev2 - PTR sys_pkey_mprotect - PTR sys_pkey_alloc - PTR sys_pkey_free /* 4365 */ - PTR sys_statx - PTR sys_rseq - PTR sys_io_pgetevents + +#define __SYSCALL(nr, entry, nargs) PTR entry + .align 2 + .type sys_call_table, @object +EXPORT(sys_call_table) +#include <asm/syscall_table_32_o32.h> +#undef __SYSCALL diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S deleted file mode 100644 index 358d9599983d..000000000000 --- a/arch/mips/kernel/scall64-64.S +++ /dev/null @@ -1,444 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. - * Copyright (C) 2001 MIPS Technologies, Inc. - */ -#include <linux/errno.h> -#include <asm/asm.h> -#include <asm/asmmacro.h> -#include <asm/irqflags.h> -#include <asm/mipsregs.h> -#include <asm/regdef.h> -#include <asm/stackframe.h> -#include <asm/asm-offsets.h> -#include <asm/sysmips.h> -#include <asm/thread_info.h> -#include <asm/unistd.h> -#include <asm/war.h> - -#ifndef CONFIG_BINFMT_ELF32 -/* Neither O32 nor N32, so define handle_sys here */ -#define handle_sys64 handle_sys -#endif - - .align 5 -NESTED(handle_sys64, PT_SIZE, sp) -#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32) - /* - * When 32-bit compatibility is configured scall_o32.S - * already did this. - */ - .set noat - SAVE_SOME - TRACE_IRQS_ON_RELOAD - STI - .set at -#endif - -#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32) - ld t1, PT_EPC(sp) # skip syscall on return - daddiu t1, 4 # skip to next instruction - sd t1, PT_EPC(sp) -#endif - - sd a3, PT_R26(sp) # save a3 for syscall restarting - - li t1, _TIF_WORK_SYSCALL_ENTRY - LONG_L t0, TI_FLAGS($28) # syscall tracing enabled? - and t0, t1, t0 - bnez t0, syscall_trace_entry - -syscall_common: - dsubu t2, v0, __NR_64_Linux - sltiu t0, t2, __NR_64_Linux_syscalls + 1 - beqz t0, illegal_syscall - - dsll t0, t2, 3 # offset into table - dla t2, sys_call_table - daddu t0, t2, t0 - ld t2, (t0) # syscall routine - beqz t2, illegal_syscall - - jalr t2 # Do The Real Thing (TM) - - li t0, -EMAXERRNO - 1 # error? - sltu t0, t0, v0 - sd t0, PT_R7(sp) # set error flag - beqz t0, 1f - - ld t1, PT_R2(sp) # syscall number - dnegu v0 # error - sd t1, PT_R0(sp) # save it for syscall restarting -1: sd v0, PT_R2(sp) # result - -n64_syscall_exit: - j syscall_exit_partial - -/* ------------------------------------------------------------------------ */ - -syscall_trace_entry: - SAVE_STATIC - move a0, sp - move a1, v0 - jal syscall_trace_enter - - bltz v0, 1f # seccomp failed? Skip syscall - - RESTORE_STATIC - ld v0, PT_R2(sp) # Restore syscall (maybe modified) - ld a0, PT_R4(sp) # Restore argument registers - ld a1, PT_R5(sp) - ld a2, PT_R6(sp) - ld a3, PT_R7(sp) - ld a4, PT_R8(sp) - ld a5, PT_R9(sp) - j syscall_common - -1: j syscall_exit - -illegal_syscall: - /* This also isn't a 64-bit syscall, throw an error. */ - li v0, ENOSYS # error - sd v0, PT_R2(sp) - li t0, 1 # set error flag - sd t0, PT_R7(sp) - j n64_syscall_exit - END(handle_sys64) - - .align 3 - .type sys_call_table, @object -EXPORT(sys_call_table) - PTR sys_read /* 5000 */ - PTR sys_write - PTR sys_open - PTR sys_close - PTR sys_newstat - PTR sys_newfstat /* 5005 */ - PTR sys_newlstat - PTR sys_poll - PTR sys_lseek - PTR sys_mips_mmap - PTR sys_mprotect /* 5010 */ - PTR sys_munmap - PTR sys_brk - PTR sys_rt_sigaction - PTR sys_rt_sigprocmask - PTR sys_ioctl /* 5015 */ - PTR sys_pread64 - PTR sys_pwrite64 - PTR sys_readv - PTR sys_writev - PTR sys_access /* 5020 */ - PTR sysm_pipe - PTR sys_select - PTR sys_sched_yield - PTR sys_mremap - PTR sys_msync /* 5025 */ - PTR sys_mincore - PTR sys_madvise - PTR sys_shmget - PTR sys_shmat - PTR sys_shmctl /* 5030 */ - PTR sys_dup - PTR sys_dup2 - PTR sys_pause - PTR sys_nanosleep - PTR sys_getitimer /* 5035 */ - PTR sys_setitimer - PTR sys_alarm - PTR sys_getpid - PTR sys_sendfile64 - PTR sys_socket /* 5040 */ - PTR sys_connect - PTR sys_accept - PTR sys_sendto - PTR sys_recvfrom - PTR sys_sendmsg /* 5045 */ - PTR sys_recvmsg - PTR sys_shutdown - PTR sys_bind - PTR sys_listen - PTR sys_getsockname /* 5050 */ - PTR sys_getpeername - PTR sys_socketpair - PTR sys_setsockopt - PTR sys_getsockopt - PTR __sys_clone /* 5055 */ - PTR __sys_fork - PTR sys_execve - PTR sys_exit - PTR sys_wait4 - PTR sys_kill /* 5060 */ - PTR sys_newuname - PTR sys_semget - PTR sys_semop - PTR sys_semctl - PTR sys_shmdt /* 5065 */ - PTR sys_msgget - PTR sys_msgsnd - PTR sys_msgrcv - PTR sys_msgctl - PTR sys_fcntl /* 5070 */ - PTR sys_flock - PTR sys_fsync - PTR sys_fdatasync - PTR sys_truncate - PTR sys_ftruncate /* 5075 */ - PTR sys_getdents - PTR sys_getcwd - PTR sys_chdir - PTR sys_fchdir - PTR sys_rename /* 5080 */ - PTR sys_mkdir - PTR sys_rmdir - PTR sys_creat - PTR sys_link - PTR sys_unlink /* 5085 */ - PTR sys_symlink - PTR sys_readlink - PTR sys_chmod - PTR sys_fchmod - PTR sys_chown /* 5090 */ - PTR sys_fchown - PTR sys_lchown - PTR sys_umask - PTR sys_gettimeofday - PTR sys_getrlimit /* 5095 */ - PTR sys_getrusage - PTR sys_sysinfo - PTR sys_times - PTR sys_ptrace - PTR sys_getuid /* 5100 */ - PTR sys_syslog - PTR sys_getgid - PTR sys_setuid - PTR sys_setgid - PTR sys_geteuid /* 5105 */ - PTR sys_getegid - PTR sys_setpgid - PTR sys_getppid - PTR sys_getpgrp - PTR sys_setsid /* 5110 */ - PTR sys_setreuid - PTR sys_setregid - PTR sys_getgroups - PTR sys_setgroups - PTR sys_setresuid /* 5115 */ - PTR sys_getresuid - PTR sys_setresgid - PTR sys_getresgid - PTR sys_getpgid - PTR sys_setfsuid /* 5120 */ - PTR sys_setfsgid - PTR sys_getsid - PTR sys_capget - PTR sys_capset - PTR sys_rt_sigpending /* 5125 */ - PTR sys_rt_sigtimedwait - PTR sys_rt_sigqueueinfo - PTR sys_rt_sigsuspend - PTR sys_sigaltstack - PTR sys_utime /* 5130 */ - PTR sys_mknod - PTR sys_personality - PTR sys_ustat - PTR sys_statfs - PTR sys_fstatfs /* 5135 */ - PTR sys_sysfs - PTR sys_getpriority - PTR sys_setpriority - PTR sys_sched_setparam - PTR sys_sched_getparam /* 5140 */ - PTR sys_sched_setscheduler - PTR sys_sched_getscheduler - PTR sys_sched_get_priority_max - PTR sys_sched_get_priority_min - PTR sys_sched_rr_get_interval /* 5145 */ - PTR sys_mlock - PTR sys_munlock - PTR sys_mlockall - PTR sys_munlockall - PTR sys_vhangup /* 5150 */ - PTR sys_pivot_root - PTR sys_sysctl - PTR sys_prctl - PTR sys_adjtimex - PTR sys_setrlimit /* 5155 */ - PTR sys_chroot - PTR sys_sync - PTR sys_acct - PTR sys_settimeofday - PTR sys_mount /* 5160 */ - PTR sys_umount - PTR sys_swapon - PTR sys_swapoff - PTR sys_reboot - PTR sys_sethostname /* 5165 */ - PTR sys_setdomainname - PTR sys_ni_syscall /* was create_module */ - PTR sys_init_module - PTR sys_delete_module - PTR sys_ni_syscall /* 5170, was get_kernel_syms */ - PTR sys_ni_syscall /* was query_module */ - PTR sys_quotactl - PTR sys_ni_syscall /* was nfsservctl */ - PTR sys_ni_syscall /* res. for getpmsg */ - PTR sys_ni_syscall /* 5175 for putpmsg */ - PTR sys_ni_syscall /* res. for afs_syscall */ - PTR sys_ni_syscall /* res. for security */ - PTR sys_gettid - PTR sys_readahead - PTR sys_setxattr /* 5180 */ - PTR sys_lsetxattr - PTR sys_fsetxattr - PTR sys_getxattr - PTR sys_lgetxattr - PTR sys_fgetxattr /* 5185 */ - PTR sys_listxattr - PTR sys_llistxattr - PTR sys_flistxattr - PTR sys_removexattr - PTR sys_lremovexattr /* 5190 */ - PTR sys_fremovexattr - PTR sys_tkill - PTR sys_ni_syscall - PTR sys_futex - PTR sys_sched_setaffinity /* 5195 */ - PTR sys_sched_getaffinity - PTR sys_cacheflush - PTR sys_cachectl - PTR __sys_sysmips - PTR sys_io_setup /* 5200 */ - PTR sys_io_destroy - PTR sys_io_getevents - PTR sys_io_submit - PTR sys_io_cancel - PTR sys_exit_group /* 5205 */ - PTR sys_lookup_dcookie - PTR sys_epoll_create - PTR sys_epoll_ctl - PTR sys_epoll_wait - PTR sys_remap_file_pages /* 5210 */ - PTR sys_rt_sigreturn - PTR sys_set_tid_address - PTR sys_restart_syscall - PTR sys_semtimedop - PTR sys_fadvise64_64 /* 5215 */ - PTR sys_timer_create - PTR sys_timer_settime - PTR sys_timer_gettime - PTR sys_timer_getoverrun - PTR sys_timer_delete /* 5220 */ - PTR sys_clock_settime - PTR sys_clock_gettime - PTR sys_clock_getres - PTR sys_clock_nanosleep - PTR sys_tgkill /* 5225 */ - PTR sys_utimes - PTR sys_mbind - PTR sys_get_mempolicy - PTR sys_set_mempolicy - PTR sys_mq_open /* 5230 */ - PTR sys_mq_unlink - PTR sys_mq_timedsend - PTR sys_mq_timedreceive - PTR sys_mq_notify - PTR sys_mq_getsetattr /* 5235 */ - PTR sys_ni_syscall /* sys_vserver */ - PTR sys_waitid - PTR sys_ni_syscall /* available, was setaltroot */ - PTR sys_add_key - PTR sys_request_key /* 5240 */ - PTR sys_keyctl - PTR sys_set_thread_area - PTR sys_inotify_init - PTR sys_inotify_add_watch - PTR sys_inotify_rm_watch /* 5245 */ - PTR sys_migrate_pages - PTR sys_openat - PTR sys_mkdirat - PTR sys_mknodat - PTR sys_fchownat /* 5250 */ - PTR sys_futimesat - PTR sys_newfstatat - PTR sys_unlinkat - PTR sys_renameat - PTR sys_linkat /* 5255 */ - PTR sys_symlinkat - PTR sys_readlinkat - PTR sys_fchmodat - PTR sys_faccessat - PTR sys_pselect6 /* 5260 */ - PTR sys_ppoll - PTR sys_unshare - PTR sys_splice - PTR sys_sync_file_range - PTR sys_tee /* 5265 */ - PTR sys_vmsplice - PTR sys_move_pages - PTR sys_set_robust_list - PTR sys_get_robust_list - PTR sys_kexec_load /* 5270 */ - PTR sys_getcpu - PTR sys_epoll_pwait - PTR sys_ioprio_set - PTR sys_ioprio_get - PTR sys_utimensat /* 5275 */ - PTR sys_signalfd - PTR sys_ni_syscall /* was timerfd */ - PTR sys_eventfd - PTR sys_fallocate - PTR sys_timerfd_create /* 5280 */ - PTR sys_timerfd_gettime - PTR sys_timerfd_settime - PTR sys_signalfd4 - PTR sys_eventfd2 - PTR sys_epoll_create1 /* 5285 */ - PTR sys_dup3 - PTR sys_pipe2 - PTR sys_inotify_init1 - PTR sys_preadv - PTR sys_pwritev /* 5290 */ - PTR sys_rt_tgsigqueueinfo - PTR sys_perf_event_open - PTR sys_accept4 - PTR sys_recvmmsg - PTR sys_fanotify_init /* 5295 */ - PTR sys_fanotify_mark - PTR sys_prlimit64 - PTR sys_name_to_handle_at - PTR sys_open_by_handle_at - PTR sys_clock_adjtime /* 5300 */ - PTR sys_syncfs - PTR sys_sendmmsg - PTR sys_setns - PTR sys_process_vm_readv - PTR sys_process_vm_writev /* 5305 */ - PTR sys_kcmp - PTR sys_finit_module - PTR sys_getdents64 - PTR sys_sched_setattr - PTR sys_sched_getattr /* 5310 */ - PTR sys_renameat2 - PTR sys_seccomp - PTR sys_getrandom - PTR sys_memfd_create - PTR sys_bpf /* 5315 */ - PTR sys_execveat - PTR sys_userfaultfd - PTR sys_membarrier - PTR sys_mlock2 - PTR sys_copy_file_range /* 5320 */ - PTR sys_preadv2 - PTR sys_pwritev2 - PTR sys_pkey_mprotect - PTR sys_pkey_alloc - PTR sys_pkey_free /* 5325 */ - PTR sys_statx - PTR sys_rseq - PTR sys_io_pgetevents - .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index c65eaacc1abf..c761ddfed9e6 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -33,7 +33,7 @@ NESTED(handle_sysn32, PT_SIZE, sp) #endif dsubu t0, v0, __NR_N32_Linux # check syscall number - sltiu t0, t0, __NR_N32_Linux_syscalls + 1 + sltiu t0, t0, __NR_N32_Linux_syscalls #ifndef CONFIG_MIPS32_O32 ld t1, PT_EPC(sp) # skip syscall on return @@ -87,7 +87,7 @@ n32_syscall_trace_entry: ld a5, PT_R9(sp) dsubu t2, v0, __NR_N32_Linux # check (new) syscall number - sltiu t0, t2, __NR_N32_Linux_syscalls + 1 + sltiu t0, t2, __NR_N32_Linux_syscalls beqz t0, not_n32_scall j syscall_common @@ -101,339 +101,8 @@ not_n32_scall: END(handle_sysn32) +#define __SYSCALL(nr, entry, nargs) PTR entry .type sysn32_call_table, @object EXPORT(sysn32_call_table) - PTR sys_read /* 6000 */ - PTR sys_write - PTR sys_open - PTR sys_close - PTR sys_newstat - PTR sys_newfstat /* 6005 */ - PTR sys_newlstat - PTR sys_poll - PTR sys_lseek - PTR sys_mips_mmap - PTR sys_mprotect /* 6010 */ - PTR sys_munmap - PTR sys_brk - PTR compat_sys_rt_sigaction - PTR compat_sys_rt_sigprocmask - PTR compat_sys_ioctl /* 6015 */ - PTR sys_pread64 - PTR sys_pwrite64 - PTR compat_sys_readv - PTR compat_sys_writev - PTR sys_access /* 6020 */ - PTR sysm_pipe - PTR compat_sys_select - PTR sys_sched_yield - PTR sys_mremap - PTR sys_msync /* 6025 */ - PTR sys_mincore - PTR sys_madvise - PTR sys_shmget - PTR sys_shmat - PTR compat_sys_shmctl /* 6030 */ - PTR sys_dup - PTR sys_dup2 - PTR sys_pause - PTR compat_sys_nanosleep - PTR compat_sys_getitimer /* 6035 */ - PTR compat_sys_setitimer - PTR sys_alarm - PTR sys_getpid - PTR compat_sys_sendfile - PTR sys_socket /* 6040 */ - PTR sys_connect - PTR sys_accept - PTR sys_sendto - PTR compat_sys_recvfrom - PTR compat_sys_sendmsg /* 6045 */ - PTR compat_sys_recvmsg - PTR sys_shutdown - PTR sys_bind - PTR sys_listen - PTR sys_getsockname /* 6050 */ - PTR sys_getpeername - PTR sys_socketpair - PTR compat_sys_setsockopt - PTR compat_sys_getsockopt - PTR __sys_clone /* 6055 */ - PTR __sys_fork - PTR compat_sys_execve - PTR sys_exit - PTR compat_sys_wait4 - PTR sys_kill /* 6060 */ - PTR sys_newuname - PTR sys_semget - PTR sys_semop - PTR compat_sys_semctl - PTR sys_shmdt /* 6065 */ - PTR sys_msgget - PTR compat_sys_msgsnd - PTR compat_sys_msgrcv - PTR compat_sys_msgctl - PTR compat_sys_fcntl /* 6070 */ - PTR sys_flock - PTR sys_fsync - PTR sys_fdatasync - PTR sys_truncate - PTR sys_ftruncate /* 6075 */ - PTR compat_sys_getdents - PTR sys_getcwd - PTR sys_chdir - PTR sys_fchdir - PTR sys_rename /* 6080 */ - PTR sys_mkdir - PTR sys_rmdir - PTR sys_creat - PTR sys_link - PTR sys_unlink /* 6085 */ - PTR sys_symlink - PTR sys_readlink - PTR sys_chmod - PTR sys_fchmod - PTR sys_chown /* 6090 */ - PTR sys_fchown - PTR sys_lchown - PTR sys_umask - PTR compat_sys_gettimeofday - PTR compat_sys_getrlimit /* 6095 */ - PTR compat_sys_getrusage - PTR compat_sys_sysinfo - PTR compat_sys_times - PTR compat_sys_ptrace - PTR sys_getuid /* 6100 */ - PTR sys_syslog - PTR sys_getgid - PTR sys_setuid - PTR sys_setgid - PTR sys_geteuid /* 6105 */ - PTR sys_getegid - PTR sys_setpgid - PTR sys_getppid - PTR sys_getpgrp - PTR sys_setsid /* 6110 */ - PTR sys_setreuid - PTR sys_setregid - PTR sys_getgroups - PTR sys_setgroups - PTR sys_setresuid /* 6115 */ - PTR sys_getresuid - PTR sys_setresgid - PTR sys_getresgid - PTR sys_getpgid - PTR sys_setfsuid /* 6120 */ - PTR sys_setfsgid - PTR sys_getsid - PTR sys_capget - PTR sys_capset - PTR compat_sys_rt_sigpending /* 6125 */ - PTR compat_sys_rt_sigtimedwait - PTR compat_sys_rt_sigqueueinfo - PTR compat_sys_rt_sigsuspend - PTR compat_sys_sigaltstack - PTR compat_sys_utime /* 6130 */ - PTR sys_mknod - PTR sys_32_personality - PTR compat_sys_ustat - PTR compat_sys_statfs - PTR compat_sys_fstatfs /* 6135 */ - PTR sys_sysfs - PTR sys_getpriority - PTR sys_setpriority - PTR sys_sched_setparam - PTR sys_sched_getparam /* 6140 */ - PTR sys_sched_setscheduler - PTR sys_sched_getscheduler - PTR sys_sched_get_priority_max - PTR sys_sched_get_priority_min - PTR compat_sys_sched_rr_get_interval /* 6145 */ - PTR sys_mlock - PTR sys_munlock - PTR sys_mlockall - PTR sys_munlockall - PTR sys_vhangup /* 6150 */ - PTR sys_pivot_root - PTR compat_sys_sysctl - PTR sys_prctl - PTR compat_sys_adjtimex - PTR compat_sys_setrlimit /* 6155 */ - PTR sys_chroot - PTR sys_sync - PTR sys_acct - PTR compat_sys_settimeofday - PTR compat_sys_mount /* 6160 */ - PTR sys_umount - PTR sys_swapon - PTR sys_swapoff - PTR sys_reboot - PTR sys_sethostname /* 6165 */ - PTR sys_setdomainname - PTR sys_ni_syscall /* was create_module */ - PTR sys_init_module - PTR sys_delete_module - PTR sys_ni_syscall /* 6170, was get_kernel_syms */ - PTR sys_ni_syscall /* was query_module */ - PTR sys_quotactl - PTR sys_ni_syscall /* was nfsservctl */ - PTR sys_ni_syscall /* res. for getpmsg */ - PTR sys_ni_syscall /* 6175 for putpmsg */ - PTR sys_ni_syscall /* res. for afs_syscall */ - PTR sys_ni_syscall /* res. for security */ - PTR sys_gettid - PTR sys_readahead - PTR sys_setxattr /* 6180 */ - PTR sys_lsetxattr - PTR sys_fsetxattr - PTR sys_getxattr - PTR sys_lgetxattr - PTR sys_fgetxattr /* 6185 */ - PTR sys_listxattr - PTR sys_llistxattr - PTR sys_flistxattr - PTR sys_removexattr - PTR sys_lremovexattr /* 6190 */ - PTR sys_fremovexattr - PTR sys_tkill - PTR sys_ni_syscall - PTR compat_sys_futex - PTR compat_sys_sched_setaffinity /* 6195 */ - PTR compat_sys_sched_getaffinity - PTR sys_cacheflush - PTR sys_cachectl - PTR __sys_sysmips - PTR compat_sys_io_setup /* 6200 */ - PTR sys_io_destroy - PTR compat_sys_io_getevents - PTR compat_sys_io_submit - PTR sys_io_cancel - PTR sys_exit_group /* 6205 */ - PTR sys_lookup_dcookie - PTR sys_epoll_create - PTR sys_epoll_ctl - PTR sys_epoll_wait - PTR sys_remap_file_pages /* 6210 */ - PTR sysn32_rt_sigreturn - PTR compat_sys_fcntl64 - PTR sys_set_tid_address - PTR sys_restart_syscall - PTR compat_sys_semtimedop /* 6215 */ - PTR sys_fadvise64_64 - PTR compat_sys_statfs64 - PTR compat_sys_fstatfs64 - PTR sys_sendfile64 - PTR compat_sys_timer_create /* 6220 */ - PTR compat_sys_timer_settime - PTR compat_sys_timer_gettime - PTR sys_timer_getoverrun - PTR sys_timer_delete - PTR compat_sys_clock_settime /* 6225 */ - PTR compat_sys_clock_gettime - PTR compat_sys_clock_getres - PTR compat_sys_clock_nanosleep - PTR sys_tgkill - PTR compat_sys_utimes /* 6230 */ - PTR compat_sys_mbind - PTR compat_sys_get_mempolicy - PTR compat_sys_set_mempolicy - PTR compat_sys_mq_open - PTR sys_mq_unlink /* 6235 */ - PTR compat_sys_mq_timedsend - PTR compat_sys_mq_timedreceive - PTR compat_sys_mq_notify - PTR compat_sys_mq_getsetattr - PTR sys_ni_syscall /* 6240, sys_vserver */ - PTR compat_sys_waitid - PTR sys_ni_syscall /* available, was setaltroot */ - PTR sys_add_key - PTR sys_request_key - PTR compat_sys_keyctl /* 6245 */ - PTR sys_set_thread_area - PTR sys_inotify_init - PTR sys_inotify_add_watch - PTR sys_inotify_rm_watch - PTR compat_sys_migrate_pages /* 6250 */ - PTR sys_openat - PTR sys_mkdirat - PTR sys_mknodat - PTR sys_fchownat - PTR compat_sys_futimesat /* 6255 */ - PTR sys_newfstatat - PTR sys_unlinkat - PTR sys_renameat - PTR sys_linkat - PTR sys_symlinkat /* 6260 */ - PTR sys_readlinkat - PTR sys_fchmodat - PTR sys_faccessat - PTR compat_sys_pselect6 - PTR compat_sys_ppoll /* 6265 */ - PTR sys_unshare - PTR sys_splice - PTR sys_sync_file_range - PTR sys_tee - PTR compat_sys_vmsplice /* 6270 */ - PTR compat_sys_move_pages - PTR compat_sys_set_robust_list - PTR compat_sys_get_robust_list - PTR compat_sys_kexec_load - PTR sys_getcpu /* 6275 */ - PTR compat_sys_epoll_pwait - PTR sys_ioprio_set - PTR sys_ioprio_get - PTR compat_sys_utimensat - PTR compat_sys_signalfd /* 6280 */ - PTR sys_ni_syscall /* was timerfd */ - PTR sys_eventfd - PTR sys_fallocate - PTR sys_timerfd_create - PTR compat_sys_timerfd_gettime /* 6285 */ - PTR compat_sys_timerfd_settime - PTR compat_sys_signalfd4 - PTR sys_eventfd2 - PTR sys_epoll_create1 - PTR sys_dup3 /* 6290 */ - PTR sys_pipe2 - PTR sys_inotify_init1 - PTR compat_sys_preadv - PTR compat_sys_pwritev - PTR compat_sys_rt_tgsigqueueinfo /* 6295 */ - PTR sys_perf_event_open - PTR sys_accept4 - PTR compat_sys_recvmmsg - PTR sys_getdents64 - PTR sys_fanotify_init /* 6300 */ - PTR sys_fanotify_mark - PTR sys_prlimit64 - PTR sys_name_to_handle_at - PTR sys_open_by_handle_at - PTR compat_sys_clock_adjtime /* 6305 */ - PTR sys_syncfs - PTR compat_sys_sendmmsg - PTR sys_setns - PTR compat_sys_process_vm_readv - PTR compat_sys_process_vm_writev /* 6310 */ - PTR sys_kcmp - PTR sys_finit_module - PTR sys_sched_setattr - PTR sys_sched_getattr - PTR sys_renameat2 /* 6315 */ - PTR sys_seccomp - PTR sys_getrandom - PTR sys_memfd_create - PTR sys_bpf - PTR compat_sys_execveat /* 6320 */ - PTR sys_userfaultfd - PTR sys_membarrier - PTR sys_mlock2 - PTR sys_copy_file_range - PTR compat_sys_preadv2 /* 6325 */ - PTR compat_sys_pwritev2 - PTR sys_pkey_mprotect - PTR sys_pkey_alloc - PTR sys_pkey_free - PTR sys_statx /* 6330 */ - PTR sys_rseq - PTR compat_sys_io_pgetevents - .size sysn32_call_table,.-sysn32_call_table +#include <asm/syscall_table_64_n32.h> +#undef __SYSCALL diff --git a/arch/mips/kernel/scall64-n64.S b/arch/mips/kernel/scall64-n64.S new file mode 100644 index 000000000000..727fb8a1b0eb --- /dev/null +++ b/arch/mips/kernel/scall64-n64.S @@ -0,0 +1,117 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle + * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 2001 MIPS Technologies, Inc. + */ +#include <linux/errno.h> +#include <asm/asm.h> +#include <asm/asmmacro.h> +#include <asm/irqflags.h> +#include <asm/mipsregs.h> +#include <asm/regdef.h> +#include <asm/stackframe.h> +#include <asm/asm-offsets.h> +#include <asm/sysmips.h> +#include <asm/thread_info.h> +#include <asm/unistd.h> +#include <asm/war.h> + +#ifndef CONFIG_BINFMT_ELF32 +/* Neither O32 nor N32, so define handle_sys here */ +#define handle_sys64 handle_sys +#endif + + .align 5 +NESTED(handle_sys64, PT_SIZE, sp) +#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32) + /* + * When 32-bit compatibility is configured scall_o32.S + * already did this. + */ + .set noat + SAVE_SOME + TRACE_IRQS_ON_RELOAD + STI + .set at +#endif + +#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32) + ld t1, PT_EPC(sp) # skip syscall on return + daddiu t1, 4 # skip to next instruction + sd t1, PT_EPC(sp) +#endif + + sd a3, PT_R26(sp) # save a3 for syscall restarting + + li t1, _TIF_WORK_SYSCALL_ENTRY + LONG_L t0, TI_FLAGS($28) # syscall tracing enabled? + and t0, t1, t0 + bnez t0, syscall_trace_entry + +syscall_common: + dsubu t2, v0, __NR_64_Linux + sltiu t0, t2, __NR_64_Linux_syscalls + beqz t0, illegal_syscall + + dsll t0, t2, 3 # offset into table + dla t2, sys_call_table + daddu t0, t2, t0 + ld t2, (t0) # syscall routine + beqz t2, illegal_syscall + + jalr t2 # Do The Real Thing (TM) + + li t0, -EMAXERRNO - 1 # error? + sltu t0, t0, v0 + sd t0, PT_R7(sp) # set error flag + beqz t0, 1f + + ld t1, PT_R2(sp) # syscall number + dnegu v0 # error + sd t1, PT_R0(sp) # save it for syscall restarting +1: sd v0, PT_R2(sp) # result + +n64_syscall_exit: + j syscall_exit_partial + +/* ------------------------------------------------------------------------ */ + +syscall_trace_entry: + SAVE_STATIC + move a0, sp + move a1, v0 + jal syscall_trace_enter + + bltz v0, 1f # seccomp failed? Skip syscall + + RESTORE_STATIC + ld v0, PT_R2(sp) # Restore syscall (maybe modified) + ld a0, PT_R4(sp) # Restore argument registers + ld a1, PT_R5(sp) + ld a2, PT_R6(sp) + ld a3, PT_R7(sp) + ld a4, PT_R8(sp) + ld a5, PT_R9(sp) + j syscall_common + +1: j syscall_exit + +illegal_syscall: + /* This also isn't a 64-bit syscall, throw an error. */ + li v0, ENOSYS # error + sd v0, PT_R2(sp) + li t0, 1 # set error flag + sd t0, PT_R7(sp) + j n64_syscall_exit + END(handle_sys64) + +#define __SYSCALL(nr, entry, nargs) PTR entry + .align 3 + .type sys_call_table, @object +EXPORT(sys_call_table) +#include <asm/syscall_table_64_n64.h> +#undef __SYSCALL diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 73913f072e39..f158c5894a9a 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -34,7 +34,7 @@ NESTED(handle_sys, PT_SIZE, sp) ld t1, PT_EPC(sp) # skip syscall on return dsubu t0, v0, __NR_O32_Linux # check syscall number - sltiu t0, t0, __NR_O32_Linux_syscalls + 1 + sltiu t0, t0, __NR_O32_Linux_syscalls daddiu t1, 4 # skip to next instruction sd t1, PT_EPC(sp) beqz t0, not_o32_scall @@ -144,7 +144,7 @@ trace_a_syscall: ld a7, PT_R11(sp) # For indirect syscalls dsubu t0, v0, __NR_O32_Linux # check (new) syscall number - sltiu t0, t0, __NR_O32_Linux_syscalls + 1 + sltiu t0, t0, __NR_O32_Linux_syscalls beqz t0, not_o32_scall j syscall_common @@ -193,7 +193,7 @@ not_o32_scall: LEAF(sys32_syscall) subu t0, a0, __NR_O32_Linux # check syscall number - sltiu v0, t0, __NR_O32_Linux_syscalls + 1 + sltiu v0, t0, __NR_O32_Linux_syscalls beqz t0, einval # do not recurse dsll t1, t0, 3 beqz v0, einval @@ -213,376 +213,9 @@ einval: li v0, -ENOSYS jr ra END(sys32_syscall) +#define __SYSCALL(nr, entry, nargs) PTR entry .align 3 .type sys32_call_table,@object EXPORT(sys32_call_table) - PTR sys32_syscall /* 4000 */ - PTR sys_exit - PTR __sys_fork - PTR sys_read - PTR sys_write - PTR compat_sys_open /* 4005 */ - PTR sys_close - PTR sys_waitpid - PTR sys_creat - PTR sys_link - PTR sys_unlink /* 4010 */ - PTR compat_sys_execve - PTR sys_chdir - PTR compat_sys_time - PTR sys_mknod - PTR sys_chmod /* 4015 */ - PTR sys_lchown - PTR sys_ni_syscall - PTR sys_ni_syscall /* was sys_stat */ - PTR sys_lseek - PTR sys_getpid /* 4020 */ - PTR compat_sys_mount - PTR sys_oldumount - PTR sys_setuid - PTR sys_getuid - PTR compat_sys_stime /* 4025 */ - PTR compat_sys_ptrace - PTR sys_alarm - PTR sys_ni_syscall /* was sys_fstat */ - PTR sys_pause - PTR compat_sys_utime /* 4030 */ - PTR sys_ni_syscall - PTR sys_ni_syscall - PTR sys_access - PTR sys_nice - PTR sys_ni_syscall /* 4035 */ - PTR sys_sync - PTR sys_kill - PTR sys_rename - PTR sys_mkdir - PTR sys_rmdir /* 4040 */ - PTR sys_dup - PTR sysm_pipe - PTR compat_sys_times - PTR sys_ni_syscall - PTR sys_brk /* 4045 */ - PTR sys_setgid - PTR sys_getgid - PTR sys_ni_syscall /* was signal 2 */ - PTR sys_geteuid - PTR sys_getegid /* 4050 */ - PTR sys_acct - PTR sys_umount - PTR sys_ni_syscall - PTR compat_sys_ioctl - PTR compat_sys_fcntl /* 4055 */ - PTR sys_ni_syscall - PTR sys_setpgid - PTR sys_ni_syscall - PTR sys_olduname - PTR sys_umask /* 4060 */ - PTR sys_chroot - PTR compat_sys_ustat - PTR sys_dup2 - PTR sys_getppid - PTR sys_getpgrp /* 4065 */ - PTR sys_setsid - PTR sys_32_sigaction - PTR sys_sgetmask - PTR sys_ssetmask - PTR sys_setreuid /* 4070 */ - PTR sys_setregid - PTR sys32_sigsuspend - PTR compat_sys_sigpending - PTR sys_sethostname - PTR compat_sys_setrlimit /* 4075 */ - PTR compat_sys_getrlimit - PTR compat_sys_getrusage - PTR compat_sys_gettimeofday - PTR compat_sys_settimeofday - PTR sys_getgroups /* 4080 */ - PTR sys_setgroups - PTR sys_ni_syscall /* old_select */ - PTR sys_symlink - PTR sys_ni_syscall /* was sys_lstat */ - PTR sys_readlink /* 4085 */ - PTR sys_uselib - PTR sys_swapon - PTR sys_reboot - PTR compat_sys_old_readdir - PTR sys_mips_mmap /* 4090 */ - PTR sys_munmap - PTR compat_sys_truncate - PTR compat_sys_ftruncate - PTR sys_fchmod - PTR sys_fchown /* 4095 */ - PTR sys_getpriority - PTR sys_setpriority - PTR sys_ni_syscall - PTR compat_sys_statfs - PTR compat_sys_fstatfs /* 4100 */ - PTR sys_ni_syscall /* sys_ioperm */ - PTR compat_sys_socketcall - PTR sys_syslog - PTR compat_sys_setitimer - PTR compat_sys_getitimer /* 4105 */ - PTR compat_sys_newstat - PTR compat_sys_newlstat - PTR compat_sys_newfstat - PTR sys_uname - PTR sys_ni_syscall /* sys_ioperm *//* 4110 */ - PTR sys_vhangup - PTR sys_ni_syscall /* was sys_idle */ - PTR sys_ni_syscall /* sys_vm86 */ - PTR compat_sys_wait4 - PTR sys_swapoff /* 4115 */ - PTR compat_sys_sysinfo - PTR compat_sys_ipc - PTR sys_fsync - PTR sys32_sigreturn - PTR __sys_clone /* 4120 */ - PTR sys_setdomainname - PTR sys_newuname - PTR sys_ni_syscall /* sys_modify_ldt */ - PTR compat_sys_adjtimex - PTR sys_mprotect /* 4125 */ - PTR compat_sys_sigprocmask - PTR sys_ni_syscall /* was creat_module */ - PTR sys_init_module - PTR sys_delete_module - PTR sys_ni_syscall /* 4130, get_kernel_syms */ - PTR sys_quotactl - PTR sys_getpgid - PTR sys_fchdir - PTR sys_bdflush - PTR sys_sysfs /* 4135 */ - PTR sys_32_personality - PTR sys_ni_syscall /* for afs_syscall */ - PTR sys_setfsuid - PTR sys_setfsgid - PTR sys_32_llseek /* 4140 */ - PTR compat_sys_getdents - PTR compat_sys_select - PTR sys_flock - PTR sys_msync - PTR compat_sys_readv /* 4145 */ - PTR compat_sys_writev - PTR sys_cacheflush - PTR sys_cachectl - PTR __sys_sysmips - PTR sys_ni_syscall /* 4150 */ - PTR sys_getsid - PTR sys_fdatasync - PTR compat_sys_sysctl - PTR sys_mlock - PTR sys_munlock /* 4155 */ - PTR sys_mlockall - PTR sys_munlockall - PTR sys_sched_setparam - PTR sys_sched_getparam - PTR sys_sched_setscheduler /* 4160 */ - PTR sys_sched_getscheduler - PTR sys_sched_yield - PTR sys_sched_get_priority_max - PTR sys_sched_get_priority_min - PTR compat_sys_sched_rr_get_interval /* 4165 */ - PTR compat_sys_nanosleep - PTR sys_mremap - PTR sys_accept - PTR sys_bind - PTR sys_connect /* 4170 */ - PTR sys_getpeername - PTR sys_getsockname - PTR compat_sys_getsockopt - PTR sys_listen - PTR compat_sys_recv /* 4175 */ - PTR compat_sys_recvfrom - PTR compat_sys_recvmsg - PTR sys_send - PTR compat_sys_sendmsg - PTR sys_sendto /* 4180 */ - PTR compat_sys_setsockopt - PTR sys_shutdown - PTR sys_socket - PTR sys_socketpair - PTR sys_setresuid /* 4185 */ - PTR sys_getresuid - PTR sys_ni_syscall /* was query_module */ - PTR sys_poll - PTR sys_ni_syscall /* was nfsservctl */ - PTR sys_setresgid /* 4190 */ - PTR sys_getresgid - PTR sys_prctl - PTR sys32_rt_sigreturn - PTR compat_sys_rt_sigaction - PTR compat_sys_rt_sigprocmask /* 4195 */ - PTR compat_sys_rt_sigpending - PTR compat_sys_rt_sigtimedwait - PTR compat_sys_rt_sigqueueinfo - PTR compat_sys_rt_sigsuspend - PTR sys_32_pread /* 4200 */ - PTR sys_32_pwrite - PTR sys_chown - PTR sys_getcwd - PTR sys_capget - PTR sys_capset /* 4205 */ - PTR compat_sys_sigaltstack - PTR compat_sys_sendfile - PTR sys_ni_syscall - PTR sys_ni_syscall - PTR sys_mips_mmap2 /* 4210 */ - PTR sys_32_truncate64 - PTR sys_32_ftruncate64 - PTR sys_newstat - PTR sys_newlstat - PTR sys_newfstat /* 4215 */ - PTR sys_pivot_root - PTR sys_mincore - PTR sys_madvise - PTR sys_getdents64 - PTR compat_sys_fcntl64 /* 4220 */ - PTR sys_ni_syscall - PTR sys_gettid - PTR sys32_readahead - PTR sys_setxattr - PTR sys_lsetxattr /* 4225 */ - PTR sys_fsetxattr - PTR sys_getxattr - PTR sys_lgetxattr - PTR sys_fgetxattr - PTR sys_listxattr /* 4230 */ - PTR sys_llistxattr - PTR sys_flistxattr - PTR sys_removexattr - PTR sys_lremovexattr - PTR sys_fremovexattr /* 4235 */ - PTR sys_tkill - PTR sys_sendfile64 - PTR compat_sys_futex - PTR compat_sys_sched_setaffinity - PTR compat_sys_sched_getaffinity /* 4240 */ - PTR compat_sys_io_setup - PTR sys_io_destroy - PTR compat_sys_io_getevents - PTR compat_sys_io_submit - PTR sys_io_cancel /* 4245 */ - PTR sys_exit_group - PTR compat_sys_lookup_dcookie - PTR sys_epoll_create - PTR sys_epoll_ctl - PTR sys_epoll_wait /* 4250 */ - PTR sys_remap_file_pages - PTR sys_set_tid_address - PTR sys_restart_syscall - PTR sys32_fadvise64_64 - PTR compat_sys_statfs64 /* 4255 */ - PTR compat_sys_fstatfs64 - PTR compat_sys_timer_create - PTR compat_sys_timer_settime - PTR compat_sys_timer_gettime - PTR sys_timer_getoverrun /* 4260 */ - PTR sys_timer_delete - PTR compat_sys_clock_settime - PTR compat_sys_clock_gettime - PTR compat_sys_clock_getres - PTR compat_sys_clock_nanosleep /* 4265 */ - PTR sys_tgkill - PTR compat_sys_utimes - PTR compat_sys_mbind - PTR compat_sys_get_mempolicy - PTR compat_sys_set_mempolicy /* 4270 */ - PTR compat_sys_mq_open - PTR sys_mq_unlink - PTR compat_sys_mq_timedsend - PTR compat_sys_mq_timedreceive - PTR compat_sys_mq_notify /* 4275 */ - PTR compat_sys_mq_getsetattr - PTR sys_ni_syscall /* sys_vserver */ - PTR compat_sys_waitid - PTR sys_ni_syscall /* available, was setaltroot */ - PTR sys_add_key /* 4280 */ - PTR sys_request_key - PTR compat_sys_keyctl - PTR sys_set_thread_area - PTR sys_inotify_init - PTR sys_inotify_add_watch /* 4285 */ - PTR sys_inotify_rm_watch - PTR compat_sys_migrate_pages - PTR compat_sys_openat - PTR sys_mkdirat - PTR sys_mknodat /* 4290 */ - PTR sys_fchownat - PTR compat_sys_futimesat - PTR sys_newfstatat - PTR sys_unlinkat - PTR sys_renameat /* 4295 */ - PTR sys_linkat - PTR sys_symlinkat - PTR sys_readlinkat - PTR sys_fchmodat - PTR sys_faccessat /* 4300 */ - PTR compat_sys_pselect6 - PTR compat_sys_ppoll - PTR sys_unshare - PTR sys_splice - PTR sys32_sync_file_range /* 4305 */ - PTR sys_tee - PTR compat_sys_vmsplice - PTR compat_sys_move_pages - PTR compat_sys_set_robust_list - PTR compat_sys_get_robust_list /* 4310 */ - PTR compat_sys_kexec_load - PTR sys_getcpu - PTR compat_sys_epoll_pwait - PTR sys_ioprio_set - PTR sys_ioprio_get /* 4315 */ - PTR compat_sys_utimensat - PTR compat_sys_signalfd - PTR sys_ni_syscall /* was timerfd */ - PTR sys_eventfd - PTR sys32_fallocate /* 4320 */ - PTR sys_timerfd_create - PTR compat_sys_timerfd_gettime - PTR compat_sys_timerfd_settime - PTR compat_sys_signalfd4 - PTR sys_eventfd2 /* 4325 */ - PTR sys_epoll_create1 - PTR sys_dup3 - PTR sys_pipe2 - PTR sys_inotify_init1 - PTR compat_sys_preadv /* 4330 */ - PTR compat_sys_pwritev - PTR compat_sys_rt_tgsigqueueinfo - PTR sys_perf_event_open - PTR sys_accept4 - PTR compat_sys_recvmmsg /* 4335 */ - PTR sys_fanotify_init - PTR compat_sys_fanotify_mark - PTR sys_prlimit64 - PTR sys_name_to_handle_at - PTR compat_sys_open_by_handle_at /* 4340 */ - PTR compat_sys_clock_adjtime - PTR sys_syncfs - PTR compat_sys_sendmmsg - PTR sys_setns - PTR compat_sys_process_vm_readv /* 4345 */ - PTR compat_sys_process_vm_writev - PTR sys_kcmp - PTR sys_finit_module - PTR sys_sched_setattr - PTR sys_sched_getattr /* 4350 */ - PTR sys_renameat2 - PTR sys_seccomp - PTR sys_getrandom - PTR sys_memfd_create - PTR sys_bpf /* 4355 */ - PTR compat_sys_execveat - PTR sys_userfaultfd - PTR sys_membarrier - PTR sys_mlock2 - PTR sys_copy_file_range /* 4360 */ - PTR compat_sys_preadv2 - PTR compat_sys_pwritev2 - PTR sys_pkey_mprotect - PTR sys_pkey_alloc - PTR sys_pkey_free /* 4365 */ - PTR sys_statx - PTR sys_rseq - PTR compat_sys_io_pgetevents - .size sys32_call_table,.-sys32_call_table +#include <asm/syscall_table_64_o32.h> +#undef __SYSCALL diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 109ed163a6a6..d3a23758592c 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c @@ -62,6 +62,8 @@ struct rt_sigframe { struct ucontext rs_uc; }; +#ifdef CONFIG_MIPS_FP_SUPPORT + /* * Thread saved context copy to/from a signal context presumed to be on the * user stack, and therefore accessed with appropriate macros from uaccess.h. @@ -104,6 +106,20 @@ static int copy_fp_from_sigcontext(void __user *sc) return err; } +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +static int copy_fp_to_sigcontext(void __user *sc) +{ + return 0; +} + +static int copy_fp_from_sigcontext(void __user *sc) +{ + return 0; +} + +#endif /* !CONFIG_MIPS_FP_SUPPORT */ + /* * Wrappers for the assembly _{save,restore}_fp_context functions. */ @@ -142,6 +158,8 @@ static inline void __user *sc_to_extcontext(void __user *sc) return &uc->uc_extcontext; } +#ifdef CONFIG_CPU_HAS_MSA + static int save_msa_extcontext(void __user *buf) { struct msa_extcontext __user *msa = buf; @@ -195,9 +213,6 @@ static int restore_msa_extcontext(void __user *buf, unsigned int size) unsigned int csr; int i, err; - if (!IS_ENABLED(CONFIG_CPU_HAS_MSA)) - return SIGSYS; - if (size != sizeof(*msa)) return -EINVAL; @@ -234,6 +249,20 @@ static int restore_msa_extcontext(void __user *buf, unsigned int size) return err; } +#else /* !CONFIG_CPU_HAS_MSA */ + +static int save_msa_extcontext(void __user *buf) +{ + return 0; +} + +static int restore_msa_extcontext(void __user *buf, unsigned int size) +{ + return SIGSYS; +} + +#endif /* !CONFIG_CPU_HAS_MSA */ + static int save_extcontext(void __user *buf) { int sz; @@ -880,7 +909,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused, user_enter(); } -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS_FP_SUPPORT) static int smp_save_fp_context(void __user *sc) { return raw_cpu_has_fpu @@ -908,7 +937,7 @@ static int signal_setup(void) (offsetof(struct rt_sigframe, rs_uc.uc_extcontext) - offsetof(struct rt_sigframe, rs_uc.uc_mcontext))); -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) && defined(CONFIG_MIPS_FP_SUPPORT) /* For now just do the cpu_has_fpu check when the functions are invoked */ save_fp_context = smp_save_fp_context; restore_fp_context = smp_restore_fp_context; diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 69c17b549fd3..41a0db08cd37 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -106,6 +106,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__ ( + " .set push \n" " .set arch=r4000 \n" " li %[err], 0 \n" "1: ll %[old], (%[addr]) \n" @@ -122,7 +123,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) " "STR(PTR)" 1b, 4b \n" " "STR(PTR)" 2b, 4b \n" " .previous \n" - " .set mips0 \n" + " .set pop \n" : [old] "=&r" (old), [err] "=&r" (err), [tmp] "=&r" (tmp) @@ -132,6 +133,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__ ( + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " li %[err], 0 \n" "1: \n" @@ -150,7 +152,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) " "STR(PTR)" 1b, 5b \n" " "STR(PTR)" 2b, 5b \n" " .previous \n" - " .set mips0 \n" + " .set pop \n" : [old] "=&r" (old), [err] "=&r" (err), [tmp] "=&r" (tmp) diff --git a/arch/mips/kernel/syscalls/Makefile b/arch/mips/kernel/syscalls/Makefile new file mode 100644 index 000000000000..a3d4bec695c6 --- /dev/null +++ b/arch/mips/kernel/syscalls/Makefile @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: GPL-2.0 +kapi := arch/$(SRCARCH)/include/generated/asm +uapi := arch/$(SRCARCH)/include/generated/uapi/asm + +_dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)') \ + $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)') + +syscalln32 := $(srctree)/$(src)/syscall_n32.tbl +syscalln64 := $(srctree)/$(src)/syscall_n64.tbl +syscallo32 := $(srctree)/$(src)/syscall_o32.tbl +syshdr := $(srctree)/$(src)/syscallhdr.sh +sysnr := $(srctree)/$(src)/syscallnr.sh +systbl := $(srctree)/$(src)/syscalltbl.sh + +quiet_cmd_syshdr = SYSHDR $@ + cmd_syshdr = $(CONFIG_SHELL) '$(syshdr)' '$<' '$@' \ + '$(syshdr_abis_$(basetarget))' \ + '$(syshdr_pfx_$(basetarget))' \ + '$(syshdr_offset_$(basetarget))' + +quiet_cmd_sysnr = SYSNR $@ + cmd_sysnr = $(CONFIG_SHELL) '$(sysnr)' '$<' '$@' \ + '$(sysnr_abis_$(basetarget))' \ + '$(sysnr_pfx_$(basetarget))' \ + '$(sysnr_offset_$(basetarget))' + +quiet_cmd_systbl = SYSTBL $@ + cmd_systbl = $(CONFIG_SHELL) '$(systbl)' '$<' '$@' \ + '$(systbl_abis_$(basetarget))' \ + '$(systbl_abi_$(basetarget))' \ + '$(systbl_offset_$(basetarget))' + +syshdr_offset_unistd_n32 := __NR_Linux +$(uapi)/unistd_n32.h: $(syscalln32) $(syshdr) + $(call if_changed,syshdr) + +syshdr_offset_unistd_n64 := __NR_Linux +$(uapi)/unistd_n64.h: $(syscalln64) $(syshdr) + $(call if_changed,syshdr) + +syshdr_offset_unistd_o32 := __NR_Linux +$(uapi)/unistd_o32.h: $(syscallo32) $(syshdr) + $(call if_changed,syshdr) + +sysnr_pfx_unistd_nr_n32 := N32 +sysnr_offset_unistd_nr_n32 := 6000 +$(uapi)/unistd_nr_n32.h: $(syscalln32) $(sysnr) + $(call if_changed,sysnr) + +sysnr_pfx_unistd_nr_n64 := 64 +sysnr_offset_unistd_nr_n64 := 5000 +$(uapi)/unistd_nr_n64.h: $(syscalln64) $(sysnr) + $(call if_changed,sysnr) + +sysnr_pfx_unistd_nr_o32 := O32 +sysnr_offset_unistd_nr_o32 := 4000 +$(uapi)/unistd_nr_o32.h: $(syscallo32) $(sysnr) + $(call if_changed,sysnr) + +systbl_abi_syscall_table_32_o32 := 32_o32 +systbl_offset_syscall_table_32_o32 := 4000 +$(kapi)/syscall_table_32_o32.h: $(syscallo32) $(systbl) + $(call if_changed,systbl) + +systbl_abi_syscall_table_64_n32 := 64_n32 +systbl_offset_syscall_table_64_n32 := 6000 +$(kapi)/syscall_table_64_n32.h: $(syscalln32) $(systbl) + $(call if_changed,systbl) + +systbl_abi_syscall_table_64_n64 := 64_n64 +systbl_offset_syscall_table_64_n64 := 5000 +$(kapi)/syscall_table_64_n64.h: $(syscalln64) $(systbl) + $(call if_changed,systbl) + +systbl_abi_syscall_table_64_o32 := 64_o32 +systbl_offset_syscall_table_64_o32 := 4000 +$(kapi)/syscall_table_64_o32.h: $(syscallo32) $(systbl) + $(call if_changed,systbl) + +uapisyshdr-y += unistd_n32.h \ + unistd_n64.h \ + unistd_o32.h \ + unistd_nr_n32.h \ + unistd_nr_n64.h \ + unistd_nr_o32.h +kapisyshdr-y += syscall_table_32_o32.h \ + syscall_table_64_n32.h \ + syscall_table_64_n64.h \ + syscall_table_64_o32.h + +targets += $(uapisyshdr-y) $(kapisyshdr-y) + +PHONY += all +all: $(addprefix $(uapi)/,$(uapisyshdr-y)) +all: $(addprefix $(kapi)/,$(kapisyshdr-y)) + @: diff --git a/arch/mips/kernel/syscalls/syscall_n32.tbl b/arch/mips/kernel/syscalls/syscall_n32.tbl new file mode 100644 index 000000000000..53d5862649ae --- /dev/null +++ b/arch/mips/kernel/syscalls/syscall_n32.tbl @@ -0,0 +1,343 @@ +# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note +# +# system call numbers and entry vectors for mips +# +# The format is: +# <number> <abi> <name> <entry point> <compat entry point> +# +# The <abi> is always "n32" for this file. +# +0 n32 read sys_read +1 n32 write sys_write +2 n32 open sys_open +3 n32 close sys_close +4 n32 stat sys_newstat +5 n32 fstat sys_newfstat +6 n32 lstat sys_newlstat +7 n32 poll sys_poll +8 n32 lseek sys_lseek +9 n32 mmap sys_mips_mmap +10 n32 mprotect sys_mprotect +11 n32 munmap sys_munmap +12 n32 brk sys_brk +13 n32 rt_sigaction compat_sys_rt_sigaction +14 n32 rt_sigprocmask compat_sys_rt_sigprocmask +15 n32 ioctl compat_sys_ioctl +16 n32 pread64 sys_pread64 +17 n32 pwrite64 sys_pwrite64 +18 n32 readv compat_sys_readv +19 n32 writev compat_sys_writev +20 n32 access sys_access +21 n32 pipe sysm_pipe +22 n32 _newselect compat_sys_select +23 n32 sched_yield sys_sched_yield +24 n32 mremap sys_mremap +25 n32 msync sys_msync +26 n32 mincore sys_mincore +27 n32 madvise sys_madvise +28 n32 shmget sys_shmget +29 n32 shmat sys_shmat +30 n32 shmctl compat_sys_shmctl +31 n32 dup sys_dup +32 n32 dup2 sys_dup2 +33 n32 pause sys_pause +34 n32 nanosleep compat_sys_nanosleep +35 n32 getitimer compat_sys_getitimer +36 n32 setitimer compat_sys_setitimer +37 n32 alarm sys_alarm +38 n32 getpid sys_getpid +39 n32 sendfile compat_sys_sendfile +40 n32 socket sys_socket +41 n32 connect sys_connect +42 n32 accept sys_accept +43 n32 sendto sys_sendto +44 n32 recvfrom compat_sys_recvfrom +45 n32 sendmsg compat_sys_sendmsg +46 n32 recvmsg compat_sys_recvmsg +47 n32 shutdown sys_shutdown +48 n32 bind sys_bind +49 n32 listen sys_listen +50 n32 getsockname sys_getsockname +51 n32 getpeername sys_getpeername +52 n32 socketpair sys_socketpair +53 n32 setsockopt compat_sys_setsockopt +54 n32 getsockopt compat_sys_getsockopt +55 n32 clone __sys_clone +56 n32 fork __sys_fork +57 n32 execve compat_sys_execve +58 n32 exit sys_exit +59 n32 wait4 compat_sys_wait4 +60 n32 kill sys_kill +61 n32 uname sys_newuname +62 n32 semget sys_semget +63 n32 semop sys_semop +64 n32 semctl compat_sys_semctl +65 n32 shmdt sys_shmdt +66 n32 msgget sys_msgget +67 n32 msgsnd compat_sys_msgsnd +68 n32 msgrcv compat_sys_msgrcv +69 n32 msgctl compat_sys_msgctl +70 n32 fcntl compat_sys_fcntl +71 n32 flock sys_flock +72 n32 fsync sys_fsync +73 n32 fdatasync sys_fdatasync +74 n32 truncate sys_truncate +75 n32 ftruncate sys_ftruncate +76 n32 getdents compat_sys_getdents +77 n32 getcwd sys_getcwd +78 n32 chdir sys_chdir +79 n32 fchdir sys_fchdir +80 n32 rename sys_rename +81 n32 mkdir sys_mkdir +82 n32 rmdir sys_rmdir +83 n32 creat sys_creat +84 n32 link sys_link +85 n32 unlink sys_unlink +86 n32 symlink sys_symlink +87 n32 readlink sys_readlink +88 n32 chmod sys_chmod +89 n32 fchmod sys_fchmod +90 n32 chown sys_chown +91 n32 fchown sys_fchown +92 n32 lchown sys_lchown +93 n32 umask sys_umask +94 n32 gettimeofday compat_sys_gettimeofday +95 n32 getrlimit compat_sys_getrlimit +96 n32 getrusage compat_sys_getrusage +97 n32 sysinfo compat_sys_sysinfo +98 n32 times compat_sys_times +99 n32 ptrace compat_sys_ptrace +100 n32 getuid sys_getuid +101 n32 syslog sys_syslog +102 n32 getgid sys_getgid +103 n32 setuid sys_setuid +104 n32 setgid sys_setgid +105 n32 geteuid sys_geteuid +106 n32 getegid sys_getegid +107 n32 setpgid sys_setpgid +108 n32 getppid sys_getppid +109 n32 getpgrp sys_getpgrp +110 n32 setsid sys_setsid +111 n32 setreuid sys_setreuid +112 n32 setregid sys_setregid +113 n32 getgroups sys_getgroups +114 n32 setgroups sys_setgroups +115 n32 setresuid sys_setresuid +116 n32 getresuid sys_getresuid +117 n32 setresgid sys_setresgid +118 n32 getresgid sys_getresgid +119 n32 getpgid sys_getpgid +120 n32 setfsuid sys_setfsuid +121 n32 setfsgid sys_setfsgid +122 n32 getsid sys_getsid +123 n32 capget sys_capget +124 n32 capset sys_capset +125 n32 rt_sigpending compat_sys_rt_sigpending +126 n32 rt_sigtimedwait compat_sys_rt_sigtimedwait +127 n32 rt_sigqueueinfo compat_sys_rt_sigqueueinfo +128 n32 rt_sigsuspend compat_sys_rt_sigsuspend +129 n32 sigaltstack compat_sys_sigaltstack +130 n32 utime compat_sys_utime +131 n32 mknod sys_mknod +132 n32 personality sys_32_personality +133 n32 ustat compat_sys_ustat +134 n32 statfs compat_sys_statfs +135 n32 fstatfs compat_sys_fstatfs +136 n32 sysfs sys_sysfs +137 n32 getpriority sys_getpriority +138 n32 setpriority sys_setpriority +139 n32 sched_setparam sys_sched_setparam +140 n32 sched_getparam sys_sched_getparam +141 n32 sched_setscheduler sys_sched_setscheduler +142 n32 sched_getscheduler sys_sched_getscheduler +143 n32 sched_get_priority_max sys_sched_get_priority_max +144 n32 sched_get_priority_min sys_sched_get_priority_min +145 n32 sched_rr_get_interval compat_sys_sched_rr_get_interval +146 n32 mlock sys_mlock +147 n32 munlock sys_munlock +148 n32 mlockall sys_mlockall +149 n32 munlockall sys_munlockall +150 n32 vhangup sys_vhangup +151 n32 pivot_root sys_pivot_root +152 n32 _sysctl compat_sys_sysctl +153 n32 prctl sys_prctl +154 n32 adjtimex compat_sys_adjtimex +155 n32 setrlimit compat_sys_setrlimit +156 n32 chroot sys_chroot +157 n32 sync sys_sync +158 n32 acct sys_acct +159 n32 settimeofday compat_sys_settimeofday +160 n32 mount compat_sys_mount +161 n32 umount2 sys_umount +162 n32 swapon sys_swapon +163 n32 swapoff sys_swapoff +164 n32 reboot sys_reboot +165 n32 sethostname sys_sethostname +166 n32 setdomainname sys_setdomainname +167 n32 create_module sys_ni_syscall +168 n32 init_module sys_init_module +169 n32 delete_module sys_delete_module +170 n32 get_kernel_syms sys_ni_syscall +171 n32 query_module sys_ni_syscall +172 n32 quotactl sys_quotactl +173 n32 nfsservctl sys_ni_syscall +174 n32 getpmsg sys_ni_syscall +175 n32 putpmsg sys_ni_syscall +176 n32 afs_syscall sys_ni_syscall +# 177 reserved for security +177 n32 reserved177 sys_ni_syscall +178 n32 gettid sys_gettid +179 n32 readahead sys_readahead +180 n32 setxattr sys_setxattr +181 n32 lsetxattr sys_lsetxattr +182 n32 fsetxattr sys_fsetxattr +183 n32 getxattr sys_getxattr +184 n32 lgetxattr sys_lgetxattr +185 n32 fgetxattr sys_fgetxattr +186 n32 listxattr sys_listxattr +187 n32 llistxattr sys_llistxattr +188 n32 flistxattr sys_flistxattr +189 n32 removexattr sys_removexattr +190 n32 lremovexattr sys_lremovexattr +191 n32 fremovexattr sys_fremovexattr +192 n32 tkill sys_tkill +193 n32 reserved193 sys_ni_syscall +194 n32 futex compat_sys_futex +195 n32 sched_setaffinity compat_sys_sched_setaffinity +196 n32 sched_getaffinity compat_sys_sched_getaffinity +197 n32 cacheflush sys_cacheflush +198 n32 cachectl sys_cachectl +199 n32 sysmips __sys_sysmips +200 n32 io_setup compat_sys_io_setup +201 n32 io_destroy sys_io_destroy +202 n32 io_getevents compat_sys_io_getevents +203 n32 io_submit compat_sys_io_submit +204 n32 io_cancel sys_io_cancel +205 n32 exit_group sys_exit_group +206 n32 lookup_dcookie sys_lookup_dcookie +207 n32 epoll_create sys_epoll_create +208 n32 epoll_ctl sys_epoll_ctl +209 n32 epoll_wait sys_epoll_wait +210 n32 remap_file_pages sys_remap_file_pages +211 n32 rt_sigreturn sysn32_rt_sigreturn +212 n32 fcntl64 compat_sys_fcntl64 +213 n32 set_tid_address sys_set_tid_address +214 n32 restart_syscall sys_restart_syscall +215 n32 semtimedop compat_sys_semtimedop +216 n32 fadvise64 sys_fadvise64_64 +217 n32 statfs64 compat_sys_statfs64 +218 n32 fstatfs64 compat_sys_fstatfs64 +219 n32 sendfile64 sys_sendfile64 +220 n32 timer_create compat_sys_timer_create +221 n32 timer_settime compat_sys_timer_settime +222 n32 timer_gettime compat_sys_timer_gettime +223 n32 timer_getoverrun sys_timer_getoverrun +224 n32 timer_delete sys_timer_delete +225 n32 clock_settime compat_sys_clock_settime +226 n32 clock_gettime compat_sys_clock_gettime +227 n32 clock_getres compat_sys_clock_getres +228 n32 clock_nanosleep compat_sys_clock_nanosleep +229 n32 tgkill sys_tgkill +230 n32 utimes compat_sys_utimes +231 n32 mbind compat_sys_mbind +232 n32 get_mempolicy compat_sys_get_mempolicy +233 n32 set_mempolicy compat_sys_set_mempolicy +234 n32 mq_open compat_sys_mq_open +235 n32 mq_unlink sys_mq_unlink +236 n32 mq_timedsend compat_sys_mq_timedsend +237 n32 mq_timedreceive compat_sys_mq_timedreceive +238 n32 mq_notify compat_sys_mq_notify +239 n32 mq_getsetattr compat_sys_mq_getsetattr +240 n32 vserver sys_ni_syscall +241 n32 waitid compat_sys_waitid +# 242 was sys_setaltroot +243 n32 add_key sys_add_key +244 n32 request_key sys_request_key +245 n32 keyctl compat_sys_keyctl +246 n32 set_thread_area sys_set_thread_area +247 n32 inotify_init sys_inotify_init +248 n32 inotify_add_watch sys_inotify_add_watch +249 n32 inotify_rm_watch sys_inotify_rm_watch +250 n32 migrate_pages compat_sys_migrate_pages +251 n32 openat sys_openat +252 n32 mkdirat sys_mkdirat +253 n32 mknodat sys_mknodat +254 n32 fchownat sys_fchownat +255 n32 futimesat compat_sys_futimesat +256 n32 newfstatat sys_newfstatat +257 n32 unlinkat sys_unlinkat +258 n32 renameat sys_renameat +259 n32 linkat sys_linkat +260 n32 symlinkat sys_symlinkat +261 n32 readlinkat sys_readlinkat +262 n32 fchmodat sys_fchmodat +263 n32 faccessat sys_faccessat +264 n32 pselect6 compat_sys_pselect6 +265 n32 ppoll compat_sys_ppoll +266 n32 unshare sys_unshare +267 n32 splice sys_splice +268 n32 sync_file_range sys_sync_file_range +269 n32 tee sys_tee +270 n32 vmsplice compat_sys_vmsplice +271 n32 move_pages compat_sys_move_pages +272 n32 set_robust_list compat_sys_set_robust_list +273 n32 get_robust_list compat_sys_get_robust_list +274 n32 kexec_load compat_sys_kexec_load +275 n32 getcpu sys_getcpu +276 n32 epoll_pwait compat_sys_epoll_pwait +277 n32 ioprio_set sys_ioprio_set +278 n32 ioprio_get sys_ioprio_get +279 n32 utimensat compat_sys_utimensat +280 n32 signalfd compat_sys_signalfd +281 n32 timerfd sys_ni_syscall +282 n32 eventfd sys_eventfd +283 n32 fallocate sys_fallocate +284 n32 timerfd_create sys_timerfd_create +285 n32 timerfd_gettime compat_sys_timerfd_gettime +286 n32 timerfd_settime compat_sys_timerfd_settime +287 n32 signalfd4 compat_sys_signalfd4 +288 n32 eventfd2 sys_eventfd2 +289 n32 epoll_create1 sys_epoll_create1 +290 n32 dup3 sys_dup3 +291 n32 pipe2 sys_pipe2 +292 n32 inotify_init1 sys_inotify_init1 +293 n32 preadv compat_sys_preadv +294 n32 pwritev compat_sys_pwritev +295 n32 rt_tgsigqueueinfo compat_sys_rt_tgsigqueueinfo +296 n32 perf_event_open sys_perf_event_open +297 n32 accept4 sys_accept4 +298 n32 recvmmsg compat_sys_recvmmsg +299 n32 getdents64 sys_getdents64 +300 n32 fanotify_init sys_fanotify_init +301 n32 fanotify_mark sys_fanotify_mark +302 n32 prlimit64 sys_prlimit64 +303 n32 name_to_handle_at sys_name_to_handle_at +304 n32 open_by_handle_at sys_open_by_handle_at +305 n32 clock_adjtime compat_sys_clock_adjtime +306 n32 syncfs sys_syncfs +307 n32 sendmmsg compat_sys_sendmmsg +308 n32 setns sys_setns +309 n32 process_vm_readv compat_sys_process_vm_readv +310 n32 process_vm_writev compat_sys_process_vm_writev +311 n32 kcmp sys_kcmp +312 n32 finit_module sys_finit_module +313 n32 sched_setattr sys_sched_setattr +314 n32 sched_getattr sys_sched_getattr +315 n32 renameat2 sys_renameat2 +316 n32 seccomp sys_seccomp +317 n32 getrandom sys_getrandom +318 n32 memfd_create sys_memfd_create +319 n32 bpf sys_bpf +320 n32 execveat compat_sys_execveat +321 n32 userfaultfd sys_userfaultfd +322 n32 membarrier sys_membarrier +323 n32 mlock2 sys_mlock2 +324 n32 copy_file_range sys_copy_file_range +325 n32 preadv2 compat_sys_preadv2 +326 n32 pwritev2 compat_sys_pwritev2 +327 n32 pkey_mprotect sys_pkey_mprotect +328 n32 pkey_alloc sys_pkey_alloc +329 n32 pkey_free sys_pkey_free +330 n32 statx sys_statx +331 n32 rseq sys_rseq +332 n32 io_pgetevents compat_sys_io_pgetevents diff --git a/arch/mips/kernel/syscalls/syscall_n64.tbl b/arch/mips/kernel/syscalls/syscall_n64.tbl new file mode 100644 index 000000000000..a8286ccbb66c --- /dev/null +++ b/arch/mips/kernel/syscalls/syscall_n64.tbl @@ -0,0 +1,339 @@ +# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note +# +# system call numbers and entry vectors for mips +# +# The format is: +# <number> <abi> <name> <entry point> +# +# The <abi> is always "n64" for this file. +# +0 n64 read sys_read +1 n64 write sys_write +2 n64 open sys_open +3 n64 close sys_close +4 n64 stat sys_newstat +5 n64 fstat sys_newfstat +6 n64 lstat sys_newlstat +7 n64 poll sys_poll +8 n64 lseek sys_lseek +9 n64 mmap sys_mips_mmap +10 n64 mprotect sys_mprotect +11 n64 munmap sys_munmap +12 n64 brk sys_brk +13 n64 rt_sigaction sys_rt_sigaction +14 n64 rt_sigprocmask sys_rt_sigprocmask +15 n64 ioctl sys_ioctl +16 n64 pread64 sys_pread64 +17 n64 pwrite64 sys_pwrite64 +18 n64 readv sys_readv +19 n64 writev sys_writev +20 n64 access sys_access +21 n64 pipe sysm_pipe +22 n64 _newselect sys_select +23 n64 sched_yield sys_sched_yield +24 n64 mremap sys_mremap +25 n64 msync sys_msync +26 n64 mincore sys_mincore +27 n64 madvise sys_madvise +28 n64 shmget sys_shmget +29 n64 shmat sys_shmat +30 n64 shmctl sys_shmctl +31 n64 dup sys_dup +32 n64 dup2 sys_dup2 +33 n64 pause sys_pause +34 n64 nanosleep sys_nanosleep +35 n64 getitimer sys_getitimer +36 n64 setitimer sys_setitimer +37 n64 alarm sys_alarm +38 n64 getpid sys_getpid +39 n64 sendfile sys_sendfile64 +40 n64 socket sys_socket +41 n64 connect sys_connect +42 n64 accept sys_accept +43 n64 sendto sys_sendto +44 n64 recvfrom sys_recvfrom +45 n64 sendmsg sys_sendmsg +46 n64 recvmsg sys_recvmsg +47 n64 shutdown sys_shutdown +48 n64 bind sys_bind +49 n64 listen sys_listen +50 n64 getsockname sys_getsockname +51 n64 getpeername sys_getpeername +52 n64 socketpair sys_socketpair +53 n64 setsockopt sys_setsockopt +54 n64 getsockopt sys_getsockopt +55 n64 clone __sys_clone +56 n64 fork __sys_fork +57 n64 execve sys_execve +58 n64 exit sys_exit +59 n64 wait4 sys_wait4 +60 n64 kill sys_kill +61 n64 uname sys_newuname +62 n64 semget sys_semget +63 n64 semop sys_semop +64 n64 semctl sys_semctl +65 n64 shmdt sys_shmdt +66 n64 msgget sys_msgget +67 n64 msgsnd sys_msgsnd +68 n64 msgrcv sys_msgrcv +69 n64 msgctl sys_msgctl +70 n64 fcntl sys_fcntl +71 n64 flock sys_flock +72 n64 fsync sys_fsync +73 n64 fdatasync sys_fdatasync +74 n64 truncate sys_truncate +75 n64 ftruncate sys_ftruncate +76 n64 getdents sys_getdents +77 n64 getcwd sys_getcwd +78 n64 chdir sys_chdir +79 n64 fchdir sys_fchdir +80 n64 rename sys_rename +81 n64 mkdir sys_mkdir +82 n64 rmdir sys_rmdir +83 n64 creat sys_creat +84 n64 link sys_link +85 n64 unlink sys_unlink +86 n64 symlink sys_symlink +87 n64 readlink sys_readlink +88 n64 chmod sys_chmod +89 n64 fchmod sys_fchmod +90 n64 chown sys_chown +91 n64 fchown sys_fchown +92 n64 lchown sys_lchown +93 n64 umask sys_umask +94 n64 gettimeofday sys_gettimeofday +95 n64 getrlimit sys_getrlimit +96 n64 getrusage sys_getrusage +97 n64 sysinfo sys_sysinfo +98 n64 times sys_times +99 n64 ptrace sys_ptrace +100 n64 getuid sys_getuid +101 n64 syslog sys_syslog +102 n64 getgid sys_getgid +103 n64 setuid sys_setuid +104 n64 setgid sys_setgid +105 n64 geteuid sys_geteuid +106 n64 getegid sys_getegid +107 n64 setpgid sys_setpgid +108 n64 getppid sys_getppid +109 n64 getpgrp sys_getpgrp +110 n64 setsid sys_setsid +111 n64 setreuid sys_setreuid +112 n64 setregid sys_setregid +113 n64 getgroups sys_getgroups +114 n64 setgroups sys_setgroups +115 n64 setresuid sys_setresuid +116 n64 getresuid sys_getresuid +117 n64 setresgid sys_setresgid +118 n64 getresgid sys_getresgid +119 n64 getpgid sys_getpgid +120 n64 setfsuid sys_setfsuid +121 n64 setfsgid sys_setfsgid +122 n64 getsid sys_getsid +123 n64 capget sys_capget +124 n64 capset sys_capset +125 n64 rt_sigpending sys_rt_sigpending +126 n64 rt_sigtimedwait sys_rt_sigtimedwait +127 n64 rt_sigqueueinfo sys_rt_sigqueueinfo +128 n64 rt_sigsuspend sys_rt_sigsuspend +129 n64 sigaltstack sys_sigaltstack +130 n64 utime sys_utime +131 n64 mknod sys_mknod +132 n64 personality sys_personality +133 n64 ustat sys_ustat +134 n64 statfs sys_statfs +135 n64 fstatfs sys_fstatfs +136 n64 sysfs sys_sysfs +137 n64 getpriority sys_getpriority +138 n64 setpriority sys_setpriority +139 n64 sched_setparam sys_sched_setparam +140 n64 sched_getparam sys_sched_getparam +141 n64 sched_setscheduler sys_sched_setscheduler +142 n64 sched_getscheduler sys_sched_getscheduler +143 n64 sched_get_priority_max sys_sched_get_priority_max +144 n64 sched_get_priority_min sys_sched_get_priority_min +145 n64 sched_rr_get_interval sys_sched_rr_get_interval +146 n64 mlock sys_mlock +147 n64 munlock sys_munlock +148 n64 mlockall sys_mlockall +149 n64 munlockall sys_munlockall +150 n64 vhangup sys_vhangup +151 n64 pivot_root sys_pivot_root +152 n64 _sysctl sys_sysctl +153 n64 prctl sys_prctl +154 n64 adjtimex sys_adjtimex +155 n64 setrlimit sys_setrlimit +156 n64 chroot sys_chroot +157 n64 sync sys_sync +158 n64 acct sys_acct +159 n64 settimeofday sys_settimeofday +160 n64 mount sys_mount +161 n64 umount2 sys_umount +162 n64 swapon sys_swapon +163 n64 swapoff sys_swapoff +164 n64 reboot sys_reboot +165 n64 sethostname sys_sethostname +166 n64 setdomainname sys_setdomainname +167 n64 create_module sys_ni_syscall +168 n64 init_module sys_init_module +169 n64 delete_module sys_delete_module +170 n64 get_kernel_syms sys_ni_syscall +171 n64 query_module sys_ni_syscall +172 n64 quotactl sys_quotactl +173 n64 nfsservctl sys_ni_syscall +174 n64 getpmsg sys_ni_syscall +175 n64 putpmsg sys_ni_syscall +176 n64 afs_syscall sys_ni_syscall +# 177 reserved for security +177 n64 reserved177 sys_ni_syscall +178 n64 gettid sys_gettid +179 n64 readahead sys_readahead +180 n64 setxattr sys_setxattr +181 n64 lsetxattr sys_lsetxattr +182 n64 fsetxattr sys_fsetxattr +183 n64 getxattr sys_getxattr +184 n64 lgetxattr sys_lgetxattr +185 n64 fgetxattr sys_fgetxattr +186 n64 listxattr sys_listxattr +187 n64 llistxattr sys_llistxattr +188 n64 flistxattr sys_flistxattr +189 n64 removexattr sys_removexattr +190 n64 lremovexattr sys_lremovexattr +191 n64 fremovexattr sys_fremovexattr +192 n64 tkill sys_tkill +193 n64 reserved193 sys_ni_syscall +194 n64 futex sys_futex +195 n64 sched_setaffinity sys_sched_setaffinity +196 n64 sched_getaffinity sys_sched_getaffinity +197 n64 cacheflush sys_cacheflush +198 n64 cachectl sys_cachectl +199 n64 sysmips __sys_sysmips +200 n64 io_setup sys_io_setup +201 n64 io_destroy sys_io_destroy +202 n64 io_getevents sys_io_getevents +203 n64 io_submit sys_io_submit +204 n64 io_cancel sys_io_cancel +205 n64 exit_group sys_exit_group +206 n64 lookup_dcookie sys_lookup_dcookie +207 n64 epoll_create sys_epoll_create +208 n64 epoll_ctl sys_epoll_ctl +209 n64 epoll_wait sys_epoll_wait +210 n64 remap_file_pages sys_remap_file_pages +211 n64 rt_sigreturn sys_rt_sigreturn +212 n64 set_tid_address sys_set_tid_address +213 n64 restart_syscall sys_restart_syscall +214 n64 semtimedop sys_semtimedop +215 n64 fadvise64 sys_fadvise64_64 +216 n64 timer_create sys_timer_create +217 n64 timer_settime sys_timer_settime +218 n64 timer_gettime sys_timer_gettime +219 n64 timer_getoverrun sys_timer_getoverrun +220 n64 timer_delete sys_timer_delete +221 n64 clock_settime sys_clock_settime +222 n64 clock_gettime sys_clock_gettime +223 n64 clock_getres sys_clock_getres +224 n64 clock_nanosleep sys_clock_nanosleep +225 n64 tgkill sys_tgkill +226 n64 utimes sys_utimes +227 n64 mbind sys_mbind +228 n64 get_mempolicy sys_get_mempolicy +229 n64 set_mempolicy sys_set_mempolicy +230 n64 mq_open sys_mq_open +231 n64 mq_unlink sys_mq_unlink +232 n64 mq_timedsend sys_mq_timedsend +233 n64 mq_timedreceive sys_mq_timedreceive +234 n64 mq_notify sys_mq_notify +235 n64 mq_getsetattr sys_mq_getsetattr +236 n64 vserver sys_ni_syscall +237 n64 waitid sys_waitid +# 238 was sys_setaltroot +239 n64 add_key sys_add_key +240 n64 request_key sys_request_key +241 n64 keyctl sys_keyctl +242 n64 set_thread_area sys_set_thread_area +243 n64 inotify_init sys_inotify_init +244 n64 inotify_add_watch sys_inotify_add_watch +245 n64 inotify_rm_watch sys_inotify_rm_watch +246 n64 migrate_pages sys_migrate_pages +247 n64 openat sys_openat +248 n64 mkdirat sys_mkdirat +249 n64 mknodat sys_mknodat +250 n64 fchownat sys_fchownat +251 n64 futimesat sys_futimesat +252 n64 newfstatat sys_newfstatat +253 n64 unlinkat sys_unlinkat +254 n64 renameat sys_renameat +255 n64 linkat sys_linkat +256 n64 symlinkat sys_symlinkat +257 n64 readlinkat sys_readlinkat +258 n64 fchmodat sys_fchmodat +259 n64 faccessat sys_faccessat +260 n64 pselect6 sys_pselect6 +261 n64 ppoll sys_ppoll +262 n64 unshare sys_unshare +263 n64 splice sys_splice +264 n64 sync_file_range sys_sync_file_range +265 n64 tee sys_tee +266 n64 vmsplice sys_vmsplice +267 n64 move_pages sys_move_pages +268 n64 set_robust_list sys_set_robust_list +269 n64 get_robust_list sys_get_robust_list +270 n64 kexec_load sys_kexec_load +271 n64 getcpu sys_getcpu +272 n64 epoll_pwait sys_epoll_pwait +273 n64 ioprio_set sys_ioprio_set +274 n64 ioprio_get sys_ioprio_get +275 n64 utimensat sys_utimensat +276 n64 signalfd sys_signalfd +277 n64 timerfd sys_ni_syscall +278 n64 eventfd sys_eventfd +279 n64 fallocate sys_fallocate +280 n64 timerfd_create sys_timerfd_create +281 n64 timerfd_gettime sys_timerfd_gettime +282 n64 timerfd_settime sys_timerfd_settime +283 n64 signalfd4 sys_signalfd4 +284 n64 eventfd2 sys_eventfd2 +285 n64 epoll_create1 sys_epoll_create1 +286 n64 dup3 sys_dup3 +287 n64 pipe2 sys_pipe2 +288 n64 inotify_init1 sys_inotify_init1 +289 n64 preadv sys_preadv +290 n64 pwritev sys_pwritev +291 n64 rt_tgsigqueueinfo sys_rt_tgsigqueueinfo +292 n64 perf_event_open sys_perf_event_open +293 n64 accept4 sys_accept4 +294 n64 recvmmsg sys_recvmmsg +295 n64 fanotify_init sys_fanotify_init +296 n64 fanotify_mark sys_fanotify_mark +297 n64 prlimit64 sys_prlimit64 +298 n64 name_to_handle_at sys_name_to_handle_at +299 n64 open_by_handle_at sys_open_by_handle_at +300 n64 clock_adjtime sys_clock_adjtime +301 n64 syncfs sys_syncfs +302 n64 sendmmsg sys_sendmmsg +303 n64 setns sys_setns +304 n64 process_vm_readv sys_process_vm_readv +305 n64 process_vm_writev sys_process_vm_writev +306 n64 kcmp sys_kcmp +307 n64 finit_module sys_finit_module +308 n64 getdents64 sys_getdents64 +309 n64 sched_setattr sys_sched_setattr +310 n64 sched_getattr sys_sched_getattr +311 n64 renameat2 sys_renameat2 +312 n64 seccomp sys_seccomp +313 n64 getrandom sys_getrandom +314 n64 memfd_create sys_memfd_create +315 n64 bpf sys_bpf +316 n64 execveat sys_execveat +317 n64 userfaultfd sys_userfaultfd +318 n64 membarrier sys_membarrier +319 n64 mlock2 sys_mlock2 +320 n64 copy_file_range sys_copy_file_range +321 n64 preadv2 sys_preadv2 +322 n64 pwritev2 sys_pwritev2 +323 n64 pkey_mprotect sys_pkey_mprotect +324 n64 pkey_alloc sys_pkey_alloc +325 n64 pkey_free sys_pkey_free +326 n64 statx sys_statx +327 n64 rseq sys_rseq +328 n64 io_pgetevents sys_io_pgetevents diff --git a/arch/mips/kernel/syscalls/syscall_o32.tbl b/arch/mips/kernel/syscalls/syscall_o32.tbl new file mode 100644 index 000000000000..3d5a47b80d2b --- /dev/null +++ b/arch/mips/kernel/syscalls/syscall_o32.tbl @@ -0,0 +1,382 @@ +# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note +# +# system call numbers and entry vectors for mips +# +# The format is: +# <number> <abi> <name> <entry point> <compat entry point> +# +# The <abi> is always "o32" for this file. +# +0 o32 syscall sys_syscall sys32_syscall +1 o32 exit sys_exit +2 o32 fork __sys_fork +3 o32 read sys_read +4 o32 write sys_write +5 o32 open sys_open compat_sys_open +6 o32 close sys_close +7 o32 waitpid sys_waitpid +8 o32 creat sys_creat +9 o32 link sys_link +10 o32 unlink sys_unlink +11 o32 execve sys_execve compat_sys_execve +12 o32 chdir sys_chdir +13 o32 time sys_time compat_sys_time +14 o32 mknod sys_mknod +15 o32 chmod sys_chmod +16 o32 lchown sys_lchown +17 o32 break sys_ni_syscall +# 18 was sys_stat +18 o32 unused18 sys_ni_syscall +19 o32 lseek sys_lseek +20 o32 getpid sys_getpid +21 o32 mount sys_mount compat_sys_mount +22 o32 umount sys_oldumount +23 o32 setuid sys_setuid +24 o32 getuid sys_getuid +25 o32 stime sys_stime compat_sys_stime +26 o32 ptrace sys_ptrace compat_sys_ptrace +27 o32 alarm sys_alarm +# 28 was sys_fstat +28 o32 unused28 sys_ni_syscall +29 o32 pause sys_pause +30 o32 utime sys_utime compat_sys_utime +31 o32 stty sys_ni_syscall +32 o32 gtty sys_ni_syscall +33 o32 access sys_access +34 o32 nice sys_nice +35 o32 ftime sys_ni_syscall +36 o32 sync sys_sync +37 o32 kill sys_kill +38 o32 rename sys_rename +39 o32 mkdir sys_mkdir +40 o32 rmdir sys_rmdir +41 o32 dup sys_dup +42 o32 pipe sysm_pipe +43 o32 times sys_times compat_sys_times +44 o32 prof sys_ni_syscall +45 o32 brk sys_brk +46 o32 setgid sys_setgid +47 o32 getgid sys_getgid +48 o32 signal sys_ni_syscall +49 o32 geteuid sys_geteuid +50 o32 getegid sys_getegid +51 o32 acct sys_acct +52 o32 umount2 sys_umount +53 o32 lock sys_ni_syscall +54 o32 ioctl sys_ioctl compat_sys_ioctl +55 o32 fcntl sys_fcntl compat_sys_fcntl +56 o32 mpx sys_ni_syscall +57 o32 setpgid sys_setpgid +58 o32 ulimit sys_ni_syscall +59 o32 unused59 sys_olduname +60 o32 umask sys_umask +61 o32 chroot sys_chroot +62 o32 ustat sys_ustat compat_sys_ustat +63 o32 dup2 sys_dup2 +64 o32 getppid sys_getppid +65 o32 getpgrp sys_getpgrp +66 o32 setsid sys_setsid +67 o32 sigaction sys_sigaction sys_32_sigaction +68 o32 sgetmask sys_sgetmask +69 o32 ssetmask sys_ssetmask +70 o32 setreuid sys_setreuid +71 o32 setregid sys_setregid +72 o32 sigsuspend sys_sigsuspend sys32_sigsuspend +73 o32 sigpending sys_sigpending compat_sys_sigpending +74 o32 sethostname sys_sethostname +75 o32 setrlimit sys_setrlimit compat_sys_setrlimit +76 o32 getrlimit sys_getrlimit compat_sys_getrlimit +77 o32 getrusage sys_getrusage compat_sys_getrusage +78 o32 gettimeofday sys_gettimeofday compat_sys_gettimeofday +79 o32 settimeofday sys_settimeofday compat_sys_settimeofday +80 o32 getgroups sys_getgroups +81 o32 setgroups sys_setgroups +# 82 was old_select +82 o32 reserved82 sys_ni_syscall +83 o32 symlink sys_symlink +# 84 was sys_lstat +84 o32 unused84 sys_ni_syscall +85 o32 readlink sys_readlink +86 o32 uselib sys_uselib +87 o32 swapon sys_swapon +88 o32 reboot sys_reboot +89 o32 readdir sys_old_readdir compat_sys_old_readdir +90 o32 mmap sys_mips_mmap +91 o32 munmap sys_munmap +92 o32 truncate sys_truncate compat_sys_truncate +93 o32 ftruncate sys_ftruncate compat_sys_ftruncate +94 o32 fchmod sys_fchmod +95 o32 fchown sys_fchown +96 o32 getpriority sys_getpriority +97 o32 setpriority sys_setpriority +98 o32 profil sys_ni_syscall +99 o32 statfs sys_statfs compat_sys_statfs +100 o32 fstatfs sys_fstatfs compat_sys_fstatfs +101 o32 ioperm sys_ni_syscall +102 o32 socketcall sys_socketcall compat_sys_socketcall +103 o32 syslog sys_syslog +104 o32 setitimer sys_setitimer compat_sys_setitimer +105 o32 getitimer sys_getitimer compat_sys_getitimer +106 o32 stat sys_newstat compat_sys_newstat +107 o32 lstat sys_newlstat compat_sys_newlstat +108 o32 fstat sys_newfstat compat_sys_newfstat +109 o32 unused109 sys_uname +110 o32 iopl sys_ni_syscall +111 o32 vhangup sys_vhangup +112 o32 idle sys_ni_syscall +113 o32 vm86 sys_ni_syscall +114 o32 wait4 sys_wait4 compat_sys_wait4 +115 o32 swapoff sys_swapoff +116 o32 sysinfo sys_sysinfo compat_sys_sysinfo +117 o32 ipc sys_ipc compat_sys_ipc +118 o32 fsync sys_fsync +119 o32 sigreturn sys_sigreturn sys32_sigreturn +120 o32 clone __sys_clone +121 o32 setdomainname sys_setdomainname +122 o32 uname sys_newuname +123 o32 modify_ldt sys_ni_syscall +124 o32 adjtimex sys_adjtimex compat_sys_adjtimex +125 o32 mprotect sys_mprotect +126 o32 sigprocmask sys_sigprocmask compat_sys_sigprocmask +127 o32 create_module sys_ni_syscall +128 o32 init_module sys_init_module +129 o32 delete_module sys_delete_module +130 o32 get_kernel_syms sys_ni_syscall +131 o32 quotactl sys_quotactl +132 o32 getpgid sys_getpgid +133 o32 fchdir sys_fchdir +134 o32 bdflush sys_bdflush +135 o32 sysfs sys_sysfs +136 o32 personality sys_personality sys_32_personality +137 o32 afs_syscall sys_ni_syscall +138 o32 setfsuid sys_setfsuid +139 o32 setfsgid sys_setfsgid +140 o32 _llseek sys_llseek sys_32_llseek +141 o32 getdents sys_getdents compat_sys_getdents +142 o32 _newselect sys_select compat_sys_select +143 o32 flock sys_flock +144 o32 msync sys_msync +145 o32 readv sys_readv compat_sys_readv +146 o32 writev sys_writev compat_sys_writev +147 o32 cacheflush sys_cacheflush +148 o32 cachectl sys_cachectl +149 o32 sysmips __sys_sysmips +150 o32 unused150 sys_ni_syscall +151 o32 getsid sys_getsid +152 o32 fdatasync sys_fdatasync +153 o32 _sysctl sys_sysctl compat_sys_sysctl +154 o32 mlock sys_mlock +155 o32 munlock sys_munlock +156 o32 mlockall sys_mlockall +157 o32 munlockall sys_munlockall +158 o32 sched_setparam sys_sched_setparam +159 o32 sched_getparam sys_sched_getparam +160 o32 sched_setscheduler sys_sched_setscheduler +161 o32 sched_getscheduler sys_sched_getscheduler +162 o32 sched_yield sys_sched_yield +163 o32 sched_get_priority_max sys_sched_get_priority_max +164 o32 sched_get_priority_min sys_sched_get_priority_min +165 o32 sched_rr_get_interval sys_sched_rr_get_interval compat_sys_sched_rr_get_interval +166 o32 nanosleep sys_nanosleep compat_sys_nanosleep +167 o32 mremap sys_mremap +168 o32 accept sys_accept +169 o32 bind sys_bind +170 o32 connect sys_connect +171 o32 getpeername sys_getpeername +172 o32 getsockname sys_getsockname +173 o32 getsockopt sys_getsockopt compat_sys_getsockopt +174 o32 listen sys_listen +175 o32 recv sys_recv compat_sys_recv +176 o32 recvfrom sys_recvfrom compat_sys_recvfrom +177 o32 recvmsg sys_recvmsg compat_sys_recvmsg +178 o32 send sys_send +179 o32 sendmsg sys_sendmsg compat_sys_sendmsg +180 o32 sendto sys_sendto +181 o32 setsockopt sys_setsockopt compat_sys_setsockopt +182 o32 shutdown sys_shutdown +183 o32 socket sys_socket +184 o32 socketpair sys_socketpair +185 o32 setresuid sys_setresuid +186 o32 getresuid sys_getresuid +187 o32 query_module sys_ni_syscall +188 o32 poll sys_poll +189 o32 nfsservctl sys_ni_syscall +190 o32 setresgid sys_setresgid +191 o32 getresgid sys_getresgid +192 o32 prctl sys_prctl +193 o32 rt_sigreturn sys_rt_sigreturn sys32_rt_sigreturn +194 o32 rt_sigaction sys_rt_sigaction compat_sys_rt_sigaction +195 o32 rt_sigprocmask sys_rt_sigprocmask compat_sys_rt_sigprocmask +196 o32 rt_sigpending sys_rt_sigpending compat_sys_rt_sigpending +197 o32 rt_sigtimedwait sys_rt_sigtimedwait compat_sys_rt_sigtimedwait +198 o32 rt_sigqueueinfo sys_rt_sigqueueinfo compat_sys_rt_sigqueueinfo +199 o32 rt_sigsuspend sys_rt_sigsuspend compat_sys_rt_sigsuspend +200 o32 pread64 sys_pread64 sys_32_pread +201 o32 pwrite64 sys_pwrite64 sys_32_pwrite +202 o32 chown sys_chown +203 o32 getcwd sys_getcwd +204 o32 capget sys_capget +205 o32 capset sys_capset +206 o32 sigaltstack sys_sigaltstack compat_sys_sigaltstack +207 o32 sendfile sys_sendfile compat_sys_sendfile +208 o32 getpmsg sys_ni_syscall +209 o32 putpmsg sys_ni_syscall +210 o32 mmap2 sys_mips_mmap2 +211 o32 truncate64 sys_truncate64 sys_32_truncate64 +212 o32 ftruncate64 sys_ftruncate64 sys_32_ftruncate64 +213 o32 stat64 sys_stat64 sys_newstat +214 o32 lstat64 sys_lstat64 sys_newlstat +215 o32 fstat64 sys_fstat64 sys_newfstat +216 o32 pivot_root sys_pivot_root +217 o32 mincore sys_mincore +218 o32 madvise sys_madvise +219 o32 getdents64 sys_getdents64 +220 o32 fcntl64 sys_fcntl64 compat_sys_fcntl64 +221 o32 reserved221 sys_ni_syscall +222 o32 gettid sys_gettid +223 o32 readahead sys_readahead sys32_readahead +224 o32 setxattr sys_setxattr +225 o32 lsetxattr sys_lsetxattr +226 o32 fsetxattr sys_fsetxattr +227 o32 getxattr sys_getxattr +228 o32 lgetxattr sys_lgetxattr +229 o32 fgetxattr sys_fgetxattr +230 o32 listxattr sys_listxattr +231 o32 llistxattr sys_llistxattr +232 o32 flistxattr sys_flistxattr +233 o32 removexattr sys_removexattr +234 o32 lremovexattr sys_lremovexattr +235 o32 fremovexattr sys_fremovexattr +236 o32 tkill sys_tkill +237 o32 sendfile64 sys_sendfile64 +238 o32 futex sys_futex compat_sys_futex +239 o32 sched_setaffinity sys_sched_setaffinity compat_sys_sched_setaffinity +240 o32 sched_getaffinity sys_sched_getaffinity compat_sys_sched_getaffinity +241 o32 io_setup sys_io_setup compat_sys_io_setup +242 o32 io_destroy sys_io_destroy +243 o32 io_getevents sys_io_getevents compat_sys_io_getevents +244 o32 io_submit sys_io_submit compat_sys_io_submit +245 o32 io_cancel sys_io_cancel +246 o32 exit_group sys_exit_group +247 o32 lookup_dcookie sys_lookup_dcookie compat_sys_lookup_dcookie +248 o32 epoll_create sys_epoll_create +249 o32 epoll_ctl sys_epoll_ctl +250 o32 epoll_wait sys_epoll_wait +251 o32 remap_file_pages sys_remap_file_pages +252 o32 set_tid_address sys_set_tid_address +253 o32 restart_syscall sys_restart_syscall +254 o32 fadvise64 sys_fadvise64_64 sys32_fadvise64_64 +255 o32 statfs64 sys_statfs64 compat_sys_statfs64 +256 o32 fstatfs64 sys_fstatfs64 compat_sys_fstatfs64 +257 o32 timer_create sys_timer_create compat_sys_timer_create +258 o32 timer_settime sys_timer_settime compat_sys_timer_settime +259 o32 timer_gettime sys_timer_gettime compat_sys_timer_gettime +260 o32 timer_getoverrun sys_timer_getoverrun +261 o32 timer_delete sys_timer_delete +262 o32 clock_settime sys_clock_settime compat_sys_clock_settime +263 o32 clock_gettime sys_clock_gettime compat_sys_clock_gettime +264 o32 clock_getres sys_clock_getres compat_sys_clock_getres +265 o32 clock_nanosleep sys_clock_nanosleep compat_sys_clock_nanosleep +266 o32 tgkill sys_tgkill +267 o32 utimes sys_utimes compat_sys_utimes +268 o32 mbind sys_mbind compat_sys_mbind +269 o32 get_mempolicy sys_get_mempolicy compat_sys_get_mempolicy +270 o32 set_mempolicy sys_set_mempolicy compat_sys_set_mempolicy +271 o32 mq_open sys_mq_open compat_sys_mq_open +272 o32 mq_unlink sys_mq_unlink +273 o32 mq_timedsend sys_mq_timedsend compat_sys_mq_timedsend +274 o32 mq_timedreceive sys_mq_timedreceive compat_sys_mq_timedreceive +275 o32 mq_notify sys_mq_notify compat_sys_mq_notify +276 o32 mq_getsetattr sys_mq_getsetattr compat_sys_mq_getsetattr +277 o32 vserver sys_ni_syscall +278 o32 waitid sys_waitid compat_sys_waitid +# 279 was sys_setaltroot +280 o32 add_key sys_add_key +281 o32 request_key sys_request_key +282 o32 keyctl sys_keyctl compat_sys_keyctl +283 o32 set_thread_area sys_set_thread_area +284 o32 inotify_init sys_inotify_init +285 o32 inotify_add_watch sys_inotify_add_watch +286 o32 inotify_rm_watch sys_inotify_rm_watch +287 o32 migrate_pages sys_migrate_pages compat_sys_migrate_pages +288 o32 openat sys_openat compat_sys_openat +289 o32 mkdirat sys_mkdirat +290 o32 mknodat sys_mknodat +291 o32 fchownat sys_fchownat +292 o32 futimesat sys_futimesat compat_sys_futimesat +293 o32 fstatat64 sys_fstatat64 sys_newfstatat +294 o32 unlinkat sys_unlinkat +295 o32 renameat sys_renameat +296 o32 linkat sys_linkat +297 o32 symlinkat sys_symlinkat +298 o32 readlinkat sys_readlinkat +299 o32 fchmodat sys_fchmodat +300 o32 faccessat sys_faccessat +301 o32 pselect6 sys_pselect6 compat_sys_pselect6 +302 o32 ppoll sys_ppoll compat_sys_ppoll +303 o32 unshare sys_unshare +304 o32 splice sys_splice +305 o32 sync_file_range sys_sync_file_range sys32_sync_file_range +306 o32 tee sys_tee +307 o32 vmsplice sys_vmsplice compat_sys_vmsplice +308 o32 move_pages sys_move_pages compat_sys_move_pages +309 o32 set_robust_list sys_set_robust_list compat_sys_set_robust_list +310 o32 get_robust_list sys_get_robust_list compat_sys_get_robust_list +311 o32 kexec_load sys_kexec_load compat_sys_kexec_load +312 o32 getcpu sys_getcpu +313 o32 epoll_pwait sys_epoll_pwait compat_sys_epoll_pwait +314 o32 ioprio_set sys_ioprio_set +315 o32 ioprio_get sys_ioprio_get +316 o32 utimensat sys_utimensat compat_sys_utimensat +317 o32 signalfd sys_signalfd compat_sys_signalfd +318 o32 timerfd sys_ni_syscall +319 o32 eventfd sys_eventfd +320 o32 fallocate sys_fallocate sys32_fallocate +321 o32 timerfd_create sys_timerfd_create +322 o32 timerfd_gettime sys_timerfd_gettime compat_sys_timerfd_gettime +323 o32 timerfd_settime sys_timerfd_settime compat_sys_timerfd_settime +324 o32 signalfd4 sys_signalfd4 compat_sys_signalfd4 +325 o32 eventfd2 sys_eventfd2 +326 o32 epoll_create1 sys_epoll_create1 +327 o32 dup3 sys_dup3 +328 o32 pipe2 sys_pipe2 +329 o32 inotify_init1 sys_inotify_init1 +330 o32 preadv sys_preadv compat_sys_preadv +331 o32 pwritev sys_pwritev compat_sys_pwritev +332 o32 rt_tgsigqueueinfo sys_rt_tgsigqueueinfo compat_sys_rt_tgsigqueueinfo +333 o32 perf_event_open sys_perf_event_open +334 o32 accept4 sys_accept4 +335 o32 recvmmsg sys_recvmmsg compat_sys_recvmmsg +336 o32 fanotify_init sys_fanotify_init +337 o32 fanotify_mark sys_fanotify_mark compat_sys_fanotify_mark +338 o32 prlimit64 sys_prlimit64 +339 o32 name_to_handle_at sys_name_to_handle_at +340 o32 open_by_handle_at sys_open_by_handle_at compat_sys_open_by_handle_at +341 o32 clock_adjtime sys_clock_adjtime compat_sys_clock_adjtime +342 o32 syncfs sys_syncfs +343 o32 sendmmsg sys_sendmmsg compat_sys_sendmmsg +344 o32 setns sys_setns +345 o32 process_vm_readv sys_process_vm_readv compat_sys_process_vm_readv +346 o32 process_vm_writev sys_process_vm_writev compat_sys_process_vm_writev +347 o32 kcmp sys_kcmp +348 o32 finit_module sys_finit_module +349 o32 sched_setattr sys_sched_setattr +350 o32 sched_getattr sys_sched_getattr +351 o32 renameat2 sys_renameat2 +352 o32 seccomp sys_seccomp +353 o32 getrandom sys_getrandom +354 o32 memfd_create sys_memfd_create +355 o32 bpf sys_bpf +356 o32 execveat sys_execveat compat_sys_execveat +357 o32 userfaultfd sys_userfaultfd +358 o32 membarrier sys_membarrier +359 o32 mlock2 sys_mlock2 +360 o32 copy_file_range sys_copy_file_range +361 o32 preadv2 sys_preadv2 compat_sys_preadv2 +362 o32 pwritev2 sys_pwritev2 compat_sys_pwritev2 +363 o32 pkey_mprotect sys_pkey_mprotect +364 o32 pkey_alloc sys_pkey_alloc +365 o32 pkey_free sys_pkey_free +366 o32 statx sys_statx +367 o32 rseq sys_rseq +368 o32 io_pgetevents sys_io_pgetevents compat_sys_io_pgetevents diff --git a/arch/mips/kernel/syscalls/syscallhdr.sh b/arch/mips/kernel/syscalls/syscallhdr.sh new file mode 100644 index 000000000000..d2bcfa8f4d1a --- /dev/null +++ b/arch/mips/kernel/syscalls/syscallhdr.sh @@ -0,0 +1,37 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 + +in="$1" +out="$2" +my_abis=`echo "($3)" | tr ',' '|'` +prefix="$4" +offset="$5" + +fileguard=_UAPI_ASM_MIPS_`basename "$out" | sed \ + -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \ + -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'` +grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | ( + printf "#ifndef %s\n" "${fileguard}" + printf "#define %s\n" "${fileguard}" + printf "\n" + + nxt=0 + while read nr abi name entry compat ; do + if [ -z "$offset" ]; then + printf "#define __NR_%s%s\t%s\n" \ + "${prefix}" "${name}" "${nr}" + else + printf "#define __NR_%s%s\t(%s + %s)\n" \ + "${prefix}" "${name}" "${offset}" "${nr}" + fi + nxt=$((nr+1)) + done + + printf "\n" + printf "#ifdef __KERNEL__\n" + printf "#define __NR_syscalls\t%s\n" "${nxt}" + printf "#endif\n" + printf "\n" + printf "#endif /* %s */" "${fileguard}" + printf "\n" +) > "$out" diff --git a/arch/mips/kernel/syscalls/syscallnr.sh b/arch/mips/kernel/syscalls/syscallnr.sh new file mode 100644 index 000000000000..60bbdb3fe03a --- /dev/null +++ b/arch/mips/kernel/syscalls/syscallnr.sh @@ -0,0 +1,28 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 + +in="$1" +out="$2" +my_abis=`echo "($3)" | tr ',' '|'` +prefix="$4" +offset="$5" + +fileguard=_UAPI_ASM_MIPS_`basename "$out" | sed \ + -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \ + -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'` +grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | ( + printf "#ifndef %s\n" "${fileguard}" + printf "#define %s\n" "${fileguard}" + printf "\n" + + nxt=0 + while read nr abi name entry compat ; do + nxt=$((nr+1)) + done + + printf "#define __NR_%s_Linux\t%s\n" "${prefix}" "${offset}" + printf "#define __NR_%s_Linux_syscalls\t%s\n" "${prefix}" "${nxt}" + printf "\n" + printf "#endif /* %s */" "${fileguard}" + printf "\n" +) > "$out" diff --git a/arch/mips/kernel/syscalls/syscalltbl.sh b/arch/mips/kernel/syscalls/syscalltbl.sh new file mode 100644 index 000000000000..acd338d33bbe --- /dev/null +++ b/arch/mips/kernel/syscalls/syscalltbl.sh @@ -0,0 +1,36 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 + +in="$1" +out="$2" +my_abis=`echo "($3)" | tr ',' '|'` +my_abi="$4" +offset="$5" + +emit() { + t_nxt="$1" + t_nr="$2" + t_entry="$3" + + while [ $t_nxt -lt $t_nr ]; do + printf "__SYSCALL(%s, sys_ni_syscall, )\n" "${t_nxt}" + t_nxt=$((t_nxt+1)) + done + printf "__SYSCALL(%s, %s, )\n" "${t_nxt}" "${t_entry}" +} + +grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | ( + nxt=0 + if [ -z "$offset" ]; then + offset=0 + fi + + while read nr abi name entry compat ; do + if [ "$my_abi" = "64_o32" ] && [ ! -z "$compat" ]; then + emit $((nxt+offset)) $((nr+offset)) $compat + else + emit $((nxt+offset)) $((nr+offset)) $entry + fi + nxt=$((nr+1)) + done +) > "$out" diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 15e103c6d799..c91097f7b32f 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -50,6 +50,7 @@ #include <asm/fpu.h> #include <asm/fpu_emulator.h> #include <asm/idle.h> +#include <asm/isa-rev.h> #include <asm/mips-cps.h> #include <asm/mips-r2-to-r6-emul.h> #include <asm/mipsregs.h> @@ -277,8 +278,10 @@ static void __show_regs(const struct pt_regs *regs) #ifdef CONFIG_CPU_HAS_SMARTMIPS printk("Acx : %0*lx\n", field, regs->acx); #endif - printk("Hi : %0*lx\n", field, regs->hi); - printk("Lo : %0*lx\n", field, regs->lo); + if (MIPS_ISA_REV < 6) { + printk("Hi : %0*lx\n", field, regs->hi); + printk("Lo : %0*lx\n", field, regs->lo); + } /* * Saved cp0 registers @@ -706,6 +709,8 @@ asmlinkage void do_ov(struct pt_regs *regs) exception_exit(prev_state); } +#ifdef CONFIG_MIPS_FP_SUPPORT + /* * Send SIGFPE according to FCSR Cause bits, which must have already * been masked against Enable bits. This is impotant as Inexact can @@ -794,9 +799,6 @@ static int simulate_fp(struct pt_regs *regs, unsigned int opcode, regs->cp0_epc = old_epc; regs->regs[31] = old_ra; - /* Save the FP context to struct thread_struct */ - lose_fpu(1); - /* Run the emulator */ sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, &fault_addr); @@ -848,8 +850,6 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) * register operands before invoking the emulator, which seems * a bit extreme for what should be an infrequent event. */ - /* Ensure 'resume' not overwrite saved fp context again. */ - lose_fpu(1); /* Run the emulator */ sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, @@ -876,6 +876,45 @@ out: exception_exit(prev_state); } +/* + * MIPS MT processors may have fewer FPU contexts than CPU threads. If we've + * emulated more than some threshold number of instructions, force migration to + * a "CPU" that has FP support. + */ +static void mt_ase_fp_affinity(void) +{ +#ifdef CONFIG_MIPS_MT_FPAFF + if (mt_fpemul_threshold > 0 && + ((current->thread.emulated_fp++ > mt_fpemul_threshold))) { + /* + * If there's no FPU present, or if the application has already + * restricted the allowed set to exclude any CPUs with FPUs, + * we'll skip the procedure. + */ + if (cpumask_intersects(¤t->cpus_allowed, &mt_fpu_cpumask)) { + cpumask_t tmask; + + current->thread.user_cpus_allowed + = current->cpus_allowed; + cpumask_and(&tmask, ¤t->cpus_allowed, + &mt_fpu_cpumask); + set_cpus_allowed_ptr(current, &tmask); + set_thread_flag(TIF_FPUBOUND); + } + } +#endif /* CONFIG_MIPS_MT_FPAFF */ +} + +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +static int simulate_fp(struct pt_regs *regs, unsigned int opcode, + unsigned long old_epc, unsigned long old_ra) +{ + return -1; +} + +#endif /* !CONFIG_MIPS_FP_SUPPORT */ + void do_trap_or_bp(struct pt_regs *regs, unsigned int code, int si_code, const char *str) { @@ -1160,35 +1199,6 @@ out: } /* - * MIPS MT processors may have fewer FPU contexts than CPU threads. If we've - * emulated more than some threshold number of instructions, force migration to - * a "CPU" that has FP support. - */ -static void mt_ase_fp_affinity(void) -{ -#ifdef CONFIG_MIPS_MT_FPAFF - if (mt_fpemul_threshold > 0 && - ((current->thread.emulated_fp++ > mt_fpemul_threshold))) { - /* - * If there's no FPU present, or if the application has already - * restricted the allowed set to exclude any CPUs with FPUs, - * we'll skip the procedure. - */ - if (cpumask_intersects(¤t->cpus_allowed, &mt_fpu_cpumask)) { - cpumask_t tmask; - - current->thread.user_cpus_allowed - = current->cpus_allowed; - cpumask_and(&tmask, ¤t->cpus_allowed, - &mt_fpu_cpumask); - set_cpus_allowed_ptr(current, &tmask); - set_thread_flag(TIF_FPUBOUND); - } - } -#endif /* CONFIG_MIPS_MT_FPAFF */ -} - -/* * No lock; only written during early bootup by CPU 0. */ static RAW_NOTIFIER_HEAD(cu2_chain); @@ -1215,23 +1225,25 @@ static int default_cu2_call(struct notifier_block *nfb, unsigned long action, return NOTIFY_OK; } +#ifdef CONFIG_MIPS_FP_SUPPORT + static int enable_restore_fp_context(int msa) { int err, was_fpu_owner, prior_msa; + bool first_fp; + + /* Initialize context if it hasn't been used already */ + first_fp = init_fp_ctx(current); - if (!used_math()) { - /* First time FP context user. */ + if (first_fp) { preempt_disable(); - err = init_fpu(); + err = own_fpu_inatomic(1); if (msa && !err) { enable_msa(); - init_msa_upper(); set_thread_flag(TIF_USEDMSA); set_thread_flag(TIF_MSA_CTX_LIVE); } preempt_enable(); - if (!err) - set_used_math(); return err; } @@ -1322,17 +1334,23 @@ out: return 0; } +#else /* !CONFIG_MIPS_FP_SUPPORT */ + +static int enable_restore_fp_context(int msa) +{ + return SIGILL; +} + +#endif /* CONFIG_MIPS_FP_SUPPORT */ + asmlinkage void do_cpu(struct pt_regs *regs) { enum ctx_state prev_state; unsigned int __user *epc; unsigned long old_epc, old31; - void __user *fault_addr; unsigned int opcode; - unsigned long fcr31; unsigned int cpid; - int status, err; - int sig; + int status; prev_state = exception_enter(); cpid = (regs->cp0_cause >> CAUSEB_CE) & 3; @@ -1370,6 +1388,7 @@ asmlinkage void do_cpu(struct pt_regs *regs) break; +#ifdef CONFIG_MIPS_FP_SUPPORT case 3: /* * The COP3 opcode space and consequently the CP0.Status.CU3 @@ -1389,7 +1408,11 @@ asmlinkage void do_cpu(struct pt_regs *regs) } /* Fall through. */ - case 1: + case 1: { + void __user *fault_addr; + unsigned long fcr31; + int err, sig; + err = enable_restore_fp_context(0); if (raw_cpu_has_fpu && !err) @@ -1410,6 +1433,13 @@ asmlinkage void do_cpu(struct pt_regs *regs) mt_ase_fp_affinity(); break; + } +#else /* CONFIG_MIPS_FP_SUPPORT */ + case 1: + case 3: + force_sig(SIGILL, current); + break; +#endif /* CONFIG_MIPS_FP_SUPPORT */ case 2: raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs); diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index ce446eed62d2..c60e7719ef77 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -882,18 +882,12 @@ do { \ static void emulate_load_store_insn(struct pt_regs *regs, void __user *addr, unsigned int __user *pc) { + unsigned long origpc, orig31, value; union mips_instruction insn; - unsigned long value; - unsigned int res, preempted; - unsigned long origpc; - unsigned long orig31; - void __user *fault_addr = NULL; + unsigned int res; #ifdef CONFIG_EVA mm_segment_t seg; #endif - union fpureg *fpr; - enum msa_2b_fmt df; - unsigned int wd; origpc = (unsigned long)pc; orig31 = regs->regs[31]; @@ -1212,15 +1206,18 @@ static void emulate_load_store_insn(struct pt_regs *regs, /* Cannot handle 64-bit instructions in 32-bit kernel */ goto sigill; +#ifdef CONFIG_MIPS_FP_SUPPORT + case lwc1_op: case ldc1_op: case swc1_op: case sdc1_op: - case cop1x_op: + case cop1x_op: { + void __user *fault_addr = NULL; + die_if_kernel("Unaligned FP access in kernel code", regs); BUG_ON(!used_math()); - lose_fpu(1); /* Save FPU state for the emulator. */ res = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, &fault_addr); own_fpu(1); /* Restore FPU state. */ @@ -1231,8 +1228,16 @@ static void emulate_load_store_insn(struct pt_regs *regs, if (res == 0) break; return; + } +#endif /* CONFIG_MIPS_FP_SUPPORT */ + +#ifdef CONFIG_CPU_HAS_MSA + + case msa_op: { + unsigned int wd, preempted; + enum msa_2b_fmt df; + union fpureg *fpr; - case msa_op: if (!cpu_has_msa) goto sigill; @@ -1309,6 +1314,8 @@ static void emulate_load_store_insn(struct pt_regs *regs, compute_return_epc(regs); break; + } +#endif /* CONFIG_CPU_HAS_MSA */ #ifndef CONFIG_CPU_MIPSR6 /* @@ -1393,7 +1400,6 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs, unsigned long origpc, contpc; union mips_instruction insn; struct mm_decoded_insn mminsn; - void __user *fault_addr = NULL; origpc = regs->cp0_epc; orig31 = regs->regs[31]; @@ -1709,6 +1715,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs, /* LL,SC,LLD,SCD are not serviced */ goto sigbus; +#ifdef CONFIG_MIPS_FP_SUPPORT case mm_pool32f_op: switch (insn.mm_x_format.func) { case mm_lwxc1_func: @@ -1723,7 +1730,9 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs, case mm_ldc132_op: case mm_sdc132_op: case mm_lwc132_op: - case mm_swc132_op: + case mm_swc132_op: { + void __user *fault_addr = NULL; + fpu_emul: /* roll back jump/branch */ regs->cp0_epc = origpc; @@ -1733,7 +1742,6 @@ fpu_emul: BUG_ON(!used_math()); BUG_ON(!is_fpu_owner()); - lose_fpu(1); /* save the FPU state for the emulator */ res = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, &fault_addr); own_fpu(1); /* restore FPU state */ @@ -1744,6 +1752,8 @@ fpu_emul: if (res == 0) goto success; return; + } +#endif /* CONFIG_MIPS_FP_SUPPORT */ case mm_lh32_op: reg = insn.mm_i_format.rt; @@ -2338,7 +2348,7 @@ asmlinkage void do_ade(struct pt_regs *regs) set_fs(seg); return; - } + } goto sigbus; } diff --git a/arch/mips/kernel/vdso.c b/arch/mips/kernel/vdso.c index 48a9c6b90e07..9df3ebdc7b0f 100644 --- a/arch/mips/kernel/vdso.c +++ b/arch/mips/kernel/vdso.c @@ -126,8 +126,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) /* Map delay slot emulation page */ base = mmap_region(NULL, STACK_TOP, PAGE_SIZE, - VM_READ|VM_WRITE|VM_EXEC| - VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC, + VM_READ | VM_EXEC | + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC, 0, NULL); if (IS_ERR_VALUE(base)) { ret = base; diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 971a504001c2..cb7e9ed7a453 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -72,7 +72,7 @@ SECTIONS /* Exception table for data bus errors */ __dbe_table : { __start___dbe_table = .; - *(__dbe_table) + KEEP(*(__dbe_table)) __stop___dbe_table = .; } @@ -123,7 +123,7 @@ SECTIONS . = ALIGN(4); .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { __mips_machines_start = .; - *(.mips.machines.init) + KEEP(*(.mips.machines.init)) __mips_machines_end = .; } diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c index 0e61a5b7647f..ba73b4077668 100644 --- a/arch/mips/kernel/watch.c +++ b/arch/mips/kernel/watch.c @@ -27,12 +27,15 @@ void mips_install_watch_registers(struct task_struct *t) case 4: write_c0_watchlo3(watches->watchlo[3]); write_c0_watchhi3(watchhi | watches->watchhi[3]); + /* fall through */ case 3: write_c0_watchlo2(watches->watchlo[2]); write_c0_watchhi2(watchhi | watches->watchhi[2]); + /* fall through */ case 2: write_c0_watchlo1(watches->watchlo[1]); write_c0_watchhi1(watchhi | watches->watchhi[1]); + /* fall through */ case 1: write_c0_watchlo0(watches->watchlo[0]); write_c0_watchhi0(watchhi | watches->watchhi[0]); @@ -55,10 +58,13 @@ void mips_read_watch_registers(void) BUG(); case 4: watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask); + /* fall through */ case 3: watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask); + /* fall through */ case 2: watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask); + /* fall through */ case 1: watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask); } @@ -85,18 +91,25 @@ void mips_clear_watch_registers(void) BUG(); case 8: write_c0_watchlo7(0); + /* fall through */ case 7: write_c0_watchlo6(0); + /* fall through */ case 6: write_c0_watchlo5(0); + /* fall through */ case 5: write_c0_watchlo4(0); + /* fall through */ case 4: write_c0_watchlo3(0); + /* fall through */ case 3: write_c0_watchlo2(0); + /* fall through */ case 2: write_c0_watchlo1(0); + /* fall through */ case 1: write_c0_watchlo0(0); } diff --git a/arch/mips/kvm/Kconfig b/arch/mips/kvm/Kconfig index 76b93a9c8c9b..760aec70dce5 100644 --- a/arch/mips/kvm/Kconfig +++ b/arch/mips/kvm/Kconfig @@ -18,6 +18,7 @@ if VIRTUALIZATION config KVM tristate "Kernel-based Virtual Machine (KVM) support" depends on HAVE_KVM + depends on MIPS_FP_SUPPORT select EXPORT_UASM select PREEMPT_NOTIFIERS select ANON_INODES diff --git a/arch/mips/loongson64/common/env.c b/arch/mips/loongson64/common/env.c index 8f68ee02a8c2..72e5f8fb2b35 100644 --- a/arch/mips/loongson64/common/env.c +++ b/arch/mips/loongson64/common/env.c @@ -197,7 +197,8 @@ void __init prom_init_env(void) cpu_clock_freq = 797000000; break; case PRID_REV_LOONGSON3A_R1: - case PRID_REV_LOONGSON3A_R2: + case PRID_REV_LOONGSON3A_R2_0: + case PRID_REV_LOONGSON3A_R2_1: case PRID_REV_LOONGSON3A_R3_0: case PRID_REV_LOONGSON3A_R3_1: cpu_clock_freq = 900000000; diff --git a/arch/mips/loongson64/loongson-3/cop2-ex.c b/arch/mips/loongson64/loongson-3/cop2-ex.c index 621d6af5f6eb..9efdfe430ff0 100644 --- a/arch/mips/loongson64/loongson-3/cop2-ex.c +++ b/arch/mips/loongson64/loongson-3/cop2-ex.c @@ -43,11 +43,8 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action, /* If FPU is owned, we needn't init or restore fp */ if (!fpu_owned) { set_thread_flag(TIF_USEDFPU); - if (!used_math()) { - _init_fpu(current->thread.fpu.fcr31); - set_used_math(); - } else - _restore_fp(current); + init_fp_ctx(current); + _restore_fp(current); } preempt_enable(); diff --git a/arch/mips/loongson64/loongson-3/smp.c b/arch/mips/loongson64/loongson-3/smp.c index b5c1e0aa955e..8fba0aa48bf4 100644 --- a/arch/mips/loongson64/loongson-3/smp.c +++ b/arch/mips/loongson64/loongson-3/smp.c @@ -682,7 +682,8 @@ void play_dead(void) play_dead_at_ckseg1 = (void *)CKSEG1ADDR((unsigned long)loongson3a_r1_play_dead); break; - case PRID_REV_LOONGSON3A_R2: + case PRID_REV_LOONGSON3A_R2_0: + case PRID_REV_LOONGSON3A_R2_1: case PRID_REV_LOONGSON3A_R3_0: case PRID_REV_LOONGSON3A_R3_1: play_dead_at_ckseg1 = diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 62deb025970b..82e2993c1a2c 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -2831,6 +2831,13 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, u16 *instr_ptr; int sig = 0; + /* + * Initialize context if it hasn't been used already, otherwise ensure + * it has been saved to struct thread_struct. + */ + if (!init_fp_ctx(current)) + lose_fpu(1); + oldepc = xcp->cp0_epc; do { prevepc = xcp->cp0_epc; diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c index 5450f4d1c920..e2d46cb93ca9 100644 --- a/arch/mips/math-emu/dsemul.c +++ b/arch/mips/math-emu/dsemul.c @@ -214,8 +214,9 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, { int isa16 = get_isa16_mode(regs->cp0_epc); mips_instruction break_math; - struct emuframe __user *fr; - int err, fr_idx; + unsigned long fr_uaddr; + struct emuframe fr; + int fr_idx, ret; /* NOP is easy */ if (ir == 0) @@ -250,27 +251,31 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, fr_idx = alloc_emuframe(); if (fr_idx == BD_EMUFRAME_NONE) return SIGBUS; - fr = &dsemul_page()[fr_idx]; /* Retrieve the appropriately encoded break instruction */ break_math = BREAK_MATH(isa16); /* Write the instructions to the frame */ if (isa16) { - err = __put_user(ir >> 16, - (u16 __user *)(&fr->emul)); - err |= __put_user(ir & 0xffff, - (u16 __user *)((long)(&fr->emul) + 2)); - err |= __put_user(break_math >> 16, - (u16 __user *)(&fr->badinst)); - err |= __put_user(break_math & 0xffff, - (u16 __user *)((long)(&fr->badinst) + 2)); + union mips_instruction _emul = { + .halfword = { ir >> 16, ir } + }; + union mips_instruction _badinst = { + .halfword = { break_math >> 16, break_math } + }; + + fr.emul = _emul.word; + fr.badinst = _badinst.word; } else { - err = __put_user(ir, &fr->emul); - err |= __put_user(break_math, &fr->badinst); + fr.emul = ir; + fr.badinst = break_math; } - if (unlikely(err)) { + /* Write the frame to user memory */ + fr_uaddr = (unsigned long)&dsemul_page()[fr_idx]; + ret = access_process_vm(current, fr_uaddr, &fr, sizeof(fr), + FOLL_FORCE | FOLL_WRITE); + if (unlikely(ret != sizeof(fr))) { MIPS_FPU_EMU_INC_STATS(errors); free_emuframe(fr_idx, current->mm); return SIGBUS; @@ -282,10 +287,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, atomic_set(¤t->thread.bd_emu_frame, fr_idx); /* Change user register context to execute the frame */ - regs->cp0_epc = (unsigned long)&fr->emul | isa16; - - /* Ensure the icache observes our newly written frame */ - flush_cache_sigtramp((unsigned long)&fr->emul); + regs->cp0_epc = fr_uaddr | isa16; return 0; } diff --git a/arch/mips/math-emu/me-debugfs.c b/arch/mips/math-emu/me-debugfs.c index 62566385ce0e..58798f527356 100644 --- a/arch/mips/math-emu/me-debugfs.c +++ b/arch/mips/math-emu/me-debugfs.c @@ -183,17 +183,7 @@ static int fpuemustats_clear_show(struct seq_file *s, void *unused) return 0; } -static int fpuemustats_clear_open(struct inode *inode, struct file *file) -{ - return single_open(file, fpuemustats_clear_show, inode->i_private); -} - -static const struct file_operations fpuemustats_clear_fops = { - .open = fpuemustats_clear_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(fpuemustats_clear); static int __init debugfs_fpuemu(void) { diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index 3466fcdae0ca..01848cdf2074 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c @@ -245,7 +245,7 @@ static void r3k_flush_cache_page(struct vm_area_struct *vma, pmd_t *pmdp; pte_t *ptep; - pr_debug("cpage[%08lx,%08lx]\n", + pr_debug("cpage[%08llx,%08lx]\n", cpu_context(smp_processor_id(), mm), addr); /* No ASID => no such page in the cache. */ diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 05bd77727fb9..d0b64df51eb2 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -459,11 +459,28 @@ static void r4k_blast_scache_setup(void) r4k_blast_scache = blast_scache128; } +static void (*r4k_blast_scache_node)(long node); + +static void r4k_blast_scache_node_setup(void) +{ + unsigned long sc_lsize = cpu_scache_line_size(); + + if (current_cpu_type() != CPU_LOONGSON3) + r4k_blast_scache_node = (void *)cache_noop; + else if (sc_lsize == 16) + r4k_blast_scache_node = blast_scache16_node; + else if (sc_lsize == 32) + r4k_blast_scache_node = blast_scache32_node; + else if (sc_lsize == 64) + r4k_blast_scache_node = blast_scache64_node; + else if (sc_lsize == 128) + r4k_blast_scache_node = blast_scache128_node; +} + static inline void local_r4k___flush_cache_all(void * args) { switch (current_cpu_type()) { case CPU_LOONGSON2: - case CPU_LOONGSON3: case CPU_R4000SC: case CPU_R4000MC: case CPU_R4400SC: @@ -480,6 +497,11 @@ static inline void local_r4k___flush_cache_all(void * args) r4k_blast_scache(); break; + case CPU_LOONGSON3: + /* Use get_ebase_cpunum() for both NUMA=y/n */ + r4k_blast_scache_node(get_ebase_cpunum() >> 2); + break; + case CPU_BMIPS5000: r4k_blast_scache(); __sync(); @@ -840,10 +862,14 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size) preempt_disable(); if (cpu_has_inclusive_pcaches) { - if (size >= scache_size) - r4k_blast_scache(); - else + if (size >= scache_size) { + if (current_cpu_type() != CPU_LOONGSON3) + r4k_blast_scache(); + else + r4k_blast_scache_node(pa_to_nid(addr)); + } else { blast_scache_range(addr, addr + size); + } preempt_enable(); __sync(); return; @@ -877,9 +903,12 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size) preempt_disable(); if (cpu_has_inclusive_pcaches) { - if (size >= scache_size) - r4k_blast_scache(); - else { + if (size >= scache_size) { + if (current_cpu_type() != CPU_LOONGSON3) + r4k_blast_scache(); + else + r4k_blast_scache_node(pa_to_nid(addr)); + } else { /* * There is no clearly documented alignment requirement * for the cache instruction on MIPS processors and @@ -1251,6 +1280,7 @@ static void probe_pcache(void) case CPU_VR4133: write_c0_config(config & ~VR41_CONF_P4K); + /* fall through */ case CPU_VR4131: /* Workaround for cache instruction bug of VR4131 */ if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U || @@ -1352,7 +1382,7 @@ static void probe_pcache(void) c->dcache.ways * c->dcache.linesz; c->dcache.waybit = 0; - if ((prid & PRID_REV_MASK) >= PRID_REV_LOONGSON3A_R2) + if ((prid & PRID_REV_MASK) >= PRID_REV_LOONGSON3A_R2_0) c->options |= MIPS_CPU_PREFETCH; break; @@ -1498,6 +1528,7 @@ static void probe_pcache(void) c->dcache.flags |= MIPS_CACHE_PINDEX; break; } + /* fall through */ default: if (has_74k_erratum || c->dcache.waysize > PAGE_SIZE) c->dcache.flags |= MIPS_CACHE_ALIASES; @@ -1918,6 +1949,7 @@ void r4k_cache_init(void) r4k_blast_scache_page_setup(); r4k_blast_scache_page_indexed_setup(); r4k_blast_scache_setup(); + r4k_blast_scache_node_setup(); #ifdef CONFIG_EVA r4k_blast_dcache_user_page_setup(); r4k_blast_icache_user_page_setup(); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 067714291643..37b1cb246332 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -576,6 +576,7 @@ void build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_R5500: if (m4kc_tlbp_war()) uasm_i_nop(p); + /* fall through */ case CPU_ALCHEMY: tlbw(p); break; diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile index 17c7fd471a27..94c11f5eac74 100644 --- a/arch/mips/mti-malta/Makefile +++ b/arch/mips/mti-malta/Makefile @@ -6,7 +6,6 @@ # Copyright (C) 2008 Wind River Systems, Inc. # written by Ralf Baechle <ralf@linux-mips.org> # -obj-y += malta-display.o obj-y += malta-dt.o obj-y += malta-dtshim.o obj-y += malta-init.o diff --git a/arch/mips/mti-malta/malta-display.c b/arch/mips/mti-malta/malta-display.c deleted file mode 100644 index ee0bd50f754b..000000000000 --- a/arch/mips/mti-malta/malta-display.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Display routines for display messages in MIPS boards ascii display. - * - * Copyright (C) 1999,2000,2012 MIPS Technologies, Inc. - * All rights reserved. - * Authors: Carsten Langgaard <carstenl@mips.com> - * Steven J. Hill <sjhill@mips.com> - */ -#include <linux/compiler.h> -#include <linux/timer.h> -#include <linux/io.h> - -#include <asm/mips-boards/generic.h> - -extern const char display_string[]; -static unsigned int display_count; -static unsigned int max_display_count; - -void mips_display_message(const char *str) -{ - static unsigned int __iomem *display = NULL; - int i; - - if (unlikely(display == NULL)) - display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); - - for (i = 0; i <= 14; i += 2) { - if (*str) - __raw_writel(*str++, display + i); - else - __raw_writel(' ', display + i); - } -} - -static void scroll_display_message(struct timer_list *unused); -static DEFINE_TIMER(mips_scroll_timer, scroll_display_message); - -static void scroll_display_message(struct timer_list *unused) -{ - mips_display_message(&display_string[display_count++]); - if (display_count == max_display_count) - display_count = 0; - - mod_timer(&mips_scroll_timer, jiffies + HZ); -} - -void mips_scroll_message(void) -{ - del_timer_sync(&mips_scroll_timer); - max_display_count = strlen(display_string) + 1 - 8; - mod_timer(&mips_scroll_timer, jiffies + 1); -} diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index 009f2918b320..ff2c1d809538 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c @@ -118,8 +118,6 @@ phys_addr_t mips_cpc_default_phys_base(void) void __init prom_init(void) { - mips_display_message("LINUX"); - /* * early setup of _pcictrl_bonito so that we can determine * the system controller on a CORE_EMUL board @@ -277,7 +275,6 @@ mips_pci_controller: default: /* Unknown system controller */ - mips_display_message("SC Error"); while (1); /* We die here... */ } board_nmi_handler_setup = mips_nmi_setup; diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index 5d4c5e5fbd69..85c6c11ebcea 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c @@ -81,8 +81,6 @@ const char *get_system_type(void) return "MIPS Malta"; } -const char display_string[] = " LINUX ON MALTA "; - #ifdef CONFIG_BLK_DEV_FD static void __init fd_activate(void) { diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index d22b7edc3886..f403574a1e6f 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c @@ -251,8 +251,6 @@ void __init plat_time_init(void) printk("CPU frequency %d.%02d MHz\n", freq/1000000, (freq%1000000)*100/1000000); - mips_scroll_message(); - #ifdef CONFIG_I8253 /* Only Malta has a PIT. */ setup_pit_timer(); diff --git a/arch/mips/pci/fixup-sb1250.c b/arch/mips/pci/fixup-sb1250.c index 8feae9154baf..45266406b585 100644 --- a/arch/mips/pci/fixup-sb1250.c +++ b/arch/mips/pci/fixup-sb1250.c @@ -1,6 +1,7 @@ /* * Copyright (C) 2004, 2006 MIPS Technologies, Inc. All rights reserved. * Author: Maciej W. Rozycki <macro@mips.com> + * Copyright (C) 2018 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -8,6 +9,7 @@ * 2 of the License, or (at your option) any later version. */ +#include <linux/dma-mapping.h> #include <linux/pci.h> /* @@ -22,6 +24,57 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI, quirk_sb1250_pci); /* + * The BCM1250, etc. PCI host bridge does not support DAC on its 32-bit + * bus, so we set the bus's DMA mask accordingly. However the HT link + * down the artificial PCI-HT bridge supports 40-bit addressing and the + * SP1011 HT-PCI bridge downstream supports both DAC and a 64-bit bus + * width, so we record the PCI-HT bridge's secondary and subordinate bus + * numbers and do not set the mask for devices present in the inclusive + * range of those. + */ +struct sb1250_bus_dma_mask_exclude { + bool set; + unsigned char start; + unsigned char end; +}; + +static int sb1250_bus_dma_mask(struct pci_dev *dev, void *data) +{ + struct sb1250_bus_dma_mask_exclude *exclude = data; + bool exclude_this; + bool ht_bridge; + + exclude_this = exclude->set && (dev->bus->number >= exclude->start && + dev->bus->number <= exclude->end); + ht_bridge = !exclude->set && (dev->vendor == PCI_VENDOR_ID_SIBYTE && + dev->device == PCI_DEVICE_ID_BCM1250_HT); + + if (exclude_this) { + dev_dbg(&dev->dev, "not disabling DAC for device"); + } else if (ht_bridge) { + exclude->start = dev->subordinate->number; + exclude->end = pci_bus_max_busnr(dev->subordinate); + exclude->set = true; + dev_dbg(&dev->dev, "not disabling DAC for [bus %02x-%02x]", + exclude->start, exclude->end); + } else { + dev_dbg(&dev->dev, "disabling DAC for device"); + dev->dev.bus_dma_mask = DMA_BIT_MASK(32); + } + + return 0; +} + +static void quirk_sb1250_pci_dac(struct pci_dev *dev) +{ + struct sb1250_bus_dma_mask_exclude exclude = { .set = false }; + + pci_walk_bus(dev->bus, sb1250_bus_dma_mask, &exclude); +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI, + quirk_sb1250_pci_dac); + +/* * The BCM1250, etc. PCI/HT bridge reports as a host bridge. */ static void quirk_sb1250_ht(struct pci_dev *dev) diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c index 958899ffe99c..bafbf69e7dc4 100644 --- a/arch/mips/pci/pci-rt3883.c +++ b/arch/mips/pci/pci-rt3883.c @@ -445,8 +445,7 @@ static int rt3883_pci_probe(struct platform_device *pdev) /* find the PCI host bridge child node */ for_each_child_of_node(np, child) { - if (child->type && - of_node_cmp(child->type, "pci") == 0) { + if (of_node_is_type(child, "pci")) { rpc->pci_controller.of_node = child; break; } @@ -464,8 +463,7 @@ static int rt3883_pci_probe(struct platform_device *pdev) for_each_available_child_of_node(rpc->pci_controller.of_node, child) { int devfn; - if (!child->type || - of_node_cmp(child->type, "pci") != 0) + if (!of_node_is_type(child, "pci")) continue; devfn = of_pci_get_devfn(child); diff --git a/arch/mips/sibyte/common/Makefile b/arch/mips/sibyte/common/Makefile index b3d6bf23a662..3ef3fb658136 100644 --- a/arch/mips/sibyte/common/Makefile +++ b/arch/mips/sibyte/common/Makefile @@ -1,4 +1,5 @@ obj-y := cfe.o +obj-$(CONFIG_SWIOTLB) += dma.o obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o obj-$(CONFIG_SIBYTE_CFE_CONSOLE) += cfe_console.o obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o diff --git a/arch/mips/sibyte/common/dma.c b/arch/mips/sibyte/common/dma.c new file mode 100644 index 000000000000..eb47a94f3583 --- /dev/null +++ b/arch/mips/sibyte/common/dma.c @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * DMA support for Broadcom SiByte platforms. + * + * Copyright (c) 2018 Maciej W. Rozycki + */ + +#include <linux/swiotlb.h> +#include <asm/bootinfo.h> + +void __init plat_swiotlb_setup(void) +{ + swiotlb_init(1); +} diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile index 58a0315ad743..f6fd340e39c2 100644 --- a/arch/mips/vdso/Makefile +++ b/arch/mips/vdso/Makefile @@ -50,6 +50,7 @@ VDSO_LDFLAGS := \ $(call cc-ldoption, -Wl$(comma)--build-id) GCOV_PROFILE := n +UBSAN_SANITIZE := n # # Shared build commands. |