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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 05:57:33 +0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 18:26:23 +0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /arch/mips/sgi-ip27/TODO
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
downloadlinux-25985edcedea6396277003854657b5f3cb31a628.tar.xz
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'arch/mips/sgi-ip27/TODO')
-rw-r--r--arch/mips/sgi-ip27/TODO2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/sgi-ip27/TODO b/arch/mips/sgi-ip27/TODO
index 19f1512c8f2e..160857ff1483 100644
--- a/arch/mips/sgi-ip27/TODO
+++ b/arch/mips/sgi-ip27/TODO
@@ -13,7 +13,7 @@ being invoked on all nodes in ip27-memory.c.
9. start_thread must turn off UX64 ... and define tlb_refill_debug.
10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable
does not agree with pgd_bad/pmd_bad.
-11. All intrs (ip27_do_irq handlers) are targetted at cpu A on the node.
+11. All intrs (ip27_do_irq handlers) are targeted at cpu A on the node.
This might need to change later. Only the timer intr is set up to be
received on both Cpu A and B. (ip27_do_irq()/bridge_startup())
13. Cache flushing (specially the SMP version) has to be investigated.