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authorMathias Kresin <dev@kresin.me>2018-08-22 23:38:06 +0300
committerPaul Burton <paul.burton@mips.com>2018-08-30 23:25:00 +0300
commit35d017947401d9f449a7e55e52506744e0c62577 (patch)
treef91f96d26eb3b7273178aa48e156f05120941ab6 /arch/mips/ralink
parente966d3084596c62f152bf1dd8028d94792c9c380 (diff)
downloadlinux-35d017947401d9f449a7e55e52506744e0c62577.tar.xz
MIPS: ralink: Add rt3352 SPI_CS1 pinmux
The rt3352 has a pin that can be used as second spi chip select, watchdog reset or GPIO. The pinmux setup was missing the definition of said pin. The pin is configured via the same bit on rt5350, so reuse the existing macro. Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20301/ Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/rt305x.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index 93d472c60ce4..0f2264e0cf76 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -49,6 +49,10 @@ static struct rt2880_pmx_func rgmii_func[] = { FUNC("rgmii", 0, 40, 12) };
static struct rt2880_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) };
static struct rt2880_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) };
static struct rt2880_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) };
+static struct rt2880_pmx_func rt3352_cs1_func[] = {
+ FUNC("spi_cs1", 0, 45, 1),
+ FUNC("wdg_cs1", 1, 45, 1),
+};
static struct rt2880_pmx_group rt3050_pinmux_data[] = {
GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
@@ -75,6 +79,7 @@ static struct rt2880_pmx_group rt3352_pinmux_data[] = {
GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA),
GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA),
GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
+ GRP("spi_cs1", rt3352_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
{ 0 }
};