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author | David Daney <ddaney@caviumnetworks.com> | 2010-01-23 01:41:15 +0300 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 14:53:13 +0300 |
commit | 1b362e3e350f72c6cb4b3346f6ba92a529082a09 (patch) | |
tree | de172b4853b1aaa6684e5b7afed679c88d8ab655 /arch/mips/pci | |
parent | 2a880986d899f556f5a327bc77cc8760d5bb9c64 (diff) | |
download | linux-1b362e3e350f72c6cb4b3346f6ba92a529082a09.tar.xz |
MIPS: Decode c0_config4 for large TLBs.
For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
0 files changed, 0 insertions, 0 deletions