summaryrefslogtreecommitdiff
path: root/arch/mips/pci/fixup-cobalt.c
diff options
context:
space:
mode:
authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-07-02 17:43:06 +0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 20:33:04 +0400
commit2db30150fe4fe309c57087c661209c9ea0b5c21b (patch)
tree7f327ade219e352f3819ab3cd8d53690b75a79d6 /arch/mips/pci/fixup-cobalt.c
parentbd43da8ff130caf31fff0482a75660507a26b641 (diff)
downloadlinux-2db30150fe4fe309c57087c661209c9ea0b5c21b.tar.xz
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
* Fix pci ops for secondary PCIC * Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero) * Use platform_device to provide ethernet addresses for internal NICs. (background: TX49XX SoCs include PCI NIC (TC35815 compatible) connected via its internal PCI bus, but the NIC's PROM interface is not connected to SEEPROM. So we must provide its ethernet address by another way.) * Check return value of early_read_config_word() Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/fixup-cobalt.c')
0 files changed, 0 insertions, 0 deletions