diff options
| author | Huacai Chen <chenhc@lemote.com> | 2016-03-17 15:41:07 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 15:02:14 +0300 |
| commit | 24653515e5d2cb07772919599ad799ce50f8af4f (patch) | |
| tree | 096554215813e9e1630df8c3b79f3366f920ed70 /arch/mips/loongson64 | |
| parent | d0514728247b91476a525a064f8b3c2f0c47bec4 (diff) | |
| download | linux-24653515e5d2cb07772919599ad799ce50f8af4f.tar.xz | |
MIPS: Loongson-3: Adjust irq dispatch to speedup processing
This patch adjust the logic in mach_irq_dispatch(), allow multiple IPs
handled in the same dispatching. This can speedup interrupt processing.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J . Hill <sjhill@realitydiluted.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson64')
| -rw-r--r-- | arch/mips/loongson64/loongson-3/irq.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/loongson64/loongson-3/irq.c b/arch/mips/loongson64/loongson-3/irq.c index 0f75b6b3d218..8e7649088353 100644 --- a/arch/mips/loongson64/loongson-3/irq.c +++ b/arch/mips/loongson64/loongson-3/irq.c @@ -24,19 +24,21 @@ static void ht_irqdispatch(void) } } +#define UNUSED_IPS (CAUSEF_IP5 | CAUSEF_IP4 | CAUSEF_IP1 | CAUSEF_IP0) + void mach_irq_dispatch(unsigned int pending) { if (pending & CAUSEF_IP7) do_IRQ(LOONGSON_TIMER_IRQ); #if defined(CONFIG_SMP) - else if (pending & CAUSEF_IP6) + if (pending & CAUSEF_IP6) loongson3_ipi_interrupt(NULL); #endif - else if (pending & CAUSEF_IP3) + if (pending & CAUSEF_IP3) ht_irqdispatch(); - else if (pending & CAUSEF_IP2) + if (pending & CAUSEF_IP2) do_IRQ(LOONGSON_UART_IRQ); - else { + if (pending & UNUSED_IPS) { pr_err("%s : spurious interrupt\n", __func__); spurious_interrupt(); } |