MIPS: Loongson: Cleanups of serial port support

This patchs uses a loongson_uart_base variable instead of the
uart_base[] array and adds a new kernel option to avoid to compile
uart_base.c all the time, which will save a little bit of memory for us.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
http://patchwork.linux-mips.org/patch/727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4 files changed, 35 insertions, 23 deletions

diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile
index 8d71892413df..7668c4de1151 100644
--- a/arch/mips/loongson/common/Makefile
+++ b/arch/mips/loongson/common/Makefile
@@ -3,13 +3,14 @@
 #
 
 obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
-    pci.o bonito-irq.o mem.o machtype.o platform.o uart_base.o
+    pci.o bonito-irq.o mem.o machtype.o platform.o
 
 #
-# Early printk support
+# Serial port support
 #
 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
 obj-$(CONFIG_SERIAL_8250) += serial.o
+obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o
 
 #
 # Enable CS5536 Virtual Support Module(VSM) to virtulize the PCI configure
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c
index 2b92a23d29dd..a2abd9355737 100644
--- a/arch/mips/loongson/common/init.c
+++ b/arch/mips/loongson/common/init.c
@@ -31,9 +31,7 @@ void __init prom_init(void)
 	prom_init_memory();
 
 	/*init the uart base address */
-#if defined(CONFIG_EARLY_PRINTK) || defined(CONFIG_SERIAL_8250)
 	prom_init_uart_base();
-#endif
 }
 
 void __init prom_free_prom_memory(void)
diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c
index ea29db099aee..23b66a5f88cb 100644
--- a/arch/mips/loongson/common/serial.c
+++ b/arch/mips/loongson/common/serial.c
@@ -57,12 +57,16 @@ static struct platform_device uart8250_device = {
 
 static int __init serial_init(void)
 {
-	if (uart8250_data[mips_machtype][0].iotype == UPIO_MEM)
+	unsigned char iotype;
+
+	iotype = uart8250_data[mips_machtype][0].iotype;
+
+	if (UPIO_MEM == iotype)
 		uart8250_data[mips_machtype][0].membase =
 			(void __iomem *)_loongson_uart_base;
-	else if (uart8250_data[mips_machtype][0].iotype == UPIO_PORT)
+	else if (UPIO_PORT == iotype)
 		uart8250_data[mips_machtype][0].iobase =
-		    uart8250_base[mips_machtype] - LOONGSON_PCIIO_BASE;
+		    loongson_uart_base - LOONGSON_PCIIO_BASE;
 
 	uart8250_device.dev.platform_data = uart8250_data[mips_machtype];
 
diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c
index 1d636f4f7505..78ff66ae749e 100644
--- a/arch/mips/loongson/common/uart_base.c
+++ b/arch/mips/loongson/common/uart_base.c
@@ -13,24 +13,33 @@
 
 #include <loongson.h>
 
-unsigned long __maybe_unused _loongson_uart_base;
+/* ioremapped */
+unsigned long _loongson_uart_base;
 EXPORT_SYMBOL(_loongson_uart_base);
+/* raw */
+unsigned long loongson_uart_base;
+EXPORT_SYMBOL(loongson_uart_base);
 
-unsigned long __maybe_unused uart8250_base[] = {
-	[MACH_LOONGSON_UNKNOWN]	0,
-	[MACH_LEMOTE_FL2E]	(LOONGSON_PCIIO_BASE + 0x3f8),
-	[MACH_LEMOTE_FL2F]	(LOONGSON_PCIIO_BASE + 0x2f8),
-	[MACH_LEMOTE_ML2F7]	(LOONGSON_LIO1_BASE + 0x3f8),
-	[MACH_LEMOTE_YL2F89]	(LOONGSON_LIO1_BASE + 0x3f8),
-	[MACH_DEXXON_GDIUM2F10]	(LOONGSON_LIO1_BASE + 0x3f8),
-	[MACH_LEMOTE_NAS]	(LOONGSON_LIO1_BASE + 0x3f8),
-	[MACH_LEMOTE_LL2F]	(LOONGSON_PCIIO_BASE + 0x2f8),
-	[MACH_LOONGSON_END]	0,
-};
-EXPORT_SYMBOL(uart8250_base);
-
-void __maybe_unused prom_init_uart_base(void)
+void prom_init_loongson_uart_base(void)
 {
+	switch (mips_machtype) {
+	case MACH_LEMOTE_FL2E:
+		loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8;
+		break;
+	case MACH_LEMOTE_FL2F:
+	case MACH_LEMOTE_LL2F:
+		loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8;
+		break;
+	case MACH_LEMOTE_ML2F7:
+	case MACH_LEMOTE_YL2F89:
+	case MACH_DEXXON_GDIUM2F10:
+	case MACH_LEMOTE_NAS:
+	default:
+		/* The CPU provided serial port */
+		loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8;
+		break;
+	}
+
 	_loongson_uart_base =
-		(unsigned long)ioremap_nocache(uart8250_base[mips_machtype], 8);
+		(unsigned long)ioremap_nocache(loongson_uart_base, 8);
 }