diff options
| author | James Hogan <james.hogan@imgtec.com> | 2015-07-15 18:17:46 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-09-03 13:07:48 +0300 |
| commit | 9bd860cae3c46a83371ce899ae0d665b6e253687 (patch) | |
| tree | dd4bb0bbc25a26aacdc4b99d57ae3dc69d69380a /arch/mips/lib | |
| parent | 5d3c3c7d296d9622560558de96875cf694d96f58 (diff) | |
| download | linux-9bd860cae3c46a83371ce899ae0d665b6e253687.tar.xz | |
MIPS: dump_tlb: Dump FrameMask register if exists
The FrameMask register is relevant to the TLB so it should be dumped by
dump_tlb_regs(), however it is only present in certain cores (r10000,
r12000, r14000, r16000). Add dumping of it, conditional upon
current_cpu_type().
Suggested-by: Joshua Kinard <kumba@gentoo.org>
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10724/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib')
| -rw-r--r-- | arch/mips/lib/dump_tlb.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 2ab83be14ffa..64f90f626681 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -23,6 +23,14 @@ void dump_tlb_regs(void) pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0()); pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1()); pr_info("Wired : %0x\n", read_c0_wired()); + switch (current_cpu_type()) { + case CPU_R10000: + case CPU_R12000: + case CPU_R14000: + case CPU_R16000: + pr_info("FrameMask: %0x\n", read_c0_framemask()); + break; + } if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa) pr_info("PageGrain: %0x\n", read_c0_pagegrain()); if (cpu_has_htw) { |