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author | Thomas Gleixner <tglx@linutronix.de> | 2018-05-19 14:55:40 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-19 14:55:40 +0300 |
commit | b563ea676a46f3a297b1e64b6ece25b934aafba5 (patch) | |
tree | 7b18cca93a853b253375d0a3f1cb5af242771768 /arch/mips/lib/memset.S | |
parent | 4fe581d7f114d56f31f392448477cff5a4394065 (diff) | |
parent | 73fcb1a370c76b202d406e95d9dabb76eaccf484 (diff) | |
download | linux-b563ea676a46f3a297b1e64b6ece25b934aafba5.tar.xz |
Merge branch 'linus' into timers/2038
Merge upstream to pick up changes on which pending patches depend on.
Diffstat (limited to 'arch/mips/lib/memset.S')
-rw-r--r-- | arch/mips/lib/memset.S | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S index a1456664d6c2..f7327979a8f8 100644 --- a/arch/mips/lib/memset.S +++ b/arch/mips/lib/memset.S @@ -219,7 +219,7 @@ 1: PTR_ADDIU a0, 1 /* fill bytewise */ R10KCBARRIER(0(ra)) bne t1, a0, 1b - sb a1, -1(a0) + EX(sb, a1, -1(a0), .Lsmall_fixup\@) 2: jr ra /* done */ move a2, zero @@ -252,13 +252,18 @@ PTR_L t0, TI_TASK($28) andi a2, STORMASK LONG_L t0, THREAD_BUADDR(t0) - LONG_ADDU a2, t1 + LONG_ADDU a2, a0 jr ra LONG_SUBU a2, t0 .Llast_fixup\@: jr ra - andi v1, a2, STORMASK + nop + +.Lsmall_fixup\@: + PTR_SUBU a2, t1, a0 + jr ra + PTR_ADDIU a2, 1 .endm |