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author | Steven J. Hill <steven.hill@cavium.com> | 2018-07-04 00:44:21 +0300 |
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committer | Paul Burton <paul.burton@mips.com> | 2018-07-04 02:00:43 +0300 |
commit | 769f4372b2887b7c758f67f4fae82bd5b8555b59 (patch) | |
tree | c93e3c6eaff7253016be805137f661cdd2694936 /arch/mips/include | |
parent | 67701aea341e9e667eae816510523982137b12e6 (diff) | |
download | linux-769f4372b2887b7c758f67f4fae82bd5b8555b59.tar.xz |
MIPS: Octeon: Unify QLM data types in CIU header.
Data types 'cvmx_ciu_qlm0' and 'cvmx_ciu_qlm1' are identical in
their usage and structure. Combine them and update the PCIe code.
Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19708/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/octeon/cvmx-ciu-defs.h | 39 |
1 files changed, 2 insertions, 37 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-ciu-defs.h b/arch/mips/include/asm/octeon/cvmx-ciu-defs.h index 7c2168bdf3ab..f8ca7b7cca69 100644 --- a/arch/mips/include/asm/octeon/cvmx-ciu-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-ciu-defs.h @@ -209,44 +209,9 @@ static inline uint64_t CVMX_CIU_WDOGX(unsigned long offset) return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8; } -union cvmx_ciu_qlm0 { +union cvmx_ciu_qlm { uint64_t u64; - struct cvmx_ciu_qlm0_s { -#ifdef __BIG_ENDIAN_BITFIELD - uint64_t g2bypass:1; - uint64_t reserved_53_62:10; - uint64_t g2deemph:5; - uint64_t reserved_45_47:3; - uint64_t g2margin:5; - uint64_t reserved_32_39:8; - uint64_t txbypass:1; - uint64_t reserved_21_30:10; - uint64_t txdeemph:5; - uint64_t reserved_13_15:3; - uint64_t txmargin:5; - uint64_t reserved_4_7:4; - uint64_t lane_en:4; -#else - uint64_t lane_en:4; - uint64_t reserved_4_7:4; - uint64_t txmargin:5; - uint64_t reserved_13_15:3; - uint64_t txdeemph:5; - uint64_t reserved_21_30:10; - uint64_t txbypass:1; - uint64_t reserved_32_39:8; - uint64_t g2margin:5; - uint64_t reserved_45_47:3; - uint64_t g2deemph:5; - uint64_t reserved_53_62:10; - uint64_t g2bypass:1; -#endif - } s; -}; - -union cvmx_ciu_qlm1 { - uint64_t u64; - struct cvmx_ciu_qlm1_s { + struct cvmx_ciu_qlm_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t g2bypass:1; uint64_t reserved_53_62:10; |