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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-30 21:36:35 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-30 21:36:35 +0400 |
| commit | 915db32ddbc967f023fbf7d7f01cca9e05606a9b (patch) | |
| tree | 1634540805af363e1514d132d9140aa585f9cc9d /arch/mips/include/asm/hazards.h | |
| parent | ebc8eca169be0283d5a7ab54c4411dd59cfb0f27 (diff) | |
| parent | 91e8a30e90144bcd0fead02dc57976f304c3b3f7 (diff) | |
| download | linux-915db32ddbc967f023fbf7d7f01cca9e05606a9b.tar.xz | |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (21 commits)
MIPS: Alchemy: PB1200: use SMC91X platform data.
MIPS: Alchemy: MIPS hazard workarounds are not required.
MIPS: Alchemy: provide cpu feature overrides.
MIPS: Alchemy: unify CPU model constants.
MIPS: Make a needlessly global symbol static in arch/mips/kernel/smp.c
MIPS: Fix global namespace pollution in arch/mips/kernel/smp-up.c
MIPS: Malta: make a needlessly global integer variable static
MIPS: Use BUG_ON() where possible.
MIPS: Convert obsolete irq_desc_t to struct irq_desc
MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms
MIPS: EMMA2RH: Set UART mapbase
MIPS: EMMA2RH: Use set_irq_chip_and_handler_name
MIPS: EMMA2RH: Use handle_edge_irq() handler for GPIO interrupts
MIPS: Mark Eins: Fix cascading interrupt dispatcher
MIPS: Au1000: convert to using gpiolib
MIPS: Stop using <asm-generic/int-l64.h>.
MIPS: Cavium: Add -Werror
MIPS: Makefile: Add simple make install target.
MIPS: Compat: Zero upper 32-bit of offset_high and offset_low.
MIPS: __raw_spin_lock() may spin forever on ticket wrap.
...
Diffstat (limited to 'arch/mips/include/asm/hazards.h')
| -rw-r--r-- | arch/mips/include/asm/hazards.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h index 134e1fc8f4d6..a12d971db4f9 100644 --- a/arch/mips/include/asm/hazards.h +++ b/arch/mips/include/asm/hazards.h @@ -87,7 +87,7 @@ do { \ : "=r" (tmp)); \ } while (0) -#elif defined(CONFIG_CPU_MIPSR1) +#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY) /* * These are slightly complicated by the fact that we guarantee R1 kernels to @@ -139,7 +139,7 @@ do { \ } while (0) #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ - defined(CONFIG_CPU_R5500) + defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. |