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author | Ralf Baechle <ralf@linux-mips.org> | 2015-04-13 17:01:37 +0300 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-13 17:01:37 +0300 |
commit | 98b0429b7abd5c05efdb23f3eba02ec3f696748e (patch) | |
tree | 44e6028c3be974dd42665510ada6a09fb5f8f1be /arch/mips/include/asm/fpu.h | |
parent | 3cf29543413207d3ab1c3f62a88c09bb46f2264e (diff) | |
parent | 1f3a2c6e229ccb8df8115b04d16ad4832767cf3a (diff) | |
download | linux-98b0429b7abd5c05efdb23f3eba02ec3f696748e.tar.xz |
Merge branch '4.1-fp' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/fpu.h')
-rw-r--r-- | arch/mips/include/asm/fpu.h | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index 83d50d563a0f..084780b355aa 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h @@ -48,6 +48,12 @@ enum fpu_mode { #define FPU_FR_MASK 0x1 }; +#define __disable_fpu() \ +do { \ + clear_c0_status(ST0_CU1); \ + disable_fpu_hazard(); \ +} while (0) + static inline int __enable_fpu(enum fpu_mode mode) { int fr; @@ -86,7 +92,12 @@ fr_common: enable_fpu_hazard(); /* check FR has the desired value */ - return (!!(read_c0_status() & ST0_FR) == !!fr) ? 0 : SIGFPE; + if (!!(read_c0_status() & ST0_FR) == !!fr) + return 0; + + /* unsupported FR value */ + __disable_fpu(); + return SIGFPE; default: BUG(); @@ -95,12 +106,6 @@ fr_common: return SIGFPE; } -#define __disable_fpu() \ -do { \ - clear_c0_status(ST0_CU1); \ - disable_fpu_hazard(); \ -} while (0) - #define clear_fpu_owner() clear_thread_flag(TIF_USEDFPU) static inline int __is_fpu_owner(void) @@ -170,6 +175,7 @@ static inline void lose_fpu(int save) } disable_msa(); clear_thread_flag(TIF_USEDMSA); + __disable_fpu(); } else if (is_fpu_owner()) { if (save) _save_fp(current); |